diff options
author | David A. Mellis <d.mellis@arduino.cc> | 2012-09-13 10:41:16 -0400 |
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committer | David A. Mellis <d.mellis@arduino.cc> | 2012-09-13 10:41:16 -0400 |
commit | 0d9a111face4f3629bcae8e52af843792af3b453 (patch) | |
tree | 7cc1b8c1b0c1acb7c90a75f258ce036dac494b17 /firmwares/wifishield/wifi_dnld/src/CONFIG |
Moving into firmwares directory.
Diffstat (limited to 'firmwares/wifishield/wifi_dnld/src/CONFIG')
-rw-r--r-- | firmwares/wifishield/wifi_dnld/src/CONFIG/conf_access.h | 170 | ||||
-rw-r--r-- | firmwares/wifishield/wifi_dnld/src/CONFIG/conf_at45dbx.h | 83 |
2 files changed, 253 insertions, 0 deletions
diff --git a/firmwares/wifishield/wifi_dnld/src/CONFIG/conf_access.h b/firmwares/wifishield/wifi_dnld/src/CONFIG/conf_access.h new file mode 100644 index 0000000..23e9b34 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/CONFIG/conf_access.h @@ -0,0 +1,170 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Memory access control configuration file. + * + * This file contains the possible external configuration of the memory access + * control. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_ACCESS_H_ +#define _CONF_ACCESS_H_ + +#include "compiler.h" +#include "board.h" + + +/*! \name Activation of Logical Unit Numbers + */ +//! @{ +#define LUN_0 DISABLE //!< On-Chip Virtual Memory. +#define LUN_1 ENABLE //!< AT45DBX Data Flash. +#define LUN_2 DISABLE //!< SD/MMC Card over SPI. +#define LUN_3 DISABLE +#define LUN_4 DISABLE +#define LUN_5 DISABLE +#define LUN_6 DISABLE +#define LUN_7 DISABLE +#define LUN_USB DISABLE //!< Host Mass-Storage Memory. +//! @} + +/*! \name LUN 0 Definitions + */ +//! @{ +#define VIRTUAL_MEM LUN_0 +#define LUN_ID_VIRTUAL_MEM LUN_ID_0 +#define LUN_0_INCLUDE "virtual_mem.h" +#define Lun_0_test_unit_ready virtual_test_unit_ready +#define Lun_0_read_capacity virtual_read_capacity +#define Lun_0_wr_protect virtual_wr_protect +#define Lun_0_removal virtual_removal +#define Lun_0_usb_read_10 virtual_usb_read_10 +#define Lun_0_usb_write_10 virtual_usb_write_10 +#define Lun_0_mem_2_ram virtual_mem_2_ram +#define Lun_0_ram_2_mem virtual_ram_2_mem +#define LUN_0_NAME "\"On-Chip Virtual Memory\"" +//! @} + +/*! \name LUN 1 Definitions + */ +//! @{ +#define AT45DBX_MEM LUN_1 +#define LUN_ID_AT45DBX_MEM LUN_ID_1 +#define LUN_1_INCLUDE "at45dbx_mem.h" +#define Lun_1_test_unit_ready at45dbx_test_unit_ready +#define Lun_1_read_capacity at45dbx_read_capacity +#define Lun_1_wr_protect at45dbx_wr_protect +#define Lun_1_removal at45dbx_removal +#define Lun_1_usb_read_10 at45dbx_usb_read_10 +#define Lun_1_usb_write_10 at45dbx_usb_write_10 +#define Lun_1_mem_2_ram at45dbx_df_2_ram +#define Lun_1_ram_2_mem at45dbx_ram_2_df +#define LUN_1_NAME "\"AT45DBX Data Flash\"" +//! @} + +/*! \name LUN 2 Definitions + */ +//! @{ +#define SD_MMC_SPI_MEM LUN_2 +#define LUN_ID_SD_MMC_SPI_MEM LUN_ID_2 +#define LUN_2_INCLUDE "sd_mmc_spi_mem.h" +#define Lun_2_test_unit_ready sd_mmc_spi_test_unit_ready +#define Lun_2_read_capacity sd_mmc_spi_read_capacity +#define Lun_2_wr_protect sd_mmc_spi_wr_protect +#define Lun_2_removal sd_mmc_spi_removal +#define Lun_2_usb_read_10 sd_mmc_spi_usb_read_10 +#define Lun_2_usb_write_10 sd_mmc_spi_usb_write_10 +#define Lun_2_mem_2_ram sd_mmc_spi_mem_2_ram +#define Lun_2_ram_2_mem sd_mmc_spi_ram_2_mem +#define LUN_2_NAME "\"SD/MMC Card over SPI\"" +//! @} + +/*! \name USB LUNs Definitions + */ +//! @{ +#define MEM_USB LUN_USB +#define LUN_ID_MEM_USB LUN_ID_USB +#define LUN_USB_INCLUDE "host_mem.h" +#define Lun_usb_test_unit_ready(lun) host_test_unit_ready(lun) +#define Lun_usb_read_capacity(lun, nb_sect) host_read_capacity(lun, nb_sect) +#define Lun_usb_read_sector_size(lun) host_read_sector_size(lun) +#define Lun_usb_wr_protect(lun) host_wr_protect(lun) +#define Lun_usb_removal() host_removal() +#define Lun_usb_mem_2_ram(addr, ram) host_read_10_ram(addr, ram) +#define Lun_usb_ram_2_mem(addr, ram) host_write_10_ram(addr, ram) +#define LUN_USB_NAME "\"Host Mass-Storage Memory\"" +//! @} + +/*! \name Actions Associated with Memory Accesses + * + * Write here the action to associate with each memory access. + * + * \warning Be careful not to waste time in order not to disturb the functions. + */ +//! @{ +#define memory_start_read_action(nb_sectors) +#define memory_stop_read_action() +#define memory_start_write_action(nb_sectors) +#define memory_stop_write_action() +//! @} + +/*! \name Activation of Interface Features + */ +//! @{ +#define ACCESS_USB DISABLED //!< MEM <-> USB interface. +#define ACCESS_MEM_TO_RAM ENABLED //!< MEM <-> RAM interface. +#define ACCESS_STREAM DISABLED //!< Streaming MEM <-> MEM interface. +#define ACCESS_STREAM_RECORD DISABLED //!< Streaming MEM <-> MEM interface in record mode. +#define ACCESS_MEM_TO_MEM DISABLED //!< MEM <-> MEM interface. +#define ACCESS_CODEC DISABLED //!< Codec interface. +//! @} + +/*! \name Specific Options for Access Control + */ +//! @{ +#define GLOBAL_WR_PROTECT DISABLED //!< Management of a global write protection. +//! @} + + +#endif // _CONF_ACCESS_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/CONFIG/conf_at45dbx.h b/firmwares/wifishield/wifi_dnld/src/CONFIG/conf_at45dbx.h new file mode 100644 index 0000000..3280e4f --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/CONFIG/conf_at45dbx.h @@ -0,0 +1,83 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT45DBX configuration file. + * + * This file contains the possible external configuration of the AT45DBX. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_AT45DBX_H_ +#define _CONF_AT45DBX_H_ + + +#include "conf_access.h" + +#if AT45DBX_MEM == DISABLE + #error conf_at45dbx.h is #included although AT45DBX_MEM is disabled +#endif + + +#include "at45dbx.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +//! Size of AT45DBX data flash memories to manage. +#define AT45DBX_MEM_SIZE AT45DBX_1MB + +//! Number of AT45DBX components to manage. +#define AT45DBX_MEM_CNT 1 + +//! First chip select used by AT45DBX components on the SPI module instance. +//! AT45DBX_SPI_NPCS0_PIN always corresponds to this first NPCS, whatever it is. +#define AT45DBX_SPI_FIRST_NPCS AT45DBX_SPI_NPCS + +//! SPI master speed in Hz. +#define AT45DBX_SPI_MASTER_SPEED 12000000 + +//! Number of bits in each SPI transfer. +#define AT45DBX_SPI_BITS 8 + + +#endif // _CONF_AT45DBX_H_ |