aboutsummaryrefslogtreecommitdiff
path: root/cores/arduino/wiring_analog.c
diff options
context:
space:
mode:
authorDave Madison <dmadison@users.noreply.github.com>2022-02-22 02:32:00 -0500
committerGitHub <noreply@github.com>2022-02-22 02:32:00 -0500
commitd52b6ea456dd145025659359847e3ba8b58b5a27 (patch)
tree7c106c4e741e47ef5dd9f4f45529fd6a6010a896 /cores/arduino/wiring_analog.c
parentf47a97522dc28c16c432422e3085035de69cfaf6 (diff)
parent6f5881438af5b416fe83b0721a51215b9833498c (diff)
Merge pull request #14 from dmadison/upstream-1.8.4
Merge upstream tag '1.8.4'
Diffstat (limited to 'cores/arduino/wiring_analog.c')
-rw-r--r--cores/arduino/wiring_analog.c18
1 files changed, 5 insertions, 13 deletions
diff --git a/cores/arduino/wiring_analog.c b/cores/arduino/wiring_analog.c
index e237d6d..0de64f7 100644
--- a/cores/arduino/wiring_analog.c
+++ b/cores/arduino/wiring_analog.c
@@ -37,7 +37,6 @@ void analogReference(uint8_t mode)
int analogRead(uint8_t pin)
{
- uint8_t low, high;
#if defined(analogPinToChannel)
#if defined(__AVR_ATmega32U4__)
@@ -74,27 +73,20 @@ int analogRead(uint8_t pin)
// without a delay, we seem to read from the wrong channel
//delay(1);
-#if defined(ADCSRA) && defined(ADCL)
+#if defined(ADCSRA) && defined(ADC)
// start the conversion
sbi(ADCSRA, ADSC);
// ADSC is cleared when the conversion finishes
while (bit_is_set(ADCSRA, ADSC));
- // we have to read ADCL first; doing so locks both ADCL
- // and ADCH until ADCH is read. reading ADCL second would
- // cause the results of each conversion to be discarded,
- // as ADCL and ADCH would be locked when it completed.
- low = ADCL;
- high = ADCH;
+ // ADC macro takes care of reading ADC register.
+ // avr-gcc implements the proper reading order: ADCL is read first.
+ return ADC;
#else
// we dont have an ADC, return 0
- low = 0;
- high = 0;
+ return 0;
#endif
-
- // combine the two bytes
- return (high << 8) | low;
}
// Right now, PWM output only works on the pins with