aboutsummaryrefslogtreecommitdiff
path: root/cores
diff options
context:
space:
mode:
authorDavid A. Mellis <d.mellis@arduino.cc>2011-09-30 11:24:44 -0400
committerDavid A. Mellis <d.mellis@arduino.cc>2011-09-30 11:24:44 -0400
commite0c524b05777af20937f48d606ab44cc8f42d2dd (patch)
treee580efe77096bd737a3a2e1c44e3a34dc448e280 /cores
parent62b90824d08ee28d02b5dd95ac47d6a0310ce55f (diff)
Using alternate timer 0 overflow interrupt signal name for ATtiny24/44/84.
Diffstat (limited to 'cores')
-rwxr-xr-xcores/arduino/wiring.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/cores/arduino/wiring.c b/cores/arduino/wiring.c
index ce4cad6..1b3fd44 100755
--- a/cores/arduino/wiring.c
+++ b/cores/arduino/wiring.c
@@ -41,7 +41,11 @@ volatile unsigned long timer0_overflow_count = 0;
volatile unsigned long timer0_millis = 0;
static unsigned char timer0_fract = 0;
+#if defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__)
+SIGNAL(TIM0_OVF_vect)
+#else
SIGNAL(TIMER0_OVF_vect)
+#endif
{
// copy these to local variables so they can be stored in registers
// (volatile variables must be read from memory on every access)