Added patch to bootloader for Mega2560. (Mark Sproul)

See #181 #392 #505 #543 #544

1 files changed, 306 insertions, 8 deletions

diff --git a/bootloaders/stk500v2/avrinterruptnames.h b/bootloaders/stk500v2/avrinterruptnames.h
index 0ae80f9..f862f9a 100644
--- a/bootloaders/stk500v2/avrinterruptnames.h
+++ b/bootloaders/stk500v2/avrinterruptnames.h
@@ -13,6 +13,7 @@
 //*	Jul  4,	2010	<MLS> Started using vector defs for #ifdefs as defined in <avr/io.h>
 //*	Jul 13,	2010	<MLS> Added support for __AVR_ATmega128__
 //*	Aug 26,	2010	<MLS> Added support for __AVR_ATmega2561__
+//*	Sep 13,	2010	<MLS> Added support for __AVR_AT90CAN32__ __AVR_AT90CAN64__ __AVR_AT90CAN128__
 //**************************************************************************************************
 
 //#include	"avrinterruptnames.h"
@@ -253,13 +254,69 @@
 	prog_char	gAvrInt_LCD_StartFrame[]	PROGMEM	=	"LCD Start of Frame";
 #endif
 
+//*	these are for the chips with CAN bus support
+#ifdef CANIT_vect
+	prog_char	gAvrInt_CAN_TrafnsferCE[]	PROGMEM	=	"CAN Transfer Complete or Error";
+#endif
+#ifdef OVRIT_vect
+	prog_char	gAvrInt_CAN_TimerOverRun[]	PROGMEM	=	"CAN Timer Overrun";
+#endif
+
+//*	these are for __AVR_ATmega128RFA1__
+#ifdef TRX24_PLL_LOCK_vect
+	prog_char	gAvrInt_TRN_PLL_LOCK[]		PROGMEM	=	"TRX24_PLL_LOCK";
+#endif
+#ifdef TRX24_PLL_UNLOCK_vect
+	prog_char	gAvrInt_TRN_PLL_UNLOCK[]	PROGMEM	=	"TRX24_PLL_UNLOCK";
+#endif
+#ifdef TRX24_RX_START_vect
+	prog_char	gAvrInt_TRN_RX_START[]		PROGMEM	=	"TRX24_RX_START";
+#endif
+#ifdef TRX24_RX_END_vect
+	prog_char	gAvrInt_TRN_RX_END[]		PROGMEM	=	"TRX24_RX_END";
+#endif
+#ifdef TRX24_CCA_ED_DONE_vect
+	prog_char	gAvrInt_TRN_CAAED_DONE[]	PROGMEM	=	"TRX24_CCA_ED_DONE";
+#endif
+#ifdef TRX24_XAH_AMI_vect
+	prog_char	gAvrInt_TRN_FRAME_MATCH[]	PROGMEM	=	"TRX24_FRAME_ADDRESS_MATCH";
+#endif
+#ifdef TRX24_TX_END_vect
+	prog_char	gAvrInt_TRN_TX_END[]		PROGMEM	=	"TRX24_TX_END";
+#endif
+#ifdef TRX24_AWAKE_vect
+	prog_char	gAvrInt_TRN_AWAKE[]			PROGMEM	=	"TRX24_AWAKE";
+#endif
+#ifdef SCNT_CMP1_vect
+	prog_char	gAvrInt_SCNT_CMP1[]			PROGMEM	=	"SCNT_CMP1";
+#endif
+#ifdef SCNT_CMP2_vect
+	prog_char	gAvrInt_SCNT_CMP2[]			PROGMEM	=	"SCNT_CMP2";
+#endif
+#ifdef SCNT_CMP3_vect
+	prog_char	gAvrInt_SCNT_CMP3[]			PROGMEM	=	"SCNT_CMP3";
+#endif
+#ifdef SCNT_OVFL_vect
+	prog_char	gAvrInt_SCNT_OVFL[]			PROGMEM	=	"SCNT_OVFL";
+#endif
+#ifdef SCNT_BACKOFF_vect
+	prog_char	gAvrInt_SCNT_BACKOFF[]		PROGMEM	=	"SCNT_BACKOFF";
+#endif
+#ifdef AES_READY_vect
+	prog_char	gAvrInt_AES_READY[]			PROGMEM	=	"AES_READY";
+#endif
+#ifdef BAT_LOW_vect
+	prog_char	gAvrInt_BAT_LOW[]			PROGMEM	=	"BAT_LOW";
+#endif
+
+
 
 //**************************************************************************************************
 //*	these do not have vector defs and have to be done by CPU type
 #if defined(__AVR_ATmega645__ ) || defined(__AVR_ATmega1281__) || defined(__AVR_ATmega2561__)
 	prog_char	gAvrInt_NOT_USED[]		PROGMEM	=	"NOT_USED";
 #endif
-#if defined(__AVR_ATmega32U4__)
+#if defined(__AVR_ATmega32U4__) || defined(__AVR_ATmega128RFA1__)
 	prog_char	gAvrInt_RESERVED[]		PROGMEM	=	"Reserved";
 #endif
 
@@ -309,8 +366,8 @@ PGM_P gInterruptNameTable[]	PROGMEM =
 #endif
 
 //**************************************************************************************************
-#pragma mark __AVR_ATmega169__
 #if defined(__AVR_ATmega169__)
+#pragma mark __AVR_ATmega169__
 
 #define	_INTERRUPT_NAMES_DEFINED_
 
@@ -439,8 +496,8 @@ PGM_P gInterruptNameTable[]	PROGMEM =
 
 
 //**************************************************************************************************
-#if defined(__AVR_ATmega324P__ ) || defined(__AVR_ATmega644__ ) || defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284P__)
-#pragma mark __AVR_ATmega324P__  __AVR_ATmega644__ __AVR_ATmega644P__ __AVR_ATmega1284P__
+#if defined(__AVR_ATmega324P__ ) || defined(__AVR_ATmega644__ ) || defined(__AVR_ATmega644P__)
+#pragma mark __AVR_ATmega324P__  __AVR_ATmega644__ __AVR_ATmega644P__ 
 
 #define	_INTERRUPT_NAMES_DEFINED_
 
@@ -488,6 +545,61 @@ PGM_P gInterruptNameTable[]	PROGMEM =
 #endif
 
 //**************************************************************************************************
+#if defined(__AVR_ATmega1284P__ )
+#pragma mark __AVR_ATmega1284P__
+
+#define	_INTERRUPT_NAMES_DEFINED_
+
+PGM_P gInterruptNameTable[]	PROGMEM =
+{
+
+	gAvrInt_RESET,			//	1
+	gAvrInt_INT0,			//	2
+	gAvrInt_INT1,			//	3
+	gAvrInt_INT2,			//	4
+	gAvrInt_PCINT0,			//	5
+	gAvrInt_PCINT1,			//	6
+	gAvrInt_PCINT2,			//	7
+	gAvrInt_PCINT3,			//	8
+	gAvrInt_WDT,			//	9
+	gAvrInt_TIMER2_COMPA,	//	10
+	gAvrInt_TIMER2_COMPB,	//	11
+	gAvrInt_TIMER2_OVF,		//	12
+	gAvrInt_TIMER1_CAPT,	//	13
+	gAvrInt_TIMER1_COMPA,	//	14
+	gAvrInt_TIMER1_COMPB,	//	15
+	gAvrInt_TIMER1_OVF,		//	16
+	gAvrInt_TIMER0_COMPA,	//	17
+	gAvrInt_TIMER0_COMPB,	//	18
+	gAvrInt_TIMER0_OVF,		//	19
+	gAvrInt_SPI_STC,		//	20
+	gAvrInt_USART0_RX,		//	21
+	gAvrInt_USART0_UDRE,	//	22
+	gAvrInt_USART0_TX,		//	23
+	gAvrInt_ANALOG_COMP,	//	24
+	gAvrInt_ADC,			//	25
+	gAvrInt_EE_READY,		//	26
+	gAvrInt_TWI,			//	27
+	gAvrInt_SPM_READY,		//	28
+
+	gAvrInt_USART1_RX,		//	29
+	gAvrInt_USART1_UDRE,	//	30
+	gAvrInt_USART1_TX,		//	31
+	//*	these are NOT documented in  doc8272.pdf 
+	//*	they are in iom1284p.h
+	gAvrInt_TIMER3_CAPT,	//	32
+	gAvrInt_TIMER3_COMPA,	//	33
+	gAvrInt_TIMER3_COMPB,	//	34
+	gAvrInt_TIMER3_OVF,		//	35
+	
+
+};
+
+
+#endif
+
+
+//**************************************************************************************************
 #if defined(__AVR_ATmega645__ )
 #pragma mark __AVR_ATmega645__
 
@@ -529,6 +641,41 @@ PGM_P gInterruptNameTable[]	PROGMEM =
 
 #endif
 
+//**************************************************************************************************
+#if defined(__AVR_ATmega16__ )
+#pragma mark __AVR_ATmega16__
+
+#define	_INTERRUPT_NAMES_DEFINED_
+
+PGM_P gInterruptNameTable[]	PROGMEM =
+{
+
+	gAvrInt_RESET,			//	1
+	gAvrInt_INT0,			//	2
+	gAvrInt_INT1,			//	3
+	gAvrInt_TIMER2_COMP,	//	4
+	gAvrInt_TIMER2_OVF,		//	5
+	gAvrInt_TIMER1_CAPT,	//	6
+	gAvrInt_TIMER1_COMPA,	//	7
+	gAvrInt_TIMER1_COMPB,	//	8
+	gAvrInt_TIMER1_OVF,		//	9
+	gAvrInt_TIMER0_OVF,		//	10
+	gAvrInt_SPI_STC,		//	11
+	gAvrInt_USART_RX,		//	12
+	gAvrInt_USART_UDRE,		//	13
+	gAvrInt_USART_TX,		//	14
+	gAvrInt_ADC,			//	15
+	gAvrInt_EE_READY,		//	16
+	gAvrInt_ANALOG_COMP,	//	17
+	gAvrInt_TWI,			//	18
+	gAvrInt_INT2,			//	19
+	gAvrInt_TIMER0_COMP,	//	20
+	gAvrInt_SPM_READY,		//	21
+
+};
+
+
+#endif
 
 //**************************************************************************************************
 #if defined(__AVR_ATmega32__ )
@@ -629,7 +776,7 @@ PGM_P gInterruptNameTable[]	PROGMEM =
 #endif
 
 //**************************************************************************************************
-#if defined(__AVR_AT90USB1286__)
+#if defined(__AVR_AT90USB1286__) ||  defined(__AVR_AT90USB1287__)
 #pragma mark __AVR_AT90USB1286__
 //*	teensy++ 2.0
 //*	http://www.pjrc.com/teensy/pinout.html
@@ -689,8 +836,8 @@ PGM_P gInterruptNameTable[]	PROGMEM =
 
 
 //**************************************************************************************************
-#if defined(__AVR_ATmega128__)
-#pragma mark __AVR_ATmega128__
+#if defined(__AVR_ATmega128__) || defined(__AVR_ATmega64__)
+#pragma mark __AVR_ATmega64__ __AVR_ATmega128__
 #define	_INTERRUPT_NAMES_DEFINED_
 
 
@@ -737,6 +884,157 @@ PGM_P gInterruptNameTable[]	PROGMEM =
 
 #endif
 
+//**************************************************************************************************
+#if defined(__AVR_AT90CAN32__) || defined(__AVR_AT90CAN64__) || defined(__AVR_AT90CAN128__)
+#pragma mark __AVR_AT90CAN32__ __AVR_AT90CAN64__ __AVR_AT90CAN128__
+
+#define	_INTERRUPT_NAMES_DEFINED_
+
+PGM_P gInterruptNameTable[]	PROGMEM =
+{
+
+	gAvrInt_RESET,				//	1
+	gAvrInt_INT0,				//	2
+	gAvrInt_INT1,				//	3
+	gAvrInt_INT2,				//	4
+	gAvrInt_INT3,				//	5
+	gAvrInt_INT4,				//	6
+	gAvrInt_INT5,				//	7
+	gAvrInt_INT6,				//	8
+	gAvrInt_INT7,				//	9
+	gAvrInt_TIMER2_COMP,		//	10
+	gAvrInt_TIMER2_OVF,			//	11
+	gAvrInt_TIMER1_CAPT,		//	12
+	gAvrInt_TIMER1_COMPA,		//	13
+	gAvrInt_TIMER1_COMPB,		//	14
+	gAvrInt_TIMER1_COMPC,		//	15
+	gAvrInt_TIMER1_OVF,			//	16
+	gAvrInt_TIMER0_COMP,		//	17
+	gAvrInt_TIMER0_OVF,			//	18
+	gAvrInt_CAN_TrafnsferCE,	//	19
+	gAvrInt_CAN_TimerOverRun,	//	20
+	gAvrInt_SPI_STC,			//	21
+	gAvrInt_USART0_RX,			//	22
+	gAvrInt_USART0_UDRE,		//	23
+	gAvrInt_USART0_TX,			//	24
+	gAvrInt_ANALOG_COMP,		//	25
+	gAvrInt_ADC,				//	26
+	gAvrInt_EE_READY,			//	27
+	gAvrInt_TIMER3_CAPT,		//	28
+	gAvrInt_TIMER3_COMPA,		//	29
+	gAvrInt_TIMER3_COMPB,		//	30
+	gAvrInt_TIMER3_COMPC,		//	31
+	gAvrInt_TIMER3_OVF,			//	32
+	gAvrInt_USART1_RX,			//	33
+	gAvrInt_USART1_UDRE,		//	34
+	gAvrInt_USART1_TX,			//	35
+	gAvrInt_TWI,				//	36
+	gAvrInt_SPM_READY,			//	37
+};
+
+#endif
+
+//**************************************************************************************************
+#if defined (__AVR_ATmega128RFA1__)
+#pragma mark __AVR_ATmega128RFA1__
+#define	_INTERRUPT_NAMES_DEFINED_
+
+PGM_P gInterruptNameTable[]	PROGMEM =
+{
+	//*	Atmel changed the number scheme for interrupt vectors
+	gAvrInt_RESET,			//	0
+	gAvrInt_INT0,			//	1
+	gAvrInt_INT1,			//	2
+	gAvrInt_INT2,			//	3
+	gAvrInt_INT3,			//	4
+	gAvrInt_INT4,			//	5
+	gAvrInt_INT5,			//	6
+	gAvrInt_INT6,			//	7
+	gAvrInt_INT7,			//	8
+	gAvrInt_PCINT0,			//	9
+	gAvrInt_PCINT1,			//	10
+	gAvrInt_PCINT2,			//	11
+	gAvrInt_WDT,			//	12
+	gAvrInt_TIMER2_COMPA,	//	13
+	gAvrInt_TIMER2_COMPB,	//	14
+	gAvrInt_TIMER2_OVF,		//	15
+	gAvrInt_TIMER1_CAPT,	//	16
+	gAvrInt_TIMER1_COMPA,	//	17
+	gAvrInt_TIMER1_COMPB,	//	18
+	gAvrInt_TIMER1_COMPC,	//	19
+	gAvrInt_TIMER1_OVF,		//	20
+	gAvrInt_TIMER0_COMPA,	//	21
+	gAvrInt_TIMER0_COMPB,	//	22
+	gAvrInt_TIMER0_OVF,		//	23
+	gAvrInt_SPI_STC,		//	24
+	gAvrInt_USART0_RX,		//	25
+	gAvrInt_USART0_UDRE,	//	26
+	gAvrInt_USART0_TX,		//	27
+	gAvrInt_ANALOG_COMP,	//	28
+	gAvrInt_ADC,			//	29
+	gAvrInt_EE_READY,		//	30
+	gAvrInt_TIMER3_CAPT,	//	31
+	gAvrInt_TIMER3_COMPA,	//	32
+	gAvrInt_TIMER3_COMPB,	//	33
+	gAvrInt_TIMER3_COMPC,	//	34
+	gAvrInt_TIMER3_OVF,		//	35
+	gAvrInt_USART1_RX,		//	36
+	gAvrInt_USART1_UDRE,	//	37
+	gAvrInt_USART1_TX,		//	38
+	gAvrInt_TWI,			//	39
+	gAvrInt_SPM_READY,		//	40
+	gAvrInt_TIMER4_CAPT,	//	41
+	gAvrInt_TIMER4_COMPA,	//	42
+	gAvrInt_TIMER4_COMPB,	//	43
+	gAvrInt_TIMER4_COMPC,	//	44
+	gAvrInt_TIMER4_OVF,		//	45
+	gAvrInt_TIMER5_CAPT,	//	46
+	gAvrInt_TIMER5_COMPA,	//	47
+	gAvrInt_TIMER5_COMPB,	//	48
+	gAvrInt_TIMER5_COMPC,	//	49
+	gAvrInt_TIMER5_OVF,		//	50
+#if 1
+	gAvrInt_RESERVED,		//	51
+	gAvrInt_RESERVED,		//	52
+	gAvrInt_RESERVED,		//	53
+
+	gAvrInt_RESERVED,		//	54
+	gAvrInt_RESERVED,		//	55
+	gAvrInt_RESERVED,		//	56
+
+#else
+	gAvrInt_USART2_RX,		//	51
+	gAvrInt_USART2_UDRE,	//	52
+	gAvrInt_USART2_TX,		//	53
+
+	gAvrInt_USART3_RX,		//	54
+	gAvrInt_USART3_UDRE,	//	55
+	gAvrInt_USART3_TX,		//	56
+#endif
+	gAvrInt_TRN_PLL_LOCK,	//	57
+	gAvrInt_TRN_PLL_UNLOCK,	//	58	
+	gAvrInt_TRN_RX_START,	//	59
+	gAvrInt_TRN_RX_END,		//	60
+	gAvrInt_TRN_CAAED_DONE,	//	61
+	gAvrInt_TRN_FRAME_MATCH,//	62
+	gAvrInt_TRN_TX_END,		//	63
+	gAvrInt_TRN_AWAKE,		//	64
+	
+	gAvrInt_SCNT_CMP1,		//	65
+	gAvrInt_SCNT_CMP2,		//	66
+	gAvrInt_SCNT_CMP3,		//	67
+	gAvrInt_SCNT_OVFL,		//	68
+	gAvrInt_SCNT_BACKOFF,	//	69
+	gAvrInt_AES_READY,		//	70
+	gAvrInt_BAT_LOW,		//	71
+	
+	
+};
+
+#endif
+
+
 #if !defined(_INTERRUPT_NAMES_DEFINED_)
 	#warning	No interrupt string defs for this cpu
-#endif
\ No newline at end of file
+#endif
+