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-rw-r--r--cores/arduino/HardwareSerial.cpp514
1 files changed, 128 insertions, 386 deletions
diff --git a/cores/arduino/HardwareSerial.cpp b/cores/arduino/HardwareSerial.cpp
index 2a256e0..41935e3 100644
--- a/cores/arduino/HardwareSerial.cpp
+++ b/cores/arduino/HardwareSerial.cpp
@@ -19,6 +19,7 @@
Modified 23 November 2006 by David A. Mellis
Modified 28 September 2010 by Mark Sproul
Modified 14 August 2012 by Alarus
+ Modified 3 December 2013 by Matthijs Kooijman
*/
#include <stdlib.h>
@@ -26,485 +27,226 @@
#include <string.h>
#include <inttypes.h>
#include "Arduino.h"
-#include "wiring_private.h"
-
-// this next line disables the entire HardwareSerial.cpp,
-// this is so I can support Attiny series and any other chip without a uart
-#if defined(UBRRH) || defined(UBRR0H) || defined(UBRR1H) || defined(UBRR2H) || defined(UBRR3H)
#include "HardwareSerial.h"
+#include "HardwareSerial_private.h"
-/*
- * on ATmega8, the uart and its bits are not numbered, so there is no "TXC0"
- * definition.
- */
-#if !defined(TXC0)
-#if defined(TXC)
-#define TXC0 TXC
-#elif defined(TXC1)
-// Some devices have uart1 but no uart0
-#define TXC0 TXC1
-#else
-#error TXC0 not definable in HardwareSerial.h
-#endif
-#endif
-
-// Define constants and variables for buffering incoming serial data. We're
-// using a ring buffer (I think), in which head is the index of the location
-// to which to write the next incoming character and tail is the index of the
-// location from which to read.
-// NOTE: a "power of 2" buffer size is reccomended to dramatically
-// optimize all the modulo operations for ring buffers.
-#if (RAMEND < 1000)
- #define SERIAL_BUFFER_SIZE 16
-#else
- #define SERIAL_BUFFER_SIZE 64
-#endif
-
-struct ring_buffer
-{
- unsigned char buffer[SERIAL_BUFFER_SIZE];
- volatile unsigned int head;
- volatile unsigned int tail;
-};
-
-#if defined(USBCON)
- ring_buffer rx_buffer = { { 0 }, 0, 0};
- ring_buffer tx_buffer = { { 0 }, 0, 0};
-#endif
-#if defined(UBRRH) || defined(UBRR0H)
- ring_buffer rx_buffer = { { 0 }, 0, 0 };
- ring_buffer tx_buffer = { { 0 }, 0, 0 };
-#endif
-#if defined(UBRR1H)
- ring_buffer rx_buffer1 = { { 0 }, 0, 0 };
- ring_buffer tx_buffer1 = { { 0 }, 0, 0 };
-#endif
-#if defined(UBRR2H)
- ring_buffer rx_buffer2 = { { 0 }, 0, 0 };
- ring_buffer tx_buffer2 = { { 0 }, 0, 0 };
-#endif
-#if defined(UBRR3H)
- ring_buffer rx_buffer3 = { { 0 }, 0, 0 };
- ring_buffer tx_buffer3 = { { 0 }, 0, 0 };
-#endif
-
-inline void store_char(unsigned char c, ring_buffer *buffer)
-{
- int i = (unsigned int)(buffer->head + 1) % SERIAL_BUFFER_SIZE;
-
- // if we should be storing the received character into the location
- // just before the tail (meaning that the head would advance to the
- // current location of the tail), we're about to overflow the buffer
- // and so we don't write the character or advance the head.
- if (i != buffer->tail) {
- buffer->buffer[buffer->head] = c;
- buffer->head = i;
- }
-}
-
-#if !defined(USART0_RX_vect) && defined(USART1_RX_vect)
-// do nothing - on the 32u4 the first USART is USART1
-#else
-#if !defined(USART_RX_vect) && !defined(USART0_RX_vect) && \
- !defined(USART_RXC_vect)
- #error "Don't know what the Data Received vector is called for the first UART"
-#else
+// this next line disables the entire HardwareSerial.cpp,
+// this is so I can support Attiny series and any other chip without a uart
+#if defined(HAVE_HWSERIAL0) || defined(HAVE_HWSERIAL1) || defined(HAVE_HWSERIAL2) || defined(HAVE_HWSERIAL3)
+
+// SerialEvent functions are weak, so when the user doesn't define them,
+// the linker just sets their address to 0 (which is checked below).
+// The Serialx_available is just a wrapper around Serialx.available(),
+// but we can refer to it weakly so we don't pull in the entire
+// HardwareSerial instance if the user doesn't also refer to it.
+#if defined(HAVE_HWSERIAL0)
void serialEvent() __attribute__((weak));
- void serialEvent() {}
- #define serialEvent_implemented
-#if defined(USART_RX_vect)
- ISR(USART_RX_vect)
-#elif defined(USART0_RX_vect)
- ISR(USART0_RX_vect)
-#elif defined(USART_RXC_vect)
- ISR(USART_RXC_vect) // ATmega8
-#endif
- {
- #if defined(UDR0)
- if (bit_is_clear(UCSR0A, UPE0)) {
- unsigned char c = UDR0;
- store_char(c, &rx_buffer);
- } else {
- unsigned char c = UDR0;
- };
- #elif defined(UDR)
- if (bit_is_clear(UCSRA, PE)) {
- unsigned char c = UDR;
- store_char(c, &rx_buffer);
- } else {
- unsigned char c = UDR;
- };
- #else
- #error UDR not defined
- #endif
- }
-#endif
+ bool Serial0_available() __attribute__((weak));
#endif
-#if defined(USART1_RX_vect)
+#if defined(HAVE_HWSERIAL1)
void serialEvent1() __attribute__((weak));
- void serialEvent1() {}
- #define serialEvent1_implemented
- ISR(USART1_RX_vect)
- {
- if (bit_is_clear(UCSR1A, UPE1)) {
- unsigned char c = UDR1;
- store_char(c, &rx_buffer1);
- } else {
- unsigned char c = UDR1;
- };
- }
+ bool Serial1_available() __attribute__((weak));
#endif
-#if defined(USART2_RX_vect) && defined(UDR2)
+#if defined(HAVE_HWSERIAL2)
void serialEvent2() __attribute__((weak));
- void serialEvent2() {}
- #define serialEvent2_implemented
- ISR(USART2_RX_vect)
- {
- if (bit_is_clear(UCSR2A, UPE2)) {
- unsigned char c = UDR2;
- store_char(c, &rx_buffer2);
- } else {
- unsigned char c = UDR2;
- };
- }
+ bool Serial2_available() __attribute__((weak));
#endif
-#if defined(USART3_RX_vect) && defined(UDR3)
+#if defined(HAVE_HWSERIAL3)
void serialEvent3() __attribute__((weak));
- void serialEvent3() {}
- #define serialEvent3_implemented
- ISR(USART3_RX_vect)
- {
- if (bit_is_clear(UCSR3A, UPE3)) {
- unsigned char c = UDR3;
- store_char(c, &rx_buffer3);
- } else {
- unsigned char c = UDR3;
- };
- }
+ bool Serial3_available() __attribute__((weak));
#endif
void serialEventRun(void)
{
-#ifdef serialEvent_implemented
- if (Serial.available()) serialEvent();
+#if defined(HAVE_HWSERIAL0)
+ if (Serial0_available && serialEvent && Serial0_available()) serialEvent();
#endif
-#ifdef serialEvent1_implemented
- if (Serial1.available()) serialEvent1();
+#if defined(HAVE_HWSERIAL1)
+ if (Serial1_available && serialEvent1 && Serial1_available()) serialEvent1();
#endif
-#ifdef serialEvent2_implemented
- if (Serial2.available()) serialEvent2();
+#if defined(HAVE_HWSERIAL2)
+ if (Serial2_available && serialEvent2 && Serial2_available()) serialEvent2();
#endif
-#ifdef serialEvent3_implemented
- if (Serial3.available()) serialEvent3();
+#if defined(HAVE_HWSERIAL3)
+ if (Serial3_available && serialEvent3 && Serial3_available()) serialEvent3();
#endif
}
+// Actual interrupt handlers //////////////////////////////////////////////////////////////
-#if !defined(USART0_UDRE_vect) && defined(USART1_UDRE_vect)
-// do nothing - on the 32u4 the first USART is USART1
-#else
-#if !defined(UART0_UDRE_vect) && !defined(UART_UDRE_vect) && !defined(USART0_UDRE_vect) && !defined(USART_UDRE_vect)
- #error "Don't know what the Data Register Empty vector is called for the first UART"
-#else
-#if defined(UART0_UDRE_vect)
-ISR(UART0_UDRE_vect)
-#elif defined(UART_UDRE_vect)
-ISR(UART_UDRE_vect)
-#elif defined(USART0_UDRE_vect)
-ISR(USART0_UDRE_vect)
-#elif defined(USART_UDRE_vect)
-ISR(USART_UDRE_vect)
-#endif
+void HardwareSerial::_tx_udr_empty_irq(void)
{
- if (tx_buffer.head == tx_buffer.tail) {
- // Buffer empty, so disable interrupts
-#if defined(UCSR0B)
- cbi(UCSR0B, UDRIE0);
-#else
- cbi(UCSRB, UDRIE);
-#endif
- }
- else {
- // There is more data in the output buffer. Send the next byte
- unsigned char c = tx_buffer.buffer[tx_buffer.tail];
- tx_buffer.tail = (tx_buffer.tail + 1) % SERIAL_BUFFER_SIZE;
-
- #if defined(UDR0)
- UDR0 = c;
- #elif defined(UDR)
- UDR = c;
- #else
- #error UDR not defined
- #endif
- }
-}
-#endif
-#endif
+ // If interrupts are enabled, there must be more data in the output
+ // buffer. Send the next byte
+ unsigned char c = _tx_buffer[_tx_buffer_tail];
+ _tx_buffer_tail = (_tx_buffer_tail + 1) % SERIAL_TX_BUFFER_SIZE;
-#ifdef USART1_UDRE_vect
-ISR(USART1_UDRE_vect)
-{
- if (tx_buffer1.head == tx_buffer1.tail) {
- // Buffer empty, so disable interrupts
- cbi(UCSR1B, UDRIE1);
- }
- else {
- // There is more data in the output buffer. Send the next byte
- unsigned char c = tx_buffer1.buffer[tx_buffer1.tail];
- tx_buffer1.tail = (tx_buffer1.tail + 1) % SERIAL_BUFFER_SIZE;
-
- UDR1 = c;
- }
-}
-#endif
+ *_udr = c;
-#ifdef USART2_UDRE_vect
-ISR(USART2_UDRE_vect)
-{
- if (tx_buffer2.head == tx_buffer2.tail) {
- // Buffer empty, so disable interrupts
- cbi(UCSR2B, UDRIE2);
- }
- else {
- // There is more data in the output buffer. Send the next byte
- unsigned char c = tx_buffer2.buffer[tx_buffer2.tail];
- tx_buffer2.tail = (tx_buffer2.tail + 1) % SERIAL_BUFFER_SIZE;
-
- UDR2 = c;
- }
-}
-#endif
+ // clear the TXC bit -- "can be cleared by writing a one to its bit
+ // location". This makes sure flush() won't return until the bytes
+ // actually got written
+ sbi(*_ucsra, TXC0);
-#ifdef USART3_UDRE_vect
-ISR(USART3_UDRE_vect)
-{
- if (tx_buffer3.head == tx_buffer3.tail) {
- // Buffer empty, so disable interrupts
- cbi(UCSR3B, UDRIE3);
+ if (_tx_buffer_head == _tx_buffer_tail) {
+ // Buffer empty, so disable interrupts
+ cbi(*_ucsrb, UDRIE0);
}
- else {
- // There is more data in the output buffer. Send the next byte
- unsigned char c = tx_buffer3.buffer[tx_buffer3.tail];
- tx_buffer3.tail = (tx_buffer3.tail + 1) % SERIAL_BUFFER_SIZE;
-
- UDR3 = c;
- }
-}
-#endif
-
-
-// Constructors ////////////////////////////////////////////////////////////////
-
-HardwareSerial::HardwareSerial(ring_buffer *rx_buffer, ring_buffer *tx_buffer,
- volatile uint8_t *ubrrh, volatile uint8_t *ubrrl,
- volatile uint8_t *ucsra, volatile uint8_t *ucsrb,
- volatile uint8_t *ucsrc, volatile uint8_t *udr,
- uint8_t rxen, uint8_t txen, uint8_t rxcie, uint8_t udrie, uint8_t u2x)
-{
- _rx_buffer = rx_buffer;
- _tx_buffer = tx_buffer;
- _ubrrh = ubrrh;
- _ubrrl = ubrrl;
- _ucsra = ucsra;
- _ucsrb = ucsrb;
- _ucsrc = ucsrc;
- _udr = udr;
- _rxen = rxen;
- _txen = txen;
- _rxcie = rxcie;
- _udrie = udrie;
- _u2x = u2x;
}
// Public Methods //////////////////////////////////////////////////////////////
-void HardwareSerial::begin(unsigned long baud)
-{
- uint16_t baud_setting;
- bool use_u2x = true;
-
-#if F_CPU == 16000000UL
- // hardcoded exception for compatibility with the bootloader shipped
- // with the Duemilanove and previous boards and the firmware on the 8U2
- // on the Uno and Mega 2560.
- if (baud == 57600) {
- use_u2x = false;
- }
-#endif
-
-try_again:
-
- if (use_u2x) {
- *_ucsra = 1 << _u2x;
- baud_setting = (F_CPU / 4 / baud - 1) / 2;
- } else {
- *_ucsra = 0;
- baud_setting = (F_CPU / 8 / baud - 1) / 2;
- }
-
- if ((baud_setting > 4095) && use_u2x)
- {
- use_u2x = false;
- goto try_again;
- }
-
- // assign the baud_setting, a.k.a. ubbr (USART Baud Rate Register)
- *_ubrrh = baud_setting >> 8;
- *_ubrrl = baud_setting;
-
- transmitting = false;
-
- sbi(*_ucsrb, _rxen);
- sbi(*_ucsrb, _txen);
- sbi(*_ucsrb, _rxcie);
- cbi(*_ucsrb, _udrie);
-}
-
void HardwareSerial::begin(unsigned long baud, byte config)
{
- uint16_t baud_setting;
- uint8_t current_config;
- bool use_u2x = true;
-
-#if F_CPU == 16000000UL
- // hardcoded exception for compatibility with the bootloader shipped
- // with the Duemilanove and previous boards and the firmware on the 8U2
- // on the Uno and Mega 2560.
- if (baud == 57600) {
- use_u2x = false;
- }
-#endif
+ // Try u2x mode first
+ uint16_t baud_setting = (F_CPU / 4 / baud - 1) / 2;
+ *_ucsra = 1 << U2X0;
-try_again:
-
- if (use_u2x) {
- *_ucsra = 1 << _u2x;
- baud_setting = (F_CPU / 4 / baud - 1) / 2;
- } else {
+ // hardcoded exception for 57600 for compatibility with the bootloader
+ // shipped with the Duemilanove and previous boards and the firmware
+ // on the 8U2 on the Uno and Mega 2560. Also, The baud_setting cannot
+ // be > 4095, so switch back to non-u2x mode if the baud rate is too
+ // low.
+ if (((F_CPU == 16000000UL) && (baud == 57600)) || (baud_setting >4095))
+ {
*_ucsra = 0;
baud_setting = (F_CPU / 8 / baud - 1) / 2;
}
-
- if ((baud_setting > 4095) && use_u2x)
- {
- use_u2x = false;
- goto try_again;
- }
- // assign the baud_setting, a.k.a. ubbr (USART Baud Rate Register)
+ // assign the baud_setting, a.k.a. ubrr (USART Baud Rate Register)
*_ubrrh = baud_setting >> 8;
*_ubrrl = baud_setting;
+ _written = false;
+
//set the data bits, parity, and stop bits
#if defined(__AVR_ATmega8__)
config |= 0x80; // select UCSRC register (shared with UBRRH)
#endif
*_ucsrc = config;
- sbi(*_ucsrb, _rxen);
- sbi(*_ucsrb, _txen);
- sbi(*_ucsrb, _rxcie);
- cbi(*_ucsrb, _udrie);
+ sbi(*_ucsrb, RXEN0);
+ sbi(*_ucsrb, TXEN0);
+ sbi(*_ucsrb, RXCIE0);
+ cbi(*_ucsrb, UDRIE0);
}
void HardwareSerial::end()
{
// wait for transmission of outgoing data
- while (_tx_buffer->head != _tx_buffer->tail)
+ while (_tx_buffer_head != _tx_buffer_tail)
;
- cbi(*_ucsrb, _rxen);
- cbi(*_ucsrb, _txen);
- cbi(*_ucsrb, _rxcie);
- cbi(*_ucsrb, _udrie);
+ cbi(*_ucsrb, RXEN0);
+ cbi(*_ucsrb, TXEN0);
+ cbi(*_ucsrb, RXCIE0);
+ cbi(*_ucsrb, UDRIE0);
// clear any received data
- _rx_buffer->head = _rx_buffer->tail;
+ _rx_buffer_head = _rx_buffer_tail;
}
int HardwareSerial::available(void)
{
- return ((unsigned int)(SERIAL_BUFFER_SIZE + _rx_buffer->head - _rx_buffer->tail)) % SERIAL_BUFFER_SIZE;
+ return ((unsigned int)(SERIAL_RX_BUFFER_SIZE + _rx_buffer_head - _rx_buffer_tail)) % SERIAL_RX_BUFFER_SIZE;
}
int HardwareSerial::peek(void)
{
- if (_rx_buffer->head == _rx_buffer->tail) {
+ if (_rx_buffer_head == _rx_buffer_tail) {
return -1;
} else {
- return _rx_buffer->buffer[_rx_buffer->tail];
+ return _rx_buffer[_rx_buffer_tail];
}
}
int HardwareSerial::read(void)
{
// if the head isn't ahead of the tail, we don't have any characters
- if (_rx_buffer->head == _rx_buffer->tail) {
+ if (_rx_buffer_head == _rx_buffer_tail) {
return -1;
} else {
- unsigned char c = _rx_buffer->buffer[_rx_buffer->tail];
- _rx_buffer->tail = (unsigned int)(_rx_buffer->tail + 1) % SERIAL_BUFFER_SIZE;
+ unsigned char c = _rx_buffer[_rx_buffer_tail];
+ _rx_buffer_tail = (rx_buffer_index_t)(_rx_buffer_tail + 1) % SERIAL_RX_BUFFER_SIZE;
return c;
}
}
+int HardwareSerial::availableForWrite(void)
+{
+#if (SERIAL_TX_BUFFER_SIZE>256)
+ uint8_t oldSREG = SREG;
+ cli();
+#endif
+ tx_buffer_index_t head = _tx_buffer_head;
+ tx_buffer_index_t tail = _tx_buffer_tail;
+#if (SERIAL_TX_BUFFER_SIZE>256)
+ SREG = oldSREG;
+#endif
+ if (head >= tail) return SERIAL_TX_BUFFER_SIZE - 1 - head + tail;
+ return tail - head - 1;
+}
+
void HardwareSerial::flush()
{
- // UDR is kept full while the buffer is not empty, so TXC triggers when EMPTY && SENT
- while (transmitting && ! (*_ucsra & _BV(TXC0)));
- transmitting = false;
+ // If we have never written a byte, no need to flush. This special
+ // case is needed since there is no way to force the TXC (transmit
+ // complete) bit to 1 during initialization
+ if (!_written)
+ return;
+
+ while (bit_is_set(*_ucsrb, UDRIE0) || bit_is_clear(*_ucsra, TXC0)) {
+ if (bit_is_clear(SREG, SREG_I) && bit_is_set(*_ucsrb, UDRIE0))
+ // Interrupts are globally disabled, but the DR empty
+ // interrupt should be enabled, so poll the DR empty flag to
+ // prevent deadlock
+ if (bit_is_set(*_ucsra, UDRE0))
+ _tx_udr_empty_irq();
+ }
+ // If we get here, nothing is queued anymore (DRIE is disabled) and
+ // the hardware finished tranmission (TXC is set).
}
size_t HardwareSerial::write(uint8_t c)
{
- int i = (_tx_buffer->head + 1) % SERIAL_BUFFER_SIZE;
+ // If the buffer and the data register is empty, just write the byte
+ // to the data register and be done. This shortcut helps
+ // significantly improve the effective datarate at high (>
+ // 500kbit/s) bitrates, where interrupt overhead becomes a slowdown.
+ if (_tx_buffer_head == _tx_buffer_tail && bit_is_set(*_ucsra, UDRE0)) {
+ *_udr = c;
+ sbi(*_ucsra, TXC0);
+ return 1;
+ }
+ tx_buffer_index_t i = (_tx_buffer_head + 1) % SERIAL_TX_BUFFER_SIZE;
// If the output buffer is full, there's nothing for it other than to
// wait for the interrupt handler to empty it a bit
- // ???: return 0 here instead?
- while (i == _tx_buffer->tail)
- ;
-
- _tx_buffer->buffer[_tx_buffer->head] = c;
- _tx_buffer->head = i;
+ while (i == _tx_buffer_tail) {
+ if (bit_is_clear(SREG, SREG_I)) {
+ // Interrupts are disabled, so we'll have to poll the data
+ // register empty flag ourselves. If it is set, pretend an
+ // interrupt has happened and call the handler to free up
+ // space for us.
+ if(bit_is_set(*_ucsra, UDRE0))
+ _tx_udr_empty_irq();
+ } else {
+ // nop, the interrupt handler will free up space for us
+ }
+ }
+
+ _tx_buffer[_tx_buffer_head] = c;
+ _tx_buffer_head = i;
- sbi(*_ucsrb, _udrie);
- // clear the TXC bit -- "can be cleared by writing a one to its bit location"
- transmitting = true;
- sbi(*_ucsra, TXC0);
+ sbi(*_ucsrb, UDRIE0);
+ _written = true;
return 1;
}
-HardwareSerial::operator bool() {
- return true;
-}
-
-// Preinstantiate Objects //////////////////////////////////////////////////////
-
-#if defined(UBRRH) && defined(UBRRL)
- HardwareSerial Serial(&rx_buffer, &tx_buffer, &UBRRH, &UBRRL, &UCSRA, &UCSRB, &UCSRC, &UDR, RXEN, TXEN, RXCIE, UDRIE, U2X);
-#elif defined(UBRR0H) && defined(UBRR0L)
- HardwareSerial Serial(&rx_buffer, &tx_buffer, &UBRR0H, &UBRR0L, &UCSR0A, &UCSR0B, &UCSR0C, &UDR0, RXEN0, TXEN0, RXCIE0, UDRIE0, U2X0);
-#elif defined(USBCON)
- // do nothing - Serial object and buffers are initialized in CDC code
-#else
- #error no serial port defined (port 0)
-#endif
-
-#if defined(UBRR1H)
- HardwareSerial Serial1(&rx_buffer1, &tx_buffer1, &UBRR1H, &UBRR1L, &UCSR1A, &UCSR1B, &UCSR1C, &UDR1, RXEN1, TXEN1, RXCIE1, UDRIE1, U2X1);
-#endif
-#if defined(UBRR2H)
- HardwareSerial Serial2(&rx_buffer2, &tx_buffer2, &UBRR2H, &UBRR2L, &UCSR2A, &UCSR2B, &UCSR2C, &UDR2, RXEN2, TXEN2, RXCIE2, UDRIE2, U2X2);
-#endif
-#if defined(UBRR3H)
- HardwareSerial Serial3(&rx_buffer3, &tx_buffer3, &UBRR3H, &UBRR3L, &UCSR3A, &UCSR3B, &UCSR3C, &UDR3, RXEN3, TXEN3, RXCIE3, UDRIE3, U2X3);
-#endif
#endif // whole file
-
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