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-rw-r--r--bootloaders/optiboot/Makefile451
-rw-r--r--bootloaders/optiboot/README.TXT81
-rw-r--r--bootloaders/optiboot/boot.h848
-rwxr-xr-xbootloaders/optiboot/makeall20
-rw-r--r--bootloaders/optiboot/omake2
-rw-r--r--bootloaders/optiboot/omake.bat1
-rw-r--r--bootloaders/optiboot/optiboot.c672
-rw-r--r--bootloaders/optiboot/optiboot_atmega168.hex35
-rw-r--r--bootloaders/optiboot/optiboot_atmega168.lst598
-rw-r--r--bootloaders/optiboot/optiboot_atmega328-Mini.hex33
-rw-r--r--bootloaders/optiboot/optiboot_atmega328.hex35
-rw-r--r--bootloaders/optiboot/optiboot_atmega328.lst598
-rw-r--r--bootloaders/optiboot/optiboot_atmega8.hex33
-rw-r--r--bootloaders/optiboot/optiboot_atmega8.lst604
-rw-r--r--bootloaders/optiboot/pin_defs.h80
-rw-r--r--bootloaders/optiboot/stk500.h39
16 files changed, 4130 insertions, 0 deletions
diff --git a/bootloaders/optiboot/Makefile b/bootloaders/optiboot/Makefile
new file mode 100644
index 0000000..b9f3ed5
--- /dev/null
+++ b/bootloaders/optiboot/Makefile
@@ -0,0 +1,451 @@
+# Makefile for ATmegaBOOT
+# E.Lins, 18.7.2005
+# $Id$
+#
+# Instructions
+#
+# To make bootloader .hex file:
+# make diecimila
+# make lilypad
+# make ng
+# etc...
+#
+# To burn bootloader .hex file:
+# make diecimila_isp
+# make lilypad_isp
+# make ng_isp
+# etc...
+
+# program name should not be changed...
+PROGRAM = optiboot
+
+# The default behavior is to build using tools that are in the users
+# current path variables, but we can also build using an installed
+# Arduino user IDE setup, or the Arduino source tree.
+# Uncomment this next lines to build within the arduino environment,
+# using the arduino-included avrgcc toolset (mac and pc)
+# ENV ?= arduino
+# ENV ?= arduinodev
+# OS ?= macosx
+# OS ?= windows
+
+
+# enter the parameters for the avrdude isp tool
+ISPTOOL = stk500v2
+ISPPORT = usb
+ISPSPEED = -b 115200
+
+MCU_TARGET = atmega168
+LDSECTIONS = -Wl,--section-start=.text=0x3e00 -Wl,--section-start=.version=0x3ffe
+
+# Build environments
+# Start of some ugly makefile-isms to allow optiboot to be built
+# in several different environments. See the README.TXT file for
+# details.
+
+# default
+fixpath = $(1)
+
+ifeq ($(ENV), arduino)
+# For Arduino, we assume that we're connected to the optiboot directory
+# included with the arduino distribution, which means that the full set
+# of avr-tools are "right up there" in standard places.
+TOOLROOT = ../../../tools
+GCCROOT = $(TOOLROOT)/avr/bin/
+AVRDUDE_CONF = -C$(TOOLROOT)/avr/etc/avrdude.conf
+
+ifeq ($(OS), windows)
+# On windows, SOME of the tool paths will need to have backslashes instead
+# of forward slashes (because they use windows cmd.exe for execution instead
+# of a unix/mingw shell?) We also have to ensure that a consistent shell
+# is used even if a unix shell is installed (ie as part of WINAVR)
+fixpath = $(subst /,\,$1)
+SHELL = cmd.exe
+endif
+
+else ifeq ($(ENV), arduinodev)
+# Arduino IDE source code environment. Use the unpacked compilers created
+# by the build (you'll need to do "ant build" first.)
+ifeq ($(OS), macosx)
+TOOLROOT = ../../../../build/macosx/work/Arduino.app/Contents/Resources/Java/hardware/tools
+endif
+ifeq ($(OS), windows)
+TOOLROOT = ../../../../build/windows/work/hardware/tools
+endif
+
+GCCROOT = $(TOOLROOT)/avr/bin/
+AVRDUDE_CONF = -C$(TOOLROOT)/avr/etc/avrdude.conf
+
+else
+GCCROOT =
+AVRDUDE_CONF =
+endif
+#
+# End of build environment code.
+
+
+# the efuse should really be 0xf8; since, however, only the lower
+# three bits of that byte are used on the atmega168, avrdude gets
+# confused if you specify 1's for the higher bits, see:
+# http://tinker.it/now/2007/02/24/the-tale-of-avrdude-atmega168-and-extended-bits-fuses/
+#
+# similarly, the lock bits should be 0xff instead of 0x3f (to
+# unlock the bootloader section) and 0xcf instead of 0x2f (to
+# lock it), but since the high two bits of the lock byte are
+# unused, avrdude would get confused.
+
+ISPFUSES = $(GCCROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \
+ -p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \
+ -e -u -U lock:w:0x3f:m -U efuse:w:0x$(EFUSE):m \
+ -U hfuse:w:0x$(HFUSE):m -U lfuse:w:0x$(LFUSE):m
+ISPFLASH = $(GCCROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \
+ -p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \
+ -U flash:w:$(PROGRAM)_$(TARGET).hex -U lock:w:0x2f:m
+
+STK500 = "C:\Program Files\Atmel\AVR Tools\STK500\Stk500.exe"
+STK500-1 = $(STK500) -e -d$(MCU_TARGET) -pf -vf -if$(PROGRAM)_$(TARGET).hex \
+-lFF -LFF -f$(HFUSE)$(LFUSE) -EF8 -ms -q -cUSB -I200kHz -s -wt
+STK500-2 = $(STK500) -d$(MCU_TARGET) -ms -q -lCF -LCF -cUSB -I200kHz -s -wt
+
+OBJ = $(PROGRAM).o
+OPTIMIZE = -Os -fno-inline-small-functions -fno-split-wide-types -mshort-calls
+
+DEFS =
+LIBS =
+
+CC = $(GCCROOT)avr-gcc
+
+# Override is only needed by avr-lib build system.
+
+override CFLAGS = -g -Wall $(OPTIMIZE) -mmcu=$(MCU_TARGET) -DF_CPU=$(AVR_FREQ) $(DEFS)
+override LDFLAGS = $(LDSECTIONS) -Wl,--relax -Wl,--gc-sections -nostartfiles -nostdlib
+
+OBJCOPY = $(GCCROOT)avr-objcopy
+OBJDUMP = $(call fixpath,$(GCCROOT)avr-objdump)
+
+SIZE = $(GCCROOT)avr-size
+
+# Test platforms
+# Virtual boot block test
+virboot328: TARGET = atmega328
+virboot328: MCU_TARGET = atmega328p
+virboot328: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DVIRTUAL_BOOT'
+virboot328: AVR_FREQ = 16000000L
+virboot328: LDSECTIONS = -Wl,--section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe
+virboot328: $(PROGRAM)_atmega328.hex
+virboot328: $(PROGRAM)_atmega328.lst
+
+# 20MHz clocked platforms
+#
+# These are capable of 230400 baud, or 115200 baud on PC (Arduino Avrdude issue)
+#
+
+pro20: TARGET = pro_20mhz
+pro20: MCU_TARGET = atmega168
+pro20: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
+pro20: AVR_FREQ = 20000000L
+pro20: $(PROGRAM)_pro_20mhz.hex
+pro20: $(PROGRAM)_pro_20mhz.lst
+
+pro20_isp: pro20
+pro20_isp: TARGET = pro_20mhz
+# 2.7V brownout
+pro20_isp: HFUSE = DD
+# Full swing xtal (20MHz) 258CK/14CK+4.1ms
+pro20_isp: LFUSE = C6
+# 512 byte boot
+pro20_isp: EFUSE = 04
+pro20_isp: isp
+
+# 16MHz clocked platforms
+#
+# These are capable of 230400 baud, or 115200 baud on PC (Arduino Avrdude issue)
+#
+
+pro16: TARGET = pro_16MHz
+pro16: MCU_TARGET = atmega168
+pro16: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
+pro16: AVR_FREQ = 16000000L
+pro16: $(PROGRAM)_pro_16MHz.hex
+pro16: $(PROGRAM)_pro_16MHz.lst
+
+pro16_isp: pro16
+pro16_isp: TARGET = pro_16MHz
+# 2.7V brownout
+pro16_isp: HFUSE = DD
+# Full swing xtal (20MHz) 258CK/14CK+4.1ms
+pro16_isp: LFUSE = C6
+# 512 byte boot
+pro16_isp: EFUSE = 04
+pro16_isp: isp
+
+# Diecimila, Duemilanove with m168, and NG use identical bootloaders
+# Call it "atmega168" for generality and clarity, keep "diecimila" for
+# backward compatibility of makefile
+#
+atmega168: TARGET = atmega168
+atmega168: MCU_TARGET = atmega168
+atmega168: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
+atmega168: AVR_FREQ = 16000000L
+atmega168: $(PROGRAM)_atmega168.hex
+atmega168: $(PROGRAM)_atmega168.lst
+
+atmega168_isp: atmega168
+atmega168_isp: TARGET = atmega168
+# 2.7V brownout
+atmega168_isp: HFUSE = DD
+# Low power xtal (16MHz) 16KCK/14CK+65ms
+atmega168_isp: LFUSE = FF
+# 512 byte boot
+atmega168_isp: EFUSE = 04
+atmega168_isp: isp
+
+diecimila: TARGET = diecimila
+diecimila: MCU_TARGET = atmega168
+diecimila: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
+diecimila: AVR_FREQ = 16000000L
+diecimila: $(PROGRAM)_diecimila.hex
+diecimila: $(PROGRAM)_diecimila.lst
+
+diecimila_isp: diecimila
+diecimila_isp: TARGET = diecimila
+# 2.7V brownout
+diecimila_isp: HFUSE = DD
+# Low power xtal (16MHz) 16KCK/14CK+65ms
+diecimila_isp: LFUSE = FF
+# 512 byte boot
+diecimila_isp: EFUSE = 04
+diecimila_isp: isp
+
+atmega328: TARGET = atmega328
+atmega328: MCU_TARGET = atmega328p
+atmega328: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
+atmega328: AVR_FREQ = 16000000L
+atmega328: LDSECTIONS = -Wl,--section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe
+atmega328: $(PROGRAM)_atmega328.hex
+atmega328: $(PROGRAM)_atmega328.lst
+
+atmega328_isp: atmega328
+atmega328_isp: TARGET = atmega328
+atmega328_isp: MCU_TARGET = atmega328p
+# 512 byte boot, SPIEN
+atmega328_isp: HFUSE = DE
+# Low power xtal (16MHz) 16KCK/14CK+65ms
+atmega328_isp: LFUSE = FF
+# 2.7V brownout
+atmega328_isp: EFUSE = 05
+atmega328_isp: isp
+
+# Sanguino has a minimum boot size of 1024 bytes, so enable extra functions
+#
+sanguino: TARGET = atmega644p
+sanguino: MCU_TARGET = atmega644p
+sanguino: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DBIGBOOT'
+sanguino: AVR_FREQ = 16000000L
+sanguino: LDSECTIONS = -Wl,--section-start=.text=0xfc00
+sanguino: $(PROGRAM)_atmega644p.hex
+sanguino: $(PROGRAM)_atmega644p.lst
+
+sanguino_isp: sanguino
+sanguino_isp: TARGET = atmega644p
+sanguino_isp: MCU_TARGET = atmega644p
+# 1024 byte boot
+sanguino_isp: HFUSE = DE
+# Low power xtal (16MHz) 16KCK/14CK+65ms
+sanguino_isp: LFUSE = FF
+# 2.7V brownout
+sanguino_isp: EFUSE = 05
+sanguino_isp: isp
+
+# Mega has a minimum boot size of 1024 bytes, so enable extra functions
+#mega: TARGET = atmega1280
+mega: MCU_TARGET = atmega1280
+mega: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DBIGBOOT'
+mega: AVR_FREQ = 16000000L
+mega: LDSECTIONS = -Wl,--section-start=.text=0x1fc00
+mega: $(PROGRAM)_atmega1280.hex
+mega: $(PROGRAM)_atmega1280.lst
+
+mega_isp: mega
+mega_isp: TARGET = atmega1280
+mega_isp: MCU_TARGET = atmega1280
+# 1024 byte boot
+mega_isp: HFUSE = DE
+# Low power xtal (16MHz) 16KCK/14CK+65ms
+mega_isp: LFUSE = FF
+# 2.7V brownout
+mega_isp: EFUSE = 05
+mega_isp: isp
+
+# ATmega8
+#
+atmega8: TARGET = atmega8
+atmega8: MCU_TARGET = atmega8
+atmega8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
+atmega8: AVR_FREQ = 16000000L
+atmega8: LDSECTIONS = -Wl,--section-start=.text=0x1e00 -Wl,--section-start=.version=0x1ffe
+atmega8: $(PROGRAM)_atmega8.hex
+atmega8: $(PROGRAM)_atmega8.lst
+
+atmega8_isp: atmega8
+atmega8_isp: TARGET = atmega8
+atmega8_isp: MCU_TARGET = atmega8
+# SPIEN, CKOPT, Bootsize=512B
+atmega8_isp: HFUSE = CC
+# 2.7V brownout, Low power xtal (16MHz) 16KCK/14CK+65ms
+atmega8_isp: LFUSE = BF
+atmega8_isp: isp
+
+# ATmega88
+#
+atmega88: TARGET = atmega88
+atmega88: MCU_TARGET = atmega88
+atmega88: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
+atmega88: AVR_FREQ = 16000000L
+atmega88: LDSECTIONS = -Wl,--section-start=.text=0x1e00 -Wl,--section-start=.version=0x1ffe
+atmega88: $(PROGRAM)_atmega88.hex
+atmega88: $(PROGRAM)_atmega88.lst
+
+atmega88_isp: atmega88
+atmega88_isp: TARGET = atmega88
+atmega88_isp: MCU_TARGET = atmega88
+# 2.7V brownout
+atmega88_isp: HFUSE = DD
+# Low power xtal (16MHz) 16KCK/14CK+65ms
+atemga88_isp: LFUSE = FF
+# 512 byte boot
+atmega88_isp: EFUSE = 04
+atmega88_isp: isp
+
+
+# 8MHz clocked platforms
+#
+# These are capable of 115200 baud
+#
+
+lilypad: TARGET = lilypad
+lilypad: MCU_TARGET = atmega168
+lilypad: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
+lilypad: AVR_FREQ = 8000000L
+lilypad: $(PROGRAM)_lilypad.hex
+lilypad: $(PROGRAM)_lilypad.lst
+
+lilypad_isp: lilypad
+lilypad_isp: TARGET = lilypad
+# 2.7V brownout
+lilypad_isp: HFUSE = DD
+# Internal 8MHz osc (8MHz) Slow rising power
+lilypad_isp: LFUSE = E2
+# 512 byte boot
+lilypad_isp: EFUSE = 04
+lilypad_isp: isp
+
+lilypad_resonator: TARGET = lilypad_resonator
+lilypad_resonator: MCU_TARGET = atmega168
+lilypad_resonator: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
+lilypad_resonator: AVR_FREQ = 8000000L
+lilypad_resonator: $(PROGRAM)_lilypad_resonator.hex
+lilypad_resonator: $(PROGRAM)_lilypad_resonator.lst
+
+lilypad_resonator_isp: lilypad_resonator
+lilypad_resonator_isp: TARGET = lilypad_resonator
+# 2.7V brownout
+lilypad_resonator_isp: HFUSE = DD
+# Full swing xtal (20MHz) 258CK/14CK+4.1ms
+lilypad_resonator_isp: LFUSE = C6
+# 512 byte boot
+lilypad_resonator_isp: EFUSE = 04
+lilypad_resonator_isp: isp
+
+pro8: TARGET = pro_8MHz
+pro8: MCU_TARGET = atmega168
+pro8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
+pro8: AVR_FREQ = 8000000L
+pro8: $(PROGRAM)_pro_8MHz.hex
+pro8: $(PROGRAM)_pro_8MHz.lst
+
+pro8_isp: pro8
+pro8_isp: TARGET = pro_8MHz
+# 2.7V brownout
+pro8_isp: HFUSE = DD
+# Full swing xtal (20MHz) 258CK/14CK+4.1ms
+pro8_isp: LFUSE = C6
+# 512 byte boot
+pro8_isp: EFUSE = 04
+pro8_isp: isp
+
+atmega328_pro8: TARGET = atmega328_pro_8MHz
+atmega328_pro8: MCU_TARGET = atmega328p
+atmega328_pro8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
+atmega328_pro8: AVR_FREQ = 8000000L
+atmega328_pro8: LDSECTIONS = -Wl,--section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe
+atmega328_pro8: $(PROGRAM)_atmega328_pro_8MHz.hex
+atmega328_pro8: $(PROGRAM)_atmega328_pro_8MHz.lst
+
+atmega328_pro8_isp: atmega328_pro8
+atmega328_pro8_isp: TARGET = atmega328_pro_8MHz
+atmega328_pro8_isp: MCU_TARGET = atmega328p
+# 512 byte boot, SPIEN
+atmega328_pro8_isp: HFUSE = DE
+# Low power xtal (16MHz) 16KCK/14CK+65ms
+atmega328_pro8_isp: LFUSE = FF
+# 2.7V brownout
+atmega328_pro8_isp: EFUSE = 05
+atmega328_pro8_isp: isp
+
+# 1MHz clocked platforms
+#
+# These are capable of 9600 baud
+#
+
+luminet: TARGET = luminet
+luminet: MCU_TARGET = attiny84
+luminet: CFLAGS += '-DLED_START_FLASHES=3' '-DSOFT_UART' '-DBAUD_RATE=9600'
+luminet: CFLAGS += '-DVIRTUAL_BOOT_PARTITION'
+luminet: AVR_FREQ = 1000000L
+luminet: LDSECTIONS = -Wl,--section-start=.text=0x1d00 -Wl,--section-start=.version=0x1efe
+luminet: $(PROGRAM)_luminet.hex
+luminet: $(PROGRAM)_luminet.lst
+
+luminet_isp: luminet
+luminet_isp: TARGET = luminet
+luminet_isp: MCU_TARGET = attiny84
+# Brownout disabled
+luminet_isp: HFUSE = DF
+# 1MHz internal oscillator, slowly rising power
+luminet_isp: LFUSE = 62
+# Self-programming enable
+luminet_isp: EFUSE = FE
+luminet_isp: isp
+
+#
+# Generic build instructions
+#
+#
+
+isp: $(TARGET)
+ $(ISPFUSES)
+ $(ISPFLASH)
+
+isp-stk500: $(PROGRAM)_$(TARGET).hex
+ $(STK500-1)
+ $(STK500-2)
+
+%.elf: $(OBJ)
+ $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS)
+ $(SIZE) $@
+
+clean:
+ rm -rf *.o *.elf *.lst *.map *.sym *.lss *.eep *.srec *.bin *.hex
+
+%.lst: %.elf
+ $(OBJDUMP) -h -S $< > $@
+
+%.hex: %.elf
+ $(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O ihex $< $@
+
+%.srec: %.elf
+ $(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O srec $< $@
+
+%.bin: %.elf
+ $(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O binary $< $@
diff --git a/bootloaders/optiboot/README.TXT b/bootloaders/optiboot/README.TXT
new file mode 100644
index 0000000..cd79cd9
--- /dev/null
+++ b/bootloaders/optiboot/README.TXT
@@ -0,0 +1,81 @@
+This directory contains the Optiboot small bootloader for AVR
+microcontrollers, somewhat modified specifically for the Arduino
+environment.
+
+Optiboot is more fully described here: http://code.google.com/p/optiboot/
+and is the work of Peter Knight (aka Cathedrow), building on work of Jason P
+Kyle, Spiff, and Ladyada. Arduino-specific modification are by Bill
+Westfield (aka WestfW)
+
+Arduino-specific issues are tracked as part of the Arduino project
+at http://code.google.com/p/arduino
+
+
+------------------------------------------------------------
+Building optiboot for Arduino.
+
+Production builds of optiboot for Arduino are done on a Mac in "unix mode"
+using CrossPack-AVR-20100115. CrossPack tracks WINAVR (for windows), which
+is just a package of avr-gcc and related utilities, so similar builds should
+work on Windows or Linux systems.
+
+One of the Arduino-specific changes is modifications to the makefile to
+allow building optiboot using only the tools installed as part of the
+Arduino environment, or the Arduino source development tree. All three
+build procedures should yield identical binaries (.hex files) (although
+this may change if compiler versions drift apart between CrossPack and
+the Arduino IDE.)
+
+
+Building Optiboot in the Arduino IDE Install.
+
+Work in the .../hardware/arduino/bootloaders/optiboot/ and use the
+"omake <targets>" command, which just generates a command that uses
+the arduino-included "make" utility with a command like:
+ make OS=windows ENV=arduino <targets>
+or make OS=macosx ENV=arduino <targets>
+On windows, this assumes you're using the windows command shell. If
+you're using a cygwin or mingw shell, or have one of those in your
+path, the build will probably break due to slash vs backslash issues.
+On a Mac, if you have the developer tools installed, you can use the
+Apple-supplied version of make.
+The makefile uses relative paths ("../../../tools/" and such) to find
+the programs it needs, so you need to work in the existing optiboot
+directory (or something created at the same "level") for it to work.
+
+
+Building Optiboot in the Arduino Source Development Install.
+
+In this case, there is no special shell script, and you're assumed to
+have "make" installed somewhere in your path.
+Build the Arduino source ("ant build") to unpack the tools into the
+expected directory.
+Work in Arduino/hardware/arduino/bootloaders/optiboot and use
+ make OS=windows ENV=arduinodev <targets>
+or make OS=macosx ENV=arduinodev <targets>
+
+
+Programming Chips Using the _isp Targets
+
+The CPU targets have corresponding ISP targets that will actuall
+program the bootloader into a chip. "atmega328_isp" for the atmega328,
+for example. These will set the fuses and lock bits as appropriate as
+well as uploading the bootloader code.
+
+The makefiles default to using a USB programmer, but you can use
+a serial programmer like ArduinoISP by changing the appropriate
+variables when you invoke make:
+
+ make ISPTOOL=stk500v1 ISPPORT=/dev/tty.usbserial-A20e1eAN \
+ ISPSPEED=-b19200 atmega328_isp
+
+The "atmega8_isp" target does not currently work, because the mega8
+doesn't have the "extended" fuse that the generic ISP target wants to
+pass on to avrdude. You'll need to run avrdude manually.
+
+
+Standard Targets
+
+I've reduced the pre-built and source-version-controlled targets
+(.hex and .lst files included in the git repository) to just the
+three basic 16MHz targets: atmega8, atmega16, atmega328.
diff --git a/bootloaders/optiboot/boot.h b/bootloaders/optiboot/boot.h
new file mode 100644
index 0000000..2639cd8
--- /dev/null
+++ b/bootloaders/optiboot/boot.h
@@ -0,0 +1,848 @@
+/* Modified to use out for SPM access
+** Peter Knight, Optiboot project http://optiboot.googlecode.com
+**
+** Todo: Tidy up
+**
+** "_short" routines execute 1 cycle faster and use 1 less word of flash
+** by using "out" instruction instead of "sts".
+**
+** Additional elpm variants that trust the value of RAMPZ
+*/
+
+/* Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007 Eric B. Weddington
+ All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in
+ the documentation and/or other materials provided with the
+ distribution.
+ * Neither the name of the copyright holders nor the names of
+ contributors may be used to endorse or promote products derived
+ from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE. */
+
+/* $Id: boot.h,v 1.27.2.3 2008/09/30 13:58:48 arcanum Exp $ */
+
+#ifndef _AVR_BOOT_H_
+#define _AVR_BOOT_H_ 1
+
+/** \file */
+/** \defgroup avr_boot <avr/boot.h>: Bootloader Support Utilities
+ \code
+ #include <avr/io.h>
+ #include <avr/boot.h>
+ \endcode
+
+ The macros in this module provide a C language interface to the
+ bootloader support functionality of certain AVR processors. These
+ macros are designed to work with all sizes of flash memory.
+
+ Global interrupts are not automatically disabled for these macros. It
+ is left up to the programmer to do this. See the code example below.
+ Also see the processor datasheet for caveats on having global interrupts
+ enabled during writing of the Flash.
+
+ \note Not all AVR processors provide bootloader support. See your
+ processor datasheet to see if it provides bootloader support.
+
+ \todo From email with Marek: On smaller devices (all except ATmega64/128),
+ __SPM_REG is in the I/O space, accessible with the shorter "in" and "out"
+ instructions - since the boot loader has a limited size, this could be an
+ important optimization.
+
+ \par API Usage Example
+ The following code shows typical usage of the boot API.
+
+ \code
+ #include <inttypes.h>
+ #include <avr/interrupt.h>
+ #include <avr/pgmspace.h>
+
+ void boot_program_page (uint32_t page, uint8_t *buf)
+ {
+ uint16_t i;
+ uint8_t sreg;
+
+ // Disable interrupts.
+
+ sreg = SREG;
+ cli();
+
+ eeprom_busy_wait ();
+
+ boot_page_erase (page);
+ boot_spm_busy_wait (); // Wait until the memory is erased.
+
+ for (i=0; i<SPM_PAGESIZE; i+=2)
+ {
+ // Set up little-endian word.
+
+ uint16_t w = *buf++;
+ w += (*buf++) << 8;
+
+ boot_page_fill (page + i, w);
+ }
+
+ boot_page_write (page); // Store buffer in flash page.
+ boot_spm_busy_wait(); // Wait until the memory is written.
+
+ // Reenable RWW-section again. We need this if we want to jump back
+ // to the application after bootloading.
+
+ boot_rww_enable ();
+
+ // Re-enable interrupts (if they were ever enabled).
+
+ SREG = sreg;
+ }\endcode */
+
+#include <avr/eeprom.h>
+#include <avr/io.h>
+#include <inttypes.h>
+#include <limits.h>
+
+/* Check for SPM Control Register in processor. */
+#if defined (SPMCSR)
+# define __SPM_REG SPMCSR
+#elif defined (SPMCR)
+# define __SPM_REG SPMCR
+#else
+# error AVR processor does not provide bootloader support!
+#endif
+
+
+/* Check for SPM Enable bit. */
+#if defined(SPMEN)
+# define __SPM_ENABLE SPMEN
+#elif defined(SELFPRGEN)
+# define __SPM_ENABLE SELFPRGEN
+#else
+# error Cannot find SPM Enable bit definition!
+#endif
+
+/** \ingroup avr_boot
+ \def BOOTLOADER_SECTION
+
+ Used to declare a function or variable to be placed into a
+ new section called .bootloader. This section and its contents
+ can then be relocated to any address (such as the bootloader
+ NRWW area) at link-time. */
+
+#define BOOTLOADER_SECTION __attribute__ ((section (".bootloader")))
+
+/* Create common bit definitions. */
+#ifdef ASB
+#define __COMMON_ASB ASB
+#else
+#define __COMMON_ASB RWWSB
+#endif
+
+#ifdef ASRE
+#define __COMMON_ASRE ASRE
+#else
+#define __COMMON_ASRE RWWSRE
+#endif
+
+/* Define the bit positions of the Boot Lock Bits. */
+
+#define BLB12 5
+#define BLB11 4
+#define BLB02 3
+#define BLB01 2
+
+/** \ingroup avr_boot
+ \def boot_spm_interrupt_enable()
+ Enable the SPM interrupt. */
+
+#define boot_spm_interrupt_enable() (__SPM_REG |= (uint8_t)_BV(SPMIE))
+
+/** \ingroup avr_boot
+ \def boot_spm_interrupt_disable()
+ Disable the SPM interrupt. */
+
+#define boot_spm_interrupt_disable() (__SPM_REG &= (uint8_t)~_BV(SPMIE))
+
+/** \ingroup avr_boot
+ \def boot_is_spm_interrupt()
+ Check if the SPM interrupt is enabled. */
+
+#define boot_is_spm_interrupt() (__SPM_REG & (uint8_t)_BV(SPMIE))
+
+/** \ingroup avr_boot
+ \def boot_rww_busy()
+ Check if the RWW section is busy. */
+
+#define boot_rww_busy() (__SPM_REG & (uint8_t)_BV(__COMMON_ASB))
+
+/** \ingroup avr_boot
+ \def boot_spm_busy()
+ Check if the SPM instruction is busy. */
+
+#define boot_spm_busy() (__SPM_REG & (uint8_t)_BV(__SPM_ENABLE))
+
+/** \ingroup avr_boot
+ \def boot_spm_busy_wait()
+ Wait while the SPM instruction is busy. */
+
+#define boot_spm_busy_wait() do{}while(boot_spm_busy())
+
+#define __BOOT_PAGE_ERASE (_BV(__SPM_ENABLE) | _BV(PGERS))
+#define __BOOT_PAGE_WRITE (_BV(__SPM_ENABLE) | _BV(PGWRT))
+#define __BOOT_PAGE_FILL _BV(__SPM_ENABLE)
+#define __BOOT_RWW_ENABLE (_BV(__SPM_ENABLE) | _BV(__COMMON_ASRE))
+#define __BOOT_LOCK_BITS_SET (_BV(__SPM_ENABLE) | _BV(BLBSET))
+
+#define __boot_page_fill_short(address, data) \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "movw r0, %3\n\t" \
+ "out %0, %1\n\t" \
+ "spm\n\t" \
+ "clr r1\n\t" \
+ : \
+ : "i" (_SFR_IO_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_PAGE_FILL), \
+ "z" ((uint16_t)address), \
+ "r" ((uint16_t)data) \
+ : "r0" \
+ ); \
+}))
+
+#define __boot_page_fill_normal(address, data) \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "movw r0, %3\n\t" \
+ "sts %0, %1\n\t" \
+ "spm\n\t" \
+ "clr r1\n\t" \
+ : \
+ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_PAGE_FILL), \
+ "z" ((uint16_t)address), \
+ "r" ((uint16_t)data) \
+ : "r0" \
+ ); \
+}))
+
+#define __boot_page_fill_alternate(address, data)\
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "movw r0, %3\n\t" \
+ "sts %0, %1\n\t" \
+ "spm\n\t" \
+ ".word 0xffff\n\t" \
+ "nop\n\t" \
+ "clr r1\n\t" \
+ : \
+ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_PAGE_FILL), \
+ "z" ((uint16_t)address), \
+ "r" ((uint16_t)data) \
+ : "r0" \
+ ); \
+}))
+
+#define __boot_page_fill_extended(address, data) \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "movw r0, %4\n\t" \
+ "movw r30, %A3\n\t" \
+ "sts %1, %C3\n\t" \
+ "sts %0, %2\n\t" \
+ "spm\n\t" \
+ "clr r1\n\t" \
+ : \
+ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \
+ "i" (_SFR_MEM_ADDR(RAMPZ)), \
+ "r" ((uint8_t)__BOOT_PAGE_FILL), \
+ "r" ((uint32_t)address), \
+ "r" ((uint16_t)data) \
+ : "r0", "r30", "r31" \
+ ); \
+}))
+
+#define __boot_page_fill_extended_short(address, data) \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "movw r0, %4\n\t" \
+ "movw r30, %A3\n\t" \
+ "out %1, %C3\n\t" \
+ "out %0, %2\n\t" \
+ "spm\n\t" \
+ "clr r1\n\t" \
+ : \
+ : "i" (_SFR_IO_ADDR(__SPM_REG)), \
+ "i" (_SFR_IO_ADDR(RAMPZ)), \
+ "r" ((uint8_t)__BOOT_PAGE_FILL), \
+ "r" ((uint32_t)address), \
+ "r" ((uint16_t)data) \
+ : "r0", "r30", "r31" \
+ ); \
+}))
+
+#define __boot_page_erase_short(address) \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "out %0, %1\n\t" \
+ "spm\n\t" \
+ : \
+ : "i" (_SFR_IO_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_PAGE_ERASE), \
+ "z" ((uint16_t)address) \
+ ); \
+}))
+
+
+#define __boot_page_erase_normal(address) \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "sts %0, %1\n\t" \
+ "spm\n\t" \
+ : \
+ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_PAGE_ERASE), \
+ "z" ((uint16_t)address) \
+ ); \
+}))
+
+#define __boot_page_erase_alternate(address) \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "sts %0, %1\n\t" \
+ "spm\n\t" \
+ ".word 0xffff\n\t" \
+ "nop\n\t" \
+ : \
+ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_PAGE_ERASE), \
+ "z" ((uint16_t)address) \
+ ); \
+}))
+
+#define __boot_page_erase_extended(address) \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "movw r30, %A3\n\t" \
+ "sts %1, %C3\n\t" \
+ "sts %0, %2\n\t" \
+ "spm\n\t" \
+ : \
+ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \
+ "i" (_SFR_MEM_ADDR(RAMPZ)), \
+ "r" ((uint8_t)__BOOT_PAGE_ERASE), \
+ "r" ((uint32_t)address) \
+ : "r30", "r31" \
+ ); \
+}))
+#define __boot_page_erase_extended_short(address) \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "movw r30, %A3\n\t" \
+ "out %1, %C3\n\t" \
+ "out %0, %2\n\t" \
+ "spm\n\t" \
+ : \
+ : "i" (_SFR_IO_ADDR(__SPM_REG)), \
+ "i" (_SFR_IO_ADDR(RAMPZ)), \
+ "r" ((uint8_t)__BOOT_PAGE_ERASE), \
+ "r" ((uint32_t)address) \
+ : "r30", "r31" \
+ ); \
+}))
+
+#define __boot_page_write_short(address) \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "out %0, %1\n\t" \
+ "spm\n\t" \
+ : \
+ : "i" (_SFR_IO_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_PAGE_WRITE), \
+ "z" ((uint16_t)address) \
+ ); \
+}))
+
+#define __boot_page_write_normal(address) \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "sts %0, %1\n\t" \
+ "spm\n\t" \
+ : \
+ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_PAGE_WRITE), \
+ "z" ((uint16_t)address) \
+ ); \
+}))
+
+#define __boot_page_write_alternate(address) \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "sts %0, %1\n\t" \
+ "spm\n\t" \
+ ".word 0xffff\n\t" \
+ "nop\n\t" \
+ : \
+ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_PAGE_WRITE), \
+ "z" ((uint16_t)address) \
+ ); \
+}))
+
+#define __boot_page_write_extended(address) \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "movw r30, %A3\n\t" \
+ "sts %1, %C3\n\t" \
+ "sts %0, %2\n\t" \
+ "spm\n\t" \
+ : \
+ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \
+ "i" (_SFR_MEM_ADDR(RAMPZ)), \
+ "r" ((uint8_t)__BOOT_PAGE_WRITE), \
+ "r" ((uint32_t)address) \
+ : "r30", "r31" \
+ ); \
+}))
+#define __boot_page_write_extended_short(address) \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "movw r30, %A3\n\t" \
+ "out %1, %C3\n\t" \
+ "out %0, %2\n\t" \
+ "spm\n\t" \
+ : \
+ : "i" (_SFR_IO_ADDR(__SPM_REG)), \
+ "i" (_SFR_IO_ADDR(RAMPZ)), \
+ "r" ((uint8_t)__BOOT_PAGE_WRITE), \
+ "r" ((uint32_t)address) \
+ : "r30", "r31" \
+ ); \
+}))
+
+#define __boot_rww_enable_short() \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "out %0, %1\n\t" \
+ "spm\n\t" \
+ : \
+ : "i" (_SFR_IO_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_RWW_ENABLE) \
+ ); \
+}))
+
+#define __boot_rww_enable() \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "sts %0, %1\n\t" \
+ "spm\n\t" \
+ : \
+ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_RWW_ENABLE) \
+ ); \
+}))
+
+#define __boot_rww_enable_alternate() \
+(__extension__({ \
+ __asm__ __volatile__ \
+ ( \
+ "sts %0, %1\n\t" \
+ "spm\n\t" \
+ ".word 0xffff\n\t" \
+ "nop\n\t" \
+ : \
+ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_RWW_ENABLE) \
+ ); \
+}))
+
+/* From the mega16/mega128 data sheets (maybe others):
+
+ Bits by SPM To set the Boot Loader Lock bits, write the desired data to
+ R0, write "X0001001" to SPMCR and execute SPM within four clock cycles
+ after writing SPMCR. The only accessible Lock bits are the Boot Lock bits
+ that may prevent the Application and Boot Loader section from any
+ software update by the MCU.
+
+ If bits 5..2 in R0 are cleared (zero), the corresponding Boot Lock bit
+ will be programmed if an SPM instruction is executed within four cycles
+ after BLBSET and SPMEN (or SELFPRGEN) are set in SPMCR. The Z-pointer is
+ don't care during this operation, but for future compatibility it is
+ recommended to load the Z-pointer with $0001 (same as used for reading the
+ Lock bits). For future compatibility It is also recommended to set bits 7,
+ 6, 1, and 0 in R0 to 1 when writing the Lock bits. When programming the
+ Lock bits the entire Flash can be read during the operation. */
+
+#define __boot_lock_bits_set_short(lock_bits) \
+(__extension__({ \
+ uint8_t value = (uint8_t)(~(lock_bits)); \
+ __asm__ __volatile__ \
+ ( \
+ "ldi r30, 1\n\t" \
+ "ldi r31, 0\n\t" \
+ "mov r0, %2\n\t" \
+ "out %0, %1\n\t" \
+ "spm\n\t" \
+ : \
+ : "i" (_SFR_IO_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
+ "r" (value) \
+ : "r0", "r30", "r31" \
+ ); \
+}))
+
+#define __boot_lock_bits_set(lock_bits) \
+(__extension__({ \
+ uint8_t value = (uint8_t)(~(lock_bits)); \
+ __asm__ __volatile__ \
+ ( \
+ "ldi r30, 1\n\t" \
+ "ldi r31, 0\n\t" \
+ "mov r0, %2\n\t" \
+ "sts %0, %1\n\t" \
+ "spm\n\t" \
+ : \
+ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
+ "r" (value) \
+ : "r0", "r30", "r31" \
+ ); \
+}))
+
+#define __boot_lock_bits_set_alternate(lock_bits) \
+(__extension__({ \
+ uint8_t value = (uint8_t)(~(lock_bits)); \
+ __asm__ __volatile__ \
+ ( \
+ "ldi r30, 1\n\t" \
+ "ldi r31, 0\n\t" \
+ "mov r0, %2\n\t" \
+ "sts %0, %1\n\t" \
+ "spm\n\t" \
+ ".word 0xffff\n\t" \
+ "nop\n\t" \
+ : \
+ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
+ "r" (value) \
+ : "r0", "r30", "r31" \
+ ); \
+}))
+
+/*
+ Reading lock and fuse bits:
+
+ Similarly to writing the lock bits above, set BLBSET and SPMEN (or
+ SELFPRGEN) bits in __SPMREG, and then (within four clock cycles) issue an
+ LPM instruction.
+
+ Z address: contents:
+ 0x0000 low fuse bits
+ 0x0001 lock bits
+ 0x0002 extended fuse bits
+ 0x0003 high fuse bits
+
+ Sounds confusing, doesn't it?
+
+ Unlike the macros in pgmspace.h, no need to care for non-enhanced
+ cores here as these old cores do not provide SPM support anyway.
+ */
+
+/** \ingroup avr_boot
+ \def GET_LOW_FUSE_BITS
+ address to read the low fuse bits, using boot_lock_fuse_bits_get
+ */
+#define GET_LOW_FUSE_BITS (0x0000)
+/** \ingroup avr_boot
+ \def GET_LOCK_BITS
+ address to read the lock bits, using boot_lock_fuse_bits_get
+ */
+#define GET_LOCK_BITS (0x0001)
+/** \ingroup avr_boot
+ \def GET_EXTENDED_FUSE_BITS
+ address to read the extended fuse bits, using boot_lock_fuse_bits_get
+ */
+#define GET_EXTENDED_FUSE_BITS (0x0002)
+/** \ingroup avr_boot
+ \def GET_HIGH_FUSE_BITS
+ address to read the high fuse bits, using boot_lock_fuse_bits_get
+ */
+#define GET_HIGH_FUSE_BITS (0x0003)
+
+/** \ingroup avr_boot
+ \def boot_lock_fuse_bits_get(address)
+
+ Read the lock or fuse bits at \c address.
+
+ Parameter \c address can be any of GET_LOW_FUSE_BITS,
+ GET_LOCK_BITS, GET_EXTENDED_FUSE_BITS, or GET_HIGH_FUSE_BITS.
+
+ \note The lock and fuse bits returned are the physical values,
+ i.e. a bit returned as 0 means the corresponding fuse or lock bit
+ is programmed.
+ */
+#define boot_lock_fuse_bits_get_short(address) \
+(__extension__({ \
+ uint8_t __result; \
+ __asm__ __volatile__ \
+ ( \
+ "ldi r30, %3\n\t" \
+ "ldi r31, 0\n\t" \
+ "out %1, %2\n\t" \
+ "lpm %0, Z\n\t" \
+ : "=r" (__result) \
+ : "i" (_SFR_IO_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
+ "M" (address) \
+ : "r0", "r30", "r31" \
+ ); \
+ __result; \
+}))
+
+#define boot_lock_fuse_bits_get(address) \
+(__extension__({ \
+ uint8_t __result; \
+ __asm__ __volatile__ \
+ ( \
+ "ldi r30, %3\n\t" \
+ "ldi r31, 0\n\t" \
+ "sts %1, %2\n\t" \
+ "lpm %0, Z\n\t" \
+ : "=r" (__result) \
+ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \
+ "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
+ "M" (address) \
+ : "r0", "r30", "r31" \
+ ); \
+ __result; \
+}))
+
+/** \ingroup avr_boot
+ \def boot_signature_byte_get(address)
+
+ Read the Signature Row byte at \c address. For some MCU types,
+ this function can also retrieve the factory-stored oscillator
+ calibration bytes.
+
+ Parameter \c address can be 0-0x1f as documented by the datasheet.
+ \note The values are MCU type dependent.
+*/
+
+#define __BOOT_SIGROW_READ (_BV(__SPM_ENABLE) | _BV(SIGRD))
+
+#define boot_signature_byte_get_short(addr) \
+(__extension__({ \
+ uint16_t __addr16 = (uint16_t)(addr); \
+ uint8_t __result; \
+ __asm__ __volatile__ \
+ ( \
+ "out %1, %2\n\t" \
+ "lpm %0, Z" "\n\t" \
+ : "=r" (__result) \
+ : "i" (_SFR_IO_ADDR(__SPM_REG)), \
+ "r" ((uint8_t) __BOOT_SIGROW_READ), \
+ "z" (__addr16) \
+ ); \
+ __result; \
+}))
+
+#define boot_signature_byte_get(addr) \
+(__extension__({ \
+ uint16_t __addr16 = (uint16_t)(addr); \
+ uint8_t __result; \
+ __asm__ __volatile__ \
+ ( \
+ "sts %1, %2\n\t" \
+ "lpm %0, Z" "\n\t" \
+ : "=r" (__result) \
+ : "i" (_SFR_MEM_ADDR(__SPM_REG)), \
+ "r" ((uint8_t) __BOOT_SIGROW_READ), \
+ "z" (__addr16) \
+ ); \
+ __result; \
+}))
+
+/** \ingroup avr_boot
+ \def boot_page_fill(address, data)
+
+ Fill the bootloader temporary page buffer for flash
+ address with data word.
+
+ \note The address is a byte address. The data is a word. The AVR
+ writes data to the buffer a word at a time, but addresses the buffer
+ per byte! So, increment your address by 2 between calls, and send 2
+ data bytes in a word format! The LSB of the data is written to the lower
+ address; the MSB of the data is written to the higher address.*/
+
+/** \ingroup avr_boot
+ \def boot_page_erase(address)
+
+ Erase the flash page that contains address.
+
+ \note address is a byte address in flash, not a word address. */
+
+/** \ingroup avr_boot
+ \def boot_page_write(address)
+
+ Write the bootloader temporary page buffer
+ to flash page that contains address.
+
+ \note address is a byte address in flash, not a word address. */
+
+/** \ingroup avr_boot
+ \def boot_rww_enable()
+
+ Enable the Read-While-Write memory section. */
+
+/** \ingroup avr_boot
+ \def boot_lock_bits_set(lock_bits)
+
+ Set the bootloader lock bits.
+
+ \param lock_bits A mask of which Boot Loader Lock Bits to set.
+
+ \note In this context, a 'set bit' will be written to a zero value.
+ Note also that only BLBxx bits can be programmed by this command.
+
+ For example, to disallow the SPM instruction from writing to the Boot
+ Loader memory section of flash, you would use this macro as such:
+
+ \code
+ boot_lock_bits_set (_BV (BLB11));
+ \endcode
+
+ \note Like any lock bits, the Boot Loader Lock Bits, once set,
+ cannot be cleared again except by a chip erase which will in turn
+ also erase the boot loader itself. */
+
+/* Normal versions of the macros use 16-bit addresses.
+ Extended versions of the macros use 32-bit addresses.
+ Alternate versions of the macros use 16-bit addresses and require special
+ instruction sequences after LPM.
+
+ FLASHEND is defined in the ioXXXX.h file.
+ USHRT_MAX is defined in <limits.h>. */
+
+#if defined(__AVR_ATmega161__) || defined(__AVR_ATmega163__) \
+ || defined(__AVR_ATmega323__)
+
+/* Alternate: ATmega161/163/323 and 16 bit address */
+#define boot_page_fill(address, data) __boot_page_fill_alternate(address, data)
+#define boot_page_erase(address) __boot_page_erase_alternate(address)
+#define boot_page_write(address) __boot_page_write_alternate(address)
+#define boot_rww_enable() __boot_rww_enable_alternate()
+#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_alternate(lock_bits)
+
+#elif (FLASHEND > USHRT_MAX)
+
+/* Extended: >16 bit address */
+#define boot_page_fill(address, data) __boot_page_fill_extended_short(address, data)
+#define boot_page_erase(address) __boot_page_erase_extended_short(address)
+#define boot_page_write(address) __boot_page_write_extended_short(address)
+#define boot_rww_enable() __boot_rww_enable_short()
+#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_short(lock_bits)
+
+#else
+
+/* Normal: 16 bit address */
+#define boot_page_fill(address, data) __boot_page_fill_short(address, data)
+#define boot_page_erase(address) __boot_page_erase_short(address)
+#define boot_page_write(address) __boot_page_write_short(address)
+#define boot_rww_enable() __boot_rww_enable_short()
+#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_short(lock_bits)
+
+#endif
+
+/** \ingroup avr_boot
+
+ Same as boot_page_fill() except it waits for eeprom and spm operations to
+ complete before filling the page. */
+
+#define boot_page_fill_safe(address, data) \
+do { \
+ boot_spm_busy_wait(); \
+ eeprom_busy_wait(); \
+ boot_page_fill(address, data); \
+} while (0)
+
+/** \ingroup avr_boot
+
+ Same as boot_page_erase() except it waits for eeprom and spm operations to
+ complete before erasing the page. */
+
+#define boot_page_erase_safe(address) \
+do { \
+ boot_spm_busy_wait(); \
+ eeprom_busy_wait(); \
+ boot_page_erase (address); \
+} while (0)
+
+/** \ingroup avr_boot
+
+ Same as boot_page_write() except it waits for eeprom and spm operations to
+ complete before writing the page. */
+
+#define boot_page_write_safe(address) \
+do { \
+ boot_spm_busy_wait(); \
+ eeprom_busy_wait(); \
+ boot_page_write (address); \
+} while (0)
+
+/** \ingroup avr_boot
+
+ Same as boot_rww_enable() except waits for eeprom and spm operations to
+ complete before enabling the RWW mameory. */
+
+#define boot_rww_enable_safe() \
+do { \
+ boot_spm_busy_wait(); \
+ eeprom_busy_wait(); \
+ boot_rww_enable(); \
+} while (0)
+
+/** \ingroup avr_boot
+
+ Same as boot_lock_bits_set() except waits for eeprom and spm operations to
+ complete before setting the lock bits. */
+
+#define boot_lock_bits_set_safe(lock_bits) \
+do { \
+ boot_spm_busy_wait(); \
+ eeprom_busy_wait(); \
+ boot_lock_bits_set (lock_bits); \
+} while (0)
+
+#endif /* _AVR_BOOT_H_ */
diff --git a/bootloaders/optiboot/makeall b/bootloaders/optiboot/makeall
new file mode 100755
index 0000000..f076bc7
--- /dev/null
+++ b/bootloaders/optiboot/makeall
@@ -0,0 +1,20 @@
+#!/bin/bash
+make clean
+#
+# The "big three" standard bootloaders.
+make atmega8
+make atmega168
+make atmega328
+#
+# additional buildable platforms of
+# somewhat questionable support level
+make lilypad
+make lilypad_resonator
+make pro8
+make pro16
+make pro20
+make atmega328_pro8
+make sanguino
+make mega
+make atmega88
+make luminet
diff --git a/bootloaders/optiboot/omake b/bootloaders/optiboot/omake
new file mode 100644
index 0000000..cc7c6bc
--- /dev/null
+++ b/bootloaders/optiboot/omake
@@ -0,0 +1,2 @@
+echo ../../../tools/avr/bin/make OS=macosx ENV=arduino $*
+../../../tools/avr/bin/make OS=macosx ENV=arduino $*
diff --git a/bootloaders/optiboot/omake.bat b/bootloaders/optiboot/omake.bat
new file mode 100644
index 0000000..f6815da
--- /dev/null
+++ b/bootloaders/optiboot/omake.bat
@@ -0,0 +1 @@
+..\..\..\tools\avr\utils\bin\make OS=windows ENV=arduino %*
diff --git a/bootloaders/optiboot/optiboot.c b/bootloaders/optiboot/optiboot.c
new file mode 100644
index 0000000..d499d85
--- /dev/null
+++ b/bootloaders/optiboot/optiboot.c
@@ -0,0 +1,672 @@
+/**********************************************************/
+/* Optiboot bootloader for Arduino */
+/* */
+/* http://optiboot.googlecode.com */
+/* */
+/* Arduino-maintained version : See README.TXT */
+/* http://code.google.com/p/arduino/ */
+/* */
+/* Heavily optimised bootloader that is faster and */
+/* smaller than the Arduino standard bootloader */
+/* */
+/* Enhancements: */
+/* Fits in 512 bytes, saving 1.5K of code space */
+/* Background page erasing speeds up programming */
+/* Higher baud rate speeds up programming */
+/* Written almost entirely in C */
+/* Customisable timeout with accurate timeconstant */
+/* Optional virtual UART. No hardware UART required. */
+/* Optional virtual boot partition for devices without. */
+/* */
+/* What you lose: */
+/* Implements a skeleton STK500 protocol which is */
+/* missing several features including EEPROM */
+/* programming and non-page-aligned writes */
+/* High baud rate breaks compatibility with standard */
+/* Arduino flash settings */
+/* */
+/* Fully supported: */
+/* ATmega168 based devices (Diecimila etc) */
+/* ATmega328P based devices (Duemilanove etc) */
+/* */
+/* Alpha test */
+/* ATmega1280 based devices (Arduino Mega) */
+/* */
+/* Work in progress: */
+/* ATmega644P based devices (Sanguino) */
+/* ATtiny84 based devices (Luminet) */
+/* */
+/* Does not support: */
+/* USB based devices (eg. Teensy) */
+/* */
+/* Assumptions: */
+/* The code makes several assumptions that reduce the */
+/* code size. They are all true after a hardware reset, */
+/* but may not be true if the bootloader is called by */
+/* other means or on other hardware. */
+/* No interrupts can occur */
+/* UART and Timer 1 are set to their reset state */
+/* SP points to RAMEND */
+/* */
+/* Code builds on code, libraries and optimisations from: */
+/* stk500boot.c by Jason P. Kyle */
+/* Arduino bootloader http://arduino.cc */
+/* Spiff's 1K bootloader http://spiffie.org/know/arduino_1k_bootloader/bootloader.shtml */
+/* avr-libc project http://nongnu.org/avr-libc */
+/* Adaboot http://www.ladyada.net/library/arduino/bootloader.html */
+/* AVR305 Atmel Application Note */
+/* */
+/* This program is free software; you can redistribute it */
+/* and/or modify it under the terms of the GNU General */
+/* Public License as published by the Free Software */
+/* Foundation; either version 2 of the License, or */
+/* (at your option) any later version. */
+/* */
+/* This program is distributed in the hope that it will */
+/* be useful, but WITHOUT ANY WARRANTY; without even the */
+/* implied warranty of MERCHANTABILITY or FITNESS FOR A */
+/* PARTICULAR PURPOSE. See the GNU General Public */
+/* License for more details. */
+/* */
+/* You should have received a copy of the GNU General */
+/* Public License along with this program; if not, write */
+/* to the Free Software Foundation, Inc., */
+/* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
+/* */
+/* Licence can be viewed at */
+/* http://www.fsf.org/licenses/gpl.txt */
+/* */
+/**********************************************************/
+
+
+/**********************************************************/
+/* */
+/* Optional defines: */
+/* */
+/**********************************************************/
+/* */
+/* BIG_BOOT: */
+/* Build a 1k bootloader, not 512 bytes. This turns on */
+/* extra functionality. */
+/* */
+/* BAUD_RATE: */
+/* Set bootloader baud rate. */
+/* */
+/* LUDICROUS_SPEED: */
+/* 230400 baud :-) */
+/* */
+/* SOFT_UART: */
+/* Use AVR305 soft-UART instead of hardware UART. */
+/* */
+/* LED_START_FLASHES: */
+/* Number of LED flashes on bootup. */
+/* */
+/* LED_DATA_FLASH: */
+/* Flash LED when transferring data. For boards without */
+/* TX or RX LEDs, or for people who like blinky lights. */
+/* */
+/* SUPPORT_EEPROM: */
+/* Support reading and writing from EEPROM. This is not */
+/* used by Arduino, so off by default. */
+/* */
+/* TIMEOUT_MS: */
+/* Bootloader timeout period, in milliseconds. */
+/* 500,1000,2000,4000,8000 supported. */
+/* */
+/**********************************************************/
+
+/**********************************************************/
+/* Version Numbers! */
+/* */
+/* Arduino Optiboot now includes this Version number in */
+/* the source and object code. */
+/* */
+/* Version 3 was released as zip from the optiboot */
+/* repository and was distributed with Arduino 0022. */
+/* Version 4 starts with the arduino repository commit */
+/* that brought the arduino repository up-to-date with */
+/* the optiboot source tree changes since v3. */
+/* */
+/**********************************************************/
+
+/**********************************************************/
+/* Edit History: */
+/* */
+/* 4.4 WestfW: add initialization of address to keep */
+/* the compiler happy. Change SC'ed targets. */
+/* Return the SW version via READ PARAM */
+/* 4.3 WestfW: catch framing errors in getch(), so that */
+/* AVRISP works without HW kludges. */
+/* http://code.google.com/p/arduino/issues/detail?id=368n*/
+/* 4.2 WestfW: reduce code size, fix timeouts, change */
+/* verifySpace to use WDT instead of appstart */
+/* 4.1 WestfW: put version number in binary. */
+/**********************************************************/
+
+#define OPTIBOOT_MAJVER 4
+#define OPTIBOOT_MINVER 4
+
+#define MAKESTR(a) #a
+#define MAKEVER(a, b) MAKESTR(a*256+b)
+
+asm(" .section .version\n"
+ "optiboot_version: .word " MAKEVER(OPTIBOOT_MAJVER, OPTIBOOT_MINVER) "\n"
+ " .section .text\n");
+
+#include <inttypes.h>
+#include <avr/io.h>
+#include <avr/pgmspace.h>
+
+// <avr/boot.h> uses sts instructions, but this version uses out instructions
+// This saves cycles and program memory.
+#include "boot.h"
+
+
+// We don't use <avr/wdt.h> as those routines have interrupt overhead we don't need.
+
+#include "pin_defs.h"
+#include "stk500.h"
+
+#ifndef LED_START_FLASHES
+#define LED_START_FLASHES 0
+#endif
+
+#ifdef LUDICROUS_SPEED
+#define BAUD_RATE 230400L
+#endif
+
+/* set the UART baud rate defaults */
+#ifndef BAUD_RATE
+#if F_CPU >= 8000000L
+#define BAUD_RATE 115200L // Highest rate Avrdude win32 will support
+#elsif F_CPU >= 1000000L
+#define BAUD_RATE 9600L // 19200 also supported, but with significant error
+#elsif F_CPU >= 128000L
+#define BAUD_RATE 4800L // Good for 128kHz internal RC
+#else
+#define BAUD_RATE 1200L // Good even at 32768Hz
+#endif
+#endif
+
+/* Switch in soft UART for hard baud rates */
+#if (F_CPU/BAUD_RATE) > 280 // > 57600 for 16MHz
+#ifndef SOFT_UART
+#define SOFT_UART
+#endif
+#endif
+
+/* Watchdog settings */
+#define WATCHDOG_OFF (0)
+#define WATCHDOG_16MS (_BV(WDE))
+#define WATCHDOG_32MS (_BV(WDP0) | _BV(WDE))
+#define WATCHDOG_64MS (_BV(WDP1) | _BV(WDE))
+#define WATCHDOG_125MS (_BV(WDP1) | _BV(WDP0) | _BV(WDE))
+#define WATCHDOG_250MS (_BV(WDP2) | _BV(WDE))
+#define WATCHDOG_500MS (_BV(WDP2) | _BV(WDP0) | _BV(WDE))
+#define WATCHDOG_1S (_BV(WDP2) | _BV(WDP1) | _BV(WDE))
+#define WATCHDOG_2S (_BV(WDP2) | _BV(WDP1) | _BV(WDP0) | _BV(WDE))
+#ifndef __AVR_ATmega8__
+#define WATCHDOG_4S (_BV(WDP3) | _BV(WDE))
+#define WATCHDOG_8S (_BV(WDP3) | _BV(WDP0) | _BV(WDE))
+#endif
+
+/* Function Prototypes */
+/* The main function is in init9, which removes the interrupt vector table */
+/* we don't need. It is also 'naked', which means the compiler does not */
+/* generate any entry or exit code itself. */
+int main(void) __attribute__ ((naked)) __attribute__ ((section (".init9")));
+void putch(char);
+uint8_t getch(void);
+static inline void getNch(uint8_t); /* "static inline" is a compiler hint to reduce code size */
+void verifySpace();
+static inline void flash_led(uint8_t);
+uint8_t getLen();
+static inline void watchdogReset();
+void watchdogConfig(uint8_t x);
+#ifdef SOFT_UART
+void uartDelay() __attribute__ ((naked));
+#endif
+void appStart() __attribute__ ((naked));
+
+#if defined(__AVR_ATmega168__)
+#define RAMSTART (0x100)
+#define NRWWSTART (0x3800)
+#elif defined(__AVR_ATmega328P__)
+#define RAMSTART (0x100)
+#define NRWWSTART (0x7000)
+#elif defined (__AVR_ATmega644P__)
+#define RAMSTART (0x100)
+#define NRWWSTART (0xE000)
+#elif defined(__AVR_ATtiny84__)
+#define RAMSTART (0x100)
+#define NRWWSTART (0x0000)
+#elif defined(__AVR_ATmega1280__)
+#define RAMSTART (0x200)
+#define NRWWSTART (0xE000)
+#elif defined(__AVR_ATmega8__) || defined(__AVR_ATmega88__)
+#define RAMSTART (0x100)
+#define NRWWSTART (0x1800)
+#endif
+
+/* C zero initialises all global variables. However, that requires */
+/* These definitions are NOT zero initialised, but that doesn't matter */
+/* This allows us to drop the zero init code, saving us memory */
+#define buff ((uint8_t*)(RAMSTART))
+#ifdef VIRTUAL_BOOT_PARTITION
+#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
+#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
+#endif
+
+/* main program starts here */
+int main(void) {
+ uint8_t ch;
+
+ /*
+ * Making these local and in registers prevents the need for initializing
+ * them, and also saves space because code no longer stores to memory.
+ * (initializing address keeps the compiler happy, but isn't really
+ * necessary, and uses 4 bytes of flash.)
+ */
+ register uint16_t address = 0;
+ register uint8_t length;
+
+ // After the zero init loop, this is the first code to run.
+ //
+ // This code makes the following assumptions:
+ // No interrupts will execute
+ // SP points to RAMEND
+ // r1 contains zero
+ //
+ // If not, uncomment the following instructions:
+ // cli();
+ asm volatile ("clr __zero_reg__");
+#ifdef __AVR_ATmega8__
+ SP=RAMEND; // This is done by hardware reset
+#endif
+
+ // Adaboot no-wait mod
+ ch = MCUSR;
+ MCUSR = 0;
+ if (!(ch & _BV(EXTRF))) appStart();
+
+#if LED_START_FLASHES > 0
+ // Set up Timer 1 for timeout counter
+ TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
+#endif
+#ifndef SOFT_UART
+#ifdef __AVR_ATmega8__
+ UCSRA = _BV(U2X); //Double speed mode USART
+ UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
+ UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
+ UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
+#else
+ UCSR0A = _BV(U2X0); //Double speed mode USART0
+ UCSR0B = _BV(RXEN0) | _BV(TXEN0);
+ UCSR0C = _BV(UCSZ00) | _BV(UCSZ01);
+ UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
+#endif
+#endif
+
+ // Set up watchdog to trigger after 500ms
+ watchdogConfig(WATCHDOG_1S);
+
+ /* Set LED pin as output */
+ LED_DDR |= _BV(LED);
+
+#ifdef SOFT_UART
+ /* Set TX pin as output */
+ UART_DDR |= _BV(UART_TX_BIT);
+#endif
+
+#if LED_START_FLASHES > 0
+ /* Flash onboard LED to signal entering of bootloader */
+ flash_led(LED_START_FLASHES * 2);
+#endif
+
+ /* Forever loop */
+ for (;;) {
+ /* get character from UART */
+ ch = getch();
+
+ if(ch == STK_GET_PARAMETER) {
+ unsigned char which = getch();
+ verifySpace();
+ if (which == 0x82) {
+ /*
+ * Send optiboot version as "minor SW version"
+ */
+ putch(OPTIBOOT_MINVER);
+ } else if (which == 0x81) {
+ putch(OPTIBOOT_MAJVER);
+ } else {
+ /*
+ * GET PARAMETER returns a generic 0x03 reply for
+ * other parameters - enough to keep Avrdude happy
+ */
+ putch(0x03);
+ }
+ }
+ else if(ch == STK_SET_DEVICE) {
+ // SET DEVICE is ignored
+ getNch(20);
+ }
+ else if(ch == STK_SET_DEVICE_EXT) {
+ // SET DEVICE EXT is ignored
+ getNch(5);
+ }
+ else if(ch == STK_LOAD_ADDRESS) {
+ // LOAD ADDRESS
+ uint16_t newAddress;
+ newAddress = getch();
+ newAddress = (newAddress & 0xff) | (getch() << 8);
+#ifdef RAMPZ
+ // Transfer top bit to RAMPZ
+ RAMPZ = (newAddress & 0x8000) ? 1 : 0;
+#endif
+ newAddress += newAddress; // Convert from word address to byte address
+ address = newAddress;
+ verifySpace();
+ }
+ else if(ch == STK_UNIVERSAL) {
+ // UNIVERSAL command is ignored
+ getNch(4);
+ putch(0x00);
+ }
+ /* Write memory, length is big endian and is in bytes */
+ else if(ch == STK_PROG_PAGE) {
+ // PROGRAM PAGE - we support flash programming only, not EEPROM
+ uint8_t *bufPtr;
+ uint16_t addrPtr;
+
+ getch(); /* getlen() */
+ length = getch();
+ getch();
+
+ // If we are in RWW section, immediately start page erase
+ if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
+
+ // While that is going on, read in page contents
+ bufPtr = buff;
+ do *bufPtr++ = getch();
+ while (--length);
+
+ // If we are in NRWW section, page erase has to be delayed until now.
+ // Todo: Take RAMPZ into account
+ if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
+
+ // Read command terminator, start reply
+ verifySpace();
+
+ // If only a partial page is to be programmed, the erase might not be complete.
+ // So check that here
+ boot_spm_busy_wait();
+
+#ifdef VIRTUAL_BOOT_PARTITION
+ if ((uint16_t)(void*)address == 0) {
+ // This is the reset vector page. We need to live-patch the code so the
+ // bootloader runs.
+ //
+ // Move RESET vector to WDT vector
+ uint16_t vect = buff[0] | (buff[1]<<8);
+ rstVect = vect;
+ wdtVect = buff[8] | (buff[9]<<8);
+ vect -= 4; // Instruction is a relative jump (rjmp), so recalculate.
+ buff[8] = vect & 0xff;
+ buff[9] = vect >> 8;
+
+ // Add jump to bootloader at RESET vector
+ buff[0] = 0x7f;
+ buff[1] = 0xce; // rjmp 0x1d00 instruction
+ }
+#endif
+
+ // Copy buffer into programming buffer
+ bufPtr = buff;
+ addrPtr = (uint16_t)(void*)address;
+ ch = SPM_PAGESIZE / 2;
+ do {
+ uint16_t a;
+ a = *bufPtr++;
+ a |= (*bufPtr++) << 8;
+ __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
+ addrPtr += 2;
+ } while (--ch);
+
+ // Write from programming buffer
+ __boot_page_write_short((uint16_t)(void*)address);
+ boot_spm_busy_wait();
+
+#if defined(RWWSRE)
+ // Reenable read access to flash
+ boot_rww_enable();
+#endif
+
+ }
+ /* Read memory block mode, length is big endian. */
+ else if(ch == STK_READ_PAGE) {
+ // READ PAGE - we only read flash
+ getch(); /* getlen() */
+ length = getch();
+ getch();
+
+ verifySpace();
+#ifdef VIRTUAL_BOOT_PARTITION
+ do {
+ // Undo vector patch in bottom page so verify passes
+ if (address == 0) ch=rstVect & 0xff;
+ else if (address == 1) ch=rstVect >> 8;
+ else if (address == 8) ch=wdtVect & 0xff;
+ else if (address == 9) ch=wdtVect >> 8;
+ else ch = pgm_read_byte_near(address);
+ address++;
+ putch(ch);
+ } while (--length);
+#else
+#ifdef __AVR_ATmega1280__
+// do putch(pgm_read_byte_near(address++));
+// while (--length);
+ do {
+ uint8_t result;
+ __asm__ ("elpm %0,Z\n":"=r"(result):"z"(address));
+ putch(result);
+ address++;
+ }
+ while (--length);
+#else
+ do putch(pgm_read_byte_near(address++));
+ while (--length);
+#endif
+#endif
+ }
+
+ /* Get device signature bytes */
+ else if(ch == STK_READ_SIGN) {
+ // READ SIGN - return what Avrdude wants to hear
+ verifySpace();
+ putch(SIGNATURE_0);
+ putch(SIGNATURE_1);
+ putch(SIGNATURE_2);
+ }
+ else if (ch == 'Q') {
+ // Adaboot no-wait mod
+ watchdogConfig(WATCHDOG_16MS);
+ verifySpace();
+ }
+ else {
+ // This covers the response to commands like STK_ENTER_PROGMODE
+ verifySpace();
+ }
+ putch(STK_OK);
+ }
+}
+
+void putch(char ch) {
+#ifndef SOFT_UART
+ while (!(UCSR0A & _BV(UDRE0)));
+ UDR0 = ch;
+#else
+ __asm__ __volatile__ (
+ " com %[ch]\n" // ones complement, carry set
+ " sec\n"
+ "1: brcc 2f\n"
+ " cbi %[uartPort],%[uartBit]\n"
+ " rjmp 3f\n"
+ "2: sbi %[uartPort],%[uartBit]\n"
+ " nop\n"
+ "3: rcall uartDelay\n"
+ " rcall uartDelay\n"
+ " lsr %[ch]\n"
+ " dec %[bitcnt]\n"
+ " brne 1b\n"
+ :
+ :
+ [bitcnt] "d" (10),
+ [ch] "r" (ch),
+ [uartPort] "I" (_SFR_IO_ADDR(UART_PORT)),
+ [uartBit] "I" (UART_TX_BIT)
+ :
+ "r25"
+ );
+#endif
+}
+
+uint8_t getch(void) {
+ uint8_t ch;
+
+#ifdef LED_DATA_FLASH
+#ifdef __AVR_ATmega8__
+ LED_PORT ^= _BV(LED);
+#else
+ LED_PIN |= _BV(LED);
+#endif
+#endif
+
+#ifdef SOFT_UART
+ __asm__ __volatile__ (
+ "1: sbic %[uartPin],%[uartBit]\n" // Wait for start edge
+ " rjmp 1b\n"
+ " rcall uartDelay\n" // Get to middle of start bit
+ "2: rcall uartDelay\n" // Wait 1 bit period
+ " rcall uartDelay\n" // Wait 1 bit period
+ " clc\n"
+ " sbic %[uartPin],%[uartBit]\n"
+ " sec\n"
+ " dec %[bitCnt]\n"
+ " breq 3f\n"
+ " ror %[ch]\n"
+ " rjmp 2b\n"
+ "3:\n"
+ :
+ [ch] "=r" (ch)
+ :
+ [bitCnt] "d" (9),
+ [uartPin] "I" (_SFR_IO_ADDR(UART_PIN)),
+ [uartBit] "I" (UART_RX_BIT)
+ :
+ "r25"
+);
+#else
+ while(!(UCSR0A & _BV(RXC0)))
+ ;
+ if (!(UCSR0A & _BV(FE0))) {
+ /*
+ * A Framing Error indicates (probably) that something is talking
+ * to us at the wrong bit rate. Assume that this is because it
+ * expects to be talking to the application, and DON'T reset the
+ * watchdog. This should cause the bootloader to abort and run
+ * the application "soon", if it keeps happening. (Note that we
+ * don't care that an invalid char is returned...)
+ */
+ watchdogReset();
+ }
+
+ ch = UDR0;
+#endif
+
+#ifdef LED_DATA_FLASH
+#ifdef __AVR_ATmega8__
+ LED_PORT ^= _BV(LED);
+#else
+ LED_PIN |= _BV(LED);
+#endif
+#endif
+
+ return ch;
+}
+
+#ifdef SOFT_UART
+// AVR350 equation: #define UART_B_VALUE (((F_CPU/BAUD_RATE)-23)/6)
+// Adding 3 to numerator simulates nearest rounding for more accurate baud rates
+#define UART_B_VALUE (((F_CPU/BAUD_RATE)-20)/6)
+#if UART_B_VALUE > 255
+#error Baud rate too slow for soft UART
+#endif
+
+void uartDelay() {
+ __asm__ __volatile__ (
+ "ldi r25,%[count]\n"
+ "1:dec r25\n"
+ "brne 1b\n"
+ "ret\n"
+ ::[count] "M" (UART_B_VALUE)
+ );
+}
+#endif
+
+void getNch(uint8_t count) {
+ do getch(); while (--count);
+ verifySpace();
+}
+
+void verifySpace() {
+ if (getch() != CRC_EOP) {
+ watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
+ while (1) // and busy-loop so that WD causes
+ ; // a reset and app start.
+ }
+ putch(STK_INSYNC);
+}
+
+#if LED_START_FLASHES > 0
+void flash_led(uint8_t count) {
+ do {
+ TCNT1 = -(F_CPU/(1024*16));
+ TIFR1 = _BV(TOV1);
+ while(!(TIFR1 & _BV(TOV1)));
+#ifdef __AVR_ATmega8__
+ LED_PORT ^= _BV(LED);
+#else
+ LED_PIN |= _BV(LED);
+#endif
+ watchdogReset();
+ } while (--count);
+}
+#endif
+
+// Watchdog functions. These are only safe with interrupts turned off.
+void watchdogReset() {
+ __asm__ __volatile__ (
+ "wdr\n"
+ );
+}
+
+void watchdogConfig(uint8_t x) {
+ WDTCSR = _BV(WDCE) | _BV(WDE);
+ WDTCSR = x;
+}
+
+void appStart() {
+ watchdogConfig(WATCHDOG_OFF);
+ __asm__ __volatile__ (
+#ifdef VIRTUAL_BOOT_PARTITION
+ // Jump to WDT vector
+ "ldi r30,4\n"
+ "clr r31\n"
+#else
+ // Jump to RST vector
+ "clr r30\n"
+ "clr r31\n"
+#endif
+ "ijmp\n"
+ );
+}
diff --git a/bootloaders/optiboot/optiboot_atmega168.hex b/bootloaders/optiboot/optiboot_atmega168.hex
new file mode 100644
index 0000000..c2f2b5b
--- /dev/null
+++ b/bootloaders/optiboot/optiboot_atmega168.hex
@@ -0,0 +1,35 @@
+:103E0000112484B714BE81FFF0D085E08093810037
+:103E100082E08093C00088E18093C10086E08093B7
+:103E2000C20080E18093C4008EE0C9D0259A86E06C
+:103E300020E33CEF91E0309385002093840096BB13
+:103E4000B09BFECF1D9AA8958150A9F7CC24DD2404
+:103E500088248394B5E0AB2EA1E19A2EF3E0BF2E27
+:103E6000A2D0813461F49FD0082FAFD0023811F076
+:103E7000013811F484E001C083E08DD089C0823420
+:103E800011F484E103C0853419F485E0A6D080C024
+:103E9000853579F488D0E82EFF2485D0082F10E0EE
+:103EA000102F00270E291F29000F111F8ED0680127
+:103EB0006FC0863521F484E090D080E0DECF843678
+:103EC00009F040C070D06FD0082F6DD080E0C816C8
+:103ED00088E3D80618F4F601B7BEE895C0E0D1E053
+:103EE00062D089930C17E1F7F0E0CF16F8E3DF0614
+:103EF00018F0F601B7BEE89568D007B600FCFDCF14
+:103F0000A601A0E0B1E02C9130E011968C911197C0
+:103F100090E0982F8827822B932B1296FA010C01A0
+:103F200087BEE89511244E5F5F4FF1E0A038BF07D0
+:103F300051F7F601A7BEE89507B600FCFDCF97BE86
+:103F4000E89526C08437B1F42ED02DD0F82E2BD092
+:103F50003CD0F601EF2C8F010F5F1F4F84911BD0D7
+:103F6000EA94F801C1F70894C11CD11CFA94CF0C53
+:103F7000D11C0EC0853739F428D08EE10CD084E9ED
+:103F80000AD086E07ACF813511F488E018D01DD0B0
+:103F900080E101D065CF982F8091C00085FFFCCFD4
+:103FA0009093C60008958091C00087FFFCCF809158
+:103FB000C00084FD01C0A8958091C6000895E0E688
+:103FC000F0E098E1908380830895EDDF803219F06E
+:103FD00088E0F5DFFFCF84E1DECF1F93182FE3DF0A
+:103FE0001150E9F7F2DF1F91089580E0E8DFEE2736
+:043FF000FF2709940A
+:023FFE000404B9
+:0400000300003E00BB
+:00000001FF
diff --git a/bootloaders/optiboot/optiboot_atmega168.lst b/bootloaders/optiboot/optiboot_atmega168.lst
new file mode 100644
index 0000000..06316db
--- /dev/null
+++ b/bootloaders/optiboot/optiboot_atmega168.lst
@@ -0,0 +1,598 @@
+
+optiboot_atmega168.elf: file format elf32-avr
+
+Sections:
+Idx Name Size VMA LMA File off Algn
+ 0 .text 000001f4 00003e00 00003e00 00000054 2**1
+ CONTENTS, ALLOC, LOAD, READONLY, CODE
+ 1 .version 00000002 00003ffe 00003ffe 00000248 2**0
+ CONTENTS, READONLY
+ 2 .debug_aranges 00000028 00000000 00000000 0000024a 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 3 .debug_pubnames 0000005f 00000000 00000000 00000272 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 4 .debug_info 000002a8 00000000 00000000 000002d1 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 5 .debug_abbrev 00000178 00000000 00000000 00000579 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 6 .debug_line 00000488 00000000 00000000 000006f1 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 7 .debug_frame 00000080 00000000 00000000 00000b7c 2**2
+ CONTENTS, READONLY, DEBUGGING
+ 8 .debug_str 0000014f 00000000 00000000 00000bfc 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 9 .debug_loc 000002d8 00000000 00000000 00000d4b 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 10 .debug_ranges 00000078 00000000 00000000 00001023 2**0
+ CONTENTS, READONLY, DEBUGGING
+
+Disassembly of section .text:
+
+00003e00 <main>:
+#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
+#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
+#endif
+
+/* main program starts here */
+int main(void) {
+ 3e00: 11 24 eor r1, r1
+#ifdef __AVR_ATmega8__
+ SP=RAMEND; // This is done by hardware reset
+#endif
+
+ // Adaboot no-wait mod
+ ch = MCUSR;
+ 3e02: 84 b7 in r24, 0x34 ; 52
+ MCUSR = 0;
+ 3e04: 14 be out 0x34, r1 ; 52
+ if (!(ch & _BV(EXTRF))) appStart();
+ 3e06: 81 ff sbrs r24, 1
+ 3e08: f0 d0 rcall .+480 ; 0x3fea <appStart>
+
+#if LED_START_FLASHES > 0
+ // Set up Timer 1 for timeout counter
+ TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
+ 3e0a: 85 e0 ldi r24, 0x05 ; 5
+ 3e0c: 80 93 81 00 sts 0x0081, r24
+ UCSRA = _BV(U2X); //Double speed mode USART
+ UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
+ UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
+ UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
+#else
+ UCSR0A = _BV(U2X0); //Double speed mode USART0
+ 3e10: 82 e0 ldi r24, 0x02 ; 2
+ 3e12: 80 93 c0 00 sts 0x00C0, r24
+ UCSR0B = _BV(RXEN0) | _BV(TXEN0);
+ 3e16: 88 e1 ldi r24, 0x18 ; 24
+ 3e18: 80 93 c1 00 sts 0x00C1, r24
+ UCSR0C = _BV(UCSZ00) | _BV(UCSZ01);
+ 3e1c: 86 e0 ldi r24, 0x06 ; 6
+ 3e1e: 80 93 c2 00 sts 0x00C2, r24
+ UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
+ 3e22: 80 e1 ldi r24, 0x10 ; 16
+ 3e24: 80 93 c4 00 sts 0x00C4, r24
+#endif
+#endif
+
+ // Set up watchdog to trigger after 500ms
+ watchdogConfig(WATCHDOG_1S);
+ 3e28: 8e e0 ldi r24, 0x0E ; 14
+ 3e2a: c9 d0 rcall .+402 ; 0x3fbe <watchdogConfig>
+
+ /* Set LED pin as output */
+ LED_DDR |= _BV(LED);
+ 3e2c: 25 9a sbi 0x04, 5 ; 4
+ 3e2e: 86 e0 ldi r24, 0x06 ; 6
+}
+
+#if LED_START_FLASHES > 0
+void flash_led(uint8_t count) {
+ do {
+ TCNT1 = -(F_CPU/(1024*16));
+ 3e30: 20 e3 ldi r18, 0x30 ; 48
+ 3e32: 3c ef ldi r19, 0xFC ; 252
+ TIFR1 = _BV(TOV1);
+ 3e34: 91 e0 ldi r25, 0x01 ; 1
+}
+
+#if LED_START_FLASHES > 0
+void flash_led(uint8_t count) {
+ do {
+ TCNT1 = -(F_CPU/(1024*16));
+ 3e36: 30 93 85 00 sts 0x0085, r19
+ 3e3a: 20 93 84 00 sts 0x0084, r18
+ TIFR1 = _BV(TOV1);
+ 3e3e: 96 bb out 0x16, r25 ; 22
+ while(!(TIFR1 & _BV(TOV1)));
+ 3e40: b0 9b sbis 0x16, 0 ; 22
+ 3e42: fe cf rjmp .-4 ; 0x3e40 <main+0x40>
+#ifdef __AVR_ATmega8__
+ LED_PORT ^= _BV(LED);
+#else
+ LED_PIN |= _BV(LED);
+ 3e44: 1d 9a sbi 0x03, 5 ; 3
+}
+#endif
+
+// Watchdog functions. These are only safe with interrupts turned off.
+void watchdogReset() {
+ __asm__ __volatile__ (
+ 3e46: a8 95 wdr
+ LED_PORT ^= _BV(LED);
+#else
+ LED_PIN |= _BV(LED);
+#endif
+ watchdogReset();
+ } while (--count);
+ 3e48: 81 50 subi r24, 0x01 ; 1
+ 3e4a: a9 f7 brne .-22 ; 0x3e36 <main+0x36>
+ 3e4c: cc 24 eor r12, r12
+ 3e4e: dd 24 eor r13, r13
+ ch = SPM_PAGESIZE / 2;
+ do {
+ uint16_t a;
+ a = *bufPtr++;
+ a |= (*bufPtr++) << 8;
+ __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
+ 3e50: 88 24 eor r8, r8
+ 3e52: 83 94 inc r8
+ addrPtr += 2;
+ } while (--ch);
+
+ // Write from programming buffer
+ __boot_page_write_short((uint16_t)(void*)address);
+ 3e54: b5 e0 ldi r27, 0x05 ; 5
+ 3e56: ab 2e mov r10, r27
+ boot_spm_busy_wait();
+
+#if defined(RWWSRE)
+ // Reenable read access to flash
+ boot_rww_enable();
+ 3e58: a1 e1 ldi r26, 0x11 ; 17
+ 3e5a: 9a 2e mov r9, r26
+ do *bufPtr++ = getch();
+ while (--length);
+
+ // If we are in NRWW section, page erase has to be delayed until now.
+ // Todo: Take RAMPZ into account
+ if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
+ 3e5c: f3 e0 ldi r31, 0x03 ; 3
+ 3e5e: bf 2e mov r11, r31
+#endif
+
+ /* Forever loop */
+ for (;;) {
+ /* get character from UART */
+ ch = getch();
+ 3e60: a2 d0 rcall .+324 ; 0x3fa6 <getch>
+
+ if(ch == STK_GET_PARAMETER) {
+ 3e62: 81 34 cpi r24, 0x41 ; 65
+ 3e64: 61 f4 brne .+24 ; 0x3e7e <main+0x7e>
+ unsigned char which = getch();
+ 3e66: 9f d0 rcall .+318 ; 0x3fa6 <getch>
+ 3e68: 08 2f mov r16, r24
+ verifySpace();
+ 3e6a: af d0 rcall .+350 ; 0x3fca <verifySpace>
+ if (which == 0x82) {
+ 3e6c: 02 38 cpi r16, 0x82 ; 130
+ 3e6e: 11 f0 breq .+4 ; 0x3e74 <main+0x74>
+ /*
+ * Send optiboot version as "minor SW version"
+ */
+ putch(OPTIBOOT_MINVER);
+ } else if (which == 0x81) {
+ 3e70: 01 38 cpi r16, 0x81 ; 129
+ 3e72: 11 f4 brne .+4 ; 0x3e78 <main+0x78>
+ putch(OPTIBOOT_MAJVER);
+ 3e74: 84 e0 ldi r24, 0x04 ; 4
+ 3e76: 01 c0 rjmp .+2 ; 0x3e7a <main+0x7a>
+ } else {
+ /*
+ * GET PARAMETER returns a generic 0x03 reply for
+ * other parameters - enough to keep Avrdude happy
+ */
+ putch(0x03);
+ 3e78: 83 e0 ldi r24, 0x03 ; 3
+ 3e7a: 8d d0 rcall .+282 ; 0x3f96 <putch>
+ 3e7c: 89 c0 rjmp .+274 ; 0x3f90 <main+0x190>
+ }
+ }
+ else if(ch == STK_SET_DEVICE) {
+ 3e7e: 82 34 cpi r24, 0x42 ; 66
+ 3e80: 11 f4 brne .+4 ; 0x3e86 <main+0x86>
+ // SET DEVICE is ignored
+ getNch(20);
+ 3e82: 84 e1 ldi r24, 0x14 ; 20
+ 3e84: 03 c0 rjmp .+6 ; 0x3e8c <main+0x8c>
+ }
+ else if(ch == STK_SET_DEVICE_EXT) {
+ 3e86: 85 34 cpi r24, 0x45 ; 69
+ 3e88: 19 f4 brne .+6 ; 0x3e90 <main+0x90>
+ // SET DEVICE EXT is ignored
+ getNch(5);
+ 3e8a: 85 e0 ldi r24, 0x05 ; 5
+ 3e8c: a6 d0 rcall .+332 ; 0x3fda <getNch>
+ 3e8e: 80 c0 rjmp .+256 ; 0x3f90 <main+0x190>
+ }
+ else if(ch == STK_LOAD_ADDRESS) {
+ 3e90: 85 35 cpi r24, 0x55 ; 85
+ 3e92: 79 f4 brne .+30 ; 0x3eb2 <main+0xb2>
+ // LOAD ADDRESS
+ uint16_t newAddress;
+ newAddress = getch();
+ 3e94: 88 d0 rcall .+272 ; 0x3fa6 <getch>
+ newAddress = (newAddress & 0xff) | (getch() << 8);
+ 3e96: e8 2e mov r14, r24
+ 3e98: ff 24 eor r15, r15
+ 3e9a: 85 d0 rcall .+266 ; 0x3fa6 <getch>
+ 3e9c: 08 2f mov r16, r24
+ 3e9e: 10 e0 ldi r17, 0x00 ; 0
+ 3ea0: 10 2f mov r17, r16
+ 3ea2: 00 27 eor r16, r16
+ 3ea4: 0e 29 or r16, r14
+ 3ea6: 1f 29 or r17, r15
+#ifdef RAMPZ
+ // Transfer top bit to RAMPZ
+ RAMPZ = (newAddress & 0x8000) ? 1 : 0;
+#endif
+ newAddress += newAddress; // Convert from word address to byte address
+ 3ea8: 00 0f add r16, r16
+ 3eaa: 11 1f adc r17, r17
+ address = newAddress;
+ verifySpace();
+ 3eac: 8e d0 rcall .+284 ; 0x3fca <verifySpace>
+ 3eae: 68 01 movw r12, r16
+ 3eb0: 6f c0 rjmp .+222 ; 0x3f90 <main+0x190>
+ }
+ else if(ch == STK_UNIVERSAL) {
+ 3eb2: 86 35 cpi r24, 0x56 ; 86
+ 3eb4: 21 f4 brne .+8 ; 0x3ebe <main+0xbe>
+ // UNIVERSAL command is ignored
+ getNch(4);
+ 3eb6: 84 e0 ldi r24, 0x04 ; 4
+ 3eb8: 90 d0 rcall .+288 ; 0x3fda <getNch>
+ putch(0x00);
+ 3eba: 80 e0 ldi r24, 0x00 ; 0
+ 3ebc: de cf rjmp .-68 ; 0x3e7a <main+0x7a>
+ }
+ /* Write memory, length is big endian and is in bytes */
+ else if(ch == STK_PROG_PAGE) {
+ 3ebe: 84 36 cpi r24, 0x64 ; 100
+ 3ec0: 09 f0 breq .+2 ; 0x3ec4 <main+0xc4>
+ 3ec2: 40 c0 rjmp .+128 ; 0x3f44 <main+0x144>
+ // PROGRAM PAGE - we support flash programming only, not EEPROM
+ uint8_t *bufPtr;
+ uint16_t addrPtr;
+
+ getch(); /* getlen() */
+ 3ec4: 70 d0 rcall .+224 ; 0x3fa6 <getch>
+ length = getch();
+ 3ec6: 6f d0 rcall .+222 ; 0x3fa6 <getch>
+ 3ec8: 08 2f mov r16, r24
+ getch();
+ 3eca: 6d d0 rcall .+218 ; 0x3fa6 <getch>
+
+ // If we are in RWW section, immediately start page erase
+ if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
+ 3ecc: 80 e0 ldi r24, 0x00 ; 0
+ 3ece: c8 16 cp r12, r24
+ 3ed0: 88 e3 ldi r24, 0x38 ; 56
+ 3ed2: d8 06 cpc r13, r24
+ 3ed4: 18 f4 brcc .+6 ; 0x3edc <main+0xdc>
+ 3ed6: f6 01 movw r30, r12
+ 3ed8: b7 be out 0x37, r11 ; 55
+ 3eda: e8 95 spm
+ 3edc: c0 e0 ldi r28, 0x00 ; 0
+ 3ede: d1 e0 ldi r29, 0x01 ; 1
+
+ // While that is going on, read in page contents
+ bufPtr = buff;
+ do *bufPtr++ = getch();
+ 3ee0: 62 d0 rcall .+196 ; 0x3fa6 <getch>
+ 3ee2: 89 93 st Y+, r24
+ while (--length);
+ 3ee4: 0c 17 cp r16, r28
+ 3ee6: e1 f7 brne .-8 ; 0x3ee0 <main+0xe0>
+
+ // If we are in NRWW section, page erase has to be delayed until now.
+ // Todo: Take RAMPZ into account
+ if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
+ 3ee8: f0 e0 ldi r31, 0x00 ; 0
+ 3eea: cf 16 cp r12, r31
+ 3eec: f8 e3 ldi r31, 0x38 ; 56
+ 3eee: df 06 cpc r13, r31
+ 3ef0: 18 f0 brcs .+6 ; 0x3ef8 <main+0xf8>
+ 3ef2: f6 01 movw r30, r12
+ 3ef4: b7 be out 0x37, r11 ; 55
+ 3ef6: e8 95 spm
+
+ // Read command terminator, start reply
+ verifySpace();
+ 3ef8: 68 d0 rcall .+208 ; 0x3fca <verifySpace>
+
+ // If only a partial page is to be programmed, the erase might not be complete.
+ // So check that here
+ boot_spm_busy_wait();
+ 3efa: 07 b6 in r0, 0x37 ; 55
+ 3efc: 00 fc sbrc r0, 0
+ 3efe: fd cf rjmp .-6 ; 0x3efa <main+0xfa>
+ 3f00: a6 01 movw r20, r12
+ 3f02: a0 e0 ldi r26, 0x00 ; 0
+ 3f04: b1 e0 ldi r27, 0x01 ; 1
+ bufPtr = buff;
+ addrPtr = (uint16_t)(void*)address;
+ ch = SPM_PAGESIZE / 2;
+ do {
+ uint16_t a;
+ a = *bufPtr++;
+ 3f06: 2c 91 ld r18, X
+ 3f08: 30 e0 ldi r19, 0x00 ; 0
+ a |= (*bufPtr++) << 8;
+ 3f0a: 11 96 adiw r26, 0x01 ; 1
+ 3f0c: 8c 91 ld r24, X
+ 3f0e: 11 97 sbiw r26, 0x01 ; 1
+ 3f10: 90 e0 ldi r25, 0x00 ; 0
+ 3f12: 98 2f mov r25, r24
+ 3f14: 88 27 eor r24, r24
+ 3f16: 82 2b or r24, r18
+ 3f18: 93 2b or r25, r19
+#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
+#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
+#endif
+
+/* main program starts here */
+int main(void) {
+ 3f1a: 12 96 adiw r26, 0x02 ; 2
+ ch = SPM_PAGESIZE / 2;
+ do {
+ uint16_t a;
+ a = *bufPtr++;
+ a |= (*bufPtr++) << 8;
+ __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
+ 3f1c: fa 01 movw r30, r20
+ 3f1e: 0c 01 movw r0, r24
+ 3f20: 87 be out 0x37, r8 ; 55
+ 3f22: e8 95 spm
+ 3f24: 11 24 eor r1, r1
+ addrPtr += 2;
+ 3f26: 4e 5f subi r20, 0xFE ; 254
+ 3f28: 5f 4f sbci r21, 0xFF ; 255
+ } while (--ch);
+ 3f2a: f1 e0 ldi r31, 0x01 ; 1
+ 3f2c: a0 38 cpi r26, 0x80 ; 128
+ 3f2e: bf 07 cpc r27, r31
+ 3f30: 51 f7 brne .-44 ; 0x3f06 <main+0x106>
+
+ // Write from programming buffer
+ __boot_page_write_short((uint16_t)(void*)address);
+ 3f32: f6 01 movw r30, r12
+ 3f34: a7 be out 0x37, r10 ; 55
+ 3f36: e8 95 spm
+ boot_spm_busy_wait();
+ 3f38: 07 b6 in r0, 0x37 ; 55
+ 3f3a: 00 fc sbrc r0, 0
+ 3f3c: fd cf rjmp .-6 ; 0x3f38 <main+0x138>
+
+#if defined(RWWSRE)
+ // Reenable read access to flash
+ boot_rww_enable();
+ 3f3e: 97 be out 0x37, r9 ; 55
+ 3f40: e8 95 spm
+ 3f42: 26 c0 rjmp .+76 ; 0x3f90 <main+0x190>
+#endif
+
+ }
+ /* Read memory block mode, length is big endian. */
+ else if(ch == STK_READ_PAGE) {
+ 3f44: 84 37 cpi r24, 0x74 ; 116
+ 3f46: b1 f4 brne .+44 ; 0x3f74 <main+0x174>
+ // READ PAGE - we only read flash
+ getch(); /* getlen() */
+ 3f48: 2e d0 rcall .+92 ; 0x3fa6 <getch>
+ length = getch();
+ 3f4a: 2d d0 rcall .+90 ; 0x3fa6 <getch>
+ 3f4c: f8 2e mov r15, r24
+ getch();
+ 3f4e: 2b d0 rcall .+86 ; 0x3fa6 <getch>
+
+ verifySpace();
+ 3f50: 3c d0 rcall .+120 ; 0x3fca <verifySpace>
+ 3f52: f6 01 movw r30, r12
+ 3f54: ef 2c mov r14, r15
+ putch(result);
+ address++;
+ }
+ while (--length);
+#else
+ do putch(pgm_read_byte_near(address++));
+ 3f56: 8f 01 movw r16, r30
+ 3f58: 0f 5f subi r16, 0xFF ; 255
+ 3f5a: 1f 4f sbci r17, 0xFF ; 255
+ 3f5c: 84 91 lpm r24, Z+
+ 3f5e: 1b d0 rcall .+54 ; 0x3f96 <putch>
+ while (--length);
+ 3f60: ea 94 dec r14
+ 3f62: f8 01 movw r30, r16
+ 3f64: c1 f7 brne .-16 ; 0x3f56 <main+0x156>
+#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
+#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
+#endif
+
+/* main program starts here */
+int main(void) {
+ 3f66: 08 94 sec
+ 3f68: c1 1c adc r12, r1
+ 3f6a: d1 1c adc r13, r1
+ 3f6c: fa 94 dec r15
+ 3f6e: cf 0c add r12, r15
+ 3f70: d1 1c adc r13, r1
+ 3f72: 0e c0 rjmp .+28 ; 0x3f90 <main+0x190>
+#endif
+#endif
+ }
+
+ /* Get device signature bytes */
+ else if(ch == STK_READ_SIGN) {
+ 3f74: 85 37 cpi r24, 0x75 ; 117
+ 3f76: 39 f4 brne .+14 ; 0x3f86 <main+0x186>
+ // READ SIGN - return what Avrdude wants to hear
+ verifySpace();
+ 3f78: 28 d0 rcall .+80 ; 0x3fca <verifySpace>
+ putch(SIGNATURE_0);
+ 3f7a: 8e e1 ldi r24, 0x1E ; 30
+ 3f7c: 0c d0 rcall .+24 ; 0x3f96 <putch>
+ putch(SIGNATURE_1);
+ 3f7e: 84 e9 ldi r24, 0x94 ; 148
+ 3f80: 0a d0 rcall .+20 ; 0x3f96 <putch>
+ putch(SIGNATURE_2);
+ 3f82: 86 e0 ldi r24, 0x06 ; 6
+ 3f84: 7a cf rjmp .-268 ; 0x3e7a <main+0x7a>
+ }
+ else if (ch == 'Q') {
+ 3f86: 81 35 cpi r24, 0x51 ; 81
+ 3f88: 11 f4 brne .+4 ; 0x3f8e <main+0x18e>
+ // Adaboot no-wait mod
+ watchdogConfig(WATCHDOG_16MS);
+ 3f8a: 88 e0 ldi r24, 0x08 ; 8
+ 3f8c: 18 d0 rcall .+48 ; 0x3fbe <watchdogConfig>
+ verifySpace();
+ }
+ else {
+ // This covers the response to commands like STK_ENTER_PROGMODE
+ verifySpace();
+ 3f8e: 1d d0 rcall .+58 ; 0x3fca <verifySpace>
+ }
+ putch(STK_OK);
+ 3f90: 80 e1 ldi r24, 0x10 ; 16
+ 3f92: 01 d0 rcall .+2 ; 0x3f96 <putch>
+ 3f94: 65 cf rjmp .-310 ; 0x3e60 <main+0x60>
+
+00003f96 <putch>:
+ }
+}
+
+void putch(char ch) {
+ 3f96: 98 2f mov r25, r24
+#ifndef SOFT_UART
+ while (!(UCSR0A & _BV(UDRE0)));
+ 3f98: 80 91 c0 00 lds r24, 0x00C0
+ 3f9c: 85 ff sbrs r24, 5
+ 3f9e: fc cf rjmp .-8 ; 0x3f98 <putch+0x2>
+ UDR0 = ch;
+ 3fa0: 90 93 c6 00 sts 0x00C6, r25
+ [uartBit] "I" (UART_TX_BIT)
+ :
+ "r25"
+ );
+#endif
+}
+ 3fa4: 08 95 ret
+
+00003fa6 <getch>:
+ [uartBit] "I" (UART_RX_BIT)
+ :
+ "r25"
+);
+#else
+ while(!(UCSR0A & _BV(RXC0)))
+ 3fa6: 80 91 c0 00 lds r24, 0x00C0
+ 3faa: 87 ff sbrs r24, 7
+ 3fac: fc cf rjmp .-8 ; 0x3fa6 <getch>
+ ;
+ if (!(UCSR0A & _BV(FE0))) {
+ 3fae: 80 91 c0 00 lds r24, 0x00C0
+ 3fb2: 84 fd sbrc r24, 4
+ 3fb4: 01 c0 rjmp .+2 ; 0x3fb8 <getch+0x12>
+}
+#endif
+
+// Watchdog functions. These are only safe with interrupts turned off.
+void watchdogReset() {
+ __asm__ __volatile__ (
+ 3fb6: a8 95 wdr
+ * don't care that an invalid char is returned...)
+ */
+ watchdogReset();
+ }
+
+ ch = UDR0;
+ 3fb8: 80 91 c6 00 lds r24, 0x00C6
+ LED_PIN |= _BV(LED);
+#endif
+#endif
+
+ return ch;
+}
+ 3fbc: 08 95 ret
+
+00003fbe <watchdogConfig>:
+ "wdr\n"
+ );
+}
+
+void watchdogConfig(uint8_t x) {
+ WDTCSR = _BV(WDCE) | _BV(WDE);
+ 3fbe: e0 e6 ldi r30, 0x60 ; 96
+ 3fc0: f0 e0 ldi r31, 0x00 ; 0
+ 3fc2: 98 e1 ldi r25, 0x18 ; 24
+ 3fc4: 90 83 st Z, r25
+ WDTCSR = x;
+ 3fc6: 80 83 st Z, r24
+}
+ 3fc8: 08 95 ret
+
+00003fca <verifySpace>:
+ do getch(); while (--count);
+ verifySpace();
+}
+
+void verifySpace() {
+ if (getch() != CRC_EOP) {
+ 3fca: ed df rcall .-38 ; 0x3fa6 <getch>
+ 3fcc: 80 32 cpi r24, 0x20 ; 32
+ 3fce: 19 f0 breq .+6 ; 0x3fd6 <verifySpace+0xc>
+ watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
+ 3fd0: 88 e0 ldi r24, 0x08 ; 8
+ 3fd2: f5 df rcall .-22 ; 0x3fbe <watchdogConfig>
+ 3fd4: ff cf rjmp .-2 ; 0x3fd4 <verifySpace+0xa>
+ while (1) // and busy-loop so that WD causes
+ ; // a reset and app start.
+ }
+ putch(STK_INSYNC);
+ 3fd6: 84 e1 ldi r24, 0x14 ; 20
+}
+ 3fd8: de cf rjmp .-68 ; 0x3f96 <putch>
+
+00003fda <getNch>:
+ ::[count] "M" (UART_B_VALUE)
+ );
+}
+#endif
+
+void getNch(uint8_t count) {
+ 3fda: 1f 93 push r17
+ 3fdc: 18 2f mov r17, r24
+ do getch(); while (--count);
+ 3fde: e3 df rcall .-58 ; 0x3fa6 <getch>
+ 3fe0: 11 50 subi r17, 0x01 ; 1
+ 3fe2: e9 f7 brne .-6 ; 0x3fde <getNch+0x4>
+ verifySpace();
+ 3fe4: f2 df rcall .-28 ; 0x3fca <verifySpace>
+}
+ 3fe6: 1f 91 pop r17
+ 3fe8: 08 95 ret
+
+00003fea <appStart>:
+ WDTCSR = _BV(WDCE) | _BV(WDE);
+ WDTCSR = x;
+}
+
+void appStart() {
+ watchdogConfig(WATCHDOG_OFF);
+ 3fea: 80 e0 ldi r24, 0x00 ; 0
+ 3fec: e8 df rcall .-48 ; 0x3fbe <watchdogConfig>
+ __asm__ __volatile__ (
+ 3fee: ee 27 eor r30, r30
+ 3ff0: ff 27 eor r31, r31
+ 3ff2: 09 94 ijmp
diff --git a/bootloaders/optiboot/optiboot_atmega328-Mini.hex b/bootloaders/optiboot/optiboot_atmega328-Mini.hex
new file mode 100644
index 0000000..02266ee
--- /dev/null
+++ b/bootloaders/optiboot/optiboot_atmega328-Mini.hex
@@ -0,0 +1,33 @@
+:107E000085E08093810082E08093C00088E18093C8
+:107E1000C10086E08093C20080E18093C40084B7F3
+:107E200014BE81FFD0D089E2C8D0259A86E020E335
+:107E30003CEF91E0309385002093840096BBB09B8B
+:107E4000FECF1D9AA8958150A9F7DD24D394A5E013
+:107E5000EA2EF1E1FF2EA4D0813421F481E0BED0DE
+:107E600083E024C0823411F484E103C0853419F422
+:107E700085E0B4D08AC08535A1F492D0082F10E0F7
+:107E800010930102009300028BD090E0982F882776
+:107E9000802B912B880F991F9093010280930002F1
+:107EA00073C0863529F484E099D080E071D06DC02C
+:107EB000843609F043C07CD0E0910002F0910102C9
+:107EC00083E080935700E895C0E0D1E069D08993C2
+:107ED000809102028150809302028823B9F778D002
+:107EE00007B600FCFDCF4091000250910102A0E0D6
+:107EF000B1E02C9130E011968C91119790E0982F81
+:107F00008827822B932B1296FA010C01D0925700EE
+:107F1000E89511244E5F5F4FF1E0A038BF0749F7A5
+:107F2000E0910002F0910102E0925700E89507B657
+:107F300000FCFDCFF0925700E89527C08437B9F4D4
+:107F400037D046D0E0910002F09101023196F093D3
+:107F50000102E09300023197E4918E2F19D08091B5
+:107F60000202815080930202882361F70EC0853798
+:107F700039F42ED08EE10CD085E90AD08FE096CF6F
+:107F8000813511F488E019D023D080E101D063CF8E
+:107F9000982F8091C00085FFFCCF9093C600089574
+:107FA000A8958091C00087FFFCCF8091C6000895FE
+:107FB000F7DFF6DF80930202F3CFE0E6F0E098E12E
+:107FC00090838083089580E0F8DFEE27FF270994EF
+:107FD000E7DF803209F0F7DF84E1DACF1F93182F53
+:0C7FE000DFDF1150E9F7F4DF1F91089576
+:0400000300007E007B
+:00000001FF
diff --git a/bootloaders/optiboot/optiboot_atmega328.hex b/bootloaders/optiboot/optiboot_atmega328.hex
new file mode 100644
index 0000000..a219f08
--- /dev/null
+++ b/bootloaders/optiboot/optiboot_atmega328.hex
@@ -0,0 +1,35 @@
+:107E0000112484B714BE81FFF0D085E080938100F7
+:107E100082E08093C00088E18093C10086E0809377
+:107E2000C20080E18093C4008EE0C9D0259A86E02C
+:107E300020E33CEF91E0309385002093840096BBD3
+:107E4000B09BFECF1D9AA8958150A9F7CC24DD24C4
+:107E500088248394B5E0AB2EA1E19A2EF3E0BF2EE7
+:107E6000A2D0813461F49FD0082FAFD0023811F036
+:107E7000013811F484E001C083E08DD089C08234E0
+:107E800011F484E103C0853419F485E0A6D080C0E4
+:107E9000853579F488D0E82EFF2485D0082F10E0AE
+:107EA000102F00270E291F29000F111F8ED06801E7
+:107EB0006FC0863521F484E090D080E0DECF843638
+:107EC00009F040C070D06FD0082F6DD080E0C81688
+:107ED00080E7D80618F4F601B7BEE895C0E0D1E017
+:107EE00062D089930C17E1F7F0E0CF16F0E7DF06D8
+:107EF00018F0F601B7BEE89568D007B600FCFDCFD4
+:107F0000A601A0E0B1E02C9130E011968C91119780
+:107F100090E0982F8827822B932B1296FA010C0160
+:107F200087BEE89511244E5F5F4FF1E0A038BF0790
+:107F300051F7F601A7BEE89507B600FCFDCF97BE46
+:107F4000E89526C08437B1F42ED02DD0F82E2BD052
+:107F50003CD0F601EF2C8F010F5F1F4F84911BD097
+:107F6000EA94F801C1F70894C11CD11CFA94CF0C13
+:107F7000D11C0EC0853739F428D08EE10CD085E9AC
+:107F80000AD08FE07ACF813511F488E018D01DD067
+:107F900080E101D065CF982F8091C00085FFFCCF94
+:107FA0009093C60008958091C00087FFFCCF809118
+:107FB000C00084FD01C0A8958091C6000895E0E648
+:107FC000F0E098E1908380830895EDDF803219F02E
+:107FD00088E0F5DFFFCF84E1DECF1F93182FE3DFCA
+:107FE0001150E9F7F2DF1F91089580E0E8DFEE27F6
+:047FF000FF270994CA
+:027FFE00040479
+:0400000300007E007B
+:00000001FF
diff --git a/bootloaders/optiboot/optiboot_atmega328.lst b/bootloaders/optiboot/optiboot_atmega328.lst
new file mode 100644
index 0000000..d9dd4cc
--- /dev/null
+++ b/bootloaders/optiboot/optiboot_atmega328.lst
@@ -0,0 +1,598 @@
+
+optiboot_atmega328.elf: file format elf32-avr
+
+Sections:
+Idx Name Size VMA LMA File off Algn
+ 0 .text 000001f4 00007e00 00007e00 00000054 2**1
+ CONTENTS, ALLOC, LOAD, READONLY, CODE
+ 1 .version 00000002 00007ffe 00007ffe 00000248 2**0
+ CONTENTS, READONLY
+ 2 .debug_aranges 00000028 00000000 00000000 0000024a 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 3 .debug_pubnames 0000005f 00000000 00000000 00000272 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 4 .debug_info 000002a8 00000000 00000000 000002d1 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 5 .debug_abbrev 00000178 00000000 00000000 00000579 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 6 .debug_line 00000488 00000000 00000000 000006f1 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 7 .debug_frame 00000080 00000000 00000000 00000b7c 2**2
+ CONTENTS, READONLY, DEBUGGING
+ 8 .debug_str 0000014f 00000000 00000000 00000bfc 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 9 .debug_loc 000002d8 00000000 00000000 00000d4b 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 10 .debug_ranges 00000078 00000000 00000000 00001023 2**0
+ CONTENTS, READONLY, DEBUGGING
+
+Disassembly of section .text:
+
+00007e00 <main>:
+#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
+#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
+#endif
+
+/* main program starts here */
+int main(void) {
+ 7e00: 11 24 eor r1, r1
+#ifdef __AVR_ATmega8__
+ SP=RAMEND; // This is done by hardware reset
+#endif
+
+ // Adaboot no-wait mod
+ ch = MCUSR;
+ 7e02: 84 b7 in r24, 0x34 ; 52
+ MCUSR = 0;
+ 7e04: 14 be out 0x34, r1 ; 52
+ if (!(ch & _BV(EXTRF))) appStart();
+ 7e06: 81 ff sbrs r24, 1
+ 7e08: f0 d0 rcall .+480 ; 0x7fea <appStart>
+
+#if LED_START_FLASHES > 0
+ // Set up Timer 1 for timeout counter
+ TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
+ 7e0a: 85 e0 ldi r24, 0x05 ; 5
+ 7e0c: 80 93 81 00 sts 0x0081, r24
+ UCSRA = _BV(U2X); //Double speed mode USART
+ UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
+ UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
+ UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
+#else
+ UCSR0A = _BV(U2X0); //Double speed mode USART0
+ 7e10: 82 e0 ldi r24, 0x02 ; 2
+ 7e12: 80 93 c0 00 sts 0x00C0, r24
+ UCSR0B = _BV(RXEN0) | _BV(TXEN0);
+ 7e16: 88 e1 ldi r24, 0x18 ; 24
+ 7e18: 80 93 c1 00 sts 0x00C1, r24
+ UCSR0C = _BV(UCSZ00) | _BV(UCSZ01);
+ 7e1c: 86 e0 ldi r24, 0x06 ; 6
+ 7e1e: 80 93 c2 00 sts 0x00C2, r24
+ UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
+ 7e22: 80 e1 ldi r24, 0x10 ; 16
+ 7e24: 80 93 c4 00 sts 0x00C4, r24
+#endif
+#endif
+
+ // Set up watchdog to trigger after 500ms
+ watchdogConfig(WATCHDOG_1S);
+ 7e28: 8e e0 ldi r24, 0x0E ; 14
+ 7e2a: c9 d0 rcall .+402 ; 0x7fbe <watchdogConfig>
+
+ /* Set LED pin as output */
+ LED_DDR |= _BV(LED);
+ 7e2c: 25 9a sbi 0x04, 5 ; 4
+ 7e2e: 86 e0 ldi r24, 0x06 ; 6
+}
+
+#if LED_START_FLASHES > 0
+void flash_led(uint8_t count) {
+ do {
+ TCNT1 = -(F_CPU/(1024*16));
+ 7e30: 20 e3 ldi r18, 0x30 ; 48
+ 7e32: 3c ef ldi r19, 0xFC ; 252
+ TIFR1 = _BV(TOV1);
+ 7e34: 91 e0 ldi r25, 0x01 ; 1
+}
+
+#if LED_START_FLASHES > 0
+void flash_led(uint8_t count) {
+ do {
+ TCNT1 = -(F_CPU/(1024*16));
+ 7e36: 30 93 85 00 sts 0x0085, r19
+ 7e3a: 20 93 84 00 sts 0x0084, r18
+ TIFR1 = _BV(TOV1);
+ 7e3e: 96 bb out 0x16, r25 ; 22
+ while(!(TIFR1 & _BV(TOV1)));
+ 7e40: b0 9b sbis 0x16, 0 ; 22
+ 7e42: fe cf rjmp .-4 ; 0x7e40 <main+0x40>
+#ifdef __AVR_ATmega8__
+ LED_PORT ^= _BV(LED);
+#else
+ LED_PIN |= _BV(LED);
+ 7e44: 1d 9a sbi 0x03, 5 ; 3
+}
+#endif
+
+// Watchdog functions. These are only safe with interrupts turned off.
+void watchdogReset() {
+ __asm__ __volatile__ (
+ 7e46: a8 95 wdr
+ LED_PORT ^= _BV(LED);
+#else
+ LED_PIN |= _BV(LED);
+#endif
+ watchdogReset();
+ } while (--count);
+ 7e48: 81 50 subi r24, 0x01 ; 1
+ 7e4a: a9 f7 brne .-22 ; 0x7e36 <main+0x36>
+ 7e4c: cc 24 eor r12, r12
+ 7e4e: dd 24 eor r13, r13
+ ch = SPM_PAGESIZE / 2;
+ do {
+ uint16_t a;
+ a = *bufPtr++;
+ a |= (*bufPtr++) << 8;
+ __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
+ 7e50: 88 24 eor r8, r8
+ 7e52: 83 94 inc r8
+ addrPtr += 2;
+ } while (--ch);
+
+ // Write from programming buffer
+ __boot_page_write_short((uint16_t)(void*)address);
+ 7e54: b5 e0 ldi r27, 0x05 ; 5
+ 7e56: ab 2e mov r10, r27
+ boot_spm_busy_wait();
+
+#if defined(RWWSRE)
+ // Reenable read access to flash
+ boot_rww_enable();
+ 7e58: a1 e1 ldi r26, 0x11 ; 17
+ 7e5a: 9a 2e mov r9, r26
+ do *bufPtr++ = getch();
+ while (--length);
+
+ // If we are in NRWW section, page erase has to be delayed until now.
+ // Todo: Take RAMPZ into account
+ if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
+ 7e5c: f3 e0 ldi r31, 0x03 ; 3
+ 7e5e: bf 2e mov r11, r31
+#endif
+
+ /* Forever loop */
+ for (;;) {
+ /* get character from UART */
+ ch = getch();
+ 7e60: a2 d0 rcall .+324 ; 0x7fa6 <getch>
+
+ if(ch == STK_GET_PARAMETER) {
+ 7e62: 81 34 cpi r24, 0x41 ; 65
+ 7e64: 61 f4 brne .+24 ; 0x7e7e <main+0x7e>
+ unsigned char which = getch();
+ 7e66: 9f d0 rcall .+318 ; 0x7fa6 <getch>
+ 7e68: 08 2f mov r16, r24
+ verifySpace();
+ 7e6a: af d0 rcall .+350 ; 0x7fca <verifySpace>
+ if (which == 0x82) {
+ 7e6c: 02 38 cpi r16, 0x82 ; 130
+ 7e6e: 11 f0 breq .+4 ; 0x7e74 <main+0x74>
+ /*
+ * Send optiboot version as "minor SW version"
+ */
+ putch(OPTIBOOT_MINVER);
+ } else if (which == 0x81) {
+ 7e70: 01 38 cpi r16, 0x81 ; 129
+ 7e72: 11 f4 brne .+4 ; 0x7e78 <main+0x78>
+ putch(OPTIBOOT_MAJVER);
+ 7e74: 84 e0 ldi r24, 0x04 ; 4
+ 7e76: 01 c0 rjmp .+2 ; 0x7e7a <main+0x7a>
+ } else {
+ /*
+ * GET PARAMETER returns a generic 0x03 reply for
+ * other parameters - enough to keep Avrdude happy
+ */
+ putch(0x03);
+ 7e78: 83 e0 ldi r24, 0x03 ; 3
+ 7e7a: 8d d0 rcall .+282 ; 0x7f96 <putch>
+ 7e7c: 89 c0 rjmp .+274 ; 0x7f90 <main+0x190>
+ }
+ }
+ else if(ch == STK_SET_DEVICE) {
+ 7e7e: 82 34 cpi r24, 0x42 ; 66
+ 7e80: 11 f4 brne .+4 ; 0x7e86 <main+0x86>
+ // SET DEVICE is ignored
+ getNch(20);
+ 7e82: 84 e1 ldi r24, 0x14 ; 20
+ 7e84: 03 c0 rjmp .+6 ; 0x7e8c <main+0x8c>
+ }
+ else if(ch == STK_SET_DEVICE_EXT) {
+ 7e86: 85 34 cpi r24, 0x45 ; 69
+ 7e88: 19 f4 brne .+6 ; 0x7e90 <main+0x90>
+ // SET DEVICE EXT is ignored
+ getNch(5);
+ 7e8a: 85 e0 ldi r24, 0x05 ; 5
+ 7e8c: a6 d0 rcall .+332 ; 0x7fda <getNch>
+ 7e8e: 80 c0 rjmp .+256 ; 0x7f90 <main+0x190>
+ }
+ else if(ch == STK_LOAD_ADDRESS) {
+ 7e90: 85 35 cpi r24, 0x55 ; 85
+ 7e92: 79 f4 brne .+30 ; 0x7eb2 <main+0xb2>
+ // LOAD ADDRESS
+ uint16_t newAddress;
+ newAddress = getch();
+ 7e94: 88 d0 rcall .+272 ; 0x7fa6 <getch>
+ newAddress = (newAddress & 0xff) | (getch() << 8);
+ 7e96: e8 2e mov r14, r24
+ 7e98: ff 24 eor r15, r15
+ 7e9a: 85 d0 rcall .+266 ; 0x7fa6 <getch>
+ 7e9c: 08 2f mov r16, r24
+ 7e9e: 10 e0 ldi r17, 0x00 ; 0
+ 7ea0: 10 2f mov r17, r16
+ 7ea2: 00 27 eor r16, r16
+ 7ea4: 0e 29 or r16, r14
+ 7ea6: 1f 29 or r17, r15
+#ifdef RAMPZ
+ // Transfer top bit to RAMPZ
+ RAMPZ = (newAddress & 0x8000) ? 1 : 0;
+#endif
+ newAddress += newAddress; // Convert from word address to byte address
+ 7ea8: 00 0f add r16, r16
+ 7eaa: 11 1f adc r17, r17
+ address = newAddress;
+ verifySpace();
+ 7eac: 8e d0 rcall .+284 ; 0x7fca <verifySpace>
+ 7eae: 68 01 movw r12, r16
+ 7eb0: 6f c0 rjmp .+222 ; 0x7f90 <main+0x190>
+ }
+ else if(ch == STK_UNIVERSAL) {
+ 7eb2: 86 35 cpi r24, 0x56 ; 86
+ 7eb4: 21 f4 brne .+8 ; 0x7ebe <main+0xbe>
+ // UNIVERSAL command is ignored
+ getNch(4);
+ 7eb6: 84 e0 ldi r24, 0x04 ; 4
+ 7eb8: 90 d0 rcall .+288 ; 0x7fda <getNch>
+ putch(0x00);
+ 7eba: 80 e0 ldi r24, 0x00 ; 0
+ 7ebc: de cf rjmp .-68 ; 0x7e7a <main+0x7a>
+ }
+ /* Write memory, length is big endian and is in bytes */
+ else if(ch == STK_PROG_PAGE) {
+ 7ebe: 84 36 cpi r24, 0x64 ; 100
+ 7ec0: 09 f0 breq .+2 ; 0x7ec4 <main+0xc4>
+ 7ec2: 40 c0 rjmp .+128 ; 0x7f44 <main+0x144>
+ // PROGRAM PAGE - we support flash programming only, not EEPROM
+ uint8_t *bufPtr;
+ uint16_t addrPtr;
+
+ getch(); /* getlen() */
+ 7ec4: 70 d0 rcall .+224 ; 0x7fa6 <getch>
+ length = getch();
+ 7ec6: 6f d0 rcall .+222 ; 0x7fa6 <getch>
+ 7ec8: 08 2f mov r16, r24
+ getch();
+ 7eca: 6d d0 rcall .+218 ; 0x7fa6 <getch>
+
+ // If we are in RWW section, immediately start page erase
+ if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
+ 7ecc: 80 e0 ldi r24, 0x00 ; 0
+ 7ece: c8 16 cp r12, r24
+ 7ed0: 80 e7 ldi r24, 0x70 ; 112
+ 7ed2: d8 06 cpc r13, r24
+ 7ed4: 18 f4 brcc .+6 ; 0x7edc <main+0xdc>
+ 7ed6: f6 01 movw r30, r12
+ 7ed8: b7 be out 0x37, r11 ; 55
+ 7eda: e8 95 spm
+ 7edc: c0 e0 ldi r28, 0x00 ; 0
+ 7ede: d1 e0 ldi r29, 0x01 ; 1
+
+ // While that is going on, read in page contents
+ bufPtr = buff;
+ do *bufPtr++ = getch();
+ 7ee0: 62 d0 rcall .+196 ; 0x7fa6 <getch>
+ 7ee2: 89 93 st Y+, r24
+ while (--length);
+ 7ee4: 0c 17 cp r16, r28
+ 7ee6: e1 f7 brne .-8 ; 0x7ee0 <main+0xe0>
+
+ // If we are in NRWW section, page erase has to be delayed until now.
+ // Todo: Take RAMPZ into account
+ if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
+ 7ee8: f0 e0 ldi r31, 0x00 ; 0
+ 7eea: cf 16 cp r12, r31
+ 7eec: f0 e7 ldi r31, 0x70 ; 112
+ 7eee: df 06 cpc r13, r31
+ 7ef0: 18 f0 brcs .+6 ; 0x7ef8 <main+0xf8>
+ 7ef2: f6 01 movw r30, r12
+ 7ef4: b7 be out 0x37, r11 ; 55
+ 7ef6: e8 95 spm
+
+ // Read command terminator, start reply
+ verifySpace();
+ 7ef8: 68 d0 rcall .+208 ; 0x7fca <verifySpace>
+
+ // If only a partial page is to be programmed, the erase might not be complete.
+ // So check that here
+ boot_spm_busy_wait();
+ 7efa: 07 b6 in r0, 0x37 ; 55
+ 7efc: 00 fc sbrc r0, 0
+ 7efe: fd cf rjmp .-6 ; 0x7efa <main+0xfa>
+ 7f00: a6 01 movw r20, r12
+ 7f02: a0 e0 ldi r26, 0x00 ; 0
+ 7f04: b1 e0 ldi r27, 0x01 ; 1
+ bufPtr = buff;
+ addrPtr = (uint16_t)(void*)address;
+ ch = SPM_PAGESIZE / 2;
+ do {
+ uint16_t a;
+ a = *bufPtr++;
+ 7f06: 2c 91 ld r18, X
+ 7f08: 30 e0 ldi r19, 0x00 ; 0
+ a |= (*bufPtr++) << 8;
+ 7f0a: 11 96 adiw r26, 0x01 ; 1
+ 7f0c: 8c 91 ld r24, X
+ 7f0e: 11 97 sbiw r26, 0x01 ; 1
+ 7f10: 90 e0 ldi r25, 0x00 ; 0
+ 7f12: 98 2f mov r25, r24
+ 7f14: 88 27 eor r24, r24
+ 7f16: 82 2b or r24, r18
+ 7f18: 93 2b or r25, r19
+#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
+#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
+#endif
+
+/* main program starts here */
+int main(void) {
+ 7f1a: 12 96 adiw r26, 0x02 ; 2
+ ch = SPM_PAGESIZE / 2;
+ do {
+ uint16_t a;
+ a = *bufPtr++;
+ a |= (*bufPtr++) << 8;
+ __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
+ 7f1c: fa 01 movw r30, r20
+ 7f1e: 0c 01 movw r0, r24
+ 7f20: 87 be out 0x37, r8 ; 55
+ 7f22: e8 95 spm
+ 7f24: 11 24 eor r1, r1
+ addrPtr += 2;
+ 7f26: 4e 5f subi r20, 0xFE ; 254
+ 7f28: 5f 4f sbci r21, 0xFF ; 255
+ } while (--ch);
+ 7f2a: f1 e0 ldi r31, 0x01 ; 1
+ 7f2c: a0 38 cpi r26, 0x80 ; 128
+ 7f2e: bf 07 cpc r27, r31
+ 7f30: 51 f7 brne .-44 ; 0x7f06 <main+0x106>
+
+ // Write from programming buffer
+ __boot_page_write_short((uint16_t)(void*)address);
+ 7f32: f6 01 movw r30, r12
+ 7f34: a7 be out 0x37, r10 ; 55
+ 7f36: e8 95 spm
+ boot_spm_busy_wait();
+ 7f38: 07 b6 in r0, 0x37 ; 55
+ 7f3a: 00 fc sbrc r0, 0
+ 7f3c: fd cf rjmp .-6 ; 0x7f38 <main+0x138>
+
+#if defined(RWWSRE)
+ // Reenable read access to flash
+ boot_rww_enable();
+ 7f3e: 97 be out 0x37, r9 ; 55
+ 7f40: e8 95 spm
+ 7f42: 26 c0 rjmp .+76 ; 0x7f90 <main+0x190>
+#endif
+
+ }
+ /* Read memory block mode, length is big endian. */
+ else if(ch == STK_READ_PAGE) {
+ 7f44: 84 37 cpi r24, 0x74 ; 116
+ 7f46: b1 f4 brne .+44 ; 0x7f74 <main+0x174>
+ // READ PAGE - we only read flash
+ getch(); /* getlen() */
+ 7f48: 2e d0 rcall .+92 ; 0x7fa6 <getch>
+ length = getch();
+ 7f4a: 2d d0 rcall .+90 ; 0x7fa6 <getch>
+ 7f4c: f8 2e mov r15, r24
+ getch();
+ 7f4e: 2b d0 rcall .+86 ; 0x7fa6 <getch>
+
+ verifySpace();
+ 7f50: 3c d0 rcall .+120 ; 0x7fca <verifySpace>
+ 7f52: f6 01 movw r30, r12
+ 7f54: ef 2c mov r14, r15
+ putch(result);
+ address++;
+ }
+ while (--length);
+#else
+ do putch(pgm_read_byte_near(address++));
+ 7f56: 8f 01 movw r16, r30
+ 7f58: 0f 5f subi r16, 0xFF ; 255
+ 7f5a: 1f 4f sbci r17, 0xFF ; 255
+ 7f5c: 84 91 lpm r24, Z+
+ 7f5e: 1b d0 rcall .+54 ; 0x7f96 <putch>
+ while (--length);
+ 7f60: ea 94 dec r14
+ 7f62: f8 01 movw r30, r16
+ 7f64: c1 f7 brne .-16 ; 0x7f56 <main+0x156>
+#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
+#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
+#endif
+
+/* main program starts here */
+int main(void) {
+ 7f66: 08 94 sec
+ 7f68: c1 1c adc r12, r1
+ 7f6a: d1 1c adc r13, r1
+ 7f6c: fa 94 dec r15
+ 7f6e: cf 0c add r12, r15
+ 7f70: d1 1c adc r13, r1
+ 7f72: 0e c0 rjmp .+28 ; 0x7f90 <main+0x190>
+#endif
+#endif
+ }
+
+ /* Get device signature bytes */
+ else if(ch == STK_READ_SIGN) {
+ 7f74: 85 37 cpi r24, 0x75 ; 117
+ 7f76: 39 f4 brne .+14 ; 0x7f86 <main+0x186>
+ // READ SIGN - return what Avrdude wants to hear
+ verifySpace();
+ 7f78: 28 d0 rcall .+80 ; 0x7fca <verifySpace>
+ putch(SIGNATURE_0);
+ 7f7a: 8e e1 ldi r24, 0x1E ; 30
+ 7f7c: 0c d0 rcall .+24 ; 0x7f96 <putch>
+ putch(SIGNATURE_1);
+ 7f7e: 85 e9 ldi r24, 0x95 ; 149
+ 7f80: 0a d0 rcall .+20 ; 0x7f96 <putch>
+ putch(SIGNATURE_2);
+ 7f82: 8f e0 ldi r24, 0x0F ; 15
+ 7f84: 7a cf rjmp .-268 ; 0x7e7a <main+0x7a>
+ }
+ else if (ch == 'Q') {
+ 7f86: 81 35 cpi r24, 0x51 ; 81
+ 7f88: 11 f4 brne .+4 ; 0x7f8e <main+0x18e>
+ // Adaboot no-wait mod
+ watchdogConfig(WATCHDOG_16MS);
+ 7f8a: 88 e0 ldi r24, 0x08 ; 8
+ 7f8c: 18 d0 rcall .+48 ; 0x7fbe <watchdogConfig>
+ verifySpace();
+ }
+ else {
+ // This covers the response to commands like STK_ENTER_PROGMODE
+ verifySpace();
+ 7f8e: 1d d0 rcall .+58 ; 0x7fca <verifySpace>
+ }
+ putch(STK_OK);
+ 7f90: 80 e1 ldi r24, 0x10 ; 16
+ 7f92: 01 d0 rcall .+2 ; 0x7f96 <putch>
+ 7f94: 65 cf rjmp .-310 ; 0x7e60 <main+0x60>
+
+00007f96 <putch>:
+ }
+}
+
+void putch(char ch) {
+ 7f96: 98 2f mov r25, r24
+#ifndef SOFT_UART
+ while (!(UCSR0A & _BV(UDRE0)));
+ 7f98: 80 91 c0 00 lds r24, 0x00C0
+ 7f9c: 85 ff sbrs r24, 5
+ 7f9e: fc cf rjmp .-8 ; 0x7f98 <putch+0x2>
+ UDR0 = ch;
+ 7fa0: 90 93 c6 00 sts 0x00C6, r25
+ [uartBit] "I" (UART_TX_BIT)
+ :
+ "r25"
+ );
+#endif
+}
+ 7fa4: 08 95 ret
+
+00007fa6 <getch>:
+ [uartBit] "I" (UART_RX_BIT)
+ :
+ "r25"
+);
+#else
+ while(!(UCSR0A & _BV(RXC0)))
+ 7fa6: 80 91 c0 00 lds r24, 0x00C0
+ 7faa: 87 ff sbrs r24, 7
+ 7fac: fc cf rjmp .-8 ; 0x7fa6 <getch>
+ ;
+ if (!(UCSR0A & _BV(FE0))) {
+ 7fae: 80 91 c0 00 lds r24, 0x00C0
+ 7fb2: 84 fd sbrc r24, 4
+ 7fb4: 01 c0 rjmp .+2 ; 0x7fb8 <getch+0x12>
+}
+#endif
+
+// Watchdog functions. These are only safe with interrupts turned off.
+void watchdogReset() {
+ __asm__ __volatile__ (
+ 7fb6: a8 95 wdr
+ * don't care that an invalid char is returned...)
+ */
+ watchdogReset();
+ }
+
+ ch = UDR0;
+ 7fb8: 80 91 c6 00 lds r24, 0x00C6
+ LED_PIN |= _BV(LED);
+#endif
+#endif
+
+ return ch;
+}
+ 7fbc: 08 95 ret
+
+00007fbe <watchdogConfig>:
+ "wdr\n"
+ );
+}
+
+void watchdogConfig(uint8_t x) {
+ WDTCSR = _BV(WDCE) | _BV(WDE);
+ 7fbe: e0 e6 ldi r30, 0x60 ; 96
+ 7fc0: f0 e0 ldi r31, 0x00 ; 0
+ 7fc2: 98 e1 ldi r25, 0x18 ; 24
+ 7fc4: 90 83 st Z, r25
+ WDTCSR = x;
+ 7fc6: 80 83 st Z, r24
+}
+ 7fc8: 08 95 ret
+
+00007fca <verifySpace>:
+ do getch(); while (--count);
+ verifySpace();
+}
+
+void verifySpace() {
+ if (getch() != CRC_EOP) {
+ 7fca: ed df rcall .-38 ; 0x7fa6 <getch>
+ 7fcc: 80 32 cpi r24, 0x20 ; 32
+ 7fce: 19 f0 breq .+6 ; 0x7fd6 <verifySpace+0xc>
+ watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
+ 7fd0: 88 e0 ldi r24, 0x08 ; 8
+ 7fd2: f5 df rcall .-22 ; 0x7fbe <watchdogConfig>
+ 7fd4: ff cf rjmp .-2 ; 0x7fd4 <verifySpace+0xa>
+ while (1) // and busy-loop so that WD causes
+ ; // a reset and app start.
+ }
+ putch(STK_INSYNC);
+ 7fd6: 84 e1 ldi r24, 0x14 ; 20
+}
+ 7fd8: de cf rjmp .-68 ; 0x7f96 <putch>
+
+00007fda <getNch>:
+ ::[count] "M" (UART_B_VALUE)
+ );
+}
+#endif
+
+void getNch(uint8_t count) {
+ 7fda: 1f 93 push r17
+ 7fdc: 18 2f mov r17, r24
+ do getch(); while (--count);
+ 7fde: e3 df rcall .-58 ; 0x7fa6 <getch>
+ 7fe0: 11 50 subi r17, 0x01 ; 1
+ 7fe2: e9 f7 brne .-6 ; 0x7fde <getNch+0x4>
+ verifySpace();
+ 7fe4: f2 df rcall .-28 ; 0x7fca <verifySpace>
+}
+ 7fe6: 1f 91 pop r17
+ 7fe8: 08 95 ret
+
+00007fea <appStart>:
+ WDTCSR = _BV(WDCE) | _BV(WDE);
+ WDTCSR = x;
+}
+
+void appStart() {
+ watchdogConfig(WATCHDOG_OFF);
+ 7fea: 80 e0 ldi r24, 0x00 ; 0
+ 7fec: e8 df rcall .-48 ; 0x7fbe <watchdogConfig>
+ __asm__ __volatile__ (
+ 7fee: ee 27 eor r30, r30
+ 7ff0: ff 27 eor r31, r31
+ 7ff2: 09 94 ijmp
diff --git a/bootloaders/optiboot/optiboot_atmega8.hex b/bootloaders/optiboot/optiboot_atmega8.hex
new file mode 100644
index 0000000..b04f276
--- /dev/null
+++ b/bootloaders/optiboot/optiboot_atmega8.hex
@@ -0,0 +1,33 @@
+:101E000011248FE594E09EBF8DBF84B714BE81FF7F
+:101E1000E2D085E08EBD82E08BB988E18AB986E8A0
+:101E200080BD80E189B98EE0C2D0BD9A96E020E302
+:101E30003CEF54E040E23DBD2CBD58BF08B602FE69
+:101E4000FDCF88B3842788BBA8959150A1F7CC24F7
+:101E5000DD2488248394B5E0AB2EA1E19A2EF3E033
+:101E6000BF2E9ED0813461F49BD0082FA4D00238BD
+:101E700011F0013811F484E001C083E08DD089C0F5
+:101E8000823411F484E103C0853419F485E09BD0D9
+:101E900080C0853579F484D0E82EFF2481D0082FC6
+:101EA00010E0102F00270E291F29000F111F83D0CB
+:101EB00068016FC0863521F484E085D080E0DECFF4
+:101EC000843609F040C06CD06BD0082F69D080E018
+:101ED000C81688E1D80618F4F601B7BEE895C0E048
+:101EE000D1E05ED089930C17E1F7F0E0CF16F8E16E
+:101EF000DF0618F0F601B7BEE8955DD007B600FC26
+:101F0000FDCFA601A0E0B1E02C9130E011968C91BC
+:101F1000119790E0982F8827822B932B1296FA0125
+:101F20000C0187BEE89511244E5F5F4FF1E0A034AD
+:101F3000BF0751F7F601A7BEE89507B600FCFDCF35
+:101F400097BEE89526C08437B1F42AD029D0F82E60
+:101F500027D031D0F601EF2C8F010F5F1F4F8491F6
+:101F60001BD0EA94F801C1F70894C11CD11CFA9463
+:101F7000CF0CD11C0EC0853739F41DD08EE10CD0AA
+:101F800083E90AD087E07ACF813511F488E00FD059
+:101F900012D080E101D065CF5D9BFECF8CB9089552
+:101FA0005F9BFECF5C9901C0A8958CB1089598E124
+:101FB00091BD81BD0895F4DF803219F088E0F7DF2C
+:101FC000FFCF84E1E9CF1F93182FEADF1150E9F723
+:101FD000F2DF1F91089580E0EADFEE27FF270994E2
+:021FFE000404D9
+:0400000300001E00DB
+:00000001FF
diff --git a/bootloaders/optiboot/optiboot_atmega8.lst b/bootloaders/optiboot/optiboot_atmega8.lst
new file mode 100644
index 0000000..d921895
--- /dev/null
+++ b/bootloaders/optiboot/optiboot_atmega8.lst
@@ -0,0 +1,604 @@
+
+optiboot_atmega8.elf: file format elf32-avr
+
+Sections:
+Idx Name Size VMA LMA File off Algn
+ 0 .text 000001e0 00001e00 00001e00 00000054 2**1
+ CONTENTS, ALLOC, LOAD, READONLY, CODE
+ 1 .version 00000002 00001ffe 00001ffe 00000234 2**0
+ CONTENTS, READONLY
+ 2 .debug_aranges 00000028 00000000 00000000 00000236 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 3 .debug_pubnames 0000005f 00000000 00000000 0000025e 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 4 .debug_info 000002a6 00000000 00000000 000002bd 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 5 .debug_abbrev 00000169 00000000 00000000 00000563 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 6 .debug_line 00000498 00000000 00000000 000006cc 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 7 .debug_frame 00000080 00000000 00000000 00000b64 2**2
+ CONTENTS, READONLY, DEBUGGING
+ 8 .debug_str 0000014f 00000000 00000000 00000be4 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 9 .debug_loc 000002ba 00000000 00000000 00000d33 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 10 .debug_ranges 00000078 00000000 00000000 00000fed 2**0
+ CONTENTS, READONLY, DEBUGGING
+
+Disassembly of section .text:
+
+00001e00 <main>:
+#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
+#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
+#endif
+
+/* main program starts here */
+int main(void) {
+ 1e00: 11 24 eor r1, r1
+ //
+ // If not, uncomment the following instructions:
+ // cli();
+ asm volatile ("clr __zero_reg__");
+#ifdef __AVR_ATmega8__
+ SP=RAMEND; // This is done by hardware reset
+ 1e02: 8f e5 ldi r24, 0x5F ; 95
+ 1e04: 94 e0 ldi r25, 0x04 ; 4
+ 1e06: 9e bf out 0x3e, r25 ; 62
+ 1e08: 8d bf out 0x3d, r24 ; 61
+#endif
+
+ // Adaboot no-wait mod
+ ch = MCUSR;
+ 1e0a: 84 b7 in r24, 0x34 ; 52
+ MCUSR = 0;
+ 1e0c: 14 be out 0x34, r1 ; 52
+ if (!(ch & _BV(EXTRF))) appStart();
+ 1e0e: 81 ff sbrs r24, 1
+ 1e10: e2 d0 rcall .+452 ; 0x1fd6 <appStart>
+
+#if LED_START_FLASHES > 0
+ // Set up Timer 1 for timeout counter
+ TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
+ 1e12: 85 e0 ldi r24, 0x05 ; 5
+ 1e14: 8e bd out 0x2e, r24 ; 46
+#endif
+#ifndef SOFT_UART
+#ifdef __AVR_ATmega8__
+ UCSRA = _BV(U2X); //Double speed mode USART
+ 1e16: 82 e0 ldi r24, 0x02 ; 2
+ 1e18: 8b b9 out 0x0b, r24 ; 11
+ UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
+ 1e1a: 88 e1 ldi r24, 0x18 ; 24
+ 1e1c: 8a b9 out 0x0a, r24 ; 10
+ UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
+ 1e1e: 86 e8 ldi r24, 0x86 ; 134
+ 1e20: 80 bd out 0x20, r24 ; 32
+ UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
+ 1e22: 80 e1 ldi r24, 0x10 ; 16
+ 1e24: 89 b9 out 0x09, r24 ; 9
+ UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
+#endif
+#endif
+
+ // Set up watchdog to trigger after 500ms
+ watchdogConfig(WATCHDOG_1S);
+ 1e26: 8e e0 ldi r24, 0x0E ; 14
+ 1e28: c2 d0 rcall .+388 ; 0x1fae <watchdogConfig>
+
+ /* Set LED pin as output */
+ LED_DDR |= _BV(LED);
+ 1e2a: bd 9a sbi 0x17, 5 ; 23
+ 1e2c: 96 e0 ldi r25, 0x06 ; 6
+}
+
+#if LED_START_FLASHES > 0
+void flash_led(uint8_t count) {
+ do {
+ TCNT1 = -(F_CPU/(1024*16));
+ 1e2e: 20 e3 ldi r18, 0x30 ; 48
+ 1e30: 3c ef ldi r19, 0xFC ; 252
+ TIFR1 = _BV(TOV1);
+ 1e32: 54 e0 ldi r21, 0x04 ; 4
+ while(!(TIFR1 & _BV(TOV1)));
+#ifdef __AVR_ATmega8__
+ LED_PORT ^= _BV(LED);
+ 1e34: 40 e2 ldi r20, 0x20 ; 32
+}
+
+#if LED_START_FLASHES > 0
+void flash_led(uint8_t count) {
+ do {
+ TCNT1 = -(F_CPU/(1024*16));
+ 1e36: 3d bd out 0x2d, r19 ; 45
+ 1e38: 2c bd out 0x2c, r18 ; 44
+ TIFR1 = _BV(TOV1);
+ 1e3a: 58 bf out 0x38, r21 ; 56
+ while(!(TIFR1 & _BV(TOV1)));
+ 1e3c: 08 b6 in r0, 0x38 ; 56
+ 1e3e: 02 fe sbrs r0, 2
+ 1e40: fd cf rjmp .-6 ; 0x1e3c <main+0x3c>
+#ifdef __AVR_ATmega8__
+ LED_PORT ^= _BV(LED);
+ 1e42: 88 b3 in r24, 0x18 ; 24
+ 1e44: 84 27 eor r24, r20
+ 1e46: 88 bb out 0x18, r24 ; 24
+}
+#endif
+
+// Watchdog functions. These are only safe with interrupts turned off.
+void watchdogReset() {
+ __asm__ __volatile__ (
+ 1e48: a8 95 wdr
+ LED_PORT ^= _BV(LED);
+#else
+ LED_PIN |= _BV(LED);
+#endif
+ watchdogReset();
+ } while (--count);
+ 1e4a: 91 50 subi r25, 0x01 ; 1
+ 1e4c: a1 f7 brne .-24 ; 0x1e36 <main+0x36>
+ 1e4e: cc 24 eor r12, r12
+ 1e50: dd 24 eor r13, r13
+ ch = SPM_PAGESIZE / 2;
+ do {
+ uint16_t a;
+ a = *bufPtr++;
+ a |= (*bufPtr++) << 8;
+ __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
+ 1e52: 88 24 eor r8, r8
+ 1e54: 83 94 inc r8
+ addrPtr += 2;
+ } while (--ch);
+
+ // Write from programming buffer
+ __boot_page_write_short((uint16_t)(void*)address);
+ 1e56: b5 e0 ldi r27, 0x05 ; 5
+ 1e58: ab 2e mov r10, r27
+ boot_spm_busy_wait();
+
+#if defined(RWWSRE)
+ // Reenable read access to flash
+ boot_rww_enable();
+ 1e5a: a1 e1 ldi r26, 0x11 ; 17
+ 1e5c: 9a 2e mov r9, r26
+ do *bufPtr++ = getch();
+ while (--length);
+
+ // If we are in NRWW section, page erase has to be delayed until now.
+ // Todo: Take RAMPZ into account
+ if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
+ 1e5e: f3 e0 ldi r31, 0x03 ; 3
+ 1e60: bf 2e mov r11, r31
+#endif
+
+ /* Forever loop */
+ for (;;) {
+ /* get character from UART */
+ ch = getch();
+ 1e62: 9e d0 rcall .+316 ; 0x1fa0 <getch>
+
+ if(ch == STK_GET_PARAMETER) {
+ 1e64: 81 34 cpi r24, 0x41 ; 65
+ 1e66: 61 f4 brne .+24 ; 0x1e80 <main+0x80>
+ unsigned char which = getch();
+ 1e68: 9b d0 rcall .+310 ; 0x1fa0 <getch>
+ 1e6a: 08 2f mov r16, r24
+ verifySpace();
+ 1e6c: a4 d0 rcall .+328 ; 0x1fb6 <verifySpace>
+ if (which == 0x82) {
+ 1e6e: 02 38 cpi r16, 0x82 ; 130
+ 1e70: 11 f0 breq .+4 ; 0x1e76 <main+0x76>
+ /*
+ * Send optiboot version as "minor SW version"
+ */
+ putch(OPTIBOOT_MINVER);
+ } else if (which == 0x81) {
+ 1e72: 01 38 cpi r16, 0x81 ; 129
+ 1e74: 11 f4 brne .+4 ; 0x1e7a <main+0x7a>
+ putch(OPTIBOOT_MAJVER);
+ 1e76: 84 e0 ldi r24, 0x04 ; 4
+ 1e78: 01 c0 rjmp .+2 ; 0x1e7c <main+0x7c>
+ } else {
+ /*
+ * GET PARAMETER returns a generic 0x03 reply for
+ * other parameters - enough to keep Avrdude happy
+ */
+ putch(0x03);
+ 1e7a: 83 e0 ldi r24, 0x03 ; 3
+ 1e7c: 8d d0 rcall .+282 ; 0x1f98 <putch>
+ 1e7e: 89 c0 rjmp .+274 ; 0x1f92 <main+0x192>
+ }
+ }
+ else if(ch == STK_SET_DEVICE) {
+ 1e80: 82 34 cpi r24, 0x42 ; 66
+ 1e82: 11 f4 brne .+4 ; 0x1e88 <main+0x88>
+ // SET DEVICE is ignored
+ getNch(20);
+ 1e84: 84 e1 ldi r24, 0x14 ; 20
+ 1e86: 03 c0 rjmp .+6 ; 0x1e8e <main+0x8e>
+ }
+ else if(ch == STK_SET_DEVICE_EXT) {
+ 1e88: 85 34 cpi r24, 0x45 ; 69
+ 1e8a: 19 f4 brne .+6 ; 0x1e92 <main+0x92>
+ // SET DEVICE EXT is ignored
+ getNch(5);
+ 1e8c: 85 e0 ldi r24, 0x05 ; 5
+ 1e8e: 9b d0 rcall .+310 ; 0x1fc6 <getNch>
+ 1e90: 80 c0 rjmp .+256 ; 0x1f92 <main+0x192>
+ }
+ else if(ch == STK_LOAD_ADDRESS) {
+ 1e92: 85 35 cpi r24, 0x55 ; 85
+ 1e94: 79 f4 brne .+30 ; 0x1eb4 <main+0xb4>
+ // LOAD ADDRESS
+ uint16_t newAddress;
+ newAddress = getch();
+ 1e96: 84 d0 rcall .+264 ; 0x1fa0 <getch>
+ newAddress = (newAddress & 0xff) | (getch() << 8);
+ 1e98: e8 2e mov r14, r24
+ 1e9a: ff 24 eor r15, r15
+ 1e9c: 81 d0 rcall .+258 ; 0x1fa0 <getch>
+ 1e9e: 08 2f mov r16, r24
+ 1ea0: 10 e0 ldi r17, 0x00 ; 0
+ 1ea2: 10 2f mov r17, r16
+ 1ea4: 00 27 eor r16, r16
+ 1ea6: 0e 29 or r16, r14
+ 1ea8: 1f 29 or r17, r15
+#ifdef RAMPZ
+ // Transfer top bit to RAMPZ
+ RAMPZ = (newAddress & 0x8000) ? 1 : 0;
+#endif
+ newAddress += newAddress; // Convert from word address to byte address
+ 1eaa: 00 0f add r16, r16
+ 1eac: 11 1f adc r17, r17
+ address = newAddress;
+ verifySpace();
+ 1eae: 83 d0 rcall .+262 ; 0x1fb6 <verifySpace>
+ 1eb0: 68 01 movw r12, r16
+ 1eb2: 6f c0 rjmp .+222 ; 0x1f92 <main+0x192>
+ }
+ else if(ch == STK_UNIVERSAL) {
+ 1eb4: 86 35 cpi r24, 0x56 ; 86
+ 1eb6: 21 f4 brne .+8 ; 0x1ec0 <main+0xc0>
+ // UNIVERSAL command is ignored
+ getNch(4);
+ 1eb8: 84 e0 ldi r24, 0x04 ; 4
+ 1eba: 85 d0 rcall .+266 ; 0x1fc6 <getNch>
+ putch(0x00);
+ 1ebc: 80 e0 ldi r24, 0x00 ; 0
+ 1ebe: de cf rjmp .-68 ; 0x1e7c <main+0x7c>
+ }
+ /* Write memory, length is big endian and is in bytes */
+ else if(ch == STK_PROG_PAGE) {
+ 1ec0: 84 36 cpi r24, 0x64 ; 100
+ 1ec2: 09 f0 breq .+2 ; 0x1ec6 <main+0xc6>
+ 1ec4: 40 c0 rjmp .+128 ; 0x1f46 <main+0x146>
+ // PROGRAM PAGE - we support flash programming only, not EEPROM
+ uint8_t *bufPtr;
+ uint16_t addrPtr;
+
+ getch(); /* getlen() */
+ 1ec6: 6c d0 rcall .+216 ; 0x1fa0 <getch>
+ length = getch();
+ 1ec8: 6b d0 rcall .+214 ; 0x1fa0 <getch>
+ 1eca: 08 2f mov r16, r24
+ getch();
+ 1ecc: 69 d0 rcall .+210 ; 0x1fa0 <getch>
+
+ // If we are in RWW section, immediately start page erase
+ if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
+ 1ece: 80 e0 ldi r24, 0x00 ; 0
+ 1ed0: c8 16 cp r12, r24
+ 1ed2: 88 e1 ldi r24, 0x18 ; 24
+ 1ed4: d8 06 cpc r13, r24
+ 1ed6: 18 f4 brcc .+6 ; 0x1ede <main+0xde>
+ 1ed8: f6 01 movw r30, r12
+ 1eda: b7 be out 0x37, r11 ; 55
+ 1edc: e8 95 spm
+ 1ede: c0 e0 ldi r28, 0x00 ; 0
+ 1ee0: d1 e0 ldi r29, 0x01 ; 1
+
+ // While that is going on, read in page contents
+ bufPtr = buff;
+ do *bufPtr++ = getch();
+ 1ee2: 5e d0 rcall .+188 ; 0x1fa0 <getch>
+ 1ee4: 89 93 st Y+, r24
+ while (--length);
+ 1ee6: 0c 17 cp r16, r28
+ 1ee8: e1 f7 brne .-8 ; 0x1ee2 <main+0xe2>
+
+ // If we are in NRWW section, page erase has to be delayed until now.
+ // Todo: Take RAMPZ into account
+ if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
+ 1eea: f0 e0 ldi r31, 0x00 ; 0
+ 1eec: cf 16 cp r12, r31
+ 1eee: f8 e1 ldi r31, 0x18 ; 24
+ 1ef0: df 06 cpc r13, r31
+ 1ef2: 18 f0 brcs .+6 ; 0x1efa <main+0xfa>
+ 1ef4: f6 01 movw r30, r12
+ 1ef6: b7 be out 0x37, r11 ; 55
+ 1ef8: e8 95 spm
+
+ // Read command terminator, start reply
+ verifySpace();
+ 1efa: 5d d0 rcall .+186 ; 0x1fb6 <verifySpace>
+
+ // If only a partial page is to be programmed, the erase might not be complete.
+ // So check that here
+ boot_spm_busy_wait();
+ 1efc: 07 b6 in r0, 0x37 ; 55
+ 1efe: 00 fc sbrc r0, 0
+ 1f00: fd cf rjmp .-6 ; 0x1efc <main+0xfc>
+ 1f02: a6 01 movw r20, r12
+ 1f04: a0 e0 ldi r26, 0x00 ; 0
+ 1f06: b1 e0 ldi r27, 0x01 ; 1
+ bufPtr = buff;
+ addrPtr = (uint16_t)(void*)address;
+ ch = SPM_PAGESIZE / 2;
+ do {
+ uint16_t a;
+ a = *bufPtr++;
+ 1f08: 2c 91 ld r18, X
+ 1f0a: 30 e0 ldi r19, 0x00 ; 0
+ a |= (*bufPtr++) << 8;
+ 1f0c: 11 96 adiw r26, 0x01 ; 1
+ 1f0e: 8c 91 ld r24, X
+ 1f10: 11 97 sbiw r26, 0x01 ; 1
+ 1f12: 90 e0 ldi r25, 0x00 ; 0
+ 1f14: 98 2f mov r25, r24
+ 1f16: 88 27 eor r24, r24
+ 1f18: 82 2b or r24, r18
+ 1f1a: 93 2b or r25, r19
+#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
+#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
+#endif
+
+/* main program starts here */
+int main(void) {
+ 1f1c: 12 96 adiw r26, 0x02 ; 2
+ ch = SPM_PAGESIZE / 2;
+ do {
+ uint16_t a;
+ a = *bufPtr++;
+ a |= (*bufPtr++) << 8;
+ __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
+ 1f1e: fa 01 movw r30, r20
+ 1f20: 0c 01 movw r0, r24
+ 1f22: 87 be out 0x37, r8 ; 55
+ 1f24: e8 95 spm
+ 1f26: 11 24 eor r1, r1
+ addrPtr += 2;
+ 1f28: 4e 5f subi r20, 0xFE ; 254
+ 1f2a: 5f 4f sbci r21, 0xFF ; 255
+ } while (--ch);
+ 1f2c: f1 e0 ldi r31, 0x01 ; 1
+ 1f2e: a0 34 cpi r26, 0x40 ; 64
+ 1f30: bf 07 cpc r27, r31
+ 1f32: 51 f7 brne .-44 ; 0x1f08 <main+0x108>
+
+ // Write from programming buffer
+ __boot_page_write_short((uint16_t)(void*)address);
+ 1f34: f6 01 movw r30, r12
+ 1f36: a7 be out 0x37, r10 ; 55
+ 1f38: e8 95 spm
+ boot_spm_busy_wait();
+ 1f3a: 07 b6 in r0, 0x37 ; 55
+ 1f3c: 00 fc sbrc r0, 0
+ 1f3e: fd cf rjmp .-6 ; 0x1f3a <main+0x13a>
+
+#if defined(RWWSRE)
+ // Reenable read access to flash
+ boot_rww_enable();
+ 1f40: 97 be out 0x37, r9 ; 55
+ 1f42: e8 95 spm
+ 1f44: 26 c0 rjmp .+76 ; 0x1f92 <main+0x192>
+#endif
+
+ }
+ /* Read memory block mode, length is big endian. */
+ else if(ch == STK_READ_PAGE) {
+ 1f46: 84 37 cpi r24, 0x74 ; 116
+ 1f48: b1 f4 brne .+44 ; 0x1f76 <main+0x176>
+ // READ PAGE - we only read flash
+ getch(); /* getlen() */
+ 1f4a: 2a d0 rcall .+84 ; 0x1fa0 <getch>
+ length = getch();
+ 1f4c: 29 d0 rcall .+82 ; 0x1fa0 <getch>
+ 1f4e: f8 2e mov r15, r24
+ getch();
+ 1f50: 27 d0 rcall .+78 ; 0x1fa0 <getch>
+
+ verifySpace();
+ 1f52: 31 d0 rcall .+98 ; 0x1fb6 <verifySpace>
+ 1f54: f6 01 movw r30, r12
+ 1f56: ef 2c mov r14, r15
+ putch(result);
+ address++;
+ }
+ while (--length);
+#else
+ do putch(pgm_read_byte_near(address++));
+ 1f58: 8f 01 movw r16, r30
+ 1f5a: 0f 5f subi r16, 0xFF ; 255
+ 1f5c: 1f 4f sbci r17, 0xFF ; 255
+ 1f5e: 84 91 lpm r24, Z+
+ 1f60: 1b d0 rcall .+54 ; 0x1f98 <putch>
+ while (--length);
+ 1f62: ea 94 dec r14
+ 1f64: f8 01 movw r30, r16
+ 1f66: c1 f7 brne .-16 ; 0x1f58 <main+0x158>
+#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
+#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
+#endif
+
+/* main program starts here */
+int main(void) {
+ 1f68: 08 94 sec
+ 1f6a: c1 1c adc r12, r1
+ 1f6c: d1 1c adc r13, r1
+ 1f6e: fa 94 dec r15
+ 1f70: cf 0c add r12, r15
+ 1f72: d1 1c adc r13, r1
+ 1f74: 0e c0 rjmp .+28 ; 0x1f92 <main+0x192>
+#endif
+#endif
+ }
+
+ /* Get device signature bytes */
+ else if(ch == STK_READ_SIGN) {
+ 1f76: 85 37 cpi r24, 0x75 ; 117
+ 1f78: 39 f4 brne .+14 ; 0x1f88 <main+0x188>
+ // READ SIGN - return what Avrdude wants to hear
+ verifySpace();
+ 1f7a: 1d d0 rcall .+58 ; 0x1fb6 <verifySpace>
+ putch(SIGNATURE_0);
+ 1f7c: 8e e1 ldi r24, 0x1E ; 30
+ 1f7e: 0c d0 rcall .+24 ; 0x1f98 <putch>
+ putch(SIGNATURE_1);
+ 1f80: 83 e9 ldi r24, 0x93 ; 147
+ 1f82: 0a d0 rcall .+20 ; 0x1f98 <putch>
+ putch(SIGNATURE_2);
+ 1f84: 87 e0 ldi r24, 0x07 ; 7
+ 1f86: 7a cf rjmp .-268 ; 0x1e7c <main+0x7c>
+ }
+ else if (ch == 'Q') {
+ 1f88: 81 35 cpi r24, 0x51 ; 81
+ 1f8a: 11 f4 brne .+4 ; 0x1f90 <main+0x190>
+ // Adaboot no-wait mod
+ watchdogConfig(WATCHDOG_16MS);
+ 1f8c: 88 e0 ldi r24, 0x08 ; 8
+ 1f8e: 0f d0 rcall .+30 ; 0x1fae <watchdogConfig>
+ verifySpace();
+ }
+ else {
+ // This covers the response to commands like STK_ENTER_PROGMODE
+ verifySpace();
+ 1f90: 12 d0 rcall .+36 ; 0x1fb6 <verifySpace>
+ }
+ putch(STK_OK);
+ 1f92: 80 e1 ldi r24, 0x10 ; 16
+ 1f94: 01 d0 rcall .+2 ; 0x1f98 <putch>
+ 1f96: 65 cf rjmp .-310 ; 0x1e62 <main+0x62>
+
+00001f98 <putch>:
+ }
+}
+
+void putch(char ch) {
+#ifndef SOFT_UART
+ while (!(UCSR0A & _BV(UDRE0)));
+ 1f98: 5d 9b sbis 0x0b, 5 ; 11
+ 1f9a: fe cf rjmp .-4 ; 0x1f98 <putch>
+ UDR0 = ch;
+ 1f9c: 8c b9 out 0x0c, r24 ; 12
+ [uartBit] "I" (UART_TX_BIT)
+ :
+ "r25"
+ );
+#endif
+}
+ 1f9e: 08 95 ret
+
+00001fa0 <getch>:
+ [uartBit] "I" (UART_RX_BIT)
+ :
+ "r25"
+);
+#else
+ while(!(UCSR0A & _BV(RXC0)))
+ 1fa0: 5f 9b sbis 0x0b, 7 ; 11
+ 1fa2: fe cf rjmp .-4 ; 0x1fa0 <getch>
+ ;
+ if (!(UCSR0A & _BV(FE0))) {
+ 1fa4: 5c 99 sbic 0x0b, 4 ; 11
+ 1fa6: 01 c0 rjmp .+2 ; 0x1faa <getch+0xa>
+}
+#endif
+
+// Watchdog functions. These are only safe with interrupts turned off.
+void watchdogReset() {
+ __asm__ __volatile__ (
+ 1fa8: a8 95 wdr
+ * don't care that an invalid char is returned...)
+ */
+ watchdogReset();
+ }
+
+ ch = UDR0;
+ 1faa: 8c b1 in r24, 0x0c ; 12
+ LED_PIN |= _BV(LED);
+#endif
+#endif
+
+ return ch;
+}
+ 1fac: 08 95 ret
+
+00001fae <watchdogConfig>:
+ "wdr\n"
+ );
+}
+
+void watchdogConfig(uint8_t x) {
+ WDTCSR = _BV(WDCE) | _BV(WDE);
+ 1fae: 98 e1 ldi r25, 0x18 ; 24
+ 1fb0: 91 bd out 0x21, r25 ; 33
+ WDTCSR = x;
+ 1fb2: 81 bd out 0x21, r24 ; 33
+}
+ 1fb4: 08 95 ret
+
+00001fb6 <verifySpace>:
+ do getch(); while (--count);
+ verifySpace();
+}
+
+void verifySpace() {
+ if (getch() != CRC_EOP) {
+ 1fb6: f4 df rcall .-24 ; 0x1fa0 <getch>
+ 1fb8: 80 32 cpi r24, 0x20 ; 32
+ 1fba: 19 f0 breq .+6 ; 0x1fc2 <verifySpace+0xc>
+ watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
+ 1fbc: 88 e0 ldi r24, 0x08 ; 8
+ 1fbe: f7 df rcall .-18 ; 0x1fae <watchdogConfig>
+ 1fc0: ff cf rjmp .-2 ; 0x1fc0 <verifySpace+0xa>
+ while (1) // and busy-loop so that WD causes
+ ; // a reset and app start.
+ }
+ putch(STK_INSYNC);
+ 1fc2: 84 e1 ldi r24, 0x14 ; 20
+}
+ 1fc4: e9 cf rjmp .-46 ; 0x1f98 <putch>
+
+00001fc6 <getNch>:
+ ::[count] "M" (UART_B_VALUE)
+ );
+}
+#endif
+
+void getNch(uint8_t count) {
+ 1fc6: 1f 93 push r17
+ 1fc8: 18 2f mov r17, r24
+ do getch(); while (--count);
+ 1fca: ea df rcall .-44 ; 0x1fa0 <getch>
+ 1fcc: 11 50 subi r17, 0x01 ; 1
+ 1fce: e9 f7 brne .-6 ; 0x1fca <getNch+0x4>
+ verifySpace();
+ 1fd0: f2 df rcall .-28 ; 0x1fb6 <verifySpace>
+}
+ 1fd2: 1f 91 pop r17
+ 1fd4: 08 95 ret
+
+00001fd6 <appStart>:
+ WDTCSR = _BV(WDCE) | _BV(WDE);
+ WDTCSR = x;
+}
+
+void appStart() {
+ watchdogConfig(WATCHDOG_OFF);
+ 1fd6: 80 e0 ldi r24, 0x00 ; 0
+ 1fd8: ea df rcall .-44 ; 0x1fae <watchdogConfig>
+ __asm__ __volatile__ (
+ 1fda: ee 27 eor r30, r30
+ 1fdc: ff 27 eor r31, r31
+ 1fde: 09 94 ijmp
diff --git a/bootloaders/optiboot/pin_defs.h b/bootloaders/optiboot/pin_defs.h
new file mode 100644
index 0000000..27d7772
--- /dev/null
+++ b/bootloaders/optiboot/pin_defs.h
@@ -0,0 +1,80 @@
+#if defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) || defined(__AVR_ATmega88) || defined(__AVR_ATmega8__) || defined(__AVR_ATmega88__)
+/* Onboard LED is connected to pin PB5 in Arduino NG, Diecimila, and Duemilanove */
+#define LED_DDR DDRB
+#define LED_PORT PORTB
+#define LED_PIN PINB
+#define LED PINB5
+
+/* Ports for soft UART */
+#ifdef SOFT_UART
+#define UART_PORT PORTD
+#define UART_PIN PIND
+#define UART_DDR DDRD
+#define UART_TX_BIT 1
+#define UART_RX_BIT 0
+#endif
+#endif
+
+#if defined(__AVR_ATmega8__)
+ //Name conversion R.Wiersma
+ #define UCSR0A UCSRA
+ #define UDR0 UDR
+ #define UDRE0 UDRE
+ #define RXC0 RXC
+ #define FE0 FE
+ #define TIFR1 TIFR
+ #define WDTCSR WDTCR
+#endif
+
+/* Luminet support */
+#if defined(__AVR_ATtiny84__)
+/* Red LED is connected to pin PA4 */
+#define LED_DDR DDRA
+#define LED_PORT PORTA
+#define LED_PIN PINA
+#define LED PINA4
+/* Ports for soft UART - left port only for now. TX/RX on PA2/PA3 */
+#ifdef SOFT_UART
+#define UART_PORT PORTA
+#define UART_PIN PINA
+#define UART_DDR DDRA
+#define UART_TX_BIT 2
+#define UART_RX_BIT 3
+#endif
+#endif
+
+/* Sanguino support */
+#if defined(__AVR_ATmega644P__)
+/* Onboard LED is connected to pin PB0 on Sanguino */
+#define LED_DDR DDRB
+#define LED_PORT PORTB
+#define LED_PIN PINB
+#define LED PINB0
+
+/* Ports for soft UART */
+#ifdef SOFT_UART
+#define UART_PORT PORTD
+#define UART_PIN PIND
+#define UART_DDR DDRD
+#define UART_TX_BIT 1
+#define UART_RX_BIT 0
+#endif
+#endif
+
+/* Mega support */
+#if defined(__AVR_ATmega1280__)
+/* Onboard LED is connected to pin PB7 on Arduino Mega */
+#define LED_DDR DDRB
+#define LED_PORT PORTB
+#define LED_PIN PINB
+#define LED PINB7
+
+/* Ports for soft UART */
+#ifdef SOFT_UART
+#define UART_PORT PORTE
+#define UART_PIN PINE
+#define UART_DDR DDRE
+#define UART_TX_BIT 1
+#define UART_RX_BIT 0
+#endif
+#endif
diff --git a/bootloaders/optiboot/stk500.h b/bootloaders/optiboot/stk500.h
new file mode 100644
index 0000000..ca0dd91
--- /dev/null
+++ b/bootloaders/optiboot/stk500.h
@@ -0,0 +1,39 @@
+/* STK500 constants list, from AVRDUDE */
+#define STK_OK 0x10
+#define STK_FAILED 0x11 // Not used
+#define STK_UNKNOWN 0x12 // Not used
+#define STK_NODEVICE 0x13 // Not used
+#define STK_INSYNC 0x14 // ' '
+#define STK_NOSYNC 0x15 // Not used
+#define ADC_CHANNEL_ERROR 0x16 // Not used
+#define ADC_MEASURE_OK 0x17 // Not used
+#define PWM_CHANNEL_ERROR 0x18 // Not used
+#define PWM_ADJUST_OK 0x19 // Not used
+#define CRC_EOP 0x20 // 'SPACE'
+#define STK_GET_SYNC 0x30 // '0'
+#define STK_GET_SIGN_ON 0x31 // '1'
+#define STK_SET_PARAMETER 0x40 // '@'
+#define STK_GET_PARAMETER 0x41 // 'A'
+#define STK_SET_DEVICE 0x42 // 'B'
+#define STK_SET_DEVICE_EXT 0x45 // 'E'
+#define STK_ENTER_PROGMODE 0x50 // 'P'
+#define STK_LEAVE_PROGMODE 0x51 // 'Q'
+#define STK_CHIP_ERASE 0x52 // 'R'
+#define STK_CHECK_AUTOINC 0x53 // 'S'
+#define STK_LOAD_ADDRESS 0x55 // 'U'
+#define STK_UNIVERSAL 0x56 // 'V'
+#define STK_PROG_FLASH 0x60 // '`'
+#define STK_PROG_DATA 0x61 // 'a'
+#define STK_PROG_FUSE 0x62 // 'b'
+#define STK_PROG_LOCK 0x63 // 'c'
+#define STK_PROG_PAGE 0x64 // 'd'
+#define STK_PROG_FUSE_EXT 0x65 // 'e'
+#define STK_READ_FLASH 0x70 // 'p'
+#define STK_READ_DATA 0x71 // 'q'
+#define STK_READ_FUSE 0x72 // 'r'
+#define STK_READ_LOCK 0x73 // 's'
+#define STK_READ_PAGE 0x74 // 't'
+#define STK_READ_SIGN 0x75 // 'u'
+#define STK_READ_OSCCAL 0x76 // 'v'
+#define STK_READ_FUSE_EXT 0x77 // 'w'
+#define STK_READ_OSCCAL_EXT 0x78 // 'x'
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-11-24 05:42:52 +0000