diff options
| author | David A. Mellis <d.mellis@arduino.cc> | 2009-11-07 17:54:56 +0000 |
|---|---|---|
| committer | David A. Mellis <d.mellis@arduino.cc> | 2009-11-07 17:54:56 +0000 |
| commit | 6005c59ad03446153c66a991f01ac91c31d98dac (patch) | |
| tree | 4c599359fd35066a81b8b9fe99042e325c03c6ed /libraries/Ethernet/utility/spi.h | |
| parent | 584dece7b0c982de8731f7400c94b5034aef89e7 (diff) | |
Moving libraries out of arduino platform / core directory and to top-level.
Diffstat (limited to 'libraries/Ethernet/utility/spi.h')
| -rwxr-xr-x | libraries/Ethernet/utility/spi.h | 58 |
1 files changed, 0 insertions, 58 deletions
diff --git a/libraries/Ethernet/utility/spi.h b/libraries/Ethernet/utility/spi.h deleted file mode 100755 index 000705d..0000000 --- a/libraries/Ethernet/utility/spi.h +++ /dev/null @@ -1,58 +0,0 @@ -//-----------------------------------------------------------------------------
-//AVR Mega168 SPI HAL
-#define BIT0 0x01
-#define BIT1 0x02
-#define BIT2 0x04
-#define BIT3 0x08
-#define BIT4 0x10
-#define BIT5 0x20
-#define BIT6 0x40
-#define BIT7 0x80
-
-#define SPI0_SS_BIT BIT2
-#define SPI0_SS_DDR DDRB
-#define SPI0_SS_PORT PORTB
-
-#define SPI0_SCLK_BIT BIT5
-#define SPI0_SCLK_DDR DDRB
-#define SPI0_SCLK_PORT PORTB
-
-#define SPI0_MOSI_BIT BIT3
-#define SPI0_MOSI_DDR DDRB
-#define SPI0_MOSI_PORT PORTB
-
-#define SPI0_MISO_BIT BIT4
-#define SPI0_MISO_DDR DDRB
-#define SPI0_MISO_PORT PORTB
-
-
-#define SPI0_WaitForReceive()
-#define SPI0_RxData() (SPDR)
-
-#define SPI0_TxData(Data) (SPDR = Data)
-#define SPI0_WaitForSend() while( (SPSR & 0x80)==0x00 )
-
-#define SPI0_SendByte(Data) SPI0_TxData(Data);SPI0_WaitForSend()
-#define SPI0_RecvBute() SPI0_RxData()
-
-// PB4(MISO), PB3(MOSI), PB5(SCK), PB2(/SS) // CS=1, waiting for SPI start // SPI mode 0, 4MHz
-#define SPI0_Init() DDRB |= SPI0_SS_BIT|SPI0_SCLK_BIT|SPI0_MOSI_BIT;\
- PORTB |= SPI0_SS_BIT; PORTB &= ~(SPI0_SCLK_BIT|SPI0_MOSI_BIT);\
- SPCR = 0x50
-//-----------------------------------------------------------------------------
-
-//-----------------------------------------------------------------------------
-//IInChip SPI HAL
-#define IINCHIP_SpiInit SPI0_Init
-#define IINCHIP_SpiSendData SPI0_SendByte
-#define IINCHIP_SpiRecvData SPI0_RxData
-
-
-#define IINCHIP_CS_BIT BIT2
-#define IINCHIP_CS_DDR DDRB
-#define IINCHIP_CS_PORT PORTB
-
-#define IINCHIP_CSInit() (IINCHIP_CS_DDR |= IINCHIP_CS_BIT)
-#define IINCHIP_CSon() (IINCHIP_CS_PORT |= IINCHIP_CS_BIT)
-#define IINCHIP_CSoff() (IINCHIP_CS_PORT &= ~IINCHIP_CS_BIT)
-//-----------------------------------------------------------------------------
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