Delete 'firmwares' folder

16 files changed, 0 insertions, 8553 deletions

diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.c
deleted file mode 100644
index 2eee15c..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.c
+++ /dev/null
@@ -1,1117 +0,0 @@
-/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief FLASHC driver for AVR32 UC3.
- *
- * AVR32 Flash Controller driver module.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with a FLASHC module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#include <avr32/io.h>
-#include <stddef.h>
-#include "compiler.h"
-#include "flashc.h"
-
-
-/*! \name FLASHC Writable Bit-Field Registers
- */
-//! @{
-
-typedef union
-{
-  unsigned long                 fcr;
-  avr32_flashc_fcr_t            FCR;
-} u_avr32_flashc_fcr_t;
-
-typedef union
-{
-  unsigned long                 fcmd;
-  avr32_flashc_fcmd_t           FCMD;
-} u_avr32_flashc_fcmd_t;
-
-//! @}
-
-
-/*! \name Flash Properties
- */
-//! @{
-
-
-unsigned int flashc_get_flash_size(void)
-{
-#if (defined AVR32_FLASHC_300_H_INCLUDED)
-  static const unsigned int FLASH_SIZE[1 << AVR32_FLASHC_PR_FSZ_SIZE] =
-  {
-      32 << 10,
-      64 << 10,
-     128 << 10,
-     256 << 10,
-     384 << 10,
-     512 << 10,
-     768 << 10,
-    1024 << 10
-  };
-  return FLASH_SIZE[(AVR32_FLASHC.pr & AVR32_FLASHC_PR_FSZ_MASK) >> AVR32_FLASHC_PR_FSZ_OFFSET];
-#else 
-  static const unsigned int FLASH_SIZE[1 << AVR32_FLASHC_FSR_FSZ_SIZE] =
-  {
-      32 << 10,
-      64 << 10,
-     128 << 10,
-     256 << 10,
-     384 << 10,
-     512 << 10,
-     768 << 10,
-    1024 << 10
-  };
-  return FLASH_SIZE[(AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FSZ_MASK) >> AVR32_FLASHC_FSR_FSZ_OFFSET];
-#endif  
-}
-
-
-unsigned int flashc_get_page_count(void)
-{
-  return flashc_get_flash_size() / AVR32_FLASHC_PAGE_SIZE;
-}
-
-
-unsigned int flashc_get_page_count_per_region(void)
-{
-  return flashc_get_page_count() / AVR32_FLASHC_REGIONS;
-}
-
-
-unsigned int flashc_get_page_region(int page_number)
-{
-  return ((page_number >= 0) ? page_number : flashc_get_page_number()) / flashc_get_page_count_per_region();
-}
-
-
-unsigned int flashc_get_region_first_page_number(unsigned int region)
-{
-  return region * flashc_get_page_count_per_region();
-}
-
-
-//! @}
-
-
-/*! \name FLASHC Control
- */
-//! @{
-
-
-unsigned int flashc_get_wait_state(void)
-{
-  return (AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FWS_MASK) >> AVR32_FLASHC_FCR_FWS_OFFSET;
-}
-
-
-void flashc_set_wait_state(unsigned int wait_state)
-{
-  u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
-  u_avr32_flashc_fcr.FCR.fws = wait_state;
-  AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
-}
-
-
-Bool flashc_is_ready_int_enabled(void)
-{
-  return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FRDY_MASK) != 0);
-}
-
-
-void flashc_enable_ready_int(Bool enable)
-{
-  u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
-  u_avr32_flashc_fcr.FCR.frdy = (enable != FALSE);
-  AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
-}
-
-
-Bool flashc_is_lock_error_int_enabled(void)
-{
-  return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_LOCKE_MASK) != 0);
-}
-
-
-void flashc_enable_lock_error_int(Bool enable)
-{
-  u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
-  u_avr32_flashc_fcr.FCR.locke = (enable != FALSE);
-  AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
-}
-
-
-Bool flashc_is_prog_error_int_enabled(void)
-{
-  return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_PROGE_MASK) != 0);
-}
-
-
-void flashc_enable_prog_error_int(Bool enable)
-{
-  u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
-  u_avr32_flashc_fcr.FCR.proge = (enable != FALSE);
-  AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
-}
-
-
-//! @}
-
-
-/*! \name FLASHC Status
- */
-//! @{
-
-
-Bool flashc_is_ready(void)
-{
-  return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FRDY_MASK) != 0);
-}
-
-
-void flashc_default_wait_until_ready(void)
-{
-  while (!flashc_is_ready());
-}
-
-
-void (*volatile flashc_wait_until_ready)(void) = flashc_default_wait_until_ready;
-
-
-/*! \brief Gets the error status of the FLASHC.
- *
- * \return The error status of the FLASHC built up from
- *         \c AVR32_FLASHC_FSR_LOCKE_MASK and \c AVR32_FLASHC_FSR_PROGE_MASK.
- *
- * \warning This hardware error status is cleared by all functions reading the
- *          Flash Status Register (FSR). This function is therefore not part of
- *          the driver's API which instead presents \ref flashc_is_lock_error
- *          and \ref flashc_is_programming_error.
- */
-static unsigned int flashc_get_error_status(void)
-{
-  return AVR32_FLASHC.fsr & (AVR32_FLASHC_FSR_LOCKE_MASK |
-                             AVR32_FLASHC_FSR_PROGE_MASK);
-}
-
-
-//! Sticky error status of the FLASHC.
-//! This variable is updated by functions that issue FLASHC commands. It
-//! contains the cumulated FLASHC error status of all the FLASHC commands issued
-//! by a function.
-static unsigned int flashc_error_status = 0;
-
-
-Bool flashc_is_lock_error(void)
-{
-  return ((flashc_error_status & AVR32_FLASHC_FSR_LOCKE_MASK) != 0);
-}
-
-
-Bool flashc_is_programming_error(void)
-{
-  return ((flashc_error_status & AVR32_FLASHC_FSR_PROGE_MASK) != 0);
-}
-
-
-//! @}
-
-
-/*! \name FLASHC Command Control
- */
-//! @{
-
-
-unsigned int flashc_get_command(void)
-{
-  return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_CMD_MASK) >> AVR32_FLASHC_FCMD_CMD_OFFSET;
-}
-
-
-unsigned int flashc_get_page_number(void)
-{
-  return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_PAGEN_MASK) >> AVR32_FLASHC_FCMD_PAGEN_OFFSET;
-}
-
-
-void flashc_issue_command(unsigned int command, int page_number)
-{
-  u_avr32_flashc_fcmd_t u_avr32_flashc_fcmd;
-  flashc_wait_until_ready();
-  u_avr32_flashc_fcmd.fcmd = AVR32_FLASHC.fcmd;
-  u_avr32_flashc_fcmd.FCMD.cmd = command;
-  if (page_number >= 0) u_avr32_flashc_fcmd.FCMD.pagen = page_number;
-  u_avr32_flashc_fcmd.FCMD.key = AVR32_FLASHC_FCMD_KEY_KEY;
-  AVR32_FLASHC.fcmd = u_avr32_flashc_fcmd.fcmd;
-  flashc_error_status = flashc_get_error_status();
-  flashc_wait_until_ready();
-}
-
-
-//! @}
-
-
-/*! \name FLASHC Global Commands
- */
-//! @{
-
-
-void flashc_no_operation(void)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_NOP, -1);
-}
-
-
-void flashc_erase_all(void)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EA, -1);
-}
-
-
-//! @}
-
-
-/*! \name FLASHC Protection Mechanisms
- */
-//! @{
-
-
-Bool flashc_is_security_bit_active(void)
-{
-  return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_SECURITY_MASK) != 0);
-}
-
-
-void flashc_activate_security_bit(void)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_SSB, -1);
-}
-
-
-unsigned int flashc_get_bootloader_protected_size(void)
-{
-  unsigned int bootprot = (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 -
-                          flashc_read_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET,
-                                                       AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE);
-  return (bootprot) ? AVR32_FLASHC_PAGE_SIZE << bootprot : 0;
-}
-
-
-unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size)
-{
-  flashc_set_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET,
-                              AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE,
-                              (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 -
-                              ((bootprot_size) ?
-                               32 - clz((((min(max(bootprot_size, AVR32_FLASHC_PAGE_SIZE << 1),
-                                               AVR32_FLASHC_PAGE_SIZE <<
-                                               ((1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1)) +
-                                           AVR32_FLASHC_PAGE_SIZE - 1) /
-                                          AVR32_FLASHC_PAGE_SIZE) << 1) - 1) - 1 :
-                               0));
-  return flashc_get_bootloader_protected_size();
-}
-
-
-Bool flashc_is_external_privileged_fetch_locked(void)
-{
-  return (!flashc_read_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET));
-}
-
-
-void flashc_lock_external_privileged_fetch(Bool lock)
-{
-  flashc_set_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET, !lock);
-}
-
-
-Bool flashc_is_page_region_locked(int page_number)
-{
-  return flashc_is_region_locked(flashc_get_page_region(page_number));
-}
-
-
-Bool flashc_is_region_locked(unsigned int region)
-{
-  return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_LOCK0_MASK << (region & (AVR32_FLASHC_REGIONS - 1))) != 0);
-}
-
-
-void flashc_lock_page_region(int page_number, Bool lock)
-{
-  flashc_issue_command((lock) ? AVR32_FLASHC_FCMD_CMD_LP : AVR32_FLASHC_FCMD_CMD_UP, page_number);
-}
-
-
-void flashc_lock_region(unsigned int region, Bool lock)
-{
-  flashc_lock_page_region(flashc_get_region_first_page_number(region), lock);
-}
-
-
-void flashc_lock_all_regions(Bool lock)
-{
-  unsigned int error_status = 0;
-  unsigned int region = AVR32_FLASHC_REGIONS;
-  while (region)
-  {
-    flashc_lock_region(--region, lock);
-    error_status |= flashc_error_status;
-  }
-  flashc_error_status = error_status;
-}
-
-
-//! @}
-
-
-/*! \name Access to General-Purpose Fuses
- */
-//! @{
-
-
-Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit)
-{
-  return ((flashc_read_all_gp_fuses() & 1ULL << (gp_fuse_bit & 0x3F)) != 0);
-}
-
-
-U64 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width)
-{
-  return flashc_read_all_gp_fuses() >> (pos & 0x3F) & ((1ULL << min(width, 64)) - 1);
-}
-
-
-U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte)
-{
-  return flashc_read_all_gp_fuses() >> ((gp_fuse_byte & 0x07) << 3);
-}
-
-
-U64 flashc_read_all_gp_fuses(void)
-{
-  return AVR32_FLASHC.fgpfrlo | (U64)AVR32_FLASHC.fgpfrhi << 32;
-}
-
-
-Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EGPB, gp_fuse_bit & 0x3F);
-  return (check) ? flashc_read_gp_fuse_bit(gp_fuse_bit) : TRUE;
-}
-
-
-Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check)
-{
-  unsigned int error_status = 0;
-  unsigned int gp_fuse_bit;
-  pos &= 0x3F;
-  width = min(width, 64);
-  for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++)
-  {
-    flashc_erase_gp_fuse_bit(gp_fuse_bit, FALSE);
-    error_status |= flashc_error_status;
-  }
-  flashc_error_status = error_status;
-  return (check) ? (flashc_read_gp_fuse_bitfield(pos, width) == (1ULL << width) - 1) : TRUE;
-}
-
-
-Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check)
-{
-  unsigned int error_status;
-  unsigned int current_gp_fuse_byte;
-  U64 value = flashc_read_all_gp_fuses();
-  flashc_erase_all_gp_fuses(FALSE);
-  error_status = flashc_error_status;
-  for (current_gp_fuse_byte = 0; current_gp_fuse_byte < 8; current_gp_fuse_byte++, value >>= 8)
-  {
-    if (current_gp_fuse_byte != gp_fuse_byte)
-    {
-      flashc_write_gp_fuse_byte(current_gp_fuse_byte, value);
-      error_status |= flashc_error_status;
-    }
-  }
-  flashc_error_status = error_status;
-  return (check) ? (flashc_read_gp_fuse_byte(gp_fuse_byte) == 0xFF) : TRUE;
-}
-
-
-Bool flashc_erase_all_gp_fuses(Bool check)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EAGPF, -1);
-  return (check) ? (flashc_read_all_gp_fuses() == 0xFFFFFFFFFFFFFFFFULL) : TRUE;
-}
-
-
-void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value)
-{
-  if (!value)
-    flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WGPB, gp_fuse_bit & 0x3F);
-}
-
-
-void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value)
-{
-  unsigned int error_status = 0;
-  unsigned int gp_fuse_bit;
-  pos &= 0x3F;
-  width = min(width, 64);
-  for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1)
-  {
-    flashc_write_gp_fuse_bit(gp_fuse_bit, value & 0x01);
-    error_status |= flashc_error_status;
-  }
-  flashc_error_status = error_status;
-}
-
-
-void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_PGPFB, (gp_fuse_byte & 0x07) | value << 3);
-}
-
-
-void flashc_write_all_gp_fuses(U64 value)
-{
-  unsigned int error_status = 0;
-  unsigned int gp_fuse_byte;
-  for (gp_fuse_byte = 0; gp_fuse_byte < 8; gp_fuse_byte++, value >>= 8)
-  {
-    flashc_write_gp_fuse_byte(gp_fuse_byte, value);
-    error_status |= flashc_error_status;
-  }
-  flashc_error_status = error_status;
-}
-
-
-void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value)
-{
-  if (value)
-    flashc_erase_gp_fuse_bit(gp_fuse_bit, FALSE);
-  else
-    flashc_write_gp_fuse_bit(gp_fuse_bit, FALSE);
-}
-
-
-void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value)
-{
-  unsigned int error_status = 0;
-  unsigned int gp_fuse_bit;
-  pos &= 0x3F;
-  width = min(width, 64);
-  for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1)
-  {
-    flashc_set_gp_fuse_bit(gp_fuse_bit, value & 0x01);
-    error_status |= flashc_error_status;
-  }
-  flashc_error_status = error_status;
-}
-
-
-void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value)
-{
-  unsigned int error_status;
-  switch (value)
-  {
-  case 0xFF:
-    flashc_erase_gp_fuse_byte(gp_fuse_byte, FALSE);
-    break;
-  case 0x00:
-    flashc_write_gp_fuse_byte(gp_fuse_byte, 0x00);
-    break;
-  default:
-    flashc_erase_gp_fuse_byte(gp_fuse_byte, FALSE);
-    error_status = flashc_error_status;
-    flashc_write_gp_fuse_byte(gp_fuse_byte, value);
-    flashc_error_status |= error_status;
-  }
-}
-
-
-void flashc_set_all_gp_fuses(U64 value)
-{
-  unsigned int error_status;
-  switch (value)
-  {
-  case 0xFFFFFFFFFFFFFFFFULL:
-    flashc_erase_all_gp_fuses(FALSE);
-    break;
-  case 0x0000000000000000ULL:
-    flashc_write_all_gp_fuses(0x0000000000000000ULL);
-    break;
-  default:
-    flashc_erase_all_gp_fuses(FALSE);
-    error_status = flashc_error_status;
-    flashc_write_all_gp_fuses(value);
-    flashc_error_status |= error_status;
-  }
-}
-
-
-//! @}
-
-
-/*! \name Access to Flash Pages
- */
-//! @{
-
-
-void flashc_clear_page_buffer(void)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_CPB, -1);
-}
-
-
-Bool flashc_is_page_erased(void)
-{
-  return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_QPRR_MASK) != 0);
-}
-
-
-Bool flashc_quick_page_read(int page_number)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPR, page_number);
-  return flashc_is_page_erased();
-}
-
-
-Bool flashc_erase_page(int page_number, Bool check)
-{
-  Bool page_erased = TRUE;
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EP, page_number);
-  if (check)
-  {
-    unsigned int error_status = flashc_error_status;
-    page_erased = flashc_quick_page_read(-1);
-    flashc_error_status |= error_status;
-  }
-  return page_erased;
-}
-
-
-Bool flashc_erase_all_pages(Bool check)
-{
-  Bool all_pages_erased = TRUE;
-  unsigned int error_status = 0;
-  unsigned int page_number = flashc_get_page_count();
-  while (page_number)
-  {
-    all_pages_erased &= flashc_erase_page(--page_number, check);
-    error_status |= flashc_error_status;
-  }
-  flashc_error_status = error_status;
-  return all_pages_erased;
-}
-
-
-void flashc_write_page(int page_number)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WP, page_number);
-}
-
-
-Bool flashc_quick_user_page_read(void)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPRUP, -1);
-  return flashc_is_page_erased();
-}
-
-
-Bool flashc_erase_user_page(Bool check)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EUP, -1);
-  return (check) ? flashc_quick_user_page_read() : TRUE;
-}
-
-
-void flashc_write_user_page(void)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WUP, -1);
-}
-
-
-volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase)
-{
-  return flashc_memset16(dst, src | (U16)src << 8, nbytes, erase);
-}
-
-
-volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase)
-{
-  return flashc_memset32(dst, src | (U32)src << 16, nbytes, erase);
-}
-
-
-volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase)
-{
-  return flashc_memset64(dst, src | (U64)src << 32, nbytes, erase);
-}
-
-
-volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase)
-{
-  // Use aggregated pointers to have several alignments available for a same address.
-  UnionCVPtr flash_array_end;
-  UnionVPtr dest;
-  Union64 source = {0};
-  StructCVPtr dest_end;
-  UnionCVPtr flash_page_source_end;
-  Bool incomplete_flash_page_end;
-  Union64 flash_dword;
-  UnionVPtr tmp;
-  unsigned int error_status = 0;
-  unsigned int i;
-
-  // Reformat arguments.
-  flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size();
-  dest.u8ptr = dst;
-  for (i = (Get_align((U32)dest.u8ptr, sizeof(U64)) - 1) & (sizeof(U64) - 1);
-       src; i = (i - 1) & (sizeof(U64) - 1))
-  {
-    source.u8[i] = src;
-    src >>= 8;
-  }
-  dest_end.u8ptr = dest.u8ptr + nbytes;
-
-  // If destination is outside flash, go to next flash page if any.
-  if (dest.u8ptr < AVR32_FLASH)
-  {
-    dest.u8ptr = AVR32_FLASH;
-  }
-  else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE)
-  {
-    dest.u8ptr = AVR32_FLASHC_USER_PAGE;
-  }
-
-  // If end of destination is outside flash, move it to the end of the previous flash page if any.
-  if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE)
-  {
-    dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE;
-  }
-  else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr)
-  {
-    dest_end.u8ptr = flash_array_end.u8ptr;
-  }
-
-  // Align each end of destination pointer with its natural boundary.
-  dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16));
-  dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32));
-  dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64));
-
-  // While end of destination is not reached...
-  while (dest.u8ptr < dest_end.u8ptr)
-  {
-    // Clear the page buffer in order to prepare data for a flash page write.
-    flashc_clear_page_buffer();
-    error_status |= flashc_error_status;
-
-    // Determine where the source data will end in the current flash page.
-    flash_page_source_end.u64ptr =
-      (U64 *)min((U32)dest_end.u64ptr,
-                 Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE);
-
-    // Determine if the current destination page has an incomplete end.
-    incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >=
-                                 Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE));
-
-    // Use a flash double-word buffer to manage unaligned accesses.
-    flash_dword.u64 = source.u64;
-
-    // If destination does not point to the beginning of the current flash page...
-    if (!Test_align((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE))
-    {
-      // Fill the beginning of the page buffer with the current flash page data.
-      // This is required by the hardware, even if page erase is not requested,
-      // in order to be able to write successfully to erased parts of flash
-      // pages that have already been written to.
-      for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE);
-           tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
-           tmp.u64ptr++)
-        *tmp.u64ptr = *tmp.u64ptr;
-
-      // If destination is not 64-bit aligned...
-      if (!Test_align((U32)dest.u8ptr, sizeof(U64)))
-      {
-        // Fill the beginning of the flash double-word buffer with the current
-        // flash page data.
-        // This is required by the hardware, even if page erase is not
-        // requested, in order to be able to write successfully to erased parts
-        // of flash pages that have already been written to.
-        for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++)
-          flash_dword.u8[i] = *tmp.u8ptr++;
-
-        // Align the destination pointer with its 64-bit boundary.
-        dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
-
-        // If the current destination double-word is not the last one...
-        if (dest.u64ptr < dest_end.u64ptr)
-        {
-          // Write the flash double-word buffer to the page buffer and reinitialize it.
-          *dest.u64ptr++ = flash_dword.u64;
-          flash_dword.u64 = source.u64;
-        }
-      }
-    }
-
-    // Write the source data to the page buffer with 64-bit alignment.
-    for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
-      *dest.u64ptr++ = source.u64;
-
-    // If the current destination page has an incomplete end...
-    if (incomplete_flash_page_end)
-    {
-      // This is required by the hardware, even if page erase is not requested,
-      // in order to be able to write successfully to erased parts of flash
-      // pages that have already been written to.
-      {
-        tmp.u8ptr = (volatile U8 *)dest_end.u8ptr;
-
-        // If end of destination is not 64-bit aligned...
-        if (!Test_align((U32)dest_end.u8ptr, sizeof(U64)))
-        {
-          // Fill the end of the flash double-word buffer with the current flash page data.
-          for (i = Get_align((U32)dest_end.u8ptr, sizeof(U64)); i < sizeof(U64); i++)
-            flash_dword.u8[i] = *tmp.u8ptr++;
-
-          // Write the flash double-word buffer to the page buffer.
-          *dest.u64ptr++ = flash_dword.u64;
-        }
-
-        // Fill the end of the page buffer with the current flash page data.
-        for (; !Test_align((U32)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++)
-          *tmp.u64ptr = *tmp.u64ptr;
-      }
-    }
-
-    // If the current flash page is in the flash array...
-    if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE)
-    {
-      // Erase the current page if requested and write it from the page buffer.
-      if (erase)
-      {
-        flashc_erase_page(-1, FALSE);
-        error_status |= flashc_error_status;
-      }
-      flashc_write_page(-1);
-      error_status |= flashc_error_status;
-
-      // If the end of the flash array is reached, go to the User page.
-      if (dest.u8ptr >= flash_array_end.u8ptr)
-        dest.u8ptr = AVR32_FLASHC_USER_PAGE;
-    }
-    // If the current flash page is the User page...
-    else
-    {
-      // Erase the User page if requested and write it from the page buffer.
-      if (erase)
-      {
-        flashc_erase_user_page(FALSE);
-        error_status |= flashc_error_status;
-      }
-      flashc_write_user_page();
-      error_status |= flashc_error_status;
-    }
-  }
-
-  // Update the FLASHC error status.
-  flashc_error_status = error_status;
-
-  // Return the initial destination pointer as the standard memset function does.
-  return dst;
-}
-
-
-volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase)
-{
-  // Use aggregated pointers to have several alignments available for a same address.
-  UnionCVPtr flash_array_end;
-  UnionVPtr dest;
-  UnionCPtr source;
-  StructCVPtr dest_end;
-  UnionCVPtr flash_page_source_end;
-  Bool incomplete_flash_page_end;
-  Union64 flash_dword;
-  Bool flash_dword_pending = FALSE;
-  UnionVPtr tmp;
-  unsigned int error_status = 0;
-  unsigned int i, j;
-
-  // Reformat arguments.
-  flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size();
-  dest.u8ptr = dst;
-  source.u8ptr = src;
-  dest_end.u8ptr = dest.u8ptr + nbytes;
-
-  // If destination is outside flash, go to next flash page if any.
-  if (dest.u8ptr < AVR32_FLASH)
-  {
-    source.u8ptr += AVR32_FLASH - dest.u8ptr;
-    dest.u8ptr = AVR32_FLASH;
-  }
-  else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE)
-  {
-    source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr;
-    dest.u8ptr = AVR32_FLASHC_USER_PAGE;
-  }
-
-  // If end of destination is outside flash, move it to the end of the previous flash page if any.
-  if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE)
-  {
-    dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE;
-  }
-  else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr)
-  {
-    dest_end.u8ptr = flash_array_end.u8ptr;
-  }
-
-  // Align each end of destination pointer with its natural boundary.
-  dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16));
-  dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32));
-  dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64));
-
-  // While end of destination is not reached...
-  while (dest.u8ptr < dest_end.u8ptr)
-  {
-    // Clear the page buffer in order to prepare data for a flash page write.
-    flashc_clear_page_buffer();
-    error_status |= flashc_error_status;
-
-    // Determine where the source data will end in the current flash page.
-    flash_page_source_end.u64ptr =
-      (U64 *)min((U32)dest_end.u64ptr,
-                 Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE);
-
-    // Determine if the current destination page has an incomplete end.
-    incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >=
-                                 Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE));
-
-    // If destination does not point to the beginning of the current flash page...
-    if (!Test_align((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE))
-    {
-      // Fill the beginning of the page buffer with the current flash page data.
-      // This is required by the hardware, even if page erase is not requested,
-      // in order to be able to write successfully to erased parts of flash
-      // pages that have already been written to.
-      for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE);
-           tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
-           tmp.u64ptr++)
-        *tmp.u64ptr = *tmp.u64ptr;
-
-      // If destination is not 64-bit aligned...
-      if (!Test_align((U32)dest.u8ptr, sizeof(U64)))
-      {
-        // Fill the beginning of the flash double-word buffer with the current
-        // flash page data.
-        // This is required by the hardware, even if page erase is not
-        // requested, in order to be able to write successfully to erased parts
-        // of flash pages that have already been written to.
-        for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++)
-          flash_dword.u8[i] = *tmp.u8ptr++;
-
-        // Fill the end of the flash double-word buffer with the source data.
-        for (; i < sizeof(U64); i++)
-          flash_dword.u8[i] = *source.u8ptr++;
-
-        // Align the destination pointer with its 64-bit boundary.
-        dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
-
-        // If the current destination double-word is not the last one...
-        if (dest.u64ptr < dest_end.u64ptr)
-        {
-          // Write the flash double-word buffer to the page buffer.
-          *dest.u64ptr++ = flash_dword.u64;
-        }
-        // If the current destination double-word is the last one, the flash
-        // double-word buffer must be kept for later.
-        else flash_dword_pending = TRUE;
-      }
-    }
-
-    // Read the source data with the maximal possible alignment and write it to
-    // the page buffer with 64-bit alignment.
-    switch (Get_align((U32)source.u8ptr, sizeof(U32)))
-    {
-    case 0:
-      for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
-        *dest.u64ptr++ = *source.u64ptr++;
-      break;
-
-    case sizeof(U16):
-      for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
-      {
-        for (j = 0; j < sizeof(U64) / sizeof(U16); j++) flash_dword.u16[j] = *source.u16ptr++;
-        *dest.u64ptr++ = flash_dword.u64;
-      }
-      break;
-
-    default:
-      for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
-      {
-        for (j = 0; j < sizeof(U64); j++) flash_dword.u8[j] = *source.u8ptr++;
-        *dest.u64ptr++ = flash_dword.u64;
-      }
-    }
-
-    // If the current destination page has an incomplete end...
-    if (incomplete_flash_page_end)
-    {
-      // If the flash double-word buffer is in use, do not initialize it.
-      if (flash_dword_pending) i = Get_align((U32)dest_end.u8ptr, sizeof(U64));
-      // If the flash double-word buffer is free...
-      else
-      {
-        // Fill the beginning of the flash double-word buffer with the source data.
-        for (i = 0; i < Get_align((U32)dest_end.u8ptr, sizeof(U64)); i++)
-          flash_dword.u8[i] = *source.u8ptr++;
-      }
-
-      // This is required by the hardware, even if page erase is not requested,
-      // in order to be able to write successfully to erased parts of flash
-      // pages that have already been written to.
-      {
-        tmp.u8ptr = (volatile U8 *)dest_end.u8ptr;
-
-        // If end of destination is not 64-bit aligned...
-        if (!Test_align((U32)dest_end.u8ptr, sizeof(U64)))
-        {
-          // Fill the end of the flash double-word buffer with the current flash page data.
-          for (; i < sizeof(U64); i++)
-            flash_dword.u8[i] = *tmp.u8ptr++;
-
-          // Write the flash double-word buffer to the page buffer.
-          *dest.u64ptr++ = flash_dword.u64;
-        }
-
-        // Fill the end of the page buffer with the current flash page data.
-        for (; !Test_align((U32)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++)
-          *tmp.u64ptr = *tmp.u64ptr;
-      }
-    }
-
-    // If the current flash page is in the flash array...
-    if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE)
-    {
-      // Erase the current page if requested and write it from the page buffer.
-      if (erase)
-      {
-        flashc_erase_page(-1, FALSE);
-        error_status |= flashc_error_status;
-      }
-      flashc_write_page(-1);
-      error_status |= flashc_error_status;
-
-      // If the end of the flash array is reached, go to the User page.
-      if (dest.u8ptr >= flash_array_end.u8ptr)
-      {
-        source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr;
-        dest.u8ptr = AVR32_FLASHC_USER_PAGE;
-      }
-    }
-    // If the current flash page is the User page...
-    else
-    {
-      // Erase the User page if requested and write it from the page buffer.
-      if (erase)
-      {
-        flashc_erase_user_page(FALSE);
-        error_status |= flashc_error_status;
-      }
-      flashc_write_user_page();
-      error_status |= flashc_error_status;
-    }
-  }
-
-  // Update the FLASHC error status.
-  flashc_error_status = error_status;
-
-  // Return the initial destination pointer as the standard memcpy function does.
-  return dst;
-}
-
-
-#if UC3C
-void flashc_set_flash_waitstate_and_readmode(unsigned long cpu_f_hz)
-{
-  //! Device-specific data
-  #undef AVR32_FLASHC_FWS_0_MAX_FREQ
-  #undef AVR32_FLASHC_FWS_1_MAX_FREQ
-  #undef AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ
-  #undef AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ
-  #define AVR32_FLASHC_FWS_0_MAX_FREQ           33000000
-  #define AVR32_FLASHC_FWS_1_MAX_FREQ           66000000
-  #define AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ      33000000
-  #define AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ      72000000
-  // These defines are missing from or wrong in the toolchain header files uc3cxxx.h
-  // Put a Bugzilla 
-
-  if(cpu_f_hz > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ)    // > 33MHz
-  {
-    // Set a wait-state
-    flashc_set_wait_state(1);
-    if(cpu_f_hz <= AVR32_FLASHC_FWS_1_MAX_FREQ) // <= 66MHz and >33Mhz
-    {
-      // Disable the high-speed read mode.      
-      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
-    }
-    else // > 66Mhz
-    {
-      // Enable the high-speed read mode.
-      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1);                     
-    }
-  }
-  else  // <= 33 MHz    
-  {
-    // Disable wait-state
-    flashc_set_wait_state(0);
-
-    // Disable the high-speed read mode.
-    flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
-    
-  }
-}
-#endif // UC3C device-specific implementation
-
-//! @}
diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.h
deleted file mode 100644
index 9f2547a..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.h
+++ /dev/null
@@ -1,1002 +0,0 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief FLASHC driver for AVR32 UC3.
- *
- * AVR32 Flash Controller driver module.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with a FLASHC module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _FLASHC_H_
-#define _FLASHC_H_
-
-#include <avr32/io.h>
-#include <stddef.h>
-#include "compiler.h"
-
-//! Number of flash regions defined by the FLASHC.
-#define AVR32_FLASHC_REGIONS  (AVR32_FLASHC_FLASH_SIZE /\
-                               (AVR32_FLASHC_PAGES_PR_REGION * AVR32_FLASHC_PAGE_SIZE))
-
-
-/*! \name Flash Properties
- */
-//! @{
-
-/*! \brief Gets the size of the whole flash array.
- *
- * \return The size of the whole flash array in bytes.
- */
-extern unsigned int flashc_get_flash_size(void);
-
-/*! \brief Gets the total number of pages in the flash array.
- *
- * \return The total number of pages in the flash array.
- */
-extern unsigned int flashc_get_page_count(void);
-
-/*! \brief Gets the number of pages in each flash region.
- *
- * \return The number of pages in each flash region.
- */
-extern unsigned int flashc_get_page_count_per_region(void);
-
-/*! \brief Gets the region number of a page.
- *
- * \param page_number The page number:
- *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
- *        the flash array;
- *   \arg <tt>< 0</tt>: the current page number.
- *
- * \return The region number of the specified page.
- */
-extern unsigned int flashc_get_page_region(int page_number);
-
-/*! \brief Gets the number of the first page of a region.
- *
- * \param region The region number: \c 0 to <tt>(AVR32_FLASHC_REGIONS - 1)</tt>.
- *
- * \return The number of the first page of the specified region.
- */
-extern unsigned int flashc_get_region_first_page_number(unsigned int region);
-
-//! @}
-
-
-/*! \name FLASHC Control
- */
-//! @{
-
-/*! \brief Gets the number of wait states of flash read accesses.
- *
- * \return The number of wait states of flash read accesses.
- */
-extern unsigned int flashc_get_wait_state(void);
-
-/*! \brief Sets the number of wait states of flash read accesses.
- *
- * \param wait_state The number of wait states of flash read accesses: \c 0 to
- *                   \c 1.
- */
-extern void flashc_set_wait_state(unsigned int wait_state);
-
-/*! \brief Tells whether the Flash Ready interrupt is enabled.
- *
- * \return Whether the Flash Ready interrupt is enabled.
- */
-extern Bool flashc_is_ready_int_enabled(void);
-
-/*! \brief Enables or disables the Flash Ready interrupt.
- *
- * \param enable Whether to enable the Flash Ready interrupt: \c TRUE or
- *               \c FALSE.
- */
-extern void flashc_enable_ready_int(Bool enable);
-
-/*! \brief Tells whether the Lock Error interrupt is enabled.
- *
- * \return Whether the Lock Error interrupt is enabled.
- */
-extern Bool flashc_is_lock_error_int_enabled(void);
-
-/*! \brief Enables or disables the Lock Error interrupt.
- *
- * \param enable Whether to enable the Lock Error interrupt: \c TRUE or
- *               \c FALSE.
- */
-extern void flashc_enable_lock_error_int(Bool enable);
-
-/*! \brief Tells whether the Programming Error interrupt is enabled.
- *
- * \return Whether the Programming Error interrupt is enabled.
- */
-extern Bool flashc_is_prog_error_int_enabled(void);
-
-/*! \brief Enables or disables the Programming Error interrupt.
- *
- * \param enable Whether to enable the Programming Error interrupt: \c TRUE or
- *               \c FALSE.
- */
-extern void flashc_enable_prog_error_int(Bool enable);
-
-//! @}
-
-
-/*! \name FLASHC Status
- */
-//! @{
-
-/*! \brief Tells whether the FLASHC is ready to run a new command.
- *
- * \return Whether the FLASHC is ready to run a new command.
- */
-extern Bool flashc_is_ready(void);
-
-/*! \brief Waits actively until the FLASHC is ready to run a new command.
- *
- * This is the default function assigned to \ref flashc_wait_until_ready.
- */
-extern void flashc_default_wait_until_ready(void);
-
-//! Pointer to the function used by the driver when it needs to wait until the
-//! FLASHC is ready to run a new command.
-//! The default function is \ref flashc_default_wait_until_ready.
-//! The user may change this pointer to use another implementation.
-extern void (*volatile flashc_wait_until_ready)(void);
-
-/*! \brief Tells whether a Lock Error has occurred during the last function
- *         called that issued one or more FLASHC commands.
- *
- * \return Whether a Lock Error has occurred during the last function called
- *         that issued one or more FLASHC commands.
- */
-extern Bool flashc_is_lock_error(void);
-
-/*! \brief Tells whether a Programming Error has occurred during the last
- *         function called that issued one or more FLASHC commands.
- *
- * \return Whether a Programming Error has occurred during the last function
- *         called that issued one or more FLASHC commands.
- */
-extern Bool flashc_is_programming_error(void);
-
-//! @}
-
-
-/*! \name FLASHC Command Control
- */
-//! @{
-
-/*! \brief Gets the last issued FLASHC command.
- *
- * \return The last issued FLASHC command.
- */
-extern unsigned int flashc_get_command(void);
-
-/*! \brief Gets the current FLASHC page number.
- *
- * \return The current FLASHC page number.
- */
-extern unsigned int flashc_get_page_number(void);
-
-/*! \brief Issues a FLASHC command.
- *
- * \param command The command: \c AVR32_FLASHC_FCMD_CMD_x.
- * \param page_number The page number to apply the command to:
- *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
- *        the flash array;
- *   \arg <tt>< 0</tt>: use this to apply the command to the current page number
- *        or if the command does not apply to any page number;
- *   \arg this argument may have other meanings according to the command. See
- *        the FLASHC chapter of the MCU datasheet.
- *
- * \warning A Lock Error is issued if the command violates the protection
- *          mechanism.
- *
- * \warning A Programming Error is issued if the command is invalid.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_issue_command(unsigned int command, int page_number);
-
-//! @}
-
-
-/*! \name FLASHC Global Commands
- */
-//! @{
-
-/*! \brief Issues a No Operation command to the FLASHC.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_no_operation(void);
-
-/*! \brief Issues an Erase All command to the FLASHC.
- *
- * This command erases all bits in the flash array, the general-purpose fuse
- * bits and the Security bit. The User page is not erased.
- *
- * This command also ensures that all volatile memories, such as register file
- * and RAMs, are erased before the Security bit is erased, i.e. deactivated.
- *
- * \warning A Lock Error is issued if at least one region is locked or the
- *          bootloader protection is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- */
-extern void flashc_erase_all(void);
-
-//! @}
-
-
-/*! \name FLASHC Protection Mechanisms
- */
-//! @{
-
-/*! \brief Tells whether the Security bit is active.
- *
- * \return Whether the Security bit is active.
- */
-extern Bool flashc_is_security_bit_active(void);
-
-/*! \brief Activates the Security bit.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_activate_security_bit(void);
-
-/*! \brief Gets the bootloader protected size.
- *
- * \return The bootloader protected size in bytes.
- */
-extern unsigned int flashc_get_bootloader_protected_size(void);
-
-/*! \brief Sets the bootloader protected size.
- *
- * \param bootprot_size The wanted bootloader protected size in bytes. If this
- *                      size is not supported, the actual size will be the
- *                      nearest greater available size or the maximal possible
- *                      size if the requested size is too large.
- *
- * \return The actual bootloader protected size in bytes.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size);
-
-/*! \brief Tells whether external privileged fetch is locked.
- *
- * \return Whether external privileged fetch is locked.
- */
-extern Bool flashc_is_external_privileged_fetch_locked(void);
-
-/*! \brief Locks or unlocks external privileged fetch.
- *
- * \param lock Whether to lock external privileged fetch: \c TRUE or \c FALSE.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_lock_external_privileged_fetch(Bool lock);
-
-/*! \brief Tells whether the region of a page is locked.
- *
- * \param page_number The page number:
- *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
- *        the flash array;
- *   \arg <tt>< 0</tt>: the current page number.
- *
- * \return Whether the region of the specified page is locked.
- */
-extern Bool flashc_is_page_region_locked(int page_number);
-
-/*! \brief Tells whether a region is locked.
- *
- * \param region The region number: \c 0 to <tt>(AVR32_FLASHC_REGIONS - 1)</tt>.
- *
- * \return Whether the specified region is locked.
- */
-extern Bool flashc_is_region_locked(unsigned int region);
-
-/*! \brief Locks or unlocks the region of a page.
- *
- * \param page_number The page number:
- *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
- *        the flash array;
- *   \arg <tt>< 0</tt>: the current page number.
- * \param lock Whether to lock the region of the specified page: \c TRUE or
- *             \c FALSE.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_lock_page_region(int page_number, Bool lock);
-
-/*! \brief Locks or unlocks a region.
- *
- * \param region The region number: \c 0 to <tt>(AVR32_FLASHC_REGIONS - 1)</tt>.
- * \param lock Whether to lock the specified region: \c TRUE or \c FALSE.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_lock_region(unsigned int region, Bool lock);
-
-/*! \brief Locks or unlocks all regions.
- *
- * \param lock Whether to lock the regions: \c TRUE or \c FALSE.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_lock_all_regions(Bool lock);
-
-//! @}
-
-
-/*! \name Access to General-Purpose Fuses
- */
-//! @{
-
-/*! \brief Reads a general-purpose fuse bit.
- *
- * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63.
- *
- * \return The value of the specified general-purpose fuse bit.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit);
-
-/*! \brief Reads a general-purpose fuse bit-field.
- *
- * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
- *            \c 63.
- * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
- *              \c 64.
- *
- * \return The value of the specified general-purpose fuse bit-field.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern U64 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width);
-
-/*! \brief Reads a general-purpose fuse byte.
- *
- * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7.
- *
- * \return The value of the specified general-purpose fuse byte.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte);
-
-/*! \brief Reads all general-purpose fuses.
- *
- * \return The value of all general-purpose fuses as a word.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern U64 flashc_read_all_gp_fuses(void);
-
-/*! \brief Erases a general-purpose fuse bit.
- *
- * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63.
- * \param check Whether to check erase: \c TRUE or \c FALSE.
- *
- * \return Whether the erase succeeded or always \c TRUE if erase check was not
- *         requested.
- *
- * \warning A Lock Error is issued if the Security bit is active and the command
- *          is applied to BOOTPROT or EPFL fuses.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check);
-
-/*! \brief Erases a general-purpose fuse bit-field.
- *
- * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
- *            \c 63.
- * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
- *              \c 64.
- * \param check Whether to check erase: \c TRUE or \c FALSE.
- *
- * \return Whether the erase succeeded or always \c TRUE if erase check was not
- *         requested.
- *
- * \warning A Lock Error is issued if the Security bit is active and the command
- *          is applied to BOOTPROT or EPFL fuses.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check);
-
-/*! \brief Erases a general-purpose fuse byte.
- *
- * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7.
- * \param check Whether to check erase: \c TRUE or \c FALSE.
- *
- * \return Whether the erase succeeded or always \c TRUE if erase check was not
- *         requested.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check);
-
-/*! \brief Erases all general-purpose fuses.
- *
- * \param check Whether to check erase: \c TRUE or \c FALSE.
- *
- * \return Whether the erase succeeded or always \c TRUE if erase check was not
- *         requested.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern Bool flashc_erase_all_gp_fuses(Bool check);
-
-/*! \brief Writes a general-purpose fuse bit.
- *
- * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63.
- * \param value The value of the specified general-purpose fuse bit.
- *
- * \warning A Lock Error is issued if the Security bit is active and the command
- *          is applied to BOOTPROT or EPFL fuses.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note A write operation can only clear bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value);
-
-/*! \brief Writes a general-purpose fuse bit-field.
- *
- * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
- *            \c 63.
- * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
- *              \c 64.
- * \param value The value of the specified general-purpose fuse bit-field.
- *
- * \warning A Lock Error is issued if the Security bit is active and the command
- *          is applied to BOOTPROT or EPFL fuses.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note A write operation can only clear bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value);
-
-/*! \brief Writes a general-purpose fuse byte.
- *
- * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7.
- * \param value The value of the specified general-purpose fuse byte.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note A write operation can only clear bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value);
-
-/*! \brief Writes all general-purpose fuses.
- *
- * \param value The value of all general-purpose fuses as a word.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note A write operation can only clear bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_write_all_gp_fuses(U64 value);
-
-/*! \brief Sets a general-purpose fuse bit with the appropriate erase and write
- *         operations.
- *
- * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63.
- * \param value The value of the specified general-purpose fuse bit.
- *
- * \warning A Lock Error is issued if the Security bit is active and the command
- *          is applied to BOOTPROT or EPFL fuses.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value);
-
-/*! \brief Sets a general-purpose fuse bit-field with the appropriate erase and
- *         write operations.
- *
- * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
- *            \c 63.
- * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
- *              \c 64.
- * \param value The value of the specified general-purpose fuse bit-field.
- *
- * \warning A Lock Error is issued if the Security bit is active and the command
- *          is applied to BOOTPROT or EPFL fuses.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value);
-
-/*! \brief Sets a general-purpose fuse byte with the appropriate erase and write
- *         operations.
- *
- * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7.
- * \param value The value of the specified general-purpose fuse byte.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value);
-
-/*! \brief Sets all general-purpose fuses with the appropriate erase and write
- *         operations.
- *
- * \param value The value of all general-purpose fuses as a word.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_set_all_gp_fuses(U64 value);
-
-//! @}
-
-
-/*! \name Access to Flash Pages
- */
-//! @{
-
-/*! \brief Clears the page buffer.
- *
- * This command resets all bits in the page buffer to one. Write accesses to the
- * page buffer can only change page buffer bits from one to zero.
- *
- * \warning The page buffer is not automatically reset after a page write.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_clear_page_buffer(void);
-
-/*! \brief Tells whether the page to which the last Quick Page Read or Quick
- *         Page Read User Page command was applied was erased.
- *
- * \return Whether the page to which the last Quick Page Read or Quick Page Read
- *         User Page command was applied was erased.
- */
-extern Bool flashc_is_page_erased(void);
-
-/*! \brief Applies the Quick Page Read command to a page.
- *
- * \param page_number The page number:
- *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
- *        the flash array;
- *   \arg <tt>< 0</tt>: the current page number.
- *
- * \return Whether the specified page is erased.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern Bool flashc_quick_page_read(int page_number);
-
-/*! \brief Erases a page.
- *
- * \param page_number The page number:
- *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
- *        the flash array;
- *   \arg <tt>< 0</tt>: the current page number.
- * \param check Whether to check erase: \c TRUE or \c FALSE.
- *
- * \return Whether the erase succeeded or always \c TRUE if erase check was not
- *         requested.
- *
- * \warning A Lock Error is issued if the command is applied to a page belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- */
-extern Bool flashc_erase_page(int page_number, Bool check);
-
-/*! \brief Erases all pages within the flash array.
- *
- * \param check Whether to check erase: \c TRUE or \c FALSE.
- *
- * \return Whether the erase succeeded or always \c TRUE if erase check was not
- *         requested.
- *
- * \warning A Lock Error is issued if at least one region is locked or the
- *          bootloader protection is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- */
-extern Bool flashc_erase_all_pages(Bool check);
-
-/*! \brief Writes a page from the page buffer.
- *
- * \param page_number The page number:
- *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
- *        the flash array;
- *   \arg <tt>< 0</tt>: the current page number.
- *
- * \warning A Lock Error is issued if the command is applied to a page belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \warning The page buffer is not automatically reset after a page write.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note A write operation can only clear bits.
- */
-extern void flashc_write_page(int page_number);
-
-/*! \brief Issues a Quick Page Read User Page command to the FLASHC.
- *
- * \return Whether the User page is erased.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern Bool flashc_quick_user_page_read(void);
-
-/*! \brief Erases the User page.
- *
- * \param check Whether to check erase: \c TRUE or \c FALSE.
- *
- * \return Whether the erase succeeded or always \c TRUE if erase check was not
- *         requested.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- */
-extern Bool flashc_erase_user_page(Bool check);
-
-/*! \brief Writes the User page from the page buffer.
- *
- * \warning The page buffer is not automatically reset after a page write.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note A write operation can only clear bits.
- */
-extern void flashc_write_user_page(void);
-
-/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
- *         from the repeated \a src source byte.
- *
- * The destination areas that are not within the flash array or the User page
- * are ignored.
- *
- * All pointer and size alignments are supported.
- *
- * \param dst Pointer to flash destination.
- * \param src Source byte.
- * \param nbytes Number of bytes to set.
- * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
- *
- * \return The value of \a dst.
- *
- * \warning This function may be called with \a erase set to \c FALSE only if
- *          the destination consists only of erased words, i.e. this function
- *          can not be used to write only one bit of a previously written word.
- *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
- *          resulting value in flash may be different from \c 0x00000000.
- *
- * \warning A Lock Error is issued if the command is applied to pages belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase);
-
-/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
- *         from the repeated \a src big-endian source half-word.
- *
- * The destination areas that are not within the flash array or the User page
- * are ignored.
- *
- * All pointer and size alignments are supported.
- *
- * \param dst Pointer to flash destination.
- * \param src Source half-word.
- * \param nbytes Number of bytes to set.
- * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
- *
- * \return The value of \a dst.
- *
- * \warning This function may be called with \a erase set to \c FALSE only if
- *          the destination consists only of erased words, i.e. this function
- *          can not be used to write only one bit of a previously written word.
- *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
- *          resulting value in flash may be different from \c 0x00000000.
- *
- * \warning A Lock Error is issued if the command is applied to pages belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase);
-
-/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
- *         from the repeated \a src big-endian source word.
- *
- * The destination areas that are not within the flash array or the User page
- * are ignored.
- *
- * All pointer and size alignments are supported.
- *
- * \param dst Pointer to flash destination.
- * \param src Source word.
- * \param nbytes Number of bytes to set.
- * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
- *
- * \return The value of \a dst.
- *
- * \warning This function may be called with \a erase set to \c FALSE only if
- *          the destination consists only of erased words, i.e. this function
- *          can not be used to write only one bit of a previously written word.
- *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
- *          resulting value in flash may be different from \c 0x00000000.
- *
- * \warning A Lock Error is issued if the command is applied to pages belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase);
-
-/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
- *         from the repeated \a src big-endian source double-word.
- *
- * The destination areas that are not within the flash array or the User page
- * are ignored.
- *
- * All pointer and size alignments are supported.
- *
- * \param dst Pointer to flash destination.
- * \param src Source double-word.
- * \param nbytes Number of bytes to set.
- * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
- *
- * \return The value of \a dst.
- *
- * \warning This function may be called with \a erase set to \c FALSE only if
- *          the destination consists only of erased words, i.e. this function
- *          can not be used to write only one bit of a previously written word.
- *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
- *          resulting value in flash may be different from \c 0x00000000.
- *
- * \warning A Lock Error is issued if the command is applied to pages belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase);
-
-/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
- *         from the repeated \a src big-endian source pattern.
- *
- * The destination areas that are not within the flash array or the User page
- * are ignored.
- *
- * All pointer and size alignments are supported.
- *
- * \param dst Pointer to flash destination.
- * \param src Source double-word.
- * \param src_width \a src width in bits: 8, 16, 32 or 64.
- * \param nbytes Number of bytes to set.
- * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
- *
- * \return The value of \a dst.
- *
- * \warning This function may be called with \a erase set to \c FALSE only if
- *          the destination consists only of erased words, i.e. this function
- *          can not be used to write only one bit of a previously written word.
- *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
- *          resulting value in flash may be different from \c 0x00000000.
- *
- * \warning A Lock Error is issued if the command is applied to pages belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-#define flashc_memset(dst, src, src_width, nbytes, erase) \
-          TPASTE2(flashc_memset, src_width)((dst), (src), (nbytes), (erase))
-
-/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
- *         from the source pointed to by \a src.
- *
- * The destination areas that are not within the flash array or the User page
- * are ignored.
- *
- * All pointer and size alignments are supported.
- *
- * \param dst Pointer to flash destination.
- * \param src Pointer to source data.
- * \param nbytes Number of bytes to copy.
- * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
- *
- * \return The value of \a dst.
- *
- * \warning If copying takes place between areas that overlap, the behavior is
- *          undefined.
- *
- * \warning This function may be called with \a erase set to \c FALSE only if
- *          the destination consists only of erased words, i.e. this function
- *          can not be used to write only one bit of a previously written word.
- *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
- *          resulting value in flash may be different from \c 0x00000000.
- *
- * \warning A Lock Error is issued if the command is applied to pages belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase);
-
-#if UC3C
-
-/*! \brief Depednding to the CPU frequency, set the wait states of flash read
- *         accesses and enable or disable the High speed read mode.
- *
- * \param cpu_f_hz The CPU frequency
- */
-void flashc_set_flash_waitstate_and_readmode(unsigned long cpu_f_hz);
-#endif // UC3C device-specific implementation
-
-//! @}
-
-
-#endif  // _FLASHC_H_
diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.c
deleted file mode 100644
index b6b83c7..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.c
+++ /dev/null
@@ -1,458 +0,0 @@
-/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief GPIO driver for AVR32 UC3.
- *
- * This file defines a useful set of functions for the GPIO.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with a GPIO module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- *****************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#include "gpio.h"
-
-//! GPIO module instance.
-#define GPIO  AVR32_GPIO
-
-
-/*! \name Peripheral Bus Interface
- */
-//! @{
-
-
-int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size)
-{
-  int status = GPIO_SUCCESS;
-  unsigned int i;
-
-  for (i = 0; i < size; i++)
-  {
-    status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function);
-    gpiomap++;
-  }
-
-  return status;
-}
-
-
-int gpio_enable_module_pin(unsigned int pin, unsigned int function)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  // Enable the correct function.
-  switch (function)
-  {
-  case 0: // A function.
-    gpio_port->pmr0c = 1 << (pin & 0x1F);
-    gpio_port->pmr1c = 1 << (pin & 0x1F);
-#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-    gpio_port->pmr2c = 1 << (pin & 0x1F);
-#endif
-    break;
-
-  case 1: // B function.
-    gpio_port->pmr0s = 1 << (pin & 0x1F);
-    gpio_port->pmr1c = 1 << (pin & 0x1F);
-#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-    gpio_port->pmr2c = 1 << (pin & 0x1F);
-#endif
-    break;
-
-  case 2: // C function.
-    gpio_port->pmr0c = 1 << (pin & 0x1F);
-    gpio_port->pmr1s = 1 << (pin & 0x1F);
-#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-    gpio_port->pmr2c = 1 << (pin & 0x1F);
-#endif
-    break;
-
-  case 3: // D function.
-    gpio_port->pmr0s = 1 << (pin & 0x1F);
-    gpio_port->pmr1s = 1 << (pin & 0x1F);
-#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-    gpio_port->pmr2c = 1 << (pin & 0x1F);
-#endif
-    break;
-
-#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-  case 4: // E function.
-    gpio_port->pmr0c = 1 << (pin & 0x1F);
-    gpio_port->pmr1c = 1 << (pin & 0x1F);
-    gpio_port->pmr2s = 1 << (pin & 0x1F);
-    break;
-    
-  case 5: // F function.
-    gpio_port->pmr0s = 1 << (pin & 0x1F);
-    gpio_port->pmr1c = 1 << (pin & 0x1F);
-    gpio_port->pmr2s = 1 << (pin & 0x1F);
-    break;
-    
-  case 6: // G function.
-    gpio_port->pmr0c = 1 << (pin & 0x1F);
-    gpio_port->pmr1s = 1 << (pin & 0x1F);
-    gpio_port->pmr2s = 1 << (pin & 0x1F);
-    break;
-    
-  case 7: // H function.
-    gpio_port->pmr0s = 1 << (pin & 0x1F);
-    gpio_port->pmr1s = 1 << (pin & 0x1F);
-    gpio_port->pmr2s = 1 << (pin & 0x1F);
-    break;
-#endif
-
-  default:
-    return GPIO_INVALID_ARGUMENT;
-  }
-
-  // Disable GPIO control.
-  gpio_port->gperc = 1 << (pin & 0x1F);
-
-  return GPIO_SUCCESS;
-}
-
-
-void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size)
-{
-  unsigned int i;
-
-  for (i = 0; i < size; i++)
-  {
-    gpio_enable_gpio_pin(gpiomap->pin);
-    gpiomap++;
-  }
-}
-
-
-void gpio_enable_gpio_pin(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->oderc = 1 << (pin & 0x1F);
-  gpio_port->gpers = 1 << (pin & 0x1F);
-}
-
-
-// The open-drain mode is not synthesized on the current AVR32 products.
-// If one day some AVR32 products have this feature, the corresponding part
-// numbers should be listed in the #if below.
-// Note that other functions are available in this driver to use pins with open
-// drain in GPIO mode. The advantage of the open-drain mode functions over these
-// other functions is that they can be used not only in GPIO mode but also in
-// module mode.
-#if 0
-
-
-void gpio_enable_pin_open_drain(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->odmers = 1 << (pin & 0x1F);
-}
-
-
-void gpio_disable_pin_open_drain(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->odmerc = 1 << (pin & 0x1F);
-}
-
-
-#endif
-
-
-void gpio_enable_pin_pull_up(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->puers = 1 << (pin & 0x1F);
-#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-  gpio_port->pderc = 1 << (pin & 0x1F);
-#endif
-}
-
-
-void gpio_disable_pin_pull_up(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->puerc = 1 << (pin & 0x1F);
-}
-
-#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control.
-
-/*! \brief Enables the pull-down resistor of a pin.
- *
- * \param pin The pin number.
- */
-void gpio_enable_pin_pull_down(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->puerc = 1 << (pin & 0x1F);
-  gpio_port->pders = 1 << (pin & 0x1F);
-}
-
-/*! \brief Disables the pull-down resistor of a pin.
- *
- * \param pin The pin number.
- */
-void gpio_disable_pin_pull_down(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->pderc = 1 << (pin & 0x1F);
-}
-
-/*! \brief Enables the buskeeper functionality on a pin.
- *
- * \param pin The pin number.
- */
-void gpio_enable_pin_buskeeper(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->puers = 1 << (pin & 0x1F);
-  gpio_port->pders = 1 << (pin & 0x1F);
-}
-
-/*! \brief Disables the buskeeper functionality on a pin.
- *
- * \param pin The pin number.
- */
-void gpio_disable_pin_buskeeper(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->puerc = 1 << (pin & 0x1F);
-  gpio_port->pderc = 1 << (pin & 0x1F);
-}
-
-#endif
-
-int gpio_get_pin_value(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  return (gpio_port->pvr >> (pin & 0x1F)) & 1;
-}
-
-
-int gpio_get_gpio_pin_output_value(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  return (gpio_port->ovr >> (pin & 0x1F)) & 1;
-}
-
-
-int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  return ((gpio_port->oder >> (pin & 0x1F)) & 1) ^ 1;
-}
-
-
-void gpio_set_gpio_pin(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  gpio_port->ovrs  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1.
-  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
-  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
-}
-
-
-void gpio_clr_gpio_pin(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
-  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
-  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
-}
-
-
-void gpio_tgl_gpio_pin(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  gpio_port->ovrt  = 1 << (pin & 0x1F); // Toggle the I/O line.
-  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
-  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
-}
-
-
-void gpio_set_gpio_open_drain_pin(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  gpio_port->oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin.
-  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
-}
-
-
-void gpio_clr_gpio_open_drain_pin(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
-  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
-  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
-}
-
-
-void gpio_tgl_gpio_open_drain_pin(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line if the GPIO output driver is enabled: 0.
-  gpio_port->odert = 1 << (pin & 0x1F); // The GPIO output driver is toggled for that pin.
-  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
-}
-
-
-void gpio_enable_pin_glitch_filter(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->gfers = 1 << (pin & 0x1F);
-}
-
-
-void gpio_disable_pin_glitch_filter(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->gferc = 1 << (pin & 0x1F);
-}
-
-/*! \brief Configure the edge detector of an input pin
- *
- * \param pin The pin number.
- * \param mode The edge detection mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE
- *             or \ref GPIO_FALLING_EDGE).
- *
- * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
- */
-static int gpio_configure_edge_detector(unsigned int pin, unsigned int mode)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  
-  // Configure the edge detector.
-  switch (mode)
-  {
-  case GPIO_PIN_CHANGE:
-    gpio_port->imr0c = 1 << (pin & 0x1F);
-    gpio_port->imr1c = 1 << (pin & 0x1F);
-    break;
-
-  case GPIO_RISING_EDGE:
-    gpio_port->imr0s = 1 << (pin & 0x1F);
-    gpio_port->imr1c = 1 << (pin & 0x1F);
-    break;
-
-  case GPIO_FALLING_EDGE:
-    gpio_port->imr0c = 1 << (pin & 0x1F);
-    gpio_port->imr1s = 1 << (pin & 0x1F);
-    break;
-
-  default:
-    return GPIO_INVALID_ARGUMENT;
-  }
-
-  return GPIO_SUCCESS;
-}
-
-
-int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode)
-{
-  volatile avr32_gpio_port_t  *gpio_port = &GPIO.port[pin >> 5];
-
-  // Enable the glitch filter.
-  gpio_port->gfers = 1 << (pin & 0x1F);
-
-  // Configure the edge detector.
-  if(GPIO_INVALID_ARGUMENT == gpio_configure_edge_detector(pin, mode))
-    return(GPIO_INVALID_ARGUMENT);
-
-  // Enable interrupt.
-  gpio_port->iers = 1 << (pin & 0x1F);
-
-  return GPIO_SUCCESS;
-}
-
-
-void gpio_disable_pin_interrupt(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->ierc = 1 << (pin & 0x1F);
-}
-
-
-int gpio_get_pin_interrupt_flag(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  return (gpio_port->ifr >> (pin & 0x1F)) & 1;
-}
-
-
-void gpio_clear_pin_interrupt_flag(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->ifrc = 1 << (pin & 0x1F);
-}
-
-
-//#
-//# Peripheral Event System Support.
-//#
-#if UC3L
-int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  if(TRUE == use_igf)
-  {
-    // Enable the glitch filter.
-    gpio_port->gfers = 1 << (pin & 0x1F);
-  }
-  else
-  {
-    // Disable the glitch filter.
-    gpio_port->gferc = 1 << (pin & 0x1F);
-  }
-
-  // Configure the edge detector.
-  return(gpio_configure_edge_detector(pin, mode));
-}
-
-#endif
-
-//! @}
diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.h
deleted file mode 100644
index f0b5fd8..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.h
+++ /dev/null
@@ -1,583 +0,0 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief GPIO header for AVR32 UC3.
- *
- * This file contains basic GPIO driver functions.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with a GPIO module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- *****************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _GPIO_H_
-#define _GPIO_H_
-
-#include <avr32/io.h>
-#include "compiler.h"
-
-/*! \name Return Values of the GPIO API
- */
-//! @{
-#define GPIO_SUCCESS            0 //!< Function successfully completed.
-#define GPIO_INVALID_ARGUMENT   1 //!< Input parameters are out of range.
-//! @}
-
-
-/*! \name Interrupt Trigger Modes
- */
-//! @{
-#define GPIO_PIN_CHANGE         0 //!< Interrupt triggered upon pin change.
-#define GPIO_RISING_EDGE        1 //!< Interrupt triggered upon rising edge.
-#define GPIO_FALLING_EDGE       2 //!< Interrupt triggered upon falling edge.
-//! @}
-
-
-//! A type definition of pins and modules connectivity.
-typedef struct
-{
-  unsigned char pin;              //!< Module pin.
-  unsigned char function;         //!< Module function.
-} gpio_map_t[];
-
-
-/*! \name Peripheral Bus Interface
- *
- * Low-speed interface with a non-deterministic number of clock cycles per
- * access.
- *
- * This interface operates with lower clock frequencies (fPB <= fCPU), and its
- * timing is not deterministic since it needs to access a shared bus which may
- * be heavily loaded.
- *
- * \note This interface is immediately available without initialization.
- */
-//! @{
-
-/*! \brief Enables specific module modes for a set of pins.
- *
- * \param gpiomap The pin map.
- * \param size The number of pins in \a gpiomap.
- *
- * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
- */
-extern int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size);
-
-/*! \brief Enables a specific module mode for a pin.
- *
- * \param pin The pin number.\n
- *            Refer to the product header file `uc3x.h' (where x is the part
- *            number; e.g. x = a0512) for module pins. E.g., to enable a PWM
- *            channel output, the pin number can be AVR32_PWM_3_PIN for PWM
- *            channel 3.
- * \param function The pin function.\n
- *                 Refer to the product header file `uc3x.h' (where x is the
- *                 part number; e.g. x = a0512) for module pin functions. E.g.,
- *                 to enable a PWM channel output, the pin function can be
- *                 AVR32_PWM_3_FUNCTION for PWM channel 3.
- *
- * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
- */
-extern int gpio_enable_module_pin(unsigned int pin, unsigned int function);
-
-/*! \brief Enables the GPIO mode of a set of pins.
- *
- * \param gpiomap The pin map.
- * \param size The number of pins in \a gpiomap.
- */
-extern void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size);
-
-/*! \brief Enables the GPIO mode of a pin.
- *
- * \param pin The pin number.\n
- *            Refer to the product header file `uc3x.h' (where x is the part
- *            number; e.g. x = a0512) for pin definitions. E.g., to enable the
- *            GPIO mode of PX21, AVR32_PIN_PX21 can be used. Module pins such as
- *            AVR32_PWM_3_PIN for PWM channel 3 can also be used to release
- *            module pins for GPIO.
- */
-extern void gpio_enable_gpio_pin(unsigned int pin);
-
-// The open-drain mode is not synthesized on the current AVR32 products.
-// If one day some AVR32 products have this feature, the corresponding part
-// numbers should be listed in the #if below.
-// Note that other functions are available in this driver to use pins with open
-// drain in GPIO mode. The advantage of the open-drain mode functions over these
-// other functions is that they can be used not only in GPIO mode but also in
-// module mode.
-#if 0
-
-/*! \brief Enables the open-drain mode of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_enable_pin_open_drain(unsigned int pin);
-
-/*! \brief Disables the open-drain mode of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_disable_pin_open_drain(unsigned int pin);
-
-#endif
-
-/*! \brief Enables the pull-up resistor of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_enable_pin_pull_up(unsigned int pin);
-
-/*! \brief Disables the pull-up resistor of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_disable_pin_pull_up(unsigned int pin);
-
-#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control.
-
-/*! \brief Enables the pull-down resistor of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_enable_pin_pull_down(unsigned int pin);
-
-/*! \brief Disables the pull-down resistor of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_disable_pin_pull_down(unsigned int pin);
-
-/*! \brief Enables the buskeeper functionality on a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_enable_pin_buskeeper(unsigned int pin);
-
-/*! \brief Disables the buskeeper functionality on a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_disable_pin_buskeeper(unsigned int pin);
-
-#endif
-
-/*! \brief Returns the value of a pin.
- *
- * \param pin The pin number.
- *
- * \return The pin value.
- */
-extern int gpio_get_pin_value(unsigned int pin);
-
-/*! \brief Returns the output value set for a GPIO pin.
- *
- * \param pin The pin number.
- *
- * \return The pin output value.
- *
- * \note This function must be used in conjunction with \ref gpio_set_gpio_pin,
- *       \ref gpio_clr_gpio_pin and \ref gpio_tgl_gpio_pin.
- */
-extern int gpio_get_gpio_pin_output_value(unsigned int pin);
-
-/*! \brief Returns the output value set for a GPIO pin using open drain.
- *
- * \param pin The pin number.
- *
- * \return The pin output value.
- *
- * \note This function must be used in conjunction with
- *       \ref gpio_set_gpio_open_drain_pin, \ref gpio_clr_gpio_open_drain_pin
- *       and \ref gpio_tgl_gpio_open_drain_pin.
- */
-extern int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin);
-
-/*! \brief Drives a GPIO pin to 1.
- *
- * \param pin The pin number.
- */
-extern void gpio_set_gpio_pin(unsigned int pin);
-
-/*! \brief Drives a GPIO pin to 0.
- *
- * \param pin The pin number.
- */
-extern void gpio_clr_gpio_pin(unsigned int pin);
-
-/*! \brief Toggles a GPIO pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_tgl_gpio_pin(unsigned int pin);
-
-/*! \brief Drives a GPIO pin to 1 using open drain.
- *
- * \param pin The pin number.
- */
-extern void gpio_set_gpio_open_drain_pin(unsigned int pin);
-
-/*! \brief Drives a GPIO pin to 0 using open drain.
- *
- * \param pin The pin number.
- */
-extern void gpio_clr_gpio_open_drain_pin(unsigned int pin);
-
-/*! \brief Toggles a GPIO pin using open drain.
- *
- * \param pin The pin number.
- */
-extern void gpio_tgl_gpio_open_drain_pin(unsigned int pin);
-
-/*! \brief Enables the glitch filter of a pin.
- *
- * When the glitch filter is enabled, a glitch with duration of less than 1
- * clock cycle is automatically rejected, while a pulse with duration of 2 clock
- * cycles or more is accepted. For pulse durations between 1 clock cycle and 2
- * clock cycles, the pulse may or may not be taken into account, depending on
- * the precise timing of its occurrence. Thus for a pulse to be guaranteed
- * visible it must exceed 2 clock cycles, whereas for a glitch to be reliably
- * filtered out, its duration must not exceed 1 clock cycle. The filter
- * introduces 2 clock cycles latency.
- *
- * \param pin The pin number.
- */
-extern void gpio_enable_pin_glitch_filter(unsigned int pin);
-
-/*! \brief Disables the glitch filter of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_disable_pin_glitch_filter(unsigned int pin);
-
-/*! \brief Enables the interrupt of a pin with the specified settings.
- *
- * \param pin The pin number.
- * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or
- *             \ref GPIO_FALLING_EDGE).
- *
- * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
- */
-extern int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode);
-
-/*! \brief Disables the interrupt of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_disable_pin_interrupt(unsigned int pin);
-
-/*! \brief Gets the interrupt flag of a pin.
- *
- * \param pin The pin number.
- *
- * \return The pin interrupt flag.
- */
-extern int gpio_get_pin_interrupt_flag(unsigned int pin);
-
-/*! \brief Clears the interrupt flag of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_clear_pin_interrupt_flag(unsigned int pin);
-
-//! @}
-
-
-#if (defined AVR32_GPIO_LOCAL_ADDRESS)
-/*! \name Local Bus Interface
- *
- * High-speed interface with only one clock cycle per access.
- *
- * This interface operates with high clock frequency (fCPU), and its timing is
- * deterministic since it does not need to access a shared bus which may be
- * heavily loaded.
- *
- * \warning To use this interface, the clock frequency of the peripheral bus on
- *          which the GPIO peripheral is connected must be set to the CPU clock
- *          frequency (fPB = fCPU).
- *
- * \note This interface has to be initialized in order to be available.
- */
-//! @{
-
-/*! \brief Enables the local bus interface for GPIO.
- *
- * \note This function must have been called at least once before using other
- *       functions in this interface.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_init(void)
-{
-  Set_system_register(AVR32_CPUCR,
-                      Get_system_register(AVR32_CPUCR) | AVR32_CPUCR_LOCEN_MASK);
-}
-
-/*! \brief Enables the output driver of a pin.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init must have been called beforehand.
- *
- * \note This function does not enable the GPIO mode of the pin.
- *       \ref gpio_enable_gpio_pin can be called for this purpose.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_enable_pin_output_driver(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F);
-}
-
-/*! \brief Disables the output driver of a pin.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init must have been called beforehand.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_disable_pin_output_driver(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F);
-}
-
-/*! \brief Returns the value of a pin.
- *
- * \param pin The pin number.
- *
- * \return The pin value.
- *
- * \note \ref gpio_local_init must have been called beforehand.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int gpio_local_get_pin_value(unsigned int pin)
-{
-  return (AVR32_GPIO_LOCAL.port[pin >> 5].pvr >> (pin & 0x1F)) & 1;
-}
-
-/*! \brief Drives a GPIO pin to 1.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init must have been called beforehand.
- *
- * \note This function does not enable the GPIO mode of the pin nor its output
- *       driver. \ref gpio_enable_gpio_pin and
- *       \ref gpio_local_enable_pin_output_driver can be called for this
- *       purpose.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_set_gpio_pin(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].ovrs = 1 << (pin & 0x1F);
-}
-
-/*! \brief Drives a GPIO pin to 0.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init must have been called beforehand.
- *
- * \note This function does not enable the GPIO mode of the pin nor its output
- *       driver. \ref gpio_enable_gpio_pin and
- *       \ref gpio_local_enable_pin_output_driver can be called for this
- *       purpose.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_clr_gpio_pin(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F);
-}
-
-/*! \brief Toggles a GPIO pin.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init must have been called beforehand.
- *
- * \note This function does not enable the GPIO mode of the pin nor its output
- *       driver. \ref gpio_enable_gpio_pin and
- *       \ref gpio_local_enable_pin_output_driver can be called for this
- *       purpose.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_tgl_gpio_pin(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].ovrt = 1 << (pin & 0x1F);
-}
-
-/*! \brief Initializes the configuration of a GPIO pin so that it can be used
- *         with GPIO open-drain functions.
- *
- * \note This function must have been called at least once before using
- *       \ref gpio_local_set_gpio_open_drain_pin,
- *       \ref gpio_local_clr_gpio_open_drain_pin or
- *       \ref gpio_local_tgl_gpio_open_drain_pin.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_init_gpio_open_drain_pin(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F);
-}
-
-/*! \brief Drives a GPIO pin to 1 using open drain.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must
- *       have been called beforehand.
- *
- * \note This function does not enable the GPIO mode of the pin.
- *       \ref gpio_enable_gpio_pin can be called for this purpose.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_set_gpio_open_drain_pin(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F);
-}
-
-/*! \brief Drives a GPIO pin to 0 using open drain.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must
- *       have been called beforehand.
- *
- * \note This function does not enable the GPIO mode of the pin.
- *       \ref gpio_enable_gpio_pin can be called for this purpose.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_clr_gpio_open_drain_pin(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F);
-}
-
-/*! \brief Toggles a GPIO pin using open drain.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must
- *       have been called beforehand.
- *
- * \note This function does not enable the GPIO mode of the pin.
- *       \ref gpio_enable_gpio_pin can be called for this purpose.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_tgl_gpio_open_drain_pin(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].odert = 1 << (pin & 0x1F);
-}
-
-//! @}
-#endif // AVR32_GPIO_LOCAL_ADDRESS
-
-#if UC3L
-//! @{
-/*! \name Peripheral Event System support
- *
- * The GPIO can be programmed to output peripheral events whenever an interrupt
- * condition is detected, such as pin value change, or only when a rising or
- * falling edge is detected.
- *
- */
-
-/*! \brief Enables the peripheral event generation of a pin.
- *
- * \param pin The pin number.
- *
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_enable_pin_periph_event(unsigned int pin)
-{
-  AVR32_GPIO.port[pin >> 5].oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin.
-  AVR32_GPIO.port[pin >> 5].evers = 1 << (pin & 0x1F);
-}
-
-/*! \brief Disables the peripheral event generation of a pin.
- *
- * \param pin The pin number.
- *
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_disable_pin_periph_event(unsigned int pin)
-{
-  AVR32_GPIO.port[pin >> 5].everc = 1 << (pin & 0x1F);
-}
-
-/*! \brief Configure the peripheral event trigger mode of a pin
- *
- * \param pin The pin number.
- * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or
- *             \ref GPIO_FALLING_EDGE).
- * \param use_igf use the Input Glitch Filter (TRUE) or not (FALSE).
- *
- * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
- */
-extern int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf);
-
-//! @}
-#endif
-
-
-#endif  // _GPIO_H_
diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/exception.x b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/exception.x
deleted file mode 100644
index ec4109d..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/exception.x
+++ /dev/null
@@ -1,239 +0,0 @@
-/* This file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief Exception and interrupt vectors.
- *
- * This file maps all events supported by an AVR32.
- *
- * - Compiler:           GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with an INTC module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#if !__AVR32_UC__ && !__AVR32_AP__
-  #error Implementation of the AVR32 architecture not supported by the INTC driver.
-#endif
-
-
-#include <avr32/io.h>
-
-
-//! @{
-//! \verbatim
-
-
-  .section  .exception, "ax", @progbits
-
-
-// Start of Exception Vector Table.
-
-  // EVBA must be aligned with a power of two strictly greater than the EVBA-
-  // relative offset of the last vector.
-  .balign 0x200
-
-  // Export symbol.
-  .global _evba
-  .type _evba, @function
-_evba:
-
-        .org  0x000
-        // Unrecoverable Exception.
-_handle_Unrecoverable_Exception:
-        rjmp $
-
-        .org  0x004
-        // TLB Multiple Hit.
-_handle_TLB_Multiple_Hit:
-        rjmp $
-
-        .org  0x008
-        // Bus Error Data Fetch.
-_handle_Bus_Error_Data_Fetch:
-        rjmp $
-
-        .org  0x00C
-         // Bus Error Instruction Fetch.
-_handle_Bus_Error_Instruction_Fetch:
-        rjmp $
-
-        .org  0x010
-        // NMI.
-_handle_NMI:
-        rjmp $
-
-        .org  0x014
-        // Instruction Address.
-_handle_Instruction_Address:
-        rjmp $
-
-        .org  0x018
-        // ITLB Protection.
-_handle_ITLB_Protection:
-        rjmp $
-
-        .org  0x01C
-        // Breakpoint.
-_handle_Breakpoint:
-        rjmp $
-
-        .org  0x020
-        // Illegal Opcode.
-_handle_Illegal_Opcode:
-        rjmp $
-
-        .org  0x024
-        // Unimplemented Instruction.
-_handle_Unimplemented_Instruction:
-        rjmp $
-
-        .org  0x028
-        // Privilege Violation.
-_handle_Privilege_Violation:
-        rjmp $
-
-        .org  0x02C
-        // Floating-Point: UNUSED IN AVR32UC and AVR32AP.
-_handle_Floating_Point:
-        rjmp $
-
-        .org  0x030
-        // Coprocessor Absent: UNUSED IN AVR32UC.
-_handle_Coprocessor_Absent:
-        rjmp $
-
-        .org  0x034
-        // Data Address (Read).
-_handle_Data_Address_Read:
-        rjmp $
-
-        .org  0x038
-        // Data Address (Write).
-_handle_Data_Address_Write:
-        rjmp $
-
-        .org  0x03C
-        // DTLB Protection (Read).
-_handle_DTLB_Protection_Read:
-        rjmp $
-
-        .org  0x040
-        // DTLB Protection (Write).
-_handle_DTLB_Protection_Write:
-        rjmp $
-
-        .org  0x044
-        // DTLB Modified: UNUSED IN AVR32UC.
-_handle_DTLB_Modified:
-        rjmp $
-
-        .org  0x050
-        // ITLB Miss.
-_handle_ITLB_Miss:
-        rjmp $
-
-        .org  0x060
-        // DTLB Miss (Read).
-_handle_DTLB_Miss_Read:
-        rjmp $
-
-        .org  0x070
-        // DTLB Miss (Write).
-_handle_DTLB_Miss_Write:
-        rjmp $
-
-        .org  0x100
-        // Supervisor Call.
-_handle_Supervisor_Call:
-        rjmp $
-
-
-// Interrupt support.
-// The interrupt controller must provide the offset address relative to EVBA.
-// Important note:
-//   All interrupts call a C function named _get_interrupt_handler.
-//   This function will read group and interrupt line number to then return in
-//   R12 a pointer to a user-provided interrupt handler.
-
-  .balign 4
-
-  .irp    priority, 0, 1, 2, 3
-_int\priority:
-#if __AVR32_UC__
-  // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
-  // CPU upon interrupt entry. No other register is saved by hardware.
-#elif __AVR32_AP__
-  // PC and SR are automatically saved in respectively RAR_INTx and RSR_INTx by
-  // the CPU upon interrupt entry. No other register is saved by hardware.
-  pushm   r8-r12, lr
-#endif
-  mov     r12, \priority  // Pass the int_level parameter to the _get_interrupt_handler function.
-  call    _get_interrupt_handler
-  cp.w    r12, 0          // Get the pointer to the interrupt handler returned by the function.
-#if __AVR32_UC__
-  movne   pc, r12         // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
-#elif __AVR32_AP__
-  breq    spint\priority  // If this was a spurious interrupt (R12 == NULL), branch.
-  st.w    --sp, r12       // Push the pointer to the interrupt handler onto the system stack since no register may be altered.
-  popm    r8-r12, lr, pc  // Restore registers and jump to the handler.
-spint\priority:
-  popm    r8-r12, lr
-#endif
-  rete                    // If this was a spurious interrupt (R12 == NULL), return from event handler.
-  .endr
-
-
-// Constant data area.
-
-  .balign 4
-
-  // Values to store in the interrupt priority registers for the various interrupt priority levels.
-  // The interrupt priority registers contain the interrupt priority level and
-  // the EVBA-relative interrupt vector offset.
-  .global ipr_val
-  .type ipr_val, @object
-ipr_val:
-  .word (AVR32_INTC_INT0 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int0 - _evba),\
-        (AVR32_INTC_INT1 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int1 - _evba),\
-        (AVR32_INTC_INT2 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int2 - _evba),\
-        (AVR32_INTC_INT3 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int3 - _evba)
-
-
-//! \endverbatim
-//! @}
diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.c
deleted file mode 100644
index 84d498d..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.c
+++ /dev/null
@@ -1,214 +0,0 @@
-/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief INTC driver for AVR32 UC3.
- *
- * AVR32 Interrupt Controller driver module.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with an INTC module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#include <avr32/io.h>
-#include "compiler.h"
-#include "preprocessor.h"
-#include "intc.h"
-
-// define _evba from exception.S
-extern void _evba;
-
-//! Values to store in the interrupt priority registers for the various interrupt priority levels.
-extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS];
-
-//! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space.
-//! Each line handler table contains a set of pointers to interrupt handlers.
-#if (defined __GNUC__)
-#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \
-static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];
-#elif (defined __ICCAVR32__)
-#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \
-static volatile __no_init __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];
-#endif
-MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~);
-#undef DECL_INT_LINE_HANDLER_TABLE
-
-//! Table containing for each interrupt group the number of interrupt request
-//! lines and a pointer to the table of interrupt line handlers.
-static const struct
-{
-  unsigned int num_irqs;
-  volatile __int_handler *_int_line_handler_table;
-} _int_handler_table[AVR32_INTC_NUM_INT_GRPS] =
-{
-#define INSERT_INT_LINE_HANDLER_TABLE(GRP, unused) \
-  {AVR32_INTC_NUM_IRQS_PER_GRP##GRP, _int_line_handler_table_##GRP},
-  MREPEAT(AVR32_INTC_NUM_INT_GRPS, INSERT_INT_LINE_HANDLER_TABLE, ~)
-#undef INSERT_INT_LINE_HANDLER_TABLE
-};
-
-
-/*! \brief Default interrupt handler.
- *
- * \note Taken and adapted from Newlib.
- */
-#if (defined __GNUC__)
-__attribute__((__interrupt__))
-#elif (defined __ICCAVR32__)
-__interrupt
-#endif
-static void _unhandled_interrupt(void)
-{
-  // Catch unregistered interrupts.
-  while (TRUE);
-}
-
-
-/*! \brief Gets the interrupt handler of the current event at the \a int_level
- *         interrupt priority level (called from exception.S).
- *
- * \param int_level Interrupt priority level to handle.
- *
- * \return Interrupt handler to execute.
- *
- * \note Taken and adapted from Newlib.
- */
-__int_handler _get_interrupt_handler(unsigned int int_level)
-{
-  // ICR3 is mapped first, ICR0 last.
-  // Code in exception.S puts int_level in R12 which is used by AVR32-GCC to
-  // pass a single argument to a function.
-  unsigned int int_grp = AVR32_INTC.icr[AVR32_INTC_INT3 - int_level];
-  unsigned int int_req = AVR32_INTC.irr[int_grp];
-
-  // As an interrupt may disappear while it is being fetched by the CPU
-  // (spurious interrupt caused by a delayed response from an MCU peripheral to
-  // an interrupt flag clear or interrupt disable instruction), check if there
-  // are remaining interrupt lines to process.
-  // If a spurious interrupt occurs, the status register (SR) contains an
-  // execution mode and interrupt level masks corresponding to a level 0
-  // interrupt, whatever the interrupt priority level causing the spurious
-  // event. This behavior has been chosen because a spurious interrupt has not
-  // to be a priority one and because it may not cause any trouble to other
-  // interrupts.
-  // However, these spurious interrupts place the hardware in an unstable state
-  // and could give problems in other/future versions of the CPU, so the
-  // software has to be written so that they never occur. The only safe way of
-  // achieving this is to always clear or disable peripheral interrupts with the
-  // following sequence:
-  // 1: Mask the interrupt in the CPU by setting GM (or IxM) in SR.
-  // 2: Perform the bus access to the peripheral register that clears or
-  //    disables the interrupt.
-  // 3: Wait until the interrupt has actually been cleared or disabled by the
-  //    peripheral. This is usually performed by reading from a register in the
-  //    same peripheral (it DOES NOT have to be the same register that was
-  //    accessed in step 2, but it MUST be in the same peripheral), what takes
-  //    bus system latencies into account, but peripheral internal latencies
-  //    (generally 0 cycle) also have to be considered.
-  // 4: Unmask the interrupt in the CPU by clearing GM (or IxM) in SR.
-  // Note that steps 1 and 4 are useless inside interrupt handlers as the
-  // corresponding interrupt level is automatically masked by IxM (unless IxM is
-  // explicitly cleared by the software).
-  //
-  // Get the right IRQ handler.
-  //
-  // If several interrupt lines are active in the group, the interrupt line with
-  // the highest number is selected. This is to be coherent with the
-  // prioritization of interrupt groups performed by the hardware interrupt
-  // controller.
-  //
-  // If no handler has been registered for the pending interrupt,
-  // _unhandled_interrupt will be selected thanks to the initialization of
-  // _int_line_handler_table_x by INTC_init_interrupts.
-  //
-  // exception.S will provide the interrupt handler with a clean interrupt stack
-  // frame, with nothing more pushed onto the stack. The interrupt handler must
-  // manage the `rete' instruction, what can be done thanks to pure assembly,
-  // inline assembly or the `__attribute__((__interrupt__))' C function
-  // attribute.
-  return (int_req) ? _int_handler_table[int_grp]._int_line_handler_table[32 - clz(int_req) - 1] : NULL;
-}
-
-//! Init EVBA address. This sequence might also be done in the UTILS/STARTUP/GCC/crt0.S
-static __inline__ void INTC_init_evba(void)
-{
-  Set_system_register(AVR32_EVBA, (int)&_evba );
-}
-
-void INTC_init_interrupts(void)
-{
-  unsigned int int_grp, int_req;
-
-  INTC_init_evba();
-
-  // For all interrupt groups,
-  for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++)
-  {
-    // For all interrupt request lines of each group,
-    for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++)
-    {
-      // Assign _unhandled_interrupt as default interrupt handler.
-      _int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt;
-    }
-
-    // Set the interrupt group priority register to its default value.
-    // By default, all interrupt groups are linked to the interrupt priority
-    // level 0 and to the interrupt vector _int0.
-    AVR32_INTC.ipr[int_grp] = ipr_val[AVR32_INTC_INT0];
-  }
-}
-
-
-void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level)
-{
-  // Determine the group of the IRQ.
-  unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP;
-
-  // Store in _int_line_handler_table_x the pointer to the interrupt handler, so
-  // that _get_interrupt_handler can retrieve it when the interrupt is vectored.
-  _int_handler_table[int_grp]._int_line_handler_table[irq % AVR32_INTC_MAX_NUM_IRQS_PER_GRP] = handler;
-
-  // Program the corresponding IPRX register to set the interrupt priority level
-  // and the interrupt vector offset that will be fetched by the core interrupt
-  // system.
-  // NOTE: The _intx functions are intermediate assembly functions between the
-  // core interrupt system and the user interrupt handler.
-  AVR32_INTC.ipr[int_grp] = ipr_val[int_level & (AVR32_INTC_IPR_INTLEVEL_MASK >> AVR32_INTC_IPR_INTLEVEL_OFFSET)];
-}
diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.h
deleted file mode 100644
index 31a4fc1..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.h
+++ /dev/null
@@ -1,100 +0,0 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief INTC driver for AVR32 UC3.
- *
- * AVR32 Interrupt Controller driver module.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with an INTC module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _INTC_H_
-#define _INTC_H_
-
-#include "compiler.h"
-
-
-//! Maximal number of interrupt request lines per group.
-#define AVR32_INTC_MAX_NUM_IRQS_PER_GRP             32
-
-//! Number of interrupt priority levels.
-#define AVR32_INTC_NUM_INT_LEVELS                   (1 << AVR32_INTC_IPR_INTLEVEL_SIZE)
-
-
-#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
-
-//! Pointer to interrupt handler.
-#if (defined __GNUC__)
-typedef void (*__int_handler)(void);
-#elif (defined __ICCAVR32__)
-typedef void (__interrupt *__int_handler)(void);
-#endif
-
-
-/*! \brief Initializes the hardware interrupt controller driver.
- *
- * \note Taken and adapted from Newlib.
- */
-extern void INTC_init_interrupts(void);
-
-/*! \brief Registers an interrupt handler.
- *
- * \param handler   Interrupt handler to register.
- * \param irq       IRQ of the interrupt handler to register.
- * \param int_level Interrupt priority level to assign to the group of this IRQ.
- *
- * \warning The interrupt handler must manage the `rete' instruction, what can
- *          be done thanks to pure assembly, inline assembly or the
- *          `__attribute__((__interrupt__))' C function attribute.
- *
- * \warning If several interrupt handlers of a same group are registered with
- *          different priority levels, only the latest priority level set will
- *          be effective.
- *
- * \note Taken and adapted from Newlib.
- */
-extern void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level);
-
-#endif  // __AVR32_ABI_COMPILER__
-
-
-#endif  // _INTC_H_
diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.c
deleted file mode 100644
index 76d9268..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.c
+++ /dev/null
@@ -1,546 +0,0 @@
-/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief Power Manager driver.
- *
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- *****************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#include "compiler.h"
-#include "pm.h"
-
-
-/*! \name PM Writable Bit-Field Registers
- */
-//! @{
-
-typedef union
-{
-  unsigned long                 mcctrl;
-  avr32_pm_mcctrl_t             MCCTRL;
-} u_avr32_pm_mcctrl_t;
-
-typedef union
-{
-  unsigned long                 cksel;
-  avr32_pm_cksel_t              CKSEL;
-} u_avr32_pm_cksel_t;
-
-typedef union
-{
-  unsigned long                 pll;
-  avr32_pm_pll_t                PLL;
-} u_avr32_pm_pll_t;
-
-typedef union
-{
-  unsigned long                 oscctrl0;
-  avr32_pm_oscctrl0_t           OSCCTRL0;
-} u_avr32_pm_oscctrl0_t;
-
-typedef union
-{
-  unsigned long                 oscctrl1;
-  avr32_pm_oscctrl1_t           OSCCTRL1;
-} u_avr32_pm_oscctrl1_t;
-
-typedef union
-{
-  unsigned long                 oscctrl32;
-  avr32_pm_oscctrl32_t          OSCCTRL32;
-} u_avr32_pm_oscctrl32_t;
-
-typedef union
-{
-  unsigned long                 ier;
-  avr32_pm_ier_t                IER;
-} u_avr32_pm_ier_t;
-
-typedef union
-{
-  unsigned long                 idr;
-  avr32_pm_idr_t                IDR;
-} u_avr32_pm_idr_t;
-
-typedef union
-{
-  unsigned long                 icr;
-  avr32_pm_icr_t                ICR;
-} u_avr32_pm_icr_t;
-
-typedef union
-{
-  unsigned long                 gcctrl;
-  avr32_pm_gcctrl_t             GCCTRL;
-} u_avr32_pm_gcctrl_t;
-
-typedef union
-{
-  unsigned long                 rccr;
-  avr32_pm_rccr_t               RCCR;
-} u_avr32_pm_rccr_t;
-
-typedef union
-{
-  unsigned long                 bgcr;
-  avr32_pm_bgcr_t               BGCR;
-} u_avr32_pm_bgcr_t;
-
-typedef union
-{
-  unsigned long                 vregcr;
-  avr32_pm_vregcr_t             VREGCR;
-} u_avr32_pm_vregcr_t;
-
-typedef union
-{
-  unsigned long                 bod;
-  avr32_pm_bod_t                BOD;
-} u_avr32_pm_bod_t;
-
-//! @}
-
-
-/*! \brief Sets the mode of the oscillator 0.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- * \param mode Oscillator 0 mode (i.e. AVR32_PM_OSCCTRL0_MODE_x).
- */
-static void pm_set_osc0_mode(volatile avr32_pm_t *pm, unsigned int mode)
-{
-  // Read
-  u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
-  // Modify
-  u_avr32_pm_oscctrl0.OSCCTRL0.mode = mode;
-  // Write
-  pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
-}
-
-
-void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm)
-{
-  pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK);
-}
-
-
-void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0)
-{
-  pm_set_osc0_mode(pm, (fosc0 <  900000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G0 :
-                       (fosc0 < 3000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G1 :
-                       (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 :
-                                           AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3);
-}
-
-
-void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup)
-{
-  pm_enable_clk0_no_wait(pm, startup);
-  pm_wait_for_clk0_ready(pm);
-}
-
-
-void pm_disable_clk0(volatile avr32_pm_t *pm)
-{
-  pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC0EN_MASK;
-}
-
-
-void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
-{
-  // Read register
-  u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
-  // Modify
-  u_avr32_pm_oscctrl0.OSCCTRL0.startup = startup;
-  // Write back
-  pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
-
-  pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK;
-}
-
-
-void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm)
-{
-  while (!(pm->poscsr & AVR32_PM_POSCSR_OSC0RDY_MASK));
-}
-
-
-/*! \brief Sets the mode of the oscillator 1.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- * \param mode Oscillator 1 mode (i.e. AVR32_PM_OSCCTRL1_MODE_x).
- */
-static void pm_set_osc1_mode(volatile avr32_pm_t *pm, unsigned int mode)
-{
-  // Read
-  u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
-  // Modify
-  u_avr32_pm_oscctrl1.OSCCTRL1.mode = mode;
-  // Write
-  pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
-}
-
-
-void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm)
-{
-  pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK);
-}
-
-
-void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1)
-{
-  pm_set_osc1_mode(pm, (fosc1 <  900000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G0 :
-                       (fosc1 < 3000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G1 :
-                       (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 :
-                                           AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3);
-}
-
-
-void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup)
-{
-  pm_enable_clk1_no_wait(pm, startup);
-  pm_wait_for_clk1_ready(pm);
-}
-
-
-void pm_disable_clk1(volatile avr32_pm_t *pm)
-{
-  pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC1EN_MASK;
-}
-
-
-void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
-{
-  // Read register
-  u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
-  // Modify
-  u_avr32_pm_oscctrl1.OSCCTRL1.startup = startup;
-  // Write back
-  pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
-
-  pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK;
-}
-
-
-void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm)
-{
-  while (!(pm->poscsr & AVR32_PM_POSCSR_OSC1RDY_MASK));
-}
-
-
-/*! \brief Sets the mode of the 32-kHz oscillator.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- * \param mode 32-kHz oscillator mode (i.e. AVR32_PM_OSCCTRL32_MODE_x).
- */
-static void pm_set_osc32_mode(volatile avr32_pm_t *pm, unsigned int mode)
-{
-  // Read
-  u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
-  // Modify
-  u_avr32_pm_oscctrl32.OSCCTRL32.mode = mode;
-  // Write
-  pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
-}
-
-
-void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm)
-{
-  pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK);
-}
-
-
-void pm_enable_osc32_crystal(volatile avr32_pm_t *pm)
-{
-  pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL);
-}
-
-
-void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup)
-{
-  pm_enable_clk32_no_wait(pm, startup);
-  pm_wait_for_clk32_ready(pm);
-}
-
-
-void pm_disable_clk32(volatile avr32_pm_t *pm)
-{
-  pm->oscctrl32 &= ~AVR32_PM_OSCCTRL32_OSC32EN_MASK;
-}
-
-
-void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
-{
-  // Read register
-  u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
-  // Modify
-  u_avr32_pm_oscctrl32.OSCCTRL32.osc32en = 1;
-  u_avr32_pm_oscctrl32.OSCCTRL32.startup = startup;
-  // Write back
-  pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
-}
-
-
-void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm)
-{
-  while (!(pm->poscsr & AVR32_PM_POSCSR_OSC32RDY_MASK));
-}
-
-
-void pm_cksel(volatile avr32_pm_t *pm,
-              unsigned int pbadiv,
-              unsigned int pbasel,
-              unsigned int pbbdiv,
-              unsigned int pbbsel,
-              unsigned int hsbdiv,
-              unsigned int hsbsel)
-{
-  u_avr32_pm_cksel_t u_avr32_pm_cksel = {0};
-
-  u_avr32_pm_cksel.CKSEL.cpusel = hsbsel;
-  u_avr32_pm_cksel.CKSEL.cpudiv = hsbdiv;
-  u_avr32_pm_cksel.CKSEL.hsbsel = hsbsel;
-  u_avr32_pm_cksel.CKSEL.hsbdiv = hsbdiv;
-  u_avr32_pm_cksel.CKSEL.pbasel = pbasel;
-  u_avr32_pm_cksel.CKSEL.pbadiv = pbadiv;
-  u_avr32_pm_cksel.CKSEL.pbbsel = pbbsel;
-  u_avr32_pm_cksel.CKSEL.pbbdiv = pbbdiv;
-
-  pm->cksel = u_avr32_pm_cksel.cksel;
-
-  // Wait for ckrdy bit and then clear it
-  while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK));
-}
-
-
-void pm_gc_setup(volatile avr32_pm_t *pm,
-                  unsigned int gc,
-                  unsigned int osc_or_pll, // Use Osc (=0) or PLL (=1)
-                  unsigned int pll_osc, // Sel Osc0/PLL0 or Osc1/PLL1
-                  unsigned int diven,
-                  unsigned int div)
-{
-  u_avr32_pm_gcctrl_t u_avr32_pm_gcctrl = {0};
-
-  u_avr32_pm_gcctrl.GCCTRL.oscsel = pll_osc;
-  u_avr32_pm_gcctrl.GCCTRL.pllsel = osc_or_pll;
-  u_avr32_pm_gcctrl.GCCTRL.diven  = diven;
-  u_avr32_pm_gcctrl.GCCTRL.div    = div;
-
-  pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl;
-}
-
-
-void pm_gc_enable(volatile avr32_pm_t *pm,
-                  unsigned int gc)
-{
-  pm->gcctrl[gc] |= AVR32_PM_GCCTRL_CEN_MASK;
-}
-
-
-void pm_gc_disable(volatile avr32_pm_t *pm,
-                   unsigned int gc)
-{
-  pm->gcctrl[gc] &= ~AVR32_PM_GCCTRL_CEN_MASK;
-}
-
-
-void pm_pll_setup(volatile avr32_pm_t *pm,
-                  unsigned int pll,
-                  unsigned int mul,
-                  unsigned int div,
-                  unsigned int osc,
-                  unsigned int lockcount)
-{
-  u_avr32_pm_pll_t u_avr32_pm_pll = {0};
-
-  u_avr32_pm_pll.PLL.pllosc   = osc;
-  u_avr32_pm_pll.PLL.plldiv   = div;
-  u_avr32_pm_pll.PLL.pllmul   = mul;
-  u_avr32_pm_pll.PLL.pllcount = lockcount;
-
-  pm->pll[pll] = u_avr32_pm_pll.pll;
-}
-
-
-void pm_pll_set_option(volatile avr32_pm_t *pm,
-                       unsigned int pll,
-                       unsigned int pll_freq,
-                       unsigned int pll_div2,
-                       unsigned int pll_wbwdisable)
-{
-  u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]};
-  u_avr32_pm_pll.PLL.pllopt = pll_freq | (pll_div2 << 1) | (pll_wbwdisable << 2);
-  pm->pll[pll] = u_avr32_pm_pll.pll;
-}
-
-
-unsigned int pm_pll_get_option(volatile avr32_pm_t *pm,
-                               unsigned int pll)
-{
-  return (pm->pll[pll] & AVR32_PM_PLLOPT_MASK) >> AVR32_PM_PLLOPT_OFFSET;
-}
-
-
-void pm_pll_enable(volatile avr32_pm_t *pm,
-                  unsigned int pll)
-{
-  pm->pll[pll] |= AVR32_PM_PLLEN_MASK;
-}
-
-
-void pm_pll_disable(volatile avr32_pm_t *pm,
-                  unsigned int pll)
-{
-  pm->pll[pll] &= ~AVR32_PM_PLLEN_MASK;
-}
-
-
-void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm)
-{
-  while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK0_MASK));
-}
-
-
-void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm)
-{
-  while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK1_MASK));
-}
-
-
-void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock)
-{
-  // Read
-  u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl};
-  // Modify
-  u_avr32_pm_mcctrl.MCCTRL.mcsel = clock;
-  // Write back
-  pm->mcctrl = u_avr32_pm_mcctrl.mcctrl;
-}
-
-
-void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup)
-{
-  pm_enable_osc0_crystal(pm, fosc0);            // Enable the Osc0 in crystal mode
-  pm_enable_clk0(pm, startup);                  // Crystal startup time - This parameter is critical and depends on the characteristics of the crystal
-  pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0);  // Then switch main clock to Osc0
-}
-
-
-void pm_bod_enable_irq(volatile avr32_pm_t *pm)
-{
-  pm->ier = AVR32_PM_IER_BODDET_MASK;
-}
-
-
-void pm_bod_disable_irq(volatile avr32_pm_t *pm)
-{
-  Bool global_interrupt_enabled = Is_global_interrupt_enabled();
-
-  if (global_interrupt_enabled) Disable_global_interrupt();
-  pm->idr = AVR32_PM_IDR_BODDET_MASK;
-  pm->isr;
-  if (global_interrupt_enabled) Enable_global_interrupt();
-}
-
-
-void pm_bod_clear_irq(volatile avr32_pm_t *pm)
-{
-  pm->icr = AVR32_PM_ICR_BODDET_MASK;
-}
-
-
-unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm)
-{
-  return ((pm->isr & AVR32_PM_ISR_BODDET_MASK) != 0);
-}
-
-
-unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm)
-{
-  return ((pm->imr & AVR32_PM_IMR_BODDET_MASK) != 0);
-}
-
-
-unsigned long pm_bod_get_level(volatile avr32_pm_t *pm)
-{
-  return (pm->bod & AVR32_PM_BOD_LEVEL_MASK) >> AVR32_PM_BOD_LEVEL_OFFSET;
-}
-
-
-unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp)
-{
-  return pm->gplp[gplp];
-}
-
-
-void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value)
-{
-  pm->gplp[gplp] = value;
-}
-
-
-long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module)
-{
-  unsigned long domain = module>>5;
-  unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain);
-
-  // Implementation-specific shortcut: the ckMASK registers are contiguous and
-  // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK.
-
-  *regptr |= (1<<(module%32));
-
-  return PASS;
-}
-
-long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module)
-{
-  unsigned long domain = module>>5;
-  unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain);
-
-  // Implementation-specific shortcut: the ckMASK registers are contiguous and
-  // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK.
-
-  *regptr &= ~(1<<(module%32));
-
-  return PASS;
-}
diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.h
deleted file mode 100644
index ca679f7..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.h
+++ /dev/null
@@ -1,493 +0,0 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief Power Manager driver.
- *
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- *****************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _PM_H_
-#define _PM_H_
-
-#include <avr32/io.h>
-#include "compiler.h"
-#include "preprocessor.h"
-
-
-/*! \brief Sets the MCU in the specified sleep mode.
- *
- * \param mode Sleep mode:
- *   \arg \c AVR32_PM_SMODE_IDLE: Idle;
- *   \arg \c AVR32_PM_SMODE_FROZEN: Frozen;
- *   \arg \c AVR32_PM_SMODE_STANDBY: Standby;
- *   \arg \c AVR32_PM_SMODE_STOP: Stop;
- *   \arg \c AVR32_PM_SMODE_DEEP_STOP: DeepStop;
- *   \arg \c AVR32_PM_SMODE_STATIC: Static.
- */
-#define SLEEP(mode)   {__asm__ __volatile__ ("sleep "STRINGZ(mode));}
-
-
-//! Input and output parameters when initializing PM clocks using pm_configure_clocks().
-typedef struct
-{
-  //! CPU frequency (input/output argument).
-  unsigned long cpu_f;
-
-  //! PBA frequency (input/output argument).
-  unsigned long pba_f;
-
-  //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument).
-  unsigned long osc0_f;
-
-  //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument).
-  unsigned long osc0_startup;
-} pm_freq_param_t;
-
-#define PM_FREQ_STATUS_FAIL   (-1)
-#define PM_FREQ_STATUS_OK     (0)
-
-
-/*! \brief Gets the MCU reset cause.
- *
- * \param pm Base address of the Power Manager instance (i.e. &AVR32_PM).
- *
- * \return The MCU reset cause which can be masked with the
- *         \c AVR32_PM_RCAUSE_x_MASK bit-masks to isolate specific causes.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ unsigned int pm_get_reset_cause(volatile avr32_pm_t *pm)
-{
-  return pm->rcause;
-}
-
-
-/*!
- * \brief This function will enable the external clock mode of the oscillator 0.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the crystal mode of the oscillator 0.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param fosc0 Oscillator 0 crystal frequency (Hz)
- */
-extern void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0);
-
-
-/*!
- * \brief This function will enable the oscillator 0 to be used with a startup time.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param startup Clock 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
- */
-extern void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup);
-
-
-/*!
- * \brief This function will disable the oscillator 0.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_disable_clk0(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the oscillator 0 to be used with no startup time.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param startup Clock 0 startup time, for which the function does not wait. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
- */
-extern void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
-
-
-/*!
- * \brief This function will wait until the Osc0 clock is ready.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the external clock mode of the oscillator 1.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the crystal mode of the oscillator 1.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param fosc1 Oscillator 1 crystal frequency (Hz)
- */
-extern void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1);
-
-
-/*!
- * \brief This function will enable the oscillator 1 to be used with a startup time.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param startup Clock 1 startup time. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC.
- */
-extern void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup);
-
-
-/*!
- * \brief This function will disable the oscillator 1.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_disable_clk1(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the oscillator 1 to be used with no startup time.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param startup Clock 1 startup time, for which the function does not wait. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC.
- */
-extern void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
-
-
-/*!
- * \brief This function will wait until the Osc1 clock is ready.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the external clock mode of the 32-kHz oscillator.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the crystal mode of the 32-kHz oscillator.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_enable_osc32_crystal(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the oscillator 32 to be used with a startup time.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param startup Clock 32 kHz startup time. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC.
- */
-extern void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup);
-
-
-/*!
- * \brief This function will disable the oscillator 32.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_disable_clk32(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the oscillator 32 to be used with no startup time.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param startup Clock 32 kHz startup time, for which the function does not wait. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC.
- */
-extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
-
-
-/*!
- * \brief This function will wait until the osc32 clock is ready.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will select all the power manager clocks.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param pbadiv Peripheral Bus A clock divisor enable
- * \param pbasel Peripheral Bus A select
- * \param pbbdiv Peripheral Bus B clock divisor enable
- * \param pbbsel Peripheral Bus B select
- * \param hsbdiv High Speed Bus clock divisor enable (CPU clock = HSB clock)
- * \param hsbsel High Speed Bus select (CPU clock = HSB clock )
- */
-extern void pm_cksel(volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel);
-
-
-/*!
- * \brief This function will setup a generic clock.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param gc generic clock number (0 for gc0...)
- * \param osc_or_pll Use OSC (=0) or PLL (=1)
- * \param pll_osc Select Osc0/PLL0 or Osc1/PLL1
- * \param diven Generic clock divisor enable
- * \param div Generic clock divisor
- */
-extern void pm_gc_setup(volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div);
-
-
-/*!
- * \brief This function will enable a generic clock.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param gc generic clock number (0 for gc0...)
- */
-extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc);
-
-
-/*!
- * \brief This function will disable a generic clock.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param gc generic clock number (0 for gc0...)
- */
-extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc);
-
-
-/*!
- * \brief This function will setup a PLL.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param pll PLL number(0 for PLL0, 1 for PLL1)
- * \param mul PLL MUL in the PLL formula
- * \param div PLL DIV in the PLL formula
- * \param osc OSC number (0 for osc0, 1 for osc1)
- * \param lockcount PLL lockount
- */
-extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount);
-
-
-/*!
- * \brief This function will set a PLL option.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param pll PLL number(0 for PLL0, 1 for PLL1)
- * \param pll_freq Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
- * \param pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
- * \param pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
- */
-extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int  pll_freq, unsigned int  pll_div2, unsigned int  pll_wbwdisable);
-
-
-/*!
- * \brief This function will get a PLL option.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param pll PLL number(0 for PLL0, 1 for PLL1)
- * \return       Option
- */
-extern unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, unsigned int pll);
-
-
-/*!
- * \brief This function will enable a PLL.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param pll PLL number(0 for PLL0, 1 for PLL1)
- */
-extern void pm_pll_enable(volatile avr32_pm_t *pm, unsigned int pll);
-
-
-/*!
- * \brief This function will disable a PLL.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param pll PLL number(0 for PLL0, 1 for PLL1)
- */
-extern void pm_pll_disable(volatile avr32_pm_t *pm, unsigned int pll);
-
-
-/*!
- * \brief This function will wait for PLL0 locked
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will wait for PLL1 locked
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will switch the power manager main clock.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param clock Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0.
- */
-extern void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock);
-
-
-/*!
- * \brief Switch main clock to clock Osc0 (crystal mode)
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param fosc0 Oscillator 0 crystal frequency (Hz)
- * \param startup Crystal 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
- */
-extern void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup);
-
-
-/*! \brief Enables the Brown-Out Detector interrupt.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- */
-extern void pm_bod_enable_irq(volatile avr32_pm_t *pm);
-
-
-/*! \brief Disables the Brown-Out Detector interrupt.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- */
-extern void pm_bod_disable_irq(volatile avr32_pm_t *pm);
-
-
-/*! \brief Clears the Brown-Out Detector interrupt flag.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- */
-extern void pm_bod_clear_irq(volatile avr32_pm_t *pm);
-
-
-/*! \brief Gets the Brown-Out Detector interrupt flag.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- *
- * \retval 0 No BOD interrupt.
- * \retval 1 BOD interrupt pending.
- */
-extern unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm);
-
-
-/*! \brief Gets the Brown-Out Detector interrupt enable status.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- *
- * \retval 0 BOD interrupt disabled.
- * \retval 1 BOD interrupt enabled.
- */
-extern unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm);
-
-
-/*! \brief Gets the triggering threshold of the Brown-Out Detector.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- *
- * \return Triggering threshold of the BOD. See the electrical characteristics
- *         in the part datasheet for actual voltage levels.
- */
-extern unsigned long pm_bod_get_level(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief Read the content of the PM GPLP registers
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
- *
- * \return The content of the chosen GPLP register.
- */
-extern unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp);
-
-
-/*!
- * \brief Write into the PM GPLP registers
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
- * \param value Value to write
- */
-extern void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value);
-
-
-/*! \brief Enable the clock of a module.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param module The module to clock (use one of the defines in the part-specific
- * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
- * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks")
- *
- * \return Status.
- *   \retval 0  Success.
- *   \retval <0 An error occured.
- */
-extern long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module);
-
-/*! \brief Disable the clock of a module.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param module The module to shut down (use one of the defines in the part-specific
- * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
- * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks")
- *
- * \return Status.
- *   \retval 0  Success.
- *   \retval <0 An error occured.
- */
-extern long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module);
-
-
-
-/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks
- *         according to the user wishes.
- *
- * This function needs some parameters stored in a pm_freq_param_t structure:
- *  - cpu_f and pba_f are the wanted frequencies,
- *  - osc0_f is the oscillator 0 on-board frequency (e.g. FOSC0),
- *  - osc0_startup is the oscillator 0 startup time (e.g. OSC0_STARTUP).
- *
- * The function will then configure the clocks using the following rules:
- *  - It first try to find a valid PLL frequency (the highest possible value to avoid jitter) in order
- *    to satisfy the CPU frequency,
- *  - It optimizes the configuration depending the various divide stages,
- *  - Then, the PBA frequency is configured from the CPU freq.
- *  - Note that HSB and PBB are configured with the same frequency as CPU.
- *  - Note also that the number of wait states of the flash read accesses is automatically set-up depending
- *    the CPU frequency. As a consequence, the application needs the FLASHC driver to compile.
- *
- * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f.
- *
- * \param param    pointer on the configuration structure.
- *
- * \retval PM_FREQ_STATUS_OK    Mode successfully initialized.
- * \retval PM_FREQ_STATUS_FAIL  The configuration can not be done.
- */
-extern int pm_configure_clocks(pm_freq_param_t *param);
-
-
-/*! \brief Automatically configure the USB clock.
- *
- * USB clock is configured to 48MHz, using the PLL1 from the Oscillator0, assuming
- * a 12 MHz crystal is connected to it.
- */
-extern void pm_configure_usb_clock(void);
-
-
-#endif  // _PM_H_
diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm_conf_clocks.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm_conf_clocks.c
deleted file mode 100644
index 8beb83b..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm_conf_clocks.c
+++ /dev/null
@@ -1,268 +0,0 @@
-/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief Power Manager clocks configuration helper.
- *
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- *****************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#include <string.h>
-#include "compiler.h"
-#include "pm.h"
-
-extern void flashc_set_wait_state(unsigned int wait_state);
-#if (defined AVR32_FLASHC_210_H_INCLUDED)
-extern void flashc_issue_command(unsigned int command, int page_number);
-#endif
-
-
-#define PM_MAX_MUL                ((1 << AVR32_PM_PLL0_PLLMUL_SIZE) - 1)
-
-
-int pm_configure_clocks(pm_freq_param_t *param)
-{
-  // Supported frequencies:
-  // Fosc0 mul div PLL div2_en cpu_f pba_f   Comment
-  //  12   15   1  192     1     12    12
-  //  12    9   3   40     1     20    20    PLL out of spec
-  //  12   15   1  192     1     24    12
-  //  12    9   1  120     1     30    15
-  //  12    9   3   40     0     40    20    PLL out of spec
-  //  12   15   1  192     1     48    12
-  //  12   15   1  192     1     48    24
-  //  12    8   1  108     1     54    27
-  //  12    9   1  120     1     60    15
-  //  12    9   1  120     1     60    30
-  //  12   10   1  132     1     66    16.5
-  //
-  unsigned long in_cpu_f  = param->cpu_f;
-  unsigned long in_osc0_f = param->osc0_f;
-  unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0;
-  unsigned long pll_freq, rest;
-  Bool b_div2_pba, b_div2_cpu;
-
-  // Switch to external Oscillator 0
-  pm_switch_to_osc0(&AVR32_PM, in_osc0_f, param->osc0_startup);
-
-  // Start with CPU freq config
-  if (in_cpu_f == in_osc0_f)
-  {
-    param->cpu_f = in_osc0_f;
-    param->pba_f = in_osc0_f;
-    return PM_FREQ_STATUS_OK;
-  }
-  else if (in_cpu_f < in_osc0_f)
-  {
-    // TBD
-  }
-
-  rest = in_cpu_f % in_osc0_f;
-
-  for (div = 1; div < 32; div++)
-  {
-    if ((div * rest) % in_osc0_f == 0)
-      break;
-  }
-  if (div == 32)
-    return PM_FREQ_STATUS_FAIL;
-
-  mul = (in_cpu_f * div) / in_osc0_f;
-
-  if (mul > PM_MAX_MUL)
-    return PM_FREQ_STATUS_FAIL;
-
-  // export 2power from PLL div to div2_cpu
-  while (!(div % 2))
-  {
-    div /= 2;
-    div2_cpu++;
-  }
-
-  // Here we know the mul and div parameter of the PLL config.
-  // . Check out if the PLL has a valid in_cpu_f.
-  // . Try to have for the PLL frequency (VCO output) the highest possible value
-  //   to reduce jitter.
-  while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ)
-  {
-    if (2 * mul > PM_MAX_MUL)
-      break;
-    mul *= 2;
-    div2_cpu++;
-  }
-
-  if (div2_cpu != 0)
-  {
-    div2_cpu--;
-    div2_en = 1;
-  }
-
-  pll_freq = in_osc0_f * mul / (div * (1 << div2_en));
-
-  // Update real CPU Frequency
-  param->cpu_f = pll_freq / (1 << div2_cpu);
-  mul--;
-
-  pm_pll_setup(&AVR32_PM
-  , 0   // pll
-  , mul // mul
-  , div // div
-  , 0   // osc
-  , 16  // lockcount
-  );
-
-  pm_pll_set_option(&AVR32_PM
-  , 0 // pll
-  // PLL clock is lower than 160MHz: need to set pllopt.
-  , (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0 // pll_freq
-  , div2_en // pll_div2
-  , 0 // pll_wbwdisable
-  );
-
-  rest = pll_freq;
-  while (rest > AVR32_PM_PBA_MAX_FREQ ||
-         rest != param->pba_f)
-  {
-    div2_pba++;
-    rest = pll_freq / (1 << div2_pba);
-    if (rest < param->pba_f)
-      break;
-  }
-
-  // Update real PBA Frequency
-  param->pba_f = pll_freq / (1 << div2_pba);
-
-  // Enable PLL0
-  pm_pll_enable(&AVR32_PM, 0);
-
-  // Wait for PLL0 locked
-  pm_wait_for_pll0_locked(&AVR32_PM);
-
-  if (div2_cpu)
-  {
-    b_div2_cpu = TRUE;
-    div2_cpu--;
-  }
-  else
-    b_div2_cpu = FALSE;
-
-  if (div2_pba)
-  {
-    b_div2_pba = TRUE;
-    div2_pba--;
-  }
-  else
-    b_div2_pba = FALSE;
-
-  pm_cksel(&AVR32_PM
-  , b_div2_pba, div2_pba // PBA
-  , b_div2_cpu, div2_cpu // PBB
-  , b_div2_cpu, div2_cpu // HSB
-  );
-
-  if (param->cpu_f > AVR32_FLASHC_FWS_0_MAX_FREQ)
-  {
-    flashc_set_wait_state(1);
-#if (defined AVR32_FLASHC_210_H_INCLUDED)
-    if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ)
-      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1);
-    else
-      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
-#endif
-  }
-  else
-  {
-    flashc_set_wait_state(0);
-#if (defined AVR32_FLASHC_210_H_INCLUDED)
-    if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ)
-      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1);
-    else
-      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
-#endif
-  }
-
-  pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0);
-
-  return PM_FREQ_STATUS_OK;
-}
-
-
-void pm_configure_usb_clock(void)
-{
-#if UC3A3
-
-  // Setup USB GCLK.
-  pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc
-                  0,                  // osc_or_pll: use Osc (if 0) or PLL (if 1)
-                  0,                  // pll_osc: select Osc0/PLL0 or Osc1/PLL1
-                  0,                  // diven
-                  0);                 // div
-
-  // Enable USB GCLK.
-  pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB);
-#else
-  // Use 12MHz from OSC0 and generate 96 MHz
-  pm_pll_setup(&AVR32_PM, 1,  // pll.
-	  7,   // mul.
-	  1,   // div.
-	  0,   // osc.
-	  16); // lockcount.
-
-  pm_pll_set_option(&AVR32_PM, 1, // pll.
-	  1,  // pll_freq: choose the range 80-180MHz.
-	  1,  // pll_div2.
-	  0); // pll_wbwdisable.
-
-  // start PLL1 and wait forl lock
-  pm_pll_enable(&AVR32_PM, 1);
-
-  // Wait for PLL1 locked.
-  pm_wait_for_pll1_locked(&AVR32_PM);
-
-  pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB,  // gc.
-            1,  // osc_or_pll: use Osc (if 0) or PLL (if 1).
-            1,  // pll_osc: select Osc0/PLL0 or Osc1/PLL1.
-            0,  // diven.
-            0); // div.
-  pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB);
-#endif
-}
diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.c
deleted file mode 100644
index f5fc155..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.c
+++ /dev/null
@@ -1,566 +0,0 @@
-/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief High-level library abstracting features such as oscillators/pll/dfll
- *        configuration, clock configuration, System-sensible parameters
- *        configuration, buses clocks configuration, sleep mode, reset.
- *
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- *****************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-#include "power_clocks_lib.h"
-
-
-//! Device-specific data
-#if UC3L
-static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param); // FORWARD declaration
-#endif
-
-#if UC3C
-static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param); // FORWARD declaration
-#endif
-
-long int pcl_configure_clocks(pcl_freq_param_t *param)
-{
-#ifndef AVR32_PM_VERSION_RESETVALUE
-  // Implementation for UC3A, UC3A3, UC3B parts.
-  return(pm_configure_clocks(param));
-#else
-  #ifdef AVR32_PM_410_H_INCLUDED
-    // Implementation for UC3C parts.
-    return(pcl_configure_clocks_uc3c(param));
-  #else
-    // Implementation for UC3L parts.
-    return(pcl_configure_clocks_uc3l(param));
-  #endif
-#endif
-}
-
-
-//! Device-specific implementation
-#if UC3L
-// FORWARD declaration
-static long int pcl_configure_synchronous_clocks( pm_clk_src_t main_clk_src,
-                                                  unsigned long main_clock_freq_hz,
-                                                  pcl_freq_param_t *param);
-
-long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param)
-{
-  // Supported main clock sources: PCL_MC_RCSYS
-
-  // Supported synchronous clocks frequencies if RCSYS is the main clock source:
-  // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.
-
-  // NOTE: by default, this implementation doesn't perform thorough checks on the
-  // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
-
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that fCPU >= fPBx
-  if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
-    return(-1);
-#endif
-
-#ifdef AVR32SFW_INPUT_CHECK
-    // Verify that the target frequencies are reachable.
-    if((param->cpu_f > SCIF_SLOWCLOCK_FREQ_HZ) || (param->pba_f > SCIF_SLOWCLOCK_FREQ_HZ)
-      || (param->pbb_f > SCIF_SLOWCLOCK_FREQ_HZ))
-      return(-1);
-#endif
-
-  return(pcl_configure_synchronous_clocks(PM_CLK_SRC_SLOW, SCIF_SLOWCLOCK_FREQ_HZ, param));
-}
-
-
-long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param)
-{
-  // Supported main clock sources: PCL_MC_RC120M
-
-  // Supported synchronous clocks frequencies if RC120M is the main clock source:
-  // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.
-
-  // NOTE: by default, this implementation doesn't perform thorough checks on the
-  // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
-
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that fCPU >= fPBx
-  if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
-    return(-1);
-#endif
-
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that the target frequencies are reachable.
-  if((param->cpu_f > SCIF_RC120M_FREQ_HZ) || (param->pba_f > SCIF_RC120M_FREQ_HZ)
-    || (param->pbb_f > SCIF_RC120M_FREQ_HZ))
-    return(-1);
-#endif
-
-  // Start the 120MHz internal RCosc (RC120M) clock
-  scif_start_rc120M();
-
-  return(pcl_configure_synchronous_clocks(PM_CLK_SRC_RC120M, SCIF_RC120M_FREQ_HZ, param));
-}
-
-
-long int pcl_configure_clocks_osc0(pcl_freq_param_t *param)
-{
-  // Supported main clock sources: PCL_MC_OSC0
-
-  // Supported synchronous clocks frequencies if OSC0 is the main clock source:
-  // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example)
-  // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.
-
-  // NOTE: by default, this implementation doesn't perform thorough checks on the
-  // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
-
-  unsigned long               main_clock_freq;
-
-
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that fCPU >= fPBx
-  if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
-    return(-1);
-#endif
-
-  main_clock_freq = param->osc0_f;
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that the target frequencies are reachable.
-  if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq)
-    || (param->pbb_f > main_clock_freq))
-    return(-1);
-#endif
-  // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency.
-  scif_configure_osc_crystalmode(SCIF_OSC0, main_clock_freq);
-  // Enable the OSC0
-  scif_enable_osc(SCIF_OSC0, param->osc0_startup, true);
-
-  return(pcl_configure_synchronous_clocks(PM_CLK_SRC_OSC0, main_clock_freq, param));
-}
-
-
-long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param)
-{
-  // Supported main clock sources: PCL_MC_DFLL
-
-  // Supported synchronous clocks frequencies if DFLL is the main clock source:
-  // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example)
-  // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.
-
-  // NOTE: by default, this implementation doesn't perform thorough checks on the
-  // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
-
-  unsigned long   main_clock_freq;
-  scif_gclk_opt_t *pgc_dfllif_ref_opt;
-
-
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that fCPU >= fPBx
-  if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
-    return(-1);
-#endif
-
-  main_clock_freq = param->dfll_f;
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that the target DFLL output frequency is in the correct range.
-  if((main_clock_freq > SCIF_DFLL_MAXFREQ_HZ) || (main_clock_freq < SCIF_DFLL_MINFREQ_HZ))
-    return(-1);
-  // Verify that the target frequencies are reachable.
-  if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq)
-    || (param->pbb_f > main_clock_freq))
-    return(-1);
-#endif
-  pgc_dfllif_ref_opt = (scif_gclk_opt_t *)param->pextra_params;
-  // Implementation note: this implementation configures the DFLL in closed-loop
-  // mode (because it gives the best accuracy) which enables the generic clock CLK_DFLLIF_REF
-  // as a reference (RCSYS being used as the generic clock source, undivided).
-  scif_dfll0_closedloop_configure_and_start(pgc_dfllif_ref_opt, main_clock_freq, TRUE);
-
-  return(pcl_configure_synchronous_clocks(PM_CLK_SRC_DFLL0, main_clock_freq, param));
-}
-
-
-static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param)
-{
-  // Supported main clock sources: PCL_MC_RCSYS, PCL_MC_OSC0, PCL_MC_DFLL0, PCL_MC_RC120M
-
-  // Supported synchronous clocks frequencies if RCSYS is the main clock source:
-  // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.
-
-  // Supported synchronous clocks frequencies if RC120M is the main clock source:
-  // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.
-
-  // Supported synchronous clocks frequencies if OSC0 is the main clock source:
-  // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example)
-  // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.
-
-  // Supported synchronous clocks frequencies if DFLL is the main clock source:
-  // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example)
-  // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.
-
-  // NOTE: by default, this implementation doesn't perform thorough checks on the
-  // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
-
-
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that fCPU >= fPBx
-  if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
-    return(-1);
-#endif
-
-  if(PCL_MC_RCSYS == param->main_clk_src)
-  {
-    return(pcl_configure_clocks_rcsys(param));
-  }
-  else if(PCL_MC_RC120M == param->main_clk_src)
-  {
-    return(pcl_configure_clocks_rc120m(param));
-  }
-  else if(PCL_MC_OSC0 == param->main_clk_src)
-  {
-    return(pcl_configure_clocks_osc0(param));
-  }
-  else // PCL_MC_DFLL0 == param->main_clk_src
-  {
-    return(pcl_configure_clocks_dfll0(param));
-  }
-}
-
-static long int pcl_configure_synchronous_clocks(pm_clk_src_t main_clk_src, unsigned long main_clock_freq_hz, pcl_freq_param_t *param)
-{
-  //#
-  //# Set the Synchronous clock division ratio for each clock domain
-  //#
-  pm_set_all_cksel(main_clock_freq_hz, param->cpu_f, param->pba_f, param->pbb_f);
-
-  //#
-  //# Set the Flash wait state and the speed read mode (depending on the target CPU frequency).
-  //#
-#if UC3L
-    flashcdw_set_flash_waitstate_and_readmode(param->cpu_f);
-#elif UC3C
-    flashc_set_flash_waitstate_and_readmode(param->cpu_f);
-#endif
-
-
-  //#
-  //# Switch the main clock source to the selected clock.
-  //#
-  pm_set_mclk_source(main_clk_src);
-
-  return PASS;
-}
-
-#endif // UC3L device-specific implementation
-
-//! UC3C Device-specific implementation
-#if UC3C
-static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param)
-{
-  #define PM_MAX_MUL                         ((1 << AVR32_SCIF_PLLMUL_SIZE) - 1)
-  #define AVR32_PM_PBA_MAX_FREQ              66000000
-  #define AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ   240000000
-  #define AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ   160000000
-
-    // Implementation for  UC3C parts.
-        // Supported frequencies:
-        // Fosc0 mul div PLL div2_en cpu_f pba_f   Comment
-        //  12   15   1  192     1     12    12
-        //  12    9   3   40     1     20    20    PLL out of spec
-        //  12   15   1  192     1     24    12
-        //  12    9   1  120     1     30    15
-        //  12    9   3   40     0     40    20    PLL out of spec
-        //  12   15   1  192     1     48    12
-        //  12   15   1  192     1     48    24
-        //  12    8   1  108     1     54    27
-        //  12    9   1  120     1     60    15
-        //  12    9   1  120     1     60    30
-        //  12   10   1  132     1     66    16.5
-        //
-        unsigned long in_cpu_f  = param->cpu_f;
-        unsigned long in_osc0_f = param->osc0_f;
-        unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0;
-        unsigned long pll_freq, rest;
-        Bool b_div2_pba, b_div2_cpu;
-
-        // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency.
-        scif_configure_osc_crystalmode(SCIF_OSC0, in_osc0_f);
-        // Enable the OSC0
-        scif_enable_osc(SCIF_OSC0, param->osc0_startup, true);
-        // Set the main clock source as being OSC0.
-        pm_set_mclk_source(PM_CLK_SRC_OSC0);
-
-        // Start with CPU freq config
-        if (in_cpu_f == in_osc0_f)
-        {
-          param->cpu_f = in_osc0_f;
-          param->pba_f = in_osc0_f;
-          return PASS;
-        }
-        else if (in_cpu_f < in_osc0_f)
-        {
-          // TBD
-        }
-
-        rest = in_cpu_f % in_osc0_f;
-
-        for (div = 1; div < 32; div++)
-        {
-          if ((div * rest) % in_osc0_f == 0)
-            break;
-        }
-        if (div == 32)
-          return FAIL;
-
-        mul = (in_cpu_f * div) / in_osc0_f;
-
-        if (mul > PM_MAX_MUL)
-          return FAIL;
-
-        // export 2power from PLL div to div2_cpu
-        while (!(div % 2))
-        {
-          div /= 2;
-          div2_cpu++;
-        }
-
-        // Here we know the mul and div parameter of the PLL config.
-        // . Check out if the PLL has a valid in_cpu_f.
-        // . Try to have for the PLL frequency (VCO output) the highest possible value
-        //   to reduce jitter.
-        while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ)
-        {
-          if (2 * mul > PM_MAX_MUL)
-            break;
-          mul *= 2;
-          div2_cpu++;
-        }
-
-        if (div2_cpu != 0)
-        {
-          div2_cpu--;
-          div2_en = 1;
-        }
-
-        pll_freq = in_osc0_f * mul / (div * (1 << div2_en));
-
-        // Update real CPU Frequency
-        param->cpu_f = pll_freq / (1 << div2_cpu);
-        mul--;
-
-        scif_pll_opt_t opt;
-
-        opt.osc = SCIF_OSC0,     // Sel Osc0 or Osc1
-        opt.lockcount = 16,      // lockcount in main clock for the PLL wait lock
-        opt.div = div,             // DIV=1 in the formula
-        opt.mul = mul,             // MUL=7 in the formula
-        opt.pll_div2 = div2_en,        // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
-        opt.pll_wbwdisable = 0,  //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
-        opt.pll_freq = (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0,        // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
-
-
-        scif_pll_setup(SCIF_PLL0, opt); // lockcount in main clock for the PLL wait lock
-
-        /* Enable PLL0 */
-        scif_pll_enable(SCIF_PLL0);
-
-        /* Wait for PLL0 locked */
-        scif_wait_for_pll_locked(SCIF_PLL0) ;
-
-        rest = pll_freq;
-        while (rest > AVR32_PM_PBA_MAX_FREQ ||
-               rest != param->pba_f)
-        {
-          div2_pba++;
-          rest = pll_freq / (1 << div2_pba);
-          if (rest < param->pba_f)
-            break;
-        }
-
-        // Update real PBA Frequency
-        param->pba_f = pll_freq / (1 << div2_pba);
-
-
-        if (div2_cpu)
-        {
-          b_div2_cpu = TRUE;
-          div2_cpu--;
-        }
-        else
-          b_div2_cpu = FALSE;
-
-        if (div2_pba)
-        {
-          b_div2_pba = TRUE;
-          div2_pba--;
-        }
-        else
-          b_div2_pba = FALSE;
-
-        if (b_div2_cpu == TRUE )
-        {
-          pm_set_clk_domain_div(PM_CLK_DOMAIN_0, (pm_divratio_t) div2_cpu); // CPU
-          pm_set_clk_domain_div(PM_CLK_DOMAIN_1, (pm_divratio_t) div2_cpu); // HSB
-          pm_set_clk_domain_div(PM_CLK_DOMAIN_3, (pm_divratio_t) div2_cpu); // PBB
-        }
-        if (b_div2_pba == TRUE )
-        {
-          pm_set_clk_domain_div(PM_CLK_DOMAIN_2, (pm_divratio_t) div2_pba); // PBA
-          pm_set_clk_domain_div(PM_CLK_DOMAIN_4, (pm_divratio_t) div2_pba); // PBC
-        }
-
-        // Set Flashc Wait State
-        flashc_set_flash_waitstate_and_readmode(param->cpu_f);
-
-        // Set the main clock source as being PLL0.
-        pm_set_mclk_source(PM_CLK_SRC_PLL0);
-
-        return PASS;
-}
-#endif // UC3C device-specific implementation
-
-long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup)
-{
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Implementation for UC3A, UC3A3, UC3B parts.
-  if(PCL_OSC0 == osc)
-  {
-    // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency,
-    // enable the OSC0, set the main clock source as being OSC0.
-    pm_switch_to_osc0(&AVR32_PM, fcrystal, startup);
-  }
-  else
-  {
-    return PCL_NOT_SUPPORTED;
-  }
-#else
-// Implementation for UC3C, UC3L parts.
-  #if AVR32_PM_VERSION_RESETVALUE < 0x400
-    return PCL_NOT_SUPPORTED;
-  #else
-  if(PCL_OSC0 == osc)
-  {
-    // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency.
-    scif_configure_osc_crystalmode(SCIF_OSC0, fcrystal);
-    // Enable the OSC0
-    scif_enable_osc(SCIF_OSC0, startup, true);
-    // Set the Flash wait state and the speed read mode (depending on the target CPU frequency).
-#if UC3L
-    flashcdw_set_flash_waitstate_and_readmode(fcrystal);
-#elif UC3C
-    flashc_set_flash_waitstate_and_readmode(fcrystal);
-#endif
-    // Set the main clock source as being OSC0.
-    pm_set_mclk_source(PM_CLK_SRC_OSC0);
-  }
-  else
-  {
-    return PCL_NOT_SUPPORTED;
-  }
-  #endif
-#endif
-  return PASS;
-}
-
-long int pcl_configure_usb_clock(void)
-{
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Implementation for UC3A, UC3A3, UC3B parts.
-  pm_configure_usb_clock();
-  return PASS;
-#else
-  #ifdef AVR32_PM_410_H_INCLUDED
-    const scif_pll_opt_t opt = {
-              .osc = SCIF_OSC0,     // Sel Osc0 or Osc1
-              .lockcount = 16,      // lockcount in main clock for the PLL wait lock
-              .div = 1,             // DIV=1 in the formula
-              .mul = 5,             // MUL=7 in the formula
-              .pll_div2 = 1,        // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
-              .pll_wbwdisable = 0,  //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
-              .pll_freq = 1,        // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
-    };
-
-    /* Setup PLL1 on Osc0, mul=7 ,no divisor, lockcount=16, ie. 16Mhzx6 = 96MHz output */
-    scif_pll_setup(SCIF_PLL1, opt); // lockcount in main clock for the PLL wait lock
-
-    /* Enable PLL1 */
-    scif_pll_enable(SCIF_PLL1);
-
-    /* Wait for PLL1 locked */
-    scif_wait_for_pll_locked(SCIF_PLL1) ;
-
-  // Implementation for UC3C parts.
-    // Setup the generic clock for USB
-    scif_gc_setup(AVR32_SCIF_GCLK_USB,
-                  SCIF_GCCTRL_PLL1,
-                  AVR32_SCIF_GC_NO_DIV_CLOCK,
-                  0);
-    // Now enable the generic clock
-    scif_gc_enable(AVR32_SCIF_GCLK_USB);
-    return PASS;
-  #else
-      return PCL_NOT_SUPPORTED;
-  #endif
-#endif
-}
-
-
-#if UC3L
-#else
-void pcl_write_gplp(unsigned long gplp, unsigned long value)
-{
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Implementation for UC3A, UC3A3, UC3B parts.
-  pm_write_gplp(&AVR32_PM,gplp,value);
-#else
-  scif_write_gplp(gplp,value);
-#endif
-}
-
-unsigned long pcl_read_gplp(unsigned long gplp)
-{
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Implementation for UC3A, UC3A3, UC3B parts.
-  return pm_read_gplp(&AVR32_PM,gplp);
-#else
-  return scif_read_gplp(gplp);
-#endif
-}
-#endif
diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.h
deleted file mode 100644
index 28c5888..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.h
+++ /dev/null
@@ -1,379 +0,0 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief High-level library abstracting features such as oscillators/pll/dfll
- *        configuration, clock configuration, System-sensible parameters
- *        configuration, buses clocks configuration, sleep mode, reset.
- *
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- *****************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _POWER_CLOCKS_LIB_H_
-#define _POWER_CLOCKS_LIB_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <avr32/io.h>
-#include "compiler.h"
-
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Support for UC3A, UC3A3, UC3B parts.
-  #include "pm.h"
-#else
-//! Device-specific data
-#if UC3L 
-  #include "pm_uc3l.h"
-  #include "scif_uc3l.h"
-  #include "flashcdw.h"
-#elif UC3C
-  #include "pm_uc3c.h"
-  #include "scif_uc3c.h"
-  #include "flashc.h"
-#endif
-#endif
-
-/*! \name Clocks Management
- */
-//! @{
-
-//! The different oscillators
-typedef enum
-{
-  PCL_OSC0  = 0,
-  PCL_OSC1  = 1
-} pcl_osc_t;
-
-//! The different DFLLs
-typedef enum
-{
-  PCL_DFLL0  = 0,
-  PCL_DFLL1  = 1
-} pcl_dfll_t;
-
-//! Possible Main Clock Sources
-typedef enum
-{
-  PCL_MC_RCSYS,      // Default main clock source, supported by all (aka Slow Clock)
-  PCL_MC_OSC0,       // Supported by all
-  PCL_MC_OSC1,       // Supported by UC3C only
-  PCL_MC_OSC0_PLL0,  // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC0 as reference)
-  PCL_MC_OSC1_PLL0,  // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC1 as reference)
-  PCL_MC_OSC0_PLL1,  // Supported by UC3C  (the main clock source is PLL1 with OSC0 as reference)
-  PCL_MC_OSC1_PLL1,  // Supported by UC3C  (the main clock source is PLL1 with OSC1 as reference)
-  PCL_MC_DFLL0,      // Supported by UC3L
-  PCL_MC_DFLL1,      // Not supported yet
-  PCL_MC_RC120M,     // Supported by UC3L, UC3C
-  PCL_MC_RC8M,       // Supported by UC3C
-  PCL_MC_CRIPOSC     // Supported by UC3C
-} pcl_mainclk_t;
-
-//! Input and output parameters to configure clocks with pcl_configure_clocks().
-// NOTE: regarding the frequency settings, always abide by the datasheet rules and min & max supported frequencies.
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Support for UC3A, UC3A3, UC3B parts.
-#define pcl_freq_param_t  pm_freq_param_t // See pm.h
-#else
-// Support for UC3C, UC3L parts.
-typedef struct
-{
-  //! Main clock source selection (input argument).
-  pcl_mainclk_t main_clk_src;
-
-  //! Target CPU frequency (input/output argument).
-  unsigned long cpu_f;
-
-  //! Target PBA frequency (input/output argument).
-  unsigned long pba_f;
-
-  //! Target PBB frequency (input/output argument).
-  unsigned long pbb_f;
-
-  //! Target PBC frequency (input/output argument).
-  unsigned long pbc_f;
-
-  //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument).
-  unsigned long osc0_f;
-
-  //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument).
-  unsigned long osc0_startup;
-
-  //! DFLL target frequency (input/output argument) (NOTE: the bigger, the most stable the frequency)
-  unsigned long dfll_f;
-  
-  //! Other parameters that might be necessary depending on the device (implementation-dependent).
-  // For the UC3L DFLL setup, this parameter should be pointing to a structure of
-  // type (scif_gclk_opt_t *).
-  void *pextra_params;
-} pcl_freq_param_t;
-#endif
-
-//! Define "not supported" for the lib.
-#define PCL_NOT_SUPPORTED (-10000)
-
-/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks
- *
- * This function needs some parameters stored in a pcl_freq_param_t structure:
- *  - main_clk_src is the id of the main clock source to use,
- *  - cpu_f and pba_f and pbb_f are the wanted frequencies,
- *  - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0),
- *  - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP).
- *  - dfll_f is the target DFLL frequency to set-up if main_clk_src is the dfll.
- *
- * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f.
- *
- * \note: since it is dynamically computing the appropriate field values of the
- * configuration registers from the parameters structure, this function is not
- * optimal in terms of code size. For a code size optimal solution, it is better
- * to create a new function from pcl_configure_clocks() and modify it to use
- * preprocessor computation from pre-defined target frequencies.
- *
- * \param param    pointer on the configuration structure.
- *
- * \retval 0   Success.
- * \retval <0  The configuration cannot be performed.
- */
-extern long int pcl_configure_clocks(pcl_freq_param_t *param);
-
-/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RCSYS osc as main source clock.
- *
- * This function needs some parameters stored in a pcl_freq_param_t structure:
- *  - cpu_f and pba_f and pbb_f are the wanted frequencies
- *
- * Supported main clock sources: PCL_MC_RCSYS
- *
- * Supported synchronous clocks frequencies:
- * 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.
- *
- * \note: by default, this implementation doesn't perform thorough checks on the
- *        input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
- *
- * \note: since it is dynamically computing the appropriate field values of the
- * configuration registers from the parameters structure, this function is not
- * optimal in terms of code size. For a code size optimal solution, it is better
- * to create a new function from pcl_configure_clocks_rcsys() and modify it to use
- * preprocessor computation from pre-defined target frequencies.
- *
- * \param param    pointer on the configuration structure.
- *
- * \retval 0   Success.
- * \retval <0  The configuration cannot be performed.
- */
-extern long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param);
-
-/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RC120M osc as main source clock.
- *
- * This function needs some parameters stored in a pcl_freq_param_t structure:
- *  - cpu_f and pba_f and pbb_f are the wanted frequencies
- *
- * Supported main clock sources: PCL_MC_RC120M
- *
- * Supported synchronous clocks frequencies:
- * 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.
- *
- * \note: by default, this implementation doesn't perform thorough checks on the
- *        input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
- *
- * \note: since it is dynamically computing the appropriate field values of the
- * configuration registers from the parameters structure, this function is not
- * optimal in terms of code size. For a code size optimal solution, it is better
- * to create a new function from pcl_configure_clocks_rc120m() and modify it to
- * use preprocessor computation from pre-defined target frequencies.
- *
- * \param param    pointer on the configuration structure.
- *
- * \retval 0   Success.
- * \retval <0  The configuration cannot be performed.
- */
-extern long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param);
-
-/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the OSC0 osc as main source clock
- *
- * This function needs some parameters stored in a pcl_freq_param_t structure:
- *  - cpu_f and pba_f and pbb_f are the wanted frequencies,
- *  - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0),
- *  - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP).
- *
- * Supported main clock sources: PCL_MC_OSC0
- *
- * Supported synchronous clocks frequencies:
- * (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example)
- * 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.
- *
- * \note: by default, this implementation doesn't perform thorough checks on the
- *        input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
- *
- * \note: since it is dynamically computing the appropriate field values of the
- * configuration registers from the parameters structure, this function is not
- * optimal in terms of code size. For a code size optimal solution, it is better
- * to create a new function from pcl_configure_clocks_osc0() and modify it to use
- * preprocessor computation from pre-defined target frequencies.
- *
- * \param param    pointer on the configuration structure.
- *
- * \retval 0   Success.
- * \retval <0  The configuration cannot be performed.
- */
-extern long int pcl_configure_clocks_osc0(pcl_freq_param_t *param);
-
-/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the DFLL0 as main source clock
- *
- * This function needs some parameters stored in a pcl_freq_param_t structure:
- *  - cpu_f and pba_f and pbb_f are the wanted frequencies,
- *  - dfll_f is the target DFLL frequency to set-up
- *
- * \note: when the DFLL0 is to be used as main source clock for the synchronous clocks,
- *  the target frequency of the DFLL should be chosen to be as high as possible
- *  within the specification range (for stability reasons); the target cpu and pbx
- *  frequencies will then be reached by appropriate division ratio.
- *
- * Supported main clock sources: PCL_MC_DFLL0
- *
- * Supported synchronous clocks frequencies:
- * (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example)
- * 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.
- *
- * \note: by default, this implementation doesn't perform thorough checks on the
- *        input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
- *
- * \note: since it is dynamically computing the appropriate field values of the
- * configuration registers from the parameters structure, this function is not
- * optimal in terms of code size. For a code size optimal solution, it is better
- * to create a new function from pcl_configure_clocks_dfll0() and modify it to
- * use preprocessor computation from pre-defined target frequencies.
- *
- * \param param    pointer on the configuration structure.
- *
- * \retval 0   Success.
- * \retval <0  The configuration cannot be performed.
- */
-extern long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param);
-
-/*! \brief Switch the main clock source to Osc0 configured in crystal mode
- *
- * \param osc The oscillator to enable and switch to.
- * \param fcrystal Oscillator external crystal frequency (Hz)
- * \param startup Oscillator startup time.
- *
- * \return Status.
- *   \retval 0  Success.
- *   \retval <0 An error occured.
- */
-extern long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup);
-
-/*! \brief Enable the clock of a module.
- *
- * \param module The module to clock (use one of the defines in the part-specific
- * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
- * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks"
- * or look in the module section).
- *
- * \return Status.
- *   \retval 0  Success.
- *   \retval <0 An error occured.
- */
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Implementation for UC3A, UC3A3, UC3B parts.
-#define pcl_enable_module(module) pm_enable_module(&AVR32_PM, module)
-#else
-// Implementation for UC3C, UC3L parts.
-#define pcl_enable_module(module) pm_enable_module(module)
-#endif
-
-/*! \brief Disable the clock of a module.
- *
- * \param module The module to shut down (use one of the defines in the part-specific
- * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
- * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks"
- * or look in the module section).
- *
- * \return Status.
- *   \retval 0  Success.
- *   \retval <0 An error occured.
- */
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Implementation for UC3A, UC3A3, UC3B parts.
-#define pcl_disable_module(module)  pm_disable_module(&AVR32_PM, module)
-#else
-// Implementation for UC3C, UC3L parts.
-#define pcl_disable_module(module)  pm_disable_module(module)
-#endif
-
-/*! \brief Configure the USB Clock
- *
- *
- * \return Status.
- *   \retval 0  Success.
- *   \retval <0 An error occured.
- */
-extern long int pcl_configure_usb_clock(void);
-
-//! @}
-
-/*! \name Power Management
- */
-//! @{
-/*!
- * \brief Read the content of the GPLP registers
- * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
- *
- * \return The content of the chosen GPLP register.
- */
-extern unsigned long pcl_read_gplp(unsigned long gplp);
-
-
-/*!
- * \brief Write into the GPLP registers
- * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
- * \param value Value to write
- */
-extern void pcl_write_gplp(unsigned long gplp, unsigned long value);
-
-//! @}
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif  // _POWER_CLOCKS_LIB_H_
diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.c
deleted file mode 100644
index cadb8b1..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.c
+++ /dev/null
@@ -1,443 +0,0 @@
-/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief SPI driver for AVR32 UC3.
- *
- * This file defines a useful set of functions for the SPI interface on AVR32
- * devices.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with an SPI module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#include "spi.h"
-
-#ifdef FREERTOS_USED
-
-#include "FreeRTOS.h"
-#include "semphr.h"
-
-#endif
-
-
-/*! \name SPI Writable Bit-Field Registers
- */
-//! @{
-
-typedef union
-{
-  unsigned long                 cr;
-  avr32_spi_cr_t                CR;
-} u_avr32_spi_cr_t;
-
-typedef union
-{
-  unsigned long                 mr;
-  avr32_spi_mr_t                MR;
-} u_avr32_spi_mr_t;
-
-typedef union
-{
-  unsigned long                 tdr;
-  avr32_spi_tdr_t               TDR;
-} u_avr32_spi_tdr_t;
-
-typedef union
-{
-  unsigned long                 ier;
-  avr32_spi_ier_t               IER;
-} u_avr32_spi_ier_t;
-
-typedef union
-{
-  unsigned long                 idr;
-  avr32_spi_idr_t               IDR;
-} u_avr32_spi_idr_t;
-
-typedef union
-{
-  unsigned long                 csr;
-  avr32_spi_csr0_t              CSR;
-} u_avr32_spi_csr_t;
-
-//! @}
-
-
-#ifdef FREERTOS_USED
-
-//! The SPI mutex.
-static xSemaphoreHandle xSPIMutex;
-
-#endif
-
-
-/*! \brief Calculates the baudrate divider.
- *
- * \param options Pointer to a structure containing initialization options for
- *                an SPI channel.
- * \param pba_hz  SPI module input clock frequency (PBA clock, Hz).
- *
- * \return Divider or error code.
- *   \retval >=0  Success.
- *   \retval  <0  Error.
- */
-static int getBaudDiv(const spi_options_t *options, unsigned int pba_hz)
-{
-  int baudDiv = (pba_hz + options->baudrate / 2) / options->baudrate;
-
-  if (baudDiv <= 0 || baudDiv > 255) {
-    return -1;
-  }
-
-  return baudDiv;
-}
-
-
-void spi_reset(volatile avr32_spi_t *spi)
-{
-  spi->cr = AVR32_SPI_CR_SWRST_MASK;
-}
-
-
-spi_status_t spi_initSlave(volatile avr32_spi_t *spi,
-                           unsigned char bits,
-                           unsigned char spi_mode)
-{
-  if (spi_mode > 3 ||
-      bits < 8 || bits > 16) {
-    return SPI_ERROR_ARGUMENT;
-  }
-
-  // Reset.
-  spi->cr = AVR32_SPI_CR_SWRST_MASK;
-
-  // Will use CSR0 offsets; these are the same for CSR0 to CSR3.
-  spi->csr0 = ((spi_mode >> 1) << AVR32_SPI_CSR0_CPOL_OFFSET) |
-              (((spi_mode & 0x1) ^ 0x1) << AVR32_SPI_CSR0_NCPHA_OFFSET) |
-              ((bits - 8) << AVR32_SPI_CSR0_BITS_OFFSET);
-
-  return SPI_OK;
-}
-
-
-spi_status_t spi_initTest(volatile avr32_spi_t *spi)
-{
-  // Reset.
-  spi->cr = AVR32_SPI_CR_SWRST_MASK;
-  spi->mr |= AVR32_SPI_MR_MSTR_MASK | // Master Mode.
-             AVR32_SPI_MR_LLB_MASK;   // Local Loopback.
-
-  return SPI_OK;
-}
-
-
-spi_status_t spi_initMaster(volatile avr32_spi_t *spi, const spi_options_t *options)
-{
-  u_avr32_spi_mr_t u_avr32_spi_mr;
-
-  if (options->modfdis > 1) {
-    return SPI_ERROR_ARGUMENT;
-  }
-
-  // Reset.
-  spi->cr = AVR32_SPI_CR_SWRST_MASK;
-
-  // Master Mode.
-  u_avr32_spi_mr.mr = spi->mr;
-  u_avr32_spi_mr.MR.mstr = 1;
-  u_avr32_spi_mr.MR.modfdis = options->modfdis;
-  u_avr32_spi_mr.MR.llb = 0;
-  u_avr32_spi_mr.MR.pcs = (1 << AVR32_SPI_MR_PCS_SIZE) - 1;
-  spi->mr = u_avr32_spi_mr.mr;
-
-  return SPI_OK;
-}
-
-
-spi_status_t spi_selectionMode(volatile avr32_spi_t *spi,
-                               unsigned char variable_ps,
-                               unsigned char pcs_decode,
-                               unsigned char delay)
-{
-  u_avr32_spi_mr_t u_avr32_spi_mr;
-
-  if (variable_ps > 1 ||
-      pcs_decode > 1) {
-    return SPI_ERROR_ARGUMENT;
-  }
-
-  u_avr32_spi_mr.mr = spi->mr;
-  u_avr32_spi_mr.MR.ps = variable_ps;
-  u_avr32_spi_mr.MR.pcsdec = pcs_decode;
-  u_avr32_spi_mr.MR.dlybcs = delay;
-  spi->mr = u_avr32_spi_mr.mr;
-
-  return SPI_OK;
-}
-
-
-spi_status_t spi_selectChip(volatile avr32_spi_t *spi, unsigned char chip)
-{
-#ifdef FREERTOS_USED
-  while (pdFALSE == xSemaphoreTake(xSPIMutex, 20));
-#endif
-
-  // Assert all lines; no peripheral is selected.
-  spi->mr |= AVR32_SPI_MR_PCS_MASK;
-
-  if (spi->mr & AVR32_SPI_MR_PCSDEC_MASK) {
-    // The signal is decoded; allow up to 15 chips.
-    if (chip > 14) {
-      return SPI_ERROR_ARGUMENT;
-    }
-
-    spi->mr &= ~AVR32_SPI_MR_PCS_MASK | (chip << AVR32_SPI_MR_PCS_OFFSET);
-  } else {
-    if (chip > 3) {
-      return SPI_ERROR_ARGUMENT;
-    }
-
-    spi->mr &= ~(1 << (AVR32_SPI_MR_PCS_OFFSET + chip));
-  }
-
-  return SPI_OK;
-}
-
-
-spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip)
-{
-  unsigned int timeout = SPI_TIMEOUT;
-
-  while (!(spi->sr & AVR32_SPI_SR_TXEMPTY_MASK)) {
-    if (!timeout--) {
-      return SPI_ERROR_TIMEOUT;
-    }
-  }
-
-  // Assert all lines; no peripheral is selected.
-  spi->mr |= AVR32_SPI_MR_PCS_MASK;
-
-  // Last transfer, so deassert the current NPCS if CSAAT is set.
-  spi->cr = AVR32_SPI_CR_LASTXFER_MASK;
-
-#ifdef FREERTOS_USED
-  xSemaphoreGive(xSPIMutex);
-#endif
-
-  return SPI_OK;
-}
-
-
-spi_status_t spi_setupChipReg(volatile avr32_spi_t *spi,
-                              const spi_options_t *options,
-                              unsigned int pba_hz)
-{
-  u_avr32_spi_csr_t u_avr32_spi_csr;
-
-  if (options->spi_mode > 3 ||
-      options->stay_act > 1 ||
-      options->bits < 8 || options->bits > 16) {
-    return SPI_ERROR_ARGUMENT;
-  }
-
-  int baudDiv = getBaudDiv(options, pba_hz);
-
-  if (baudDiv < 0) {
-    return SPI_ERROR_ARGUMENT;
-  }
-
-  // Will use CSR0 offsets; these are the same for CSR0 to CSR3.
-  u_avr32_spi_csr.csr = 0;
-  u_avr32_spi_csr.CSR.cpol = options->spi_mode >> 1;
-  u_avr32_spi_csr.CSR.ncpha = (options->spi_mode & 0x1) ^ 0x1;
-  u_avr32_spi_csr.CSR.csaat = options->stay_act;
-  u_avr32_spi_csr.CSR.bits = options->bits - 8;
-  u_avr32_spi_csr.CSR.scbr = baudDiv;
-  u_avr32_spi_csr.CSR.dlybs = options->spck_delay;
-  u_avr32_spi_csr.CSR.dlybct = options->trans_delay;
-
-  switch(options->reg) {
-    case 0:
-      spi->csr0 = u_avr32_spi_csr.csr;
-      break;
-    case 1:
-      spi->csr1 = u_avr32_spi_csr.csr;
-      break;
-    case 2:
-      spi->csr2 = u_avr32_spi_csr.csr;
-      break;
-    case 3:
-      spi->csr3 = u_avr32_spi_csr.csr;
-      break;
-    default:
-      return SPI_ERROR_ARGUMENT;
-  }
-
-#ifdef FREERTOS_USED
-  if (!xSPIMutex)
-  {
-    // Create the SPI mutex.
-    vSemaphoreCreateBinary(xSPIMutex);
-    if (!xSPIMutex)
-    {
-      while(1);
-    }
-  }
-#endif
-
-  return SPI_OK;
-}
-
-
-void spi_enable(volatile avr32_spi_t *spi)
-{
-  spi->cr = AVR32_SPI_CR_SPIEN_MASK;
-}
-
-
-void spi_disable(volatile avr32_spi_t *spi)
-{
-  spi->cr = AVR32_SPI_CR_SPIDIS_MASK;
-}
-
-
-int spi_is_enabled(volatile avr32_spi_t *spi)
-{
-  return (spi->sr & AVR32_SPI_SR_SPIENS_MASK) != 0;
-}
-
-
-unsigned char spi_writeRegisterEmptyCheck(volatile avr32_spi_t *spi)
-{
-  return ((spi->sr & AVR32_SPI_SR_TDRE_MASK) != 0);
-}
-
-
-spi_status_t spi_write(volatile avr32_spi_t *spi, unsigned short data)
-{
-  unsigned int timeout = SPI_TIMEOUT;
-
-  while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) {
-    if (!timeout--) {
-      return SPI_ERROR_TIMEOUT;
-    }
-  }
-
-  spi->tdr = data << AVR32_SPI_TDR_TD_OFFSET;
-
-  return SPI_OK;
-}
-
-
-spi_status_t spi_variableSlaveWrite(volatile avr32_spi_t *spi, unsigned short data,
-                                    unsigned char pcs, unsigned char lastxfer)
-{
-  unsigned int timeout = SPI_TIMEOUT;
-
-  if (pcs > 14 || lastxfer > 1) {
-    return SPI_ERROR_ARGUMENT;
-  }
-
-  while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) {
-    if (!timeout--) {
-      return SPI_ERROR_TIMEOUT;
-    }
-  }
-
-  spi->tdr = (data << AVR32_SPI_TDR_TD_OFFSET) |
-             (pcs << AVR32_SPI_TDR_PCS_OFFSET) |
-             (lastxfer << AVR32_SPI_TDR_LASTXFER_OFFSET);
-
-  return SPI_OK;
-}
-
-
-unsigned char spi_writeEndCheck(volatile avr32_spi_t *spi)
-{
-  return ((spi->sr & AVR32_SPI_SR_TXEMPTY_MASK) != 0);
-}
-
-
-unsigned char spi_readRegisterFullCheck(volatile avr32_spi_t *spi)
-{
-  return ((spi->sr & AVR32_SPI_SR_RDRF_MASK) != 0);
-}
-
-
-spi_status_t spi_read(volatile avr32_spi_t *spi, unsigned short *data)
-{
-  unsigned int timeout = SPI_TIMEOUT;
-
-  while ((spi->sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) !=
-         (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) {
-    if (!timeout--) {
-      return SPI_ERROR_TIMEOUT;
-    }
-  }
-
-  *data = spi->rdr >> AVR32_SPI_RDR_RD_OFFSET;
-
-  return SPI_OK;
-}
-
-
-unsigned char spi_getStatus(volatile avr32_spi_t *spi)
-{
-  spi_status_t ret = SPI_OK;
-  unsigned long sr = spi->sr;
-
-  if (sr & AVR32_SPI_SR_OVRES_MASK) {
-    ret = SPI_ERROR_OVERRUN;
-  }
-
-  if (sr & AVR32_SPI_SR_MODF_MASK) {
-    ret += SPI_ERROR_MODE_FAULT;
-  }
-
-  if (ret == (SPI_ERROR_OVERRUN + SPI_ERROR_MODE_FAULT)) {
-    return SPI_ERROR_OVERRUN_AND_MODE_FAULT;
-  }
-  else if (ret > 0) {
-    return ret;
-  } else {
-    return SPI_OK;
-  }
-}
diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.h
deleted file mode 100644
index 6dcc928..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.h
+++ /dev/null
@@ -1,342 +0,0 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief SPI driver for AVR32 UC3.
- *
- * This file defines a useful set of functions for the SPI interface on AVR32
- * devices.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with an SPI module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _SPI_H_
-#define _SPI_H_
-
-#include <avr32/io.h>
-
-
-//! Time-out value (number of attempts).
-#define SPI_TIMEOUT       10000
-
-
-//! Status codes used by the SPI driver.
-typedef enum
-{
-  SPI_ERROR = -1,
-  SPI_OK = 0,
-  SPI_ERROR_TIMEOUT = 1,
-  SPI_ERROR_ARGUMENT,
-  SPI_ERROR_OVERRUN,
-  SPI_ERROR_MODE_FAULT,
-  SPI_ERROR_OVERRUN_AND_MODE_FAULT
-} spi_status_t;
-
-//! Option structure for SPI channels.
-typedef struct
-{
-  //! The SPI channel to set up.
-  unsigned char reg;
-
-  //! Preferred baudrate for the SPI.
-  unsigned int baudrate;
-
-  //! Number of bits in each character (8 to 16).
-  unsigned char bits;
-
-  //! Delay before first clock pulse after selecting slave (in PBA clock periods).
-  unsigned char spck_delay;
-
-  //! Delay between each transfer/character (in PBA clock periods).
-  unsigned char trans_delay;
-
-  //! Sets this chip to stay active after last transfer to it.
-  unsigned char stay_act;
-
-  //! Which SPI mode to use when transmitting.
-  unsigned char spi_mode;
-
-  //! Disables the mode fault detection.
-  //! With this bit cleared, the SPI master mode will disable itself if another
-  //! master tries to address it.
-  unsigned char modfdis;
-} spi_options_t;
-
-
-/*! \brief Resets the SPI controller.
- *
- * \param spi Base address of the SPI instance.
- */
-extern void spi_reset(volatile avr32_spi_t *spi);
-
-/*! \brief Initializes the SPI in slave mode.
- *
- * \param spi       Base address of the SPI instance.
- * \param bits      Number of bits in each transmitted character (8 to 16).
- * \param spi_mode  Clock polarity and phase.
- *
- * \return Status.
- *   \retval SPI_OK             Success.
- *   \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed.
- */
-extern spi_status_t spi_initSlave(volatile avr32_spi_t *spi,
-                                  unsigned char bits,
-                                  unsigned char spi_mode);
-
-/*! \brief Sets up the SPI in a test mode where the transmitter is connected to
- *         the receiver (local loopback).
- *
- * \param spi Base address of the SPI instance.
- *
- * \return Status.
- *   \retval SPI_OK Success.
- */
-extern spi_status_t spi_initTest(volatile avr32_spi_t *spi);
-
-/*! \brief Initializes the SPI in master mode.
- *
- * \param spi     Base address of the SPI instance.
- * \param options Pointer to a structure containing initialization options.
- *
- * \return Status.
- *   \retval SPI_OK             Success.
- *   \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed.
- */
-extern spi_status_t spi_initMaster(volatile avr32_spi_t *spi, const spi_options_t *options);
-
-/*! \brief Sets up how and when the slave chips are selected (master mode only).
- *
- * \param spi         Base address of the SPI instance.
- * \param variable_ps Target slave is selected in transfer register for every
- *                    character to transmit.
- * \param pcs_decode  The four chip select lines are decoded externally. Values
- *                    0 to 14 can be given to \ref spi_selectChip.
- * \param delay       Delay in PBA periods between chip selects.
- *
- * \return Status.
- *   \retval SPI_OK             Success.
- *   \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed.
- */
-extern spi_status_t spi_selectionMode(volatile avr32_spi_t *spi,
-                                      unsigned char variable_ps,
-                                      unsigned char pcs_decode,
-                                      unsigned char delay);
-
-/*! \brief Selects slave chip.
- *
- * \param spi   Base address of the SPI instance.
- * \param chip  Slave chip number (normal: 0 to 3, extarnally decoded signal: 0
- *              to 14).
- *
- * \return Status.
- *   \retval SPI_OK             Success.
- *   \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed.
- */
-extern spi_status_t spi_selectChip(volatile avr32_spi_t *spi, unsigned char chip);
-
-/*! \brief Unselects slave chip.
- *
- * \param spi   Base address of the SPI instance.
- * \param chip  Slave chip number (normal: 0 to 3, extarnally decoded signal: 0
- *              to 14).
- *
- * \return Status.
- *   \retval SPI_OK             Success.
- *   \retval SPI_ERROR_TIMEOUT  Time-out.
- *
- * \note Will block program execution until time-out occurs if last transmission
- *       is not complete. Invoke \ref spi_writeEndCheck beforehand if needed.
- */
-extern spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip);
-
-/*! \brief Sets options for a specific slave chip.
- *
- * The baudrate field has to be written before transfer in master mode. Four
- * similar registers exist, one for each slave. When using encoded slave
- * addressing, reg=0 sets options for slaves 0 to 3, reg=1 for slaves 4 to 7 and
- * so on.
- *
- * \param spi     Base address of the SPI instance.
- * \param options Pointer to a structure containing initialization options for
- *                an SPI channel.
- * \param pba_hz  SPI module input clock frequency (PBA clock, Hz).
- *
- * \return Status.
- *   \retval SPI_OK             Success.
- *   \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed.
- */
-extern spi_status_t spi_setupChipReg(volatile avr32_spi_t *spi,
-                                     const spi_options_t *options,
-                                     unsigned int pba_hz);
-
-/*! \brief Enables the SPI.
- *
- * \param spi Base address of the SPI instance.
- */
-extern void spi_enable(volatile avr32_spi_t *spi);
-
-/*! \brief Disables the SPI.
- *
- * Ensures that nothing is transferred while setting up buffers.
- *
- * \param spi Base address of the SPI instance.
- *
- * \warning This may cause data loss if used on a slave SPI.
- */
-extern void spi_disable(volatile avr32_spi_t *spi);
-
-/*! \brief Tests if the SPI is enabled.
- *
- * \param spi Base address of the SPI instance.
- *
- * \return \c 1 if the SPI is enabled, otherwise \c 0.
- */
-extern int spi_is_enabled(volatile avr32_spi_t *spi);
-
-/*! \brief Checks if there is no data in the transmit register.
- *
- * \param spi Base address of the SPI instance.
- *
- * \return Status.
- *   \retval 1  No data in TDR.
- *   \retval 0  Some data in TDR.
- */
-extern unsigned char spi_writeRegisterEmptyCheck(volatile avr32_spi_t *spi);
-
-/*! \brief Writes one data word in master fixed peripheral select mode or in
- *         slave mode.
- *
- * \param spi   Base address of the SPI instance.
- * \param data  The data word to write.
- *
- * \return Status.
- *   \retval SPI_OK             Success.
- *   \retval SPI_ERROR_TIMEOUT  Time-out.
- *
- * \note Will block program execution until time-out occurs if transmitter is
- *       busy and transmit buffer is full. Invoke
- *       \ref spi_writeRegisterEmptyCheck beforehand if needed.
- *
- * \note Once the data has been written to the transmit buffer, the end of
- *       transmission is not waited for. Invoke \ref spi_writeEndCheck if
- *       needed.
- */
-extern spi_status_t spi_write(volatile avr32_spi_t *spi, unsigned short data);
-
-/*! \brief Selects a slave in master variable peripheral select mode and writes
- *         one data word to it.
- *
- * \param spi       Base address of the SPI instance.
- * \param data      The data word to write.
- * \param pcs       Slave selector (bit 0 -> nCS line 0, bit 1 -> nCS line 1,
- *                  etc.).
- * \param lastxfer  Boolean indicating whether this is the last data word
- *                  transfer.
- *
- * \return Status.
- *   \retval SPI_OK             Success.
- *   \retval SPI_ERROR_TIMEOUT  Time-out.
- *   \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed.
- *
- * \note Will block program execution until time-out occurs if transmitter is
- *       busy and transmit buffer is full. Invoke
- *       \ref spi_writeRegisterEmptyCheck beforehand if needed.
- *
- * \note Once the data has been written to the transmit buffer, the end of
- *       transmission is not waited for. Invoke \ref spi_writeEndCheck if
- *       needed.
- */
-extern spi_status_t spi_variableSlaveWrite(volatile avr32_spi_t *spi,
-                                           unsigned short data,
-                                           unsigned char pcs,
-                                           unsigned char lastxfer);
-
-/*! \brief Checks if all transmissions are complete.
- *
- * \param spi Base address of the SPI instance.
- *
- * \return Status.
- *   \retval 1  All transmissions complete.
- *   \retval 0  Transmissions not complete.
- */
-extern unsigned char spi_writeEndCheck(volatile avr32_spi_t *spi);
-
-/*! \brief Checks if there is data in the receive register.
- *
- * \param spi Base address of the SPI instance.
- *
- * \return Status.
- *   \retval 1  Some data in RDR.
- *   \retval 0  No data in RDR.
- */
-extern unsigned char spi_readRegisterFullCheck(volatile avr32_spi_t *spi);
-
-/*! \brief Reads one data word in master mode or in slave mode.
- *
- * \param spi   Base address of the SPI instance.
- * \param data  Pointer to the location where to store the received data word.
- *
- * \return Status.
- *   \retval SPI_OK             Success.
- *   \retval SPI_ERROR_TIMEOUT  Time-out.
- *
- * \note Will block program execution until time-out occurs if no data is
- *       received or last transmission is not complete. Invoke
- *       \ref spi_writeEndCheck or \ref spi_readRegisterFullCheck beforehand if
- *       needed.
- */
-extern spi_status_t spi_read(volatile avr32_spi_t *spi, unsigned short *data);
-
-/*! \brief Gets status information from the SPI.
- *
- * \param spi Base address of the SPI instance.
- *
- * \return Status.
- *   \retval SPI_OK                           Success.
- *   \retval SPI_ERROR_OVERRUN                Overrun error.
- *   \retval SPI_ERROR_MODE_FAULT             Mode fault (SPI addressed as slave
- *                                            while in master mode).
- *   \retval SPI_ERROR_OVERRUN_AND_MODE_FAULT Overrun error and mode fault.
- */
-extern unsigned char spi_getStatus(volatile avr32_spi_t *spi);
-
-
-#endif  // _SPI_H_
diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.c
deleted file mode 100644
index b95882a..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.c
+++ /dev/null
@@ -1,914 +0,0 @@
-/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief USART driver for AVR32 UC3.
- *
- * This file contains basic functions for the AVR32 USART, with support for all
- * modes, settings and clock speeds.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with a USART module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#include "compiler.h"
-#include "usart.h"
-
-
-//------------------------------------------------------------------------------
-/*! \name Private Functions
- */
-//! @{
-
-
-/*! \brief Checks if the USART is in multidrop mode.
- *
- * \param usart Base address of the USART instance.
- *
- * \return \c 1 if the USART is in multidrop mode, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-static __inline__ int usart_mode_is_multidrop(volatile avr32_usart_t *usart)
-{
-  return ((usart->mr >> AVR32_USART_MR_PAR_OFFSET) & AVR32_USART_MR_PAR_MULTI) == AVR32_USART_MR_PAR_MULTI;
-}
-
-
-/*! \brief Calculates a clock divider (\e CD) and a fractional part (\e FP) for
- *         the USART asynchronous modes to generate a baud rate as close as
- *         possible to the baud rate set point.
- *
- * Baud rate calculation:
- * \f$ Baudrate = \frac{SelectedClock}{Over \times (CD + \frac{FP}{8})} \f$, \e Over being 16 or 8.
- * The maximal oversampling is selected if it allows to generate a baud rate close to the set point.
- *
- * \param usart     Base address of the USART instance.
- * \param baudrate  Baud rate set point.
- * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Baud rate successfully initialized.
- * \retval USART_INVALID_INPUT  Baud rate set point is out of range for the given input clock frequency.
- */
-static int usart_set_async_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
-{
-  unsigned int over = (pba_hz >= 16 * baudrate) ? 16 : 8;
-  unsigned int cd_fp = ((1 << AVR32_USART_BRGR_FP_SIZE) * pba_hz + (over * baudrate) / 2) / (over * baudrate);
-  unsigned int cd = cd_fp >> AVR32_USART_BRGR_FP_SIZE;
-  unsigned int fp = cd_fp & ((1 << AVR32_USART_BRGR_FP_SIZE) - 1);
-
-  if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
-    return USART_INVALID_INPUT;
-
-  usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK |
-                             AVR32_USART_MR_SYNC_MASK |
-                             AVR32_USART_MR_OVER_MASK)) |
-              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
-              ((over == 16) ? AVR32_USART_MR_OVER_X16 : AVR32_USART_MR_OVER_X8) << AVR32_USART_MR_OVER_OFFSET;
-
-  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET |
-                fp << AVR32_USART_BRGR_FP_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-/*! \brief Calculates a clock divider (\e CD) for the USART synchronous master
- *         modes to generate a baud rate as close as possible to the baud rate
- *         set point.
- *
- * Baud rate calculation:
- * \f$ Baudrate = \frac{SelectedClock}{CD} \f$.
- *
- * \param usart     Base address of the USART instance.
- * \param baudrate  Baud rate set point.
- * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Baud rate successfully initialized.
- * \retval USART_INVALID_INPUT  Baud rate set point is out of range for the given input clock frequency.
- */
-static int usart_set_sync_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
-{
-  unsigned int cd = (pba_hz + baudrate / 2) / baudrate;
-
-  if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
-    return USART_INVALID_INPUT;
-
-  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
-              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
-              AVR32_USART_MR_SYNC_MASK;
-
-  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-/*! \brief Selects the SCK pin as the source of baud rate for the USART
- *         synchronous slave modes.
- *
- * \param usart Base address of the USART instance.
- *
- * \retval USART_SUCCESS  Baud rate successfully initialized.
- */
-static int usart_set_sync_slave_baudrate(volatile avr32_usart_t *usart)
-{
-  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
-              AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET |
-              AVR32_USART_MR_SYNC_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-/*! \brief Calculates a clock divider (\e CD) for the USART ISO7816 mode to
- *         generate an ISO7816 clock as close as possible to the clock set point.
- *
- * ISO7816 clock calculation:
- * \f$ Clock = \frac{SelectedClock}{CD} \f$.
- *
- * \param usart   Base address of the USART instance.
- * \param clock   ISO7816 clock set point.
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        ISO7816 clock successfully initialized.
- * \retval USART_INVALID_INPUT  ISO7816 clock set point is out of range for the given input clock frequency.
- */
-static int usart_set_iso7816_clock(volatile avr32_usart_t *usart, unsigned int clock, unsigned long pba_hz)
-{
-  unsigned int cd = (pba_hz + clock / 2) / clock;
-
-  if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
-    return USART_INVALID_INPUT;
-
-  usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK |
-                             AVR32_USART_MR_SYNC_MASK |
-                             AVR32_USART_MR_OVER_MASK)) |
-              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
-              AVR32_USART_MR_OVER_X16 << AVR32_USART_MR_OVER_OFFSET;
-
-  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-
-/*! \brief Calculates a clock divider (\e CD) for the USART SPI master mode to
- *         generate a baud rate as close as possible to the baud rate set point.
- *
- * Baud rate calculation:
- * \f$ Baudrate = \frac{SelectedClock}{CD} \f$.
- *
- * \param usart     Base address of the USART instance.
- * \param baudrate  Baud rate set point.
- * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Baud rate successfully initialized.
- * \retval USART_INVALID_INPUT  Baud rate set point is out of range for the given input clock frequency.
- */
-static int usart_set_spi_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
-{
-  unsigned int cd = (pba_hz + baudrate / 2) / baudrate;
-
-  if (cd < 4 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
-    return USART_INVALID_INPUT;
-
-  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
-              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET;
-
-  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-/*! \brief Selects the SCK pin as the source of baud rate for the USART SPI
- *         slave mode.
- *
- * \param usart Base address of the USART instance.
- *
- * \retval USART_SUCCESS  Baud rate successfully initialized.
- */
-static int usart_set_spi_slave_baudrate(volatile avr32_usart_t *usart)
-{
-  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
-              AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-#endif  // USART rev. >= 4.0.0
-
-
-//! @}
-
-
-//------------------------------------------------------------------------------
-/*! \name Initialization Functions
- */
-//! @{
-
-
-void usart_reset(volatile avr32_usart_t *usart)
-{
-  Bool global_interrupt_enabled = Is_global_interrupt_enabled();
-
-  // Disable all USART interrupts.
-  // Interrupts needed should be set explicitly on every reset.
-  if (global_interrupt_enabled) Disable_global_interrupt();
-  usart->idr = 0xFFFFFFFF;
-  usart->csr;
-  if (global_interrupt_enabled) Enable_global_interrupt();
-
-  // Reset mode and other registers that could cause unpredictable behavior after reset.
-  usart->mr = 0;
-  usart->rtor = 0;
-  usart->ttgr = 0;
-
-  // Shutdown TX and RX (will be re-enabled when setup has successfully completed),
-  // reset status bits and turn off DTR and RTS.
-  usart->cr = AVR32_USART_CR_RSTRX_MASK   |
-              AVR32_USART_CR_RSTTX_MASK   |
-              AVR32_USART_CR_RSTSTA_MASK  |
-              AVR32_USART_CR_RSTIT_MASK   |
-              AVR32_USART_CR_RSTNACK_MASK |
-#ifndef AVR32_USART_440_H_INCLUDED
-// Note: Modem Signal Management DTR-DSR-DCD-RI are not included in USART rev.440.
-              AVR32_USART_CR_DTRDIS_MASK  |
-#endif
-              AVR32_USART_CR_RTSDIS_MASK;
-}
-
-
-int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (!opt || // Null pointer.
-      opt->charlength < 5 || opt->charlength > 9 ||
-      opt->paritytype > 7 ||
-      opt->stopbits > 2 + 255 ||
-      opt->channelmode > 3 ||
-      usart_set_async_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  if (opt->charlength == 9)
-  {
-    // Character length set to 9 bits. MODE9 dominates CHRL.
-    usart->mr |= AVR32_USART_MR_MODE9_MASK;
-  }
-  else
-  {
-    // CHRL gives the character length (- 5) when MODE9 = 0.
-    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
-  }
-
-  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
-               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
-
-  if (opt->stopbits > USART_2_STOPBITS)
-  {
-    // Set two stop bits
-    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
-    // and a timeguard period gives the rest.
-    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
-  }
-  else
-    // Insert 1, 1.5 or 2 stop bits.
-    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
-
-  // Set normal mode.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
-
-  // Setup complete; enable communication.
-  // Enable input and output.
-  usart->cr = AVR32_USART_CR_RXEN_MASK |
-              AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_rs232_tx_only(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (!opt || // Null pointer.
-      opt->charlength < 5 || opt->charlength > 9 ||
-      opt->paritytype > 7 ||
-      opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
-      opt->channelmode > 3 ||
-      usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  if (opt->charlength == 9)
-  {
-    // Character length set to 9 bits. MODE9 dominates CHRL.
-    usart->mr |= AVR32_USART_MR_MODE9_MASK;
-  }
-  else
-  {
-    // CHRL gives the character length (- 5) when MODE9 = 0.
-    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
-  }
-
-  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
-               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
-
-  if (opt->stopbits > USART_2_STOPBITS)
-  {
-    // Set two stop bits
-    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
-    // and a timeguard period gives the rest.
-    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
-  }
-  else
-    // Insert 1 or 2 stop bits.
-    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
-
-  // Set normal mode.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
-
-  // Setup complete; enable communication.
-  // Enable only output as input is not possible in synchronous mode without
-  // transferring clock.
-  usart->cr = AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
-{
-  // First: Setup standard RS232.
-  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  // Set hardware handshaking mode.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MR_MODE_HARDWARE << AVR32_USART_MR_MODE_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
-{
-  // First: Setup standard RS232.
-  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  // Set modem mode.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MR_MODE_MODEM << AVR32_USART_MR_MODE_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_sync_master(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (!opt || // Null pointer.
-      opt->charlength < 5 || opt->charlength > 9 ||
-      opt->paritytype > 7 ||
-      opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
-      opt->channelmode > 3 ||
-      usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  if (opt->charlength == 9)
-  {
-    // Character length set to 9 bits. MODE9 dominates CHRL.
-    usart->mr |= AVR32_USART_MR_MODE9_MASK;
-  }
-  else
-  {
-    // CHRL gives the character length (- 5) when MODE9 = 0.
-    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
-  }
-
-  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
-               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
-
-  if (opt->stopbits > USART_2_STOPBITS)
-  {
-    // Set two stop bits
-    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
-    // and a timeguard period gives the rest.
-    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
-  }
-  else
-    // Insert 1 or 2 stop bits.
-    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
-
-  // Set normal mode.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET |
-              AVR32_USART_MR_CLKO_MASK;
-
-  // Setup complete; enable communication.
-  // Enable input and output.
-  usart->cr = AVR32_USART_CR_RXEN_MASK |
-              AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_sync_slave(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (!opt || // Null pointer.
-      opt->charlength < 5 || opt->charlength > 9 ||
-      opt->paritytype > 7 ||
-      opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
-      opt->channelmode > 3 ||
-      usart_set_sync_slave_baudrate(usart) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  if (opt->charlength == 9)
-  {
-    // Character length set to 9 bits. MODE9 dominates CHRL.
-    usart->mr |= AVR32_USART_MR_MODE9_MASK;
-  }
-  else
-  {
-    // CHRL gives the character length (- 5) when MODE9 = 0.
-    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
-  }
-
-  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
-               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
-
-  if (opt->stopbits > USART_2_STOPBITS)
-  {
-    // Set two stop bits
-    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
-    // and a timeguard period gives the rest.
-    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
-  }
-  else
-    // Insert 1 or 2 stop bits.
-    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
-
-  // Set normal mode.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
-
-  // Setup complete; enable communication.
-  // Enable input and output.
-  usart->cr = AVR32_USART_CR_RXEN_MASK |
-              AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
-{
-  // First: Setup standard RS232.
-  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  // Set RS485 mode.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MR_MODE_RS485 << AVR32_USART_MR_MODE_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
-                    long pba_hz, unsigned char irda_filter)
-{
-  // First: Setup standard RS232.
-  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  // Set IrDA filter.
-  usart->ifr = irda_filter;
-
-  // Set IrDA mode and activate filtering of input.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MODE_IRDA << AVR32_USART_MR_MODE_OFFSET |
-              AVR32_USART_MR_FILTER_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_iso7816(volatile avr32_usart_t *usart, const usart_iso7816_options_t *opt, int t, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (!opt || // Null pointer.
-      opt->paritytype > 1)
-    return USART_INVALID_INPUT;
-
-  if (t == 0)
-  {
-    // Set USART mode to ISO7816, T=0.
-    // The T=0 protocol always uses 2 stop bits.
-    usart->mr = AVR32_USART_MR_MODE_ISO7816_T0 << AVR32_USART_MR_MODE_OFFSET |
-                AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET |
-                opt->bit_order << AVR32_USART_MR_MSBF_OFFSET; // Allow MSBF in T=0.
-  }
-  else if (t == 1)
-  {
-    // Only LSB first in the T=1 protocol.
-    // max_iterations field is only used in T=0 mode.
-    if (opt->bit_order != 0 ||
-        opt->max_iterations != 0)
-      return USART_INVALID_INPUT;
-
-    // Set USART mode to ISO7816, T=1.
-    // The T=1 protocol always uses 1 stop bit.
-    usart->mr = AVR32_USART_MR_MODE_ISO7816_T1 << AVR32_USART_MR_MODE_OFFSET |
-                AVR32_USART_MR_NBSTOP_1 << AVR32_USART_MR_NBSTOP_OFFSET;
-  }
-  else
-    return USART_INVALID_INPUT;
-
-  if (usart_set_iso7816_clock(usart, opt->iso7816_hz, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  // Set FIDI register: bit rate = selected clock/FI_DI_ratio/16.
-  usart->fidi = opt->fidi_ratio;
-
-  // Set ISO7816 spesific options in the MODE register.
-  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
-               AVR32_USART_MR_CLKO_MASK | // Enable clock output.
-               opt->inhibit_nack << AVR32_USART_MR_INACK_OFFSET |
-               opt->dis_suc_nack << AVR32_USART_MR_DSNACK_OFFSET |
-               opt->max_iterations << AVR32_USART_MR_MAX_ITERATION_OFFSET;
-
-  // Setup complete; enable the receiver by default.
-  usart_iso7816_enable_receiver(usart);
-
-  return USART_SUCCESS;
-}
-
-
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-
-int usart_init_lin_master(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  usart->mr |= AVR32_USART_MR_MODE_LIN_MASTER << AVR32_USART_MR_MODE_OFFSET;  // LIN master mode.
-
-  // Setup complete; enable communication.
-  // Enable input and output.
-  usart->cr = AVR32_USART_CR_RXEN_MASK |
-              AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_lin_slave(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  usart->mr |= AVR32_USART_MR_MODE_LIN_SLAVE << AVR32_USART_MR_MODE_OFFSET; // LIN slave mode.
-
-  // Setup complete; enable communication.
-  // Enable input and output.
-  usart->cr = AVR32_USART_CR_RXEN_MASK |
-              AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (!opt || // Null pointer.
-      opt->charlength < 5 || opt->charlength > 9 ||
-      opt->spimode > 3 ||
-      opt->channelmode > 3 ||
-      usart_set_spi_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  if (opt->charlength == 9)
-  {
-    // Character length set to 9 bits. MODE9 dominates CHRL.
-    usart->mr |= AVR32_USART_MR_MODE9_MASK;
-  }
-  else
-  {
-    // CHRL gives the character length (- 5) when MODE9 = 0.
-    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
-  }
-
-  usart->mr |= AVR32_USART_MR_MODE_SPI_MASTER << AVR32_USART_MR_MODE_OFFSET | // SPI master mode.
-               ((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET |   // SPI clock phase.
-               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET |             // Channel mode.
-               (opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET |            // SPI clock polarity.
-               AVR32_USART_MR_CLKO_MASK;                                      // Drive SCK pin.
-
-  // Setup complete; enable communication.
-  // Enable input and output.
-  usart->cr = AVR32_USART_CR_RXEN_MASK |
-              AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (!opt || // Null pointer.
-      opt->charlength < 5 || opt->charlength > 9 ||
-      opt->spimode > 3 ||
-      opt->channelmode > 3 ||
-      usart_set_spi_slave_baudrate(usart) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  if (opt->charlength == 9)
-  {
-    // Character length set to 9 bits. MODE9 dominates CHRL.
-    usart->mr |= AVR32_USART_MR_MODE9_MASK;
-  }
-  else
-  {
-    // CHRL gives the character length (- 5) when MODE9 = 0.
-    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
-  }
-
-  usart->mr |= AVR32_USART_MR_MODE_SPI_SLAVE << AVR32_USART_MR_MODE_OFFSET |  // SPI slave mode.
-               ((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET |   // SPI clock phase.
-               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET |             // Channel mode.
-               (opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET;             // SPI clock polarity.
-
-  // Setup complete; enable communication.
-  // Enable input and output.
-  usart->cr = AVR32_USART_CR_RXEN_MASK |
-              AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-#endif  // USART rev. >= 4.0.0
-
-
-//! @}
-
-
-//------------------------------------------------------------------------------
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-
-/*! \name SPI Control Functions
- */
-//! @{
-
-
-int usart_spi_selectChip(volatile avr32_usart_t *usart)
-{
-  // Force the SPI chip select.
-  usart->cr = AVR32_USART_CR_RTSEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_spi_unselectChip(volatile avr32_usart_t *usart)
-{
-  int timeout = USART_DEFAULT_TIMEOUT;
-
-  do
-  {
-    if (!timeout--) return USART_FAILURE;
-  } while (!usart_tx_empty(usart));
-
-  // Release the SPI chip select.
-  usart->cr = AVR32_USART_CR_RTSDIS_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-//! @}
-
-
-#endif  // USART rev. >= 4.0.0
-
-
-//------------------------------------------------------------------------------
-/*! \name Transmit/Receive Functions
- */
-//! @{
-
-
-int usart_send_address(volatile avr32_usart_t *usart, int address)
-{
-  // Check if USART is in multidrop / RS485 mode.
-  if (!usart_mode_is_multidrop(usart)) return USART_MODE_FAULT;
-
-  // Prepare to send an address.
-  usart->cr = AVR32_USART_CR_SENDA_MASK;
-
-  // Write the address to TX.
-  usart_bw_write_char(usart, address);
-
-  return USART_SUCCESS;
-}
-
-
-int usart_write_char(volatile avr32_usart_t *usart, int c)
-{
-  if (usart_tx_ready(usart))
-  {
-    usart->thr = (c << AVR32_USART_THR_TXCHR_OFFSET) & AVR32_USART_THR_TXCHR_MASK;
-    return USART_SUCCESS;
-  }
-  else
-    return USART_TX_BUSY;
-}
-
-
-int usart_putchar(volatile avr32_usart_t *usart, int c)
-{
-  int timeout = USART_DEFAULT_TIMEOUT;
-
-  if (c == '\n')
-  {
-    do
-    {
-      if (!timeout--) return USART_FAILURE;
-    } while (usart_write_char(usart, '\r') != USART_SUCCESS);
-
-    timeout = USART_DEFAULT_TIMEOUT;
-  }
-
-  do
-  {
-    if (!timeout--) return USART_FAILURE;
-  } while (usart_write_char(usart, c) != USART_SUCCESS);
-
-  return USART_SUCCESS;
-}
-
-
-int usart_read_char(volatile avr32_usart_t *usart, int *c)
-{
-  // Check for errors: frame, parity and overrun. In RS485 mode, a parity error
-  // would mean that an address char has been received.
-  if (usart->csr & (AVR32_USART_CSR_OVRE_MASK |
-                    AVR32_USART_CSR_FRAME_MASK |
-                    AVR32_USART_CSR_PARE_MASK))
-    return USART_RX_ERROR;
-
-  // No error; if we really did receive a char, read it and return SUCCESS.
-  if (usart_test_hit(usart))
-  {
-    *c = (usart->rhr & AVR32_USART_RHR_RXCHR_MASK) >> AVR32_USART_RHR_RXCHR_OFFSET;
-    return USART_SUCCESS;
-  }
-  else
-    return USART_RX_EMPTY;
-}
-
-
-int usart_getchar(volatile avr32_usart_t *usart)
-{
-  int c, ret;
-
-  while ((ret = usart_read_char(usart, &c)) == USART_RX_EMPTY);
-
-  if (ret == USART_RX_ERROR)
-    return USART_FAILURE;
-
-  return c;
-}
-
-
-void usart_write_line(volatile avr32_usart_t *usart, const char *string)
-{
-  while (*string != '\0')
-    usart_putchar(usart, *string++);
-}
-
-
-int usart_get_echo_line(volatile avr32_usart_t *usart)
-{
-  int rx_char;
-  int retval = USART_SUCCESS;
-
-  while (1)
-  {
-    rx_char = usart_getchar(usart);
-    if (rx_char == USART_FAILURE)
-    {
-      usart_write_line(usart, "Error!!!\n");
-      retval = USART_FAILURE;
-      break;
-    }
-    if (rx_char == '\x03')
-    {
-      retval = USART_FAILURE;
-      break;
-    }
-    usart_putchar(usart, rx_char);
-    if (rx_char == '\r')
-    {
-      usart_putchar(usart, '\n');
-      break;
-    }
-  }
-
-  return retval;
-}
-
-
-//! @}
diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.h
deleted file mode 100644
index bc1c100..0000000
--- a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.h
+++ /dev/null
@@ -1,889 +0,0 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief USART driver for AVR32 UC3.
- *
- * This file contains basic functions for the AVR32 USART, with support for all
- * modes, settings and clock speeds.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with a USART module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _USART_H_
-#define _USART_H_
-
-#include <avr32/io.h>
-#include "compiler.h"
-
-
-/*! \name Return Values
- */
-//! @{
-#define USART_SUCCESS                 0 //!< Successful completion.
-#define USART_FAILURE                -1 //!< Failure because of some unspecified reason.
-#define USART_INVALID_INPUT           1 //!< Input value out of range.
-#define USART_INVALID_ARGUMENT       -1 //!< Argument value out of range.
-#define USART_TX_BUSY                 2 //!< Transmitter was busy.
-#define USART_RX_EMPTY                3 //!< Nothing was received.
-#define USART_RX_ERROR                4 //!< Transmission error occurred.
-#define USART_MODE_FAULT              5 //!< USART not in the appropriate mode.
-//! @}
-
-//! Default time-out value (number of attempts).
-#define USART_DEFAULT_TIMEOUT         10000
-
-/*! \name Parity Settings
- */
-//! @{
-#define USART_EVEN_PARITY             AVR32_USART_MR_PAR_EVEN   //!< Use even parity on character transmission.
-#define USART_ODD_PARITY              AVR32_USART_MR_PAR_ODD    //!< Use odd parity on character transmission.
-#define USART_SPACE_PARITY            AVR32_USART_MR_PAR_SPACE  //!< Use a space as parity bit.
-#define USART_MARK_PARITY             AVR32_USART_MR_PAR_MARK   //!< Use a mark as parity bit.
-#define USART_NO_PARITY               AVR32_USART_MR_PAR_NONE   //!< Don't use a parity bit.
-#define USART_MULTIDROP_PARITY        AVR32_USART_MR_PAR_MULTI  //!< Parity bit is used to flag address characters.
-//! @}
-
-/*! \name Stop Bits Settings
- */
-//! @{
-#define USART_1_STOPBIT               AVR32_USART_MR_NBSTOP_1   //!< Use 1 stop bit.
-#define USART_1_5_STOPBITS            AVR32_USART_MR_NBSTOP_1_5 //!< Use 1.5 stop bits.
-#define USART_2_STOPBITS              AVR32_USART_MR_NBSTOP_2   //!< Use 2 stop bits (for more, just give the number of bits).
-//! @}
-
-/*! \name Channel Modes
- */
-//! @{
-#define USART_NORMAL_CHMODE           AVR32_USART_MR_CHMODE_NORMAL      //!< Normal communication.
-#define USART_AUTO_ECHO               AVR32_USART_MR_CHMODE_ECHO        //!< Echo data.
-#define USART_LOCAL_LOOPBACK          AVR32_USART_MR_CHMODE_LOCAL_LOOP  //!< Local loopback.
-#define USART_REMOTE_LOOPBACK         AVR32_USART_MR_CHMODE_REMOTE_LOOP //!< Remote loopback.
-//! @}
-
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-/*! \name LIN Node Actions
- */
-//! @{
-#define USART_LIN_PUBLISH_ACTION      AVR32_USART_LINMR_NACT_PUBLISH    //!< The USART transmits the response.
-#define USART_LIN_SUBSCRIBE_ACTION    AVR32_USART_LINMR_NACT_SUBSCRIBE  //!< The USART receives the response.
-#define USART_LIN_IGNORE_ACTION       AVR32_USART_LINMR_NACT_IGNORE     //!< The USART does not transmit and does not receive the reponse.
-//! @}
-
-/*! \name LIN Checksum Types
- */
-//! @{
-#define USART_LIN_ENHANCED_CHECKSUM   0 //!< LIN 2.0 "enhanced" checksum.
-#define USART_LIN_CLASSIC_CHECKSUM    1 //!< LIN 1.3 "classic" checksum.
-//! @}
-
-#endif  // USART rev. >= 4.0.0
-
-
-//! Input parameters when initializing RS232 and similar modes.
-typedef struct
-{
-  //! Set baud rate of the USART (unused in slave modes).
-  unsigned long baudrate;
-
-  //! Number of bits to transmit as a character (5 to 9).
-  unsigned char charlength;
-
-  //! How to calculate the parity bit: \ref USART_EVEN_PARITY, \ref USART_ODD_PARITY,
-  //! \ref USART_SPACE_PARITY, \ref USART_MARK_PARITY, \ref USART_NO_PARITY or
-  //! \ref USART_MULTIDROP_PARITY.
-  unsigned char paritytype;
-
-  //! Number of stop bits between two characters: \ref USART_1_STOPBIT,
-  //! \ref USART_1_5_STOPBITS, \ref USART_2_STOPBITS or any number from 3 to 257
-  //! which will result in a time guard period of that length between characters.
-  //! \note \ref USART_1_5_STOPBITS is supported in asynchronous modes only.
-  unsigned short stopbits;
-
-  //! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,
-  //! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.
-  unsigned char channelmode;
-} usart_options_t;
-
-//! Input parameters when initializing ISO7816 mode.
-typedef struct
-{
-  //! Set the frequency of the ISO7816 clock.
-  unsigned long iso7816_hz;
-
-  //! The number of ISO7816 clock ticks in every bit period (1 to 2047, 0 = disable clock).
-  //! Bit rate = \ref iso7816_hz / \ref fidi_ratio.
-  unsigned short fidi_ratio;
-
-  //! How to calculate the parity bit: \ref USART_EVEN_PARITY for normal mode or
-  //! \ref USART_ODD_PARITY for inverse mode.
-  unsigned char paritytype;
-
-  //! Inhibit Non Acknowledge:\n
-  //!   - 0: the NACK is generated;\n
-  //!   - 1: the NACK is not generated.
-  //!
-  //! \note This bit will be used only in ISO7816 mode, protocol T = 0 receiver.
-  int inhibit_nack;
-
-  //! Disable successive NACKs.
-  //! Successive parity errors are counted up to the value in the \ref max_iterations field.
-  //! These parity errors generate a NACK on the ISO line. As soon as this value is reached,
-  //! no addititional NACK is sent on the ISO line. The ITERATION flag is asserted.
-  int dis_suc_nack;
-
-  //! Max number of repetitions (0 to 7).
-  unsigned char max_iterations;
-
-  //! Bit order in transmitted characters:\n
-  //!   - 0: LSB first;\n
-  //!   - 1: MSB first.
-  int bit_order;
-} usart_iso7816_options_t;
-
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-//! Input parameters when initializing SPI mode.
-typedef struct
-{
-  //! Set the frequency of the SPI clock (unused in slave mode).
-  unsigned long baudrate;
-
-  //! Number of bits to transmit as a character (5 to 9).
-  unsigned char charlength;
-
-  //! Which SPI mode to use.
-  unsigned char spimode;
-
-  //! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,
-  //! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.
-  unsigned char channelmode;
-} usart_spi_options_t;
-
-#endif  // USART rev. >= 4.0.0
-
-
-//------------------------------------------------------------------------------
-/*! \name Initialization Functions
- */
-//! @{
-
-/*! \brief Resets the USART and disables TX and RX.
- *
- * \param usart   Base address of the USART instance.
- */
-extern void usart_reset(volatile avr32_usart_t *usart);
-
-/*! \brief Sets up the USART to use the standard RS232 protocol.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use the standard RS232 protocol in TX-only mode.
- *
- * Compared to \ref usart_init_rs232, this function allows very high baud rates
- * (up to \a pba_hz instead of \a pba_hz / \c 8) at the expense of full duplex.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- *
- * \note The \c 1.5 stop bit is not supported in this mode.
- */
-extern int usart_init_rs232_tx_only(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use hardware handshaking.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- *
- * \note \ref usart_init_rs232 does not need to be invoked before this function.
- */
-extern int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use the modem protocol, activating dedicated inputs/outputs.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use a synchronous RS232-like protocol in master mode.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_sync_master(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use a synchronous RS232-like protocol in slave mode.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_sync_slave(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use the RS485 protocol.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use the IrDA protocol.
- *
- * \param usart         Base address of the USART instance.
- * \param opt           Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz        USART module input clock frequency (PBA clock, Hz).
- * \param irda_filter   Counter used to distinguish received ones from zeros.
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
-                           long pba_hz, unsigned char irda_filter);
-
-/*! \brief Sets up the USART to use the ISO7816 T=0 or T=1 smartcard protocols.
- *
- * The receiver is enabled by default. \ref usart_iso7816_enable_receiver and
- * \ref usart_iso7816_enable_transmitter can be called to change the half-duplex
- * communication direction.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up ISO7816 communication (see \ref usart_iso7816_options_t).
- * \param t       ISO7816 mode to use (T=0 or T=1).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_iso7816(volatile avr32_usart_t *usart, const usart_iso7816_options_t *opt, int t, long pba_hz);
-
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-/*! \brief Sets up the USART to use the LIN master mode.
- *
- * \param usart     Base address of the USART instance.
- * \param baudrate  Baud rate.
- * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
- *
- */
-extern int usart_init_lin_master(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz);
-
-/*! \brief Sets up the USART to use the LIN slave mode.
- *
- * \param usart     Base address of the USART instance.
- * \param baudrate  Baud rate.
- * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
- *
- */
-extern int usart_init_lin_slave(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz);
-
-/*! \brief Sets up the USART to use the SPI master mode.
- *
- * \ref usart_spi_selectChip and \ref usart_spi_unselectChip can be called to
- * select or unselect the SPI slave chip.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up SPI mode (see \ref usart_spi_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use the SPI slave mode.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up SPI mode (see \ref usart_spi_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
-
-#endif  // USART rev. >= 4.0.0
-
-//! @}
-
-
-//------------------------------------------------------------------------------
-/*! \name Read and Reset Error Status Bits
- */
-//! @{
-
-/*! \brief Resets the error status.
- *
- * This function resets the status bits indicating that a parity error,
- * framing error or overrun has occurred. The RXBRK bit, indicating
- * a start/end of break condition on the RX line, is also reset.
- *
- * \param usart   Base address of the USART instance.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_reset_status(volatile avr32_usart_t *usart)
-{
-  usart->cr = AVR32_USART_CR_RSTSTA_MASK;
-}
-
-/*! \brief Checks if a parity error has occurred since last status reset.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return \c 1 if a parity error has been detected, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_parity_error(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & AVR32_USART_CSR_PARE_MASK) != 0;
-}
-
-/*! \brief Checks if a framing error has occurred since last status reset.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return \c 1 if a framing error has been detected, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_framing_error(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & AVR32_USART_CSR_FRAME_MASK) != 0;
-}
-
-/*! \brief Checks if an overrun error has occurred since last status reset.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return \c 1 if a overrun error has been detected, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_overrun_error(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & AVR32_USART_CSR_OVRE_MASK) != 0;
-}
-
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-/*! \brief Get LIN Error Status
- *
- * \param usart   Base address of the USART instance.
- *
- * \retval The binary value of the error field.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_lin_get_error(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & (AVR32_USART_CSR_LINSNRE_MASK |
-                        AVR32_USART_CSR_LINCE_MASK |
-                        AVR32_USART_CSR_LINIPE_MASK |
-                        AVR32_USART_CSR_LINISFE_MASK |
-                        AVR32_USART_CSR_LINBE_MASK)) >> AVR32_USART_CSR_LINBE_OFFSET;
-}
-
-#endif  // USART rev. >= 4.0.0
-
-//! @}
-
-
-//------------------------------------------------------------------------------
-/*! \name ISO7816 Control Functions
- */
-//! @{
-
-/*! \brief Enables the ISO7816 receiver.
- *
- * The ISO7816 transmitter is disabled.
- *
- * \param usart   Base address of the USART instance.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_iso7816_enable_receiver(volatile avr32_usart_t *usart)
-{
-  usart->cr = AVR32_USART_CR_TXDIS_MASK | AVR32_USART_CR_RXEN_MASK;
-}
-
-/*! \brief Enables the ISO7816 transmitter.
- *
- * The ISO7816 receiver is disabled.
- *
- * \param usart   Base address of the USART instance.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_iso7816_enable_transmitter(volatile avr32_usart_t *usart)
-{
-  usart->cr = AVR32_USART_CR_RXDIS_MASK | AVR32_USART_CR_TXEN_MASK;
-}
-
-//! @}
-
-
-//------------------------------------------------------------------------------
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-/*! \name LIN Control Functions
- */
-//! @{
-
-/*! \brief Sets the node action.
- *
- * \param usart   Base address of the USART instance.
- * \param action  The node action: \ref USART_LIN_PUBLISH_ACTION,
- *                \ref USART_LIN_SUBSCRIBE_ACTION or
- *                \ref USART_LIN_IGNORE_ACTION.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_set_node_action(volatile avr32_usart_t *usart, unsigned char action)
-{
-  usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_NACT_MASK) |
-                 action << AVR32_USART_LINMR_NACT_OFFSET;
-}
-
-/*! \brief Enables or disables the Identifier parity.
- *
- * \param usart   Base address of the USART instance.
- * \param parity  Whether to enable the Identifier parity: \c TRUE or \c FALSE.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_enable_parity(volatile avr32_usart_t *usart, unsigned char parity)
-{
-  usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_PARDIS_MASK) |
-                 !parity << AVR32_USART_LINMR_PARDIS_OFFSET;
-}
-
-/*! \brief Enables or disables the checksum.
- *
- * \param usart   Base address of the USART instance.
- * \param parity  Whether to enable the checksum: \c TRUE or \c FALSE.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_enable_checksum(volatile avr32_usart_t *usart, unsigned char checksum)
-{
-  usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_CHKDIS_MASK) |
-                 !checksum << AVR32_USART_LINMR_CHKDIS_OFFSET;
-}
-
-/*! \brief Sets the checksum type.
- *
- * \param usart   Base address of the USART instance.
- * \param chktyp  The checksum type: \ref USART_LIN_ENHANCED_CHEKSUM or
- *                \ref USART_LIN_CLASSIC_CHECKSUM.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_set_checksum(volatile avr32_usart_t *usart, unsigned char chktyp)
-{
-  usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_CHKTYP_MASK) |
-                 chktyp << AVR32_USART_LINMR_CHKTYP_OFFSET;
-}
-
-/*! \brief Gets the response data length.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return The response data length.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ unsigned char usart_lin_get_data_length(volatile avr32_usart_t *usart)
-{
-  if (usart->linmr & AVR32_USART_LINMR_DLM_MASK)
-  {
-    unsigned char data_length = 1 << ((usart->linir >> (AVR32_USART_LINIR_IDCHR_OFFSET + 4)) & 0x03);
-    if (data_length == 1)
-      data_length = 2;
-    return data_length;
-  }
-  else
-    return ((usart->linmr & AVR32_USART_LINMR_DLC_MASK) >> AVR32_USART_LINMR_DLC_OFFSET) + 1;
-}
-
-/*! \brief Sets the response data length for LIN 1.x.
- *
- * \param usart   Base address of the USART instance.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_set_data_length_lin1x(volatile avr32_usart_t *usart)
-{
-  usart->linmr |= AVR32_USART_LINMR_DLM_MASK;
-}
-
-/*! \brief Sets the response data length for LIN 2.x.
- *
- * \param usart         Base address of the USART instance.
- * \param data_length   The response data length.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_set_data_length_lin2x(volatile avr32_usart_t *usart, unsigned char data_length)
-{
-  usart->linmr = (usart->linmr & ~(AVR32_USART_LINMR_DLC_MASK |
-                                   AVR32_USART_LINMR_DLM_MASK)) |
-                 (data_length - 1) << AVR32_USART_LINMR_DLC_OFFSET;
-}
-
-/*! \brief Enables or disables the frame slot mode.
- *
- * \param usart       Base address of the USART instance.
- * \param frameslot   Whether to enable the frame slot mode: \c TRUE or
- *                    \c FALSE.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_enable_frameslot(volatile avr32_usart_t *usart, unsigned char frameslot)
-{
-  usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_FSDIS_MASK) |
-                 !frameslot << AVR32_USART_LINMR_FSDIS_OFFSET;
-}
-
-/*! \brief Gets the Identifier character.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return The Identifier character.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ unsigned char usart_lin_get_id_char(volatile avr32_usart_t *usart)
-{
-  return (usart->linir & AVR32_USART_LINIR_IDCHR_MASK) >> AVR32_USART_LINIR_IDCHR_OFFSET;
-}
-
-/*! \brief Sets the Identifier character.
- *
- * \param usart     Base address of the USART instance.
- * \param id_char   The Identifier character.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_set_id_char(volatile avr32_usart_t *usart, unsigned char id_char)
-{
-  usart->linir = (usart->linir & ~AVR32_USART_LINIR_IDCHR_MASK) |
-                 id_char << AVR32_USART_LINIR_IDCHR_OFFSET;
-}
-
-//! @}
-
-#endif  // USART rev. >= 4.0.0
-
-
-//------------------------------------------------------------------------------
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-/*! \name SPI Control Functions
- */
-//! @{
-
-/*! \brief Selects SPI slave chip.
- *
- * \param usart   Base address of the USART instance.
- *
- * \retval USART_SUCCESS        Success.
- */
-extern int usart_spi_selectChip(volatile avr32_usart_t *usart);
-
-/*! \brief Unselects SPI slave chip.
- *
- * \param usart   Base address of the USART instance.
- *
- * \retval USART_SUCCESS        Success.
- * \retval USART_FAILURE        Time-out.
- */
-extern int usart_spi_unselectChip(volatile avr32_usart_t *usart);
-
-//! @}
-
-#endif  // USART rev. >= 4.0.0
-
-
-//------------------------------------------------------------------------------
-/*! \name Transmit/Receive Functions
- */
-//! @{
-
-/*! \brief Addresses a receiver.
- *
- * While in RS485 mode, receivers only accept data addressed to them.
- * A packet/char with the address tag set has to precede any data.
- * This function is used to address a receiver. This receiver should read
- * all the following data, until an address packet addresses another receiver.
- *
- * \param usart     Base address of the USART instance.
- * \param address   Address of the target device.
- *
- * \retval USART_SUCCESS    Address successfully sent (if current mode is RS485).
- * \retval USART_MODE_FAULT Wrong operating mode.
- */
-extern int usart_send_address(volatile avr32_usart_t *usart, int address);
-
-/*! \brief Tests if the USART is ready to transmit a character.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return \c 1 if the USART Transmit Holding Register is free, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_tx_ready(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & AVR32_USART_CSR_TXRDY_MASK) != 0;
-}
-
-/*! \brief Writes the given character to the TX buffer if the transmitter is ready.
- *
- * \param usart   Base address of the USART instance.
- * \param c       The character (up to 9 bits) to transmit.
- *
- * \retval USART_SUCCESS  The transmitter was ready.
- * \retval USART_TX_BUSY  The transmitter was busy.
- */
-extern int usart_write_char(volatile avr32_usart_t *usart, int c);
-
-/*! \brief An active wait writing a character to the USART.
- *
- * \param usart   Base address of the USART instance.
- * \param c       The character (up to 9 bits) to transmit.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_bw_write_char(volatile avr32_usart_t *usart, int c)
-{
-  while (usart_write_char(usart, c) != USART_SUCCESS);
-}
-
-/*! \brief Sends a character with the USART.
- *
- * \param usart   Base address of the USART instance.
- * \param c       Character to write.
- *
- * \retval USART_SUCCESS  The character was written.
- * \retval USART_FAILURE  The function timed out before the USART transmitter became ready to send.
- */
-extern int usart_putchar(volatile avr32_usart_t *usart, int c);
-
-/*! \brief Tests if all requested USART transmissions are over.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return \c 1 if the USART Transmit Shift Register and the USART Transmit
- *         Holding Register are free, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_tx_empty(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & AVR32_USART_CSR_TXEMPTY_MASK) != 0;
-}
-
-/*! \brief Tests if the USART contains a received character.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return \c 1 if the USART Receive Holding Register is full, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_test_hit(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & AVR32_USART_CSR_RXRDY_MASK) != 0;
-}
-
-/*! \brief Checks the RX buffer for a received character, and stores it at the
- *         given memory location.
- *
- * \param usart   Base address of the USART instance.
- * \param c       Pointer to the where the read character should be stored
- *                (must be at least short in order to accept 9-bit characters).
- *
- * \retval USART_SUCCESS  The character was read successfully.
- * \retval USART_RX_EMPTY The RX buffer was empty.
- * \retval USART_RX_ERROR An error was deteceted.
- */
-extern int usart_read_char(volatile avr32_usart_t *usart, int *c);
-
-/*! \brief Waits until a character is received, and returns it.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return The received character, or \ref USART_FAILURE upon error.
- */
-extern int usart_getchar(volatile avr32_usart_t *usart);
-
-/*! \brief Writes one character string to the USART.
- *
- * \param usart   Base address of the USART instance.
- * \param string  String to be written.
- */
-extern void usart_write_line(volatile avr32_usart_t *usart, const char *string);
-
-/*! \brief Gets and echoes characters until end of line.
- *
- * \param usart   Base address of the USART instance.
- *
- * \retval USART_SUCCESS  Success.
- * \retval USART_FAILURE  Low-level error detected or ETX character received.
- */
-extern int usart_get_echo_line(volatile avr32_usart_t *usart);
-
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-/*! \brief Abort LIN transmission.
- *
- * \param usart   Base address of the USART instance.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_abort(volatile avr32_usart_t *usart)
-{
-  usart->cr = AVR32_USART_LINABT_MASK;
-}
-
-/*! \brief Tests if a LIN transfer has been completed.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return \c 1 if a LIN transfer has been completed, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_lin_transfer_completed(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & AVR32_USART_CSR_LINTC_MASK) != 0;
-}
-
-#endif  // USART rev. >= 4.0.0
-
-//! @}
-
-
-#endif  // _USART_H_