diff options
| author | NicoHood <NicoHood@users.noreply.github.com> | 2015-08-07 19:47:37 +0200 |
|---|---|---|
| committer | NicoHood <NicoHood@users.noreply.github.com> | 2015-08-12 17:48:17 +0200 |
| commit | 98301ba23a1f7c60b4590330da2ee1c260da7aa6 (patch) | |
| tree | 11c551220b70e757d0a53971ce23a10487313715 /cores | |
| parent | 39ed7be74729c98829c07783ef6a22be2532045c (diff) | |
Added u2 Series support
Diffstat (limited to 'cores')
| -rw-r--r-- | cores/arduino/USBCore.cpp | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/cores/arduino/USBCore.cpp b/cores/arduino/USBCore.cpp index fd25793..f12d326 100644 --- a/cores/arduino/USBCore.cpp +++ b/cores/arduino/USBCore.cpp @@ -627,13 +627,19 @@ void USB_Flush(u8 ep) static inline void USB_ClockDisable() { +#if defined(OTGPADE) USBCON = (USBCON & ~(1<<OTGPADE)) | (1<<FRZCLK); // freeze clock and disable VBUS Pad +#else // u2 Series + USBCON = (1 << FRZCLK); // freeze clock +#endif PLLCSR &= ~(1<<PLLE); // stop PLL } static inline void USB_ClockEnable() { +#if defined(UHWCON) UHWCON |= (1<<UVREGE); // power internal reg +#endif USBCON = (1<<USBE) | (1<<FRZCLK); // clock frozen, usb enabled // ATmega32U4 @@ -646,6 +652,16 @@ static inline void USB_ClockEnable() #error "Clock rate of F_CPU not supported" #endif +#elif defined(__AVR_AT90USB82__) || defined(__AVR_AT90USB162__) || defined(__AVR_ATmega32U2__) || defined(__AVR_ATmega16U2__) || defined(__AVR_ATmega8U2__) + // for the u2 Series the datasheet is confusing. On page 40 its called PINDIV and on page 290 its called PLLP0 +#if F_CPU == 16000000UL + // Need 16 MHz xtal + PLLCSR |= (1 << PLLP0); +#elif F_CPU == 8000000UL + // Need 8 MHz xtal + PLLCSR &= ~(1 << PLLP0); +#endif + // AT90USB646, AT90USB647, AT90USB1286, AT90USB1287 #elif defined(PLLP2) #if F_CPU == 16000000UL @@ -677,10 +693,18 @@ static inline void USB_ClockEnable() // strange behaviors when the board is reset using the serial // port touch at 1200 bps. This delay fixes this behavior. delay(1); +#if defined(OTGPADE) USBCON = (USBCON & ~(1<<FRZCLK)) | (1<<OTGPADE); // start USB clock, enable VBUS Pad +#else + USBCON &= ~(1 << FRZCLK); // start USB clock +#endif #if defined(RSTCPU) +#if defined(LSM) UDCON &= ~((1<<RSTCPU) | (1<<LSM) | (1<<RMWKUP) | (1<<DETACH)); // enable attach resistor, set full speed mode +#else // u2 Series + UDCON &= ~((1 << RSTCPU) | (1 << RMWKUP) | (1 << DETACH)); // enable attach resistor, set full speed mode +#endif #else // AT90USB64x and AT90USB128x don't have RSTCPU UDCON &= ~((1<<LSM) | (1<<RMWKUP) | (1<<DETACH)); // enable attach resistor, set full speed mode |