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authorDavid A. Mellis <d.mellis@arduino.cc>2008-11-08 21:31:12 +0000
committerDavid A. Mellis <d.mellis@arduino.cc>2008-11-08 21:31:12 +0000
commit68e9d04f91aa26daa4e3c701002610f2352039fd (patch)
tree662675e12d23fac04d8ec7310fc3f58337684796 /cores/arduino
parent80fc987a942fc1711b2d0858449834db9568fa07 (diff)
Waiting for pulse to start (rising or falling edge) to start timing.
Diffstat (limited to 'cores/arduino')
-rwxr-xr-xcores/arduino/wiring_pulse.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/cores/arduino/wiring_pulse.c b/cores/arduino/wiring_pulse.c
index 0157114..8f232f1 100755
--- a/cores/arduino/wiring_pulse.c
+++ b/cores/arduino/wiring_pulse.c
@@ -44,6 +44,11 @@ unsigned long pulseIn(uint8_t pin, uint8_t state, unsigned long timeout)
unsigned long numloops = 0;
unsigned long maxloops = microsecondsToClockCycles(timeout) / 16;
+ // wait for any previous pulse to end
+ while ((*portInputRegister(port) & bit) == stateMask)
+ if (numloops++ == maxloops)
+ return 0;
+
// wait for the pulse to start
while ((*portInputRegister(port) & bit) != stateMask)
if (numloops++ == maxloops)