diff options
author | WestfW <westfw@gmail.com> | 2011-06-10 16:17:13 -0700 |
---|---|---|
committer | David A. Mellis <d.mellis@arduino.cc> | 2011-10-10 12:11:14 -0400 |
commit | 67f1e949e184491161c91e44bf0393b8b90ab627 (patch) | |
tree | 1f87214102f781b4ff5778d88a6cdd7b3d669127 /bootloaders/optiboot/optiboot_pro_16MHz.lst | |
parent | 8caed55a69858e26706dff31ff23e5be94bde669 (diff) |
This is a relatively significant edit that brings the Arduino copy of
optiboot up-to-date with the optiboot source repository as of Jun-2011
(the last changes made in the optiboot repository were in Oct-2010)
This adds support for several plaforms, fixes the "30k bug", and
refactors the source to have separate stk500.h, boot.h, and pin_defs.h
These are the arduino opticode issues fixed:
http://code.google.com/p/arduino/issues/detail?id=380
optiboot has problems upload sketches bigger than 30 KB
http://code.google.com/p/arduino/issues/detail?id=556
update optiboot to the point of the latest optiboot project sources.
These are issues that had been solved in the optiboot source aready:
http://code.google.com/p/arduino/issues/detail?id=364
optiboot leaves timer1 configured when starting app, breaks PWM on
pin 9 and 10. (fixed with a workaround in arduino core.)
aka http://code.google.com/p/optiboot/source/detail?r=c778fbe72df6ac13ef730c25283358c3c970f73e
Support for ATmega8 and mega88.
Fix fuse settings for mega168 _ISP targets
Additional new platforms (mega, sanguino)
http://code.google.com/p/optiboot/issues/detail?id=26
Set R1 to 0 (already in arduino code)
http://code.google.com/p/optiboot/issues/detail?id=36&can=1
Fails to build correctly for mega88
After this commit, the only differences between the Arduino optiboot.c
and the optiboot repository optiboot.c are cosmetic.
(cherry picked from commit e2812ef91cc1489527827dcd14c843f3b3244f36)
Diffstat (limited to 'bootloaders/optiboot/optiboot_pro_16MHz.lst')
-rw-r--r-- | bootloaders/optiboot/optiboot_pro_16MHz.lst | 542 |
1 files changed, 288 insertions, 254 deletions
diff --git a/bootloaders/optiboot/optiboot_pro_16MHz.lst b/bootloaders/optiboot/optiboot_pro_16MHz.lst index 9920a76..25dc46b 100644 --- a/bootloaders/optiboot/optiboot_pro_16MHz.lst +++ b/bootloaders/optiboot/optiboot_pro_16MHz.lst @@ -3,237 +3,257 @@ optiboot_pro_16MHz.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn - 0 .text 000001ec 00003e00 00003e00 00000054 2**1 + 0 .text 000001fc 00003e00 00003e00 00000054 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 1 .debug_aranges 00000028 00000000 00000000 00000240 2**0 + 1 .debug_aranges 00000028 00000000 00000000 00000250 2**0 CONTENTS, READONLY, DEBUGGING - 2 .debug_pubnames 0000006a 00000000 00000000 00000268 2**0 + 2 .debug_pubnames 0000006a 00000000 00000000 00000278 2**0 CONTENTS, READONLY, DEBUGGING - 3 .debug_info 00000269 00000000 00000000 000002d2 2**0 + 3 .debug_info 00000284 00000000 00000000 000002e2 2**0 CONTENTS, READONLY, DEBUGGING - 4 .debug_abbrev 00000196 00000000 00000000 0000053b 2**0 + 4 .debug_abbrev 000001ae 00000000 00000000 00000566 2**0 CONTENTS, READONLY, DEBUGGING - 5 .debug_line 000003d3 00000000 00000000 000006d1 2**0 + 5 .debug_line 00000450 00000000 00000000 00000714 2**0 CONTENTS, READONLY, DEBUGGING - 6 .debug_frame 00000090 00000000 00000000 00000aa4 2**2 + 6 .debug_frame 00000090 00000000 00000000 00000b64 2**2 CONTENTS, READONLY, DEBUGGING - 7 .debug_str 00000135 00000000 00000000 00000b34 2**0 + 7 .debug_str 00000141 00000000 00000000 00000bf4 2**0 CONTENTS, READONLY, DEBUGGING - 8 .debug_loc 000001d1 00000000 00000000 00000c69 2**0 + 8 .debug_loc 000001e1 00000000 00000000 00000d35 2**0 CONTENTS, READONLY, DEBUGGING - 9 .debug_ranges 00000068 00000000 00000000 00000e3a 2**0 + 9 .debug_ranges 00000068 00000000 00000000 00000f16 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 00003e00 <main>: -#ifdef VIRTUAL_BOOT_PARTITION -#define rstVect (*(uint16_t*)(0x204)) -#define wdtVect (*(uint16_t*)(0x206)) +#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) +#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #endif + /* main program starts here */ int main(void) { - 3e00: 85 e0 ldi r24, 0x05 ; 5 - 3e02: 80 93 81 00 sts 0x0081, r24 + 3e00: 11 24 eor r1, r1 +#ifdef __AVR_ATmega8__ + SP=RAMEND; // This is done by hardware reset +#endif + + // Adaboot no-wait mod + ch = MCUSR; + 3e02: 84 b7 in r24, 0x34 ; 52 + MCUSR = 0; + 3e04: 14 be out 0x34, r1 ; 52 + if (!(ch & _BV(EXTRF))) appStart(); + 3e06: 81 ff sbrs r24, 1 + 3e08: e6 d0 rcall .+460 ; 0x3fd6 <appStart> + #if LED_START_FLASHES > 0 // Set up Timer 1 for timeout counter TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 -#endif -#ifndef SOFT_UART + 3e0a: 85 e0 ldi r24, 0x05 ; 5 + 3e0c: 80 93 81 00 sts 0x0081, r24 + UCSRA = _BV(U2X); //Double speed mode USART + UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx + UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 + UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); +#else UCSR0A = _BV(U2X0); //Double speed mode USART0 - 3e06: 82 e0 ldi r24, 0x02 ; 2 - 3e08: 80 93 c0 00 sts 0x00C0, r24 + 3e10: 82 e0 ldi r24, 0x02 ; 2 + 3e12: 80 93 c0 00 sts 0x00C0, r24 UCSR0B = _BV(RXEN0) | _BV(TXEN0); - 3e0c: 88 e1 ldi r24, 0x18 ; 24 - 3e0e: 80 93 c1 00 sts 0x00C1, r24 + 3e16: 88 e1 ldi r24, 0x18 ; 24 + 3e18: 80 93 c1 00 sts 0x00C1, r24 UCSR0C = _BV(UCSZ00) | _BV(UCSZ01); - 3e12: 86 e0 ldi r24, 0x06 ; 6 - 3e14: 80 93 c2 00 sts 0x00C2, r24 + 3e1c: 86 e0 ldi r24, 0x06 ; 6 + 3e1e: 80 93 c2 00 sts 0x00C2, r24 UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); - 3e18: 80 e1 ldi r24, 0x10 ; 16 - 3e1a: 80 93 c4 00 sts 0x00C4, r24 + 3e22: 80 e1 ldi r24, 0x10 ; 16 + 3e24: 80 93 c4 00 sts 0x00C4, r24 +#endif #endif - - // Adaboot no-wait mod - ch = MCUSR; - 3e1e: 84 b7 in r24, 0x34 ; 52 - MCUSR = 0; - 3e20: 14 be out 0x34, r1 ; 52 - if (!(ch & _BV(EXTRF))) appStart(); - 3e22: 81 ff sbrs r24, 1 - 3e24: d0 d0 rcall .+416 ; 0x3fc6 <appStart> // Set up watchdog to trigger after 500ms - watchdogConfig(WATCHDOG_500MS); - 3e26: 8d e0 ldi r24, 0x0D ; 13 - 3e28: c8 d0 rcall .+400 ; 0x3fba <watchdogConfig> + watchdogConfig(WATCHDOG_1S); + 3e28: 8e e0 ldi r24, 0x0E ; 14 + 3e2a: cf d0 rcall .+414 ; 0x3fca <watchdogConfig> /* Set LED pin as output */ LED_DDR |= _BV(LED); - 3e2a: 25 9a sbi 0x04, 5 ; 4 - 3e2c: 86 e0 ldi r24, 0x06 ; 6 + 3e2c: 25 9a sbi 0x04, 5 ; 4 + 3e2e: 86 e0 ldi r24, 0x06 ; 6 } #if LED_START_FLASHES > 0 void flash_led(uint8_t count) { do { TCNT1 = -(F_CPU/(1024*16)); - 3e2e: 20 e3 ldi r18, 0x30 ; 48 - 3e30: 3c ef ldi r19, 0xFC ; 252 + 3e30: 20 e3 ldi r18, 0x30 ; 48 + 3e32: 3c ef ldi r19, 0xFC ; 252 TIFR1 = _BV(TOV1); - 3e32: 91 e0 ldi r25, 0x01 ; 1 + 3e34: 91 e0 ldi r25, 0x01 ; 1 } #if LED_START_FLASHES > 0 void flash_led(uint8_t count) { do { TCNT1 = -(F_CPU/(1024*16)); - 3e34: 30 93 85 00 sts 0x0085, r19 - 3e38: 20 93 84 00 sts 0x0084, r18 + 3e36: 30 93 85 00 sts 0x0085, r19 + 3e3a: 20 93 84 00 sts 0x0084, r18 TIFR1 = _BV(TOV1); - 3e3c: 96 bb out 0x16, r25 ; 22 + 3e3e: 96 bb out 0x16, r25 ; 22 while(!(TIFR1 & _BV(TOV1))); - 3e3e: b0 9b sbis 0x16, 0 ; 22 - 3e40: fe cf rjmp .-4 ; 0x3e3e <main+0x3e> + 3e40: b0 9b sbis 0x16, 0 ; 22 + 3e42: fe cf rjmp .-4 ; 0x3e40 <main+0x40> +#ifdef __AVR_ATmega8__ + LED_PORT ^= _BV(LED); +#else LED_PIN |= _BV(LED); - 3e42: 1d 9a sbi 0x03, 5 ; 3 + 3e44: 1d 9a sbi 0x03, 5 ; 3 return getch(); } // Watchdog functions. These are only safe with interrupts turned off. void watchdogReset() { __asm__ __volatile__ ( - 3e44: a8 95 wdr - TCNT1 = -(F_CPU/(1024*16)); - TIFR1 = _BV(TOV1); - while(!(TIFR1 & _BV(TOV1))); + 3e46: a8 95 wdr + LED_PORT ^= _BV(LED); +#else LED_PIN |= _BV(LED); +#endif watchdogReset(); } while (--count); - 3e46: 81 50 subi r24, 0x01 ; 1 - 3e48: a9 f7 brne .-22 ; 0x3e34 <main+0x34> + 3e48: 81 50 subi r24, 0x01 ; 1 + 3e4a: a9 f7 brne .-22 ; 0x3e36 <main+0x36> /* get character from UART */ ch = getch(); if(ch == STK_GET_PARAMETER) { // GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy getNch(1); - 3e4a: dd 24 eor r13, r13 - 3e4c: d3 94 inc r13 - boot_page_fill((uint16_t)(void*)addrPtr,a); + 3e4c: dd 24 eor r13, r13 + 3e4e: d3 94 inc r13 + __boot_page_fill_short((uint16_t)(void*)addrPtr,a); addrPtr += 2; } while (--ch); // Write from programming buffer - boot_page_write((uint16_t)(void*)address); - 3e4e: a5 e0 ldi r26, 0x05 ; 5 - 3e50: ea 2e mov r14, r26 + __boot_page_write_short((uint16_t)(void*)address); + 3e50: a5 e0 ldi r26, 0x05 ; 5 + 3e52: ea 2e mov r14, r26 boot_spm_busy_wait(); #if defined(RWWSRE) // Reenable read access to flash boot_rww_enable(); - 3e52: f1 e1 ldi r31, 0x11 ; 17 - 3e54: ff 2e mov r15, r31 + 3e54: f1 e1 ldi r31, 0x11 ; 17 + 3e56: ff 2e mov r15, r31 #endif /* Forever loop */ for (;;) { /* get character from UART */ ch = getch(); - 3e56: a4 d0 rcall .+328 ; 0x3fa0 <getch> + 3e58: ab d0 rcall .+342 ; 0x3fb0 <getch> if(ch == STK_GET_PARAMETER) { - 3e58: 81 34 cpi r24, 0x41 ; 65 - 3e5a: 21 f4 brne .+8 ; 0x3e64 <main+0x64> + 3e5a: 81 34 cpi r24, 0x41 ; 65 + 3e5c: 21 f4 brne .+8 ; 0x3e66 <main+0x66> // GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy getNch(1); - 3e5c: 81 e0 ldi r24, 0x01 ; 1 - 3e5e: be d0 rcall .+380 ; 0x3fdc <verifySpace+0xc> + 3e5e: 81 e0 ldi r24, 0x01 ; 1 + 3e60: c5 d0 rcall .+394 ; 0x3fec <getNch> putch(0x03); - 3e60: 83 e0 ldi r24, 0x03 ; 3 - 3e62: 24 c0 rjmp .+72 ; 0x3eac <main+0xac> + 3e62: 83 e0 ldi r24, 0x03 ; 3 + 3e64: 20 c0 rjmp .+64 ; 0x3ea6 <main+0xa6> } else if(ch == STK_SET_DEVICE) { - 3e64: 82 34 cpi r24, 0x42 ; 66 - 3e66: 11 f4 brne .+4 ; 0x3e6c <main+0x6c> + 3e66: 82 34 cpi r24, 0x42 ; 66 + 3e68: 11 f4 brne .+4 ; 0x3e6e <main+0x6e> // SET DEVICE is ignored getNch(20); - 3e68: 84 e1 ldi r24, 0x14 ; 20 - 3e6a: 03 c0 rjmp .+6 ; 0x3e72 <main+0x72> + 3e6a: 84 e1 ldi r24, 0x14 ; 20 + 3e6c: 03 c0 rjmp .+6 ; 0x3e74 <main+0x74> } else if(ch == STK_SET_DEVICE_EXT) { - 3e6c: 85 34 cpi r24, 0x45 ; 69 - 3e6e: 19 f4 brne .+6 ; 0x3e76 <main+0x76> + 3e6e: 85 34 cpi r24, 0x45 ; 69 + 3e70: 19 f4 brne .+6 ; 0x3e78 <main+0x78> // SET DEVICE EXT is ignored getNch(5); - 3e70: 85 e0 ldi r24, 0x05 ; 5 - 3e72: b4 d0 rcall .+360 ; 0x3fdc <verifySpace+0xc> - 3e74: 8a c0 rjmp .+276 ; 0x3f8a <main+0x18a> + 3e72: 85 e0 ldi r24, 0x05 ; 5 + 3e74: bb d0 rcall .+374 ; 0x3fec <getNch> + 3e76: 91 c0 rjmp .+290 ; 0x3f9a <main+0x19a> } else if(ch == STK_LOAD_ADDRESS) { - 3e76: 85 35 cpi r24, 0x55 ; 85 - 3e78: a1 f4 brne .+40 ; 0x3ea2 <main+0xa2> + 3e78: 85 35 cpi r24, 0x55 ; 85 + 3e7a: 81 f4 brne .+32 ; 0x3e9c <main+0x9c> // LOAD ADDRESS - address = getch(); - 3e7a: 92 d0 rcall .+292 ; 0x3fa0 <getch> - 3e7c: 08 2f mov r16, r24 - 3e7e: 10 e0 ldi r17, 0x00 ; 0 - 3e80: 10 93 01 02 sts 0x0201, r17 - 3e84: 00 93 00 02 sts 0x0200, r16 - address = (address & 0xff) | (getch() << 8); - 3e88: 8b d0 rcall .+278 ; 0x3fa0 <getch> - 3e8a: 90 e0 ldi r25, 0x00 ; 0 - 3e8c: 98 2f mov r25, r24 - 3e8e: 88 27 eor r24, r24 - 3e90: 80 2b or r24, r16 - 3e92: 91 2b or r25, r17 - address += address; // Convert from word address to byte address - 3e94: 88 0f add r24, r24 - 3e96: 99 1f adc r25, r25 - 3e98: 90 93 01 02 sts 0x0201, r25 - 3e9c: 80 93 00 02 sts 0x0200, r24 - 3ea0: 73 c0 rjmp .+230 ; 0x3f88 <main+0x188> + uint16_t newAddress; + newAddress = getch(); + 3e7c: 99 d0 rcall .+306 ; 0x3fb0 <getch> + newAddress = (newAddress & 0xff) | (getch() << 8); + 3e7e: 08 2f mov r16, r24 + 3e80: 10 e0 ldi r17, 0x00 ; 0 + 3e82: 96 d0 rcall .+300 ; 0x3fb0 <getch> + 3e84: 90 e0 ldi r25, 0x00 ; 0 + 3e86: 98 2f mov r25, r24 + 3e88: 88 27 eor r24, r24 + 3e8a: 80 2b or r24, r16 + 3e8c: 91 2b or r25, r17 +#ifdef RAMPZ + // Transfer top bit to RAMPZ + RAMPZ = (newAddress & 0x8000) ? 1 : 0; +#endif + newAddress += newAddress; // Convert from word address to byte address + 3e8e: 88 0f add r24, r24 + 3e90: 99 1f adc r25, r25 + address = newAddress; + 3e92: 90 93 01 02 sts 0x0201, r25 + 3e96: 80 93 00 02 sts 0x0200, r24 + 3e9a: 7e c0 rjmp .+252 ; 0x3f98 <main+0x198> verifySpace(); } else if(ch == STK_UNIVERSAL) { - 3ea2: 86 35 cpi r24, 0x56 ; 86 - 3ea4: 29 f4 brne .+10 ; 0x3eb0 <main+0xb0> + 3e9c: 86 35 cpi r24, 0x56 ; 86 + 3e9e: 29 f4 brne .+10 ; 0x3eaa <main+0xaa> // UNIVERSAL command is ignored getNch(4); - 3ea6: 84 e0 ldi r24, 0x04 ; 4 - 3ea8: 99 d0 rcall .+306 ; 0x3fdc <verifySpace+0xc> + 3ea0: 84 e0 ldi r24, 0x04 ; 4 + 3ea2: a4 d0 rcall .+328 ; 0x3fec <getNch> putch(0x00); - 3eaa: 80 e0 ldi r24, 0x00 ; 0 - 3eac: 71 d0 rcall .+226 ; 0x3f90 <putch> - 3eae: 6d c0 rjmp .+218 ; 0x3f8a <main+0x18a> + 3ea4: 80 e0 ldi r24, 0x00 ; 0 + 3ea6: 7c d0 rcall .+248 ; 0x3fa0 <putch> + 3ea8: 78 c0 rjmp .+240 ; 0x3f9a <main+0x19a> } - /* Write memory, length is big endian and is in bytes */ + /* Write memory, length is big endian and is in bytes */ else if(ch == STK_PROG_PAGE) { - 3eb0: 84 36 cpi r24, 0x64 ; 100 - 3eb2: 09 f0 breq .+2 ; 0x3eb6 <main+0xb6> - 3eb4: 43 c0 rjmp .+134 ; 0x3f3c <main+0x13c> + 3eaa: 84 36 cpi r24, 0x64 ; 100 + 3eac: 09 f0 breq .+2 ; 0x3eb0 <main+0xb0> + 3eae: 4e c0 rjmp .+156 ; 0x3f4c <main+0x14c> // PROGRAM PAGE - we support flash programming only, not EEPROM uint8_t *bufPtr; uint16_t addrPtr; getLen(); - 3eb6: 7c d0 rcall .+248 ; 0x3fb0 <getLen> - - // Immediately start page erase - this will 4.5ms - boot_page_erase((uint16_t)(void*)address); - 3eb8: e0 91 00 02 lds r30, 0x0200 - 3ebc: f0 91 01 02 lds r31, 0x0201 - 3ec0: 83 e0 ldi r24, 0x03 ; 3 - 3ec2: 80 93 57 00 sts 0x0057, r24 + 3eb0: 87 d0 rcall .+270 ; 0x3fc0 <getLen> + + // If we are in RWW section, immediately start page erase + if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); + 3eb2: e0 91 00 02 lds r30, 0x0200 + 3eb6: f0 91 01 02 lds r31, 0x0201 + 3eba: 88 e3 ldi r24, 0x38 ; 56 + 3ebc: e0 30 cpi r30, 0x00 ; 0 + 3ebe: f8 07 cpc r31, r24 + 3ec0: 18 f4 brcc .+6 ; 0x3ec8 <main+0xc8> + 3ec2: 83 e0 ldi r24, 0x03 ; 3 + 3ec4: 87 bf out 0x37, r24 ; 55 3ec6: e8 95 spm 3ec8: c0 e0 ldi r28, 0x00 ; 0 3eca: d1 e0 ldi r29, 0x01 ; 1 - + // While that is going on, read in page contents bufPtr = buff; do *bufPtr++ = getch(); - 3ecc: 69 d0 rcall .+210 ; 0x3fa0 <getch> + 3ecc: 71 d0 rcall .+226 ; 0x3fb0 <getch> 3ece: 89 93 st Y+, r24 while (--length); 3ed0: 80 91 02 02 lds r24, 0x0202 @@ -242,279 +262,293 @@ void watchdogReset() { 3eda: 88 23 and r24, r24 3edc: b9 f7 brne .-18 ; 0x3ecc <main+0xcc> + // If we are in NRWW section, page erase has to be delayed until now. + // Todo: Take RAMPZ into account + if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); + 3ede: e0 91 00 02 lds r30, 0x0200 + 3ee2: f0 91 01 02 lds r31, 0x0201 + 3ee6: 88 e3 ldi r24, 0x38 ; 56 + 3ee8: e0 30 cpi r30, 0x00 ; 0 + 3eea: f8 07 cpc r31, r24 + 3eec: 18 f0 brcs .+6 ; 0x3ef4 <main+0xf4> + 3eee: 83 e0 ldi r24, 0x03 ; 3 + 3ef0: 87 bf out 0x37, r24 ; 55 + 3ef2: e8 95 spm + // Read command terminator, start reply verifySpace(); - 3ede: 78 d0 rcall .+240 ; 0x3fd0 <verifySpace> + 3ef4: 75 d0 rcall .+234 ; 0x3fe0 <verifySpace> // If only a partial page is to be programmed, the erase might not be complete. // So check that here boot_spm_busy_wait(); - 3ee0: 07 b6 in r0, 0x37 ; 55 - 3ee2: 00 fc sbrc r0, 0 - 3ee4: fd cf rjmp .-6 ; 0x3ee0 <main+0xe0> + 3ef6: 07 b6 in r0, 0x37 ; 55 + 3ef8: 00 fc sbrc r0, 0 + 3efa: fd cf rjmp .-6 ; 0x3ef6 <main+0xf6> } #endif // Copy buffer into programming buffer bufPtr = buff; addrPtr = (uint16_t)(void*)address; - 3ee6: 40 91 00 02 lds r20, 0x0200 - 3eea: 50 91 01 02 lds r21, 0x0201 - 3eee: a0 e0 ldi r26, 0x00 ; 0 - 3ef0: b1 e0 ldi r27, 0x01 ; 1 + 3efc: 40 91 00 02 lds r20, 0x0200 + 3f00: 50 91 01 02 lds r21, 0x0201 + 3f04: a0 e0 ldi r26, 0x00 ; 0 + 3f06: b1 e0 ldi r27, 0x01 ; 1 ch = SPM_PAGESIZE / 2; do { uint16_t a; a = *bufPtr++; - 3ef2: 2c 91 ld r18, X - 3ef4: 30 e0 ldi r19, 0x00 ; 0 + 3f08: 2c 91 ld r18, X + 3f0a: 30 e0 ldi r19, 0x00 ; 0 a |= (*bufPtr++) << 8; - 3ef6: 11 96 adiw r26, 0x01 ; 1 - 3ef8: 8c 91 ld r24, X - 3efa: 11 97 sbiw r26, 0x01 ; 1 - 3efc: 90 e0 ldi r25, 0x00 ; 0 - 3efe: 98 2f mov r25, r24 - 3f00: 88 27 eor r24, r24 - 3f02: 82 2b or r24, r18 - 3f04: 93 2b or r25, r19 -#ifdef VIRTUAL_BOOT_PARTITION -#define rstVect (*(uint16_t*)(0x204)) -#define wdtVect (*(uint16_t*)(0x206)) + 3f0c: 11 96 adiw r26, 0x01 ; 1 + 3f0e: 8c 91 ld r24, X + 3f10: 11 97 sbiw r26, 0x01 ; 1 + 3f12: 90 e0 ldi r25, 0x00 ; 0 + 3f14: 98 2f mov r25, r24 + 3f16: 88 27 eor r24, r24 + 3f18: 82 2b or r24, r18 + 3f1a: 93 2b or r25, r19 +#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) +#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #endif + /* main program starts here */ int main(void) { - 3f06: 12 96 adiw r26, 0x02 ; 2 + 3f1c: 12 96 adiw r26, 0x02 ; 2 ch = SPM_PAGESIZE / 2; do { uint16_t a; a = *bufPtr++; a |= (*bufPtr++) << 8; - boot_page_fill((uint16_t)(void*)addrPtr,a); - 3f08: fa 01 movw r30, r20 - 3f0a: 0c 01 movw r0, r24 - 3f0c: d0 92 57 00 sts 0x0057, r13 - 3f10: e8 95 spm - 3f12: 11 24 eor r1, r1 + __boot_page_fill_short((uint16_t)(void*)addrPtr,a); + 3f1e: fa 01 movw r30, r20 + 3f20: 0c 01 movw r0, r24 + 3f22: d7 be out 0x37, r13 ; 55 + 3f24: e8 95 spm + 3f26: 11 24 eor r1, r1 addrPtr += 2; - 3f14: 4e 5f subi r20, 0xFE ; 254 - 3f16: 5f 4f sbci r21, 0xFF ; 255 + 3f28: 4e 5f subi r20, 0xFE ; 254 + 3f2a: 5f 4f sbci r21, 0xFF ; 255 } while (--ch); - 3f18: f1 e0 ldi r31, 0x01 ; 1 - 3f1a: a0 38 cpi r26, 0x80 ; 128 - 3f1c: bf 07 cpc r27, r31 - 3f1e: 49 f7 brne .-46 ; 0x3ef2 <main+0xf2> + 3f2c: f1 e0 ldi r31, 0x01 ; 1 + 3f2e: a0 38 cpi r26, 0x80 ; 128 + 3f30: bf 07 cpc r27, r31 + 3f32: 51 f7 brne .-44 ; 0x3f08 <main+0x108> // Write from programming buffer - boot_page_write((uint16_t)(void*)address); - 3f20: e0 91 00 02 lds r30, 0x0200 - 3f24: f0 91 01 02 lds r31, 0x0201 - 3f28: e0 92 57 00 sts 0x0057, r14 - 3f2c: e8 95 spm + __boot_page_write_short((uint16_t)(void*)address); + 3f34: e0 91 00 02 lds r30, 0x0200 + 3f38: f0 91 01 02 lds r31, 0x0201 + 3f3c: e7 be out 0x37, r14 ; 55 + 3f3e: e8 95 spm boot_spm_busy_wait(); - 3f2e: 07 b6 in r0, 0x37 ; 55 - 3f30: 00 fc sbrc r0, 0 - 3f32: fd cf rjmp .-6 ; 0x3f2e <main+0x12e> + 3f40: 07 b6 in r0, 0x37 ; 55 + 3f42: 00 fc sbrc r0, 0 + 3f44: fd cf rjmp .-6 ; 0x3f40 <main+0x140> #if defined(RWWSRE) // Reenable read access to flash boot_rww_enable(); - 3f34: f0 92 57 00 sts 0x0057, r15 - 3f38: e8 95 spm - 3f3a: 27 c0 rjmp .+78 ; 0x3f8a <main+0x18a> + 3f46: f7 be out 0x37, r15 ; 55 + 3f48: e8 95 spm + 3f4a: 27 c0 rjmp .+78 ; 0x3f9a <main+0x19a> #endif } /* Read memory block mode, length is big endian. */ else if(ch == STK_READ_PAGE) { - 3f3c: 84 37 cpi r24, 0x74 ; 116 - 3f3e: b9 f4 brne .+46 ; 0x3f6e <main+0x16e> + 3f4c: 84 37 cpi r24, 0x74 ; 116 + 3f4e: b9 f4 brne .+46 ; 0x3f7e <main+0x17e> // READ PAGE - we only read flash getLen(); - 3f40: 37 d0 rcall .+110 ; 0x3fb0 <getLen> + 3f50: 37 d0 rcall .+110 ; 0x3fc0 <getLen> verifySpace(); - 3f42: 46 d0 rcall .+140 ; 0x3fd0 <verifySpace> - else ch = pgm_read_byte_near(address); + 3f52: 46 d0 rcall .+140 ; 0x3fe0 <verifySpace> + putch(result); address++; - putch(ch); - } while (--length); + } + while (--length); #else do putch(pgm_read_byte_near(address++)); - 3f44: e0 91 00 02 lds r30, 0x0200 - 3f48: f0 91 01 02 lds r31, 0x0201 - 3f4c: 31 96 adiw r30, 0x01 ; 1 - 3f4e: f0 93 01 02 sts 0x0201, r31 - 3f52: e0 93 00 02 sts 0x0200, r30 - 3f56: 31 97 sbiw r30, 0x01 ; 1 - 3f58: e4 91 lpm r30, Z+ - 3f5a: 8e 2f mov r24, r30 - 3f5c: 19 d0 rcall .+50 ; 0x3f90 <putch> + 3f54: e0 91 00 02 lds r30, 0x0200 + 3f58: f0 91 01 02 lds r31, 0x0201 + 3f5c: 31 96 adiw r30, 0x01 ; 1 + 3f5e: f0 93 01 02 sts 0x0201, r31 + 3f62: e0 93 00 02 sts 0x0200, r30 + 3f66: 31 97 sbiw r30, 0x01 ; 1 + 3f68: e4 91 lpm r30, Z+ + 3f6a: 8e 2f mov r24, r30 + 3f6c: 19 d0 rcall .+50 ; 0x3fa0 <putch> while (--length); - 3f5e: 80 91 02 02 lds r24, 0x0202 - 3f62: 81 50 subi r24, 0x01 ; 1 - 3f64: 80 93 02 02 sts 0x0202, r24 - 3f68: 88 23 and r24, r24 - 3f6a: 61 f7 brne .-40 ; 0x3f44 <main+0x144> - 3f6c: 0e c0 rjmp .+28 ; 0x3f8a <main+0x18a> + 3f6e: 80 91 02 02 lds r24, 0x0202 + 3f72: 81 50 subi r24, 0x01 ; 1 + 3f74: 80 93 02 02 sts 0x0202, r24 + 3f78: 88 23 and r24, r24 + 3f7a: 61 f7 brne .-40 ; 0x3f54 <main+0x154> + 3f7c: 0e c0 rjmp .+28 ; 0x3f9a <main+0x19a> +#endif #endif } /* Get device signature bytes */ else if(ch == STK_READ_SIGN) { - 3f6e: 85 37 cpi r24, 0x75 ; 117 - 3f70: 39 f4 brne .+14 ; 0x3f80 <main+0x180> + 3f7e: 85 37 cpi r24, 0x75 ; 117 + 3f80: 39 f4 brne .+14 ; 0x3f90 <main+0x190> // READ SIGN - return what Avrdude wants to hear verifySpace(); - 3f72: 2e d0 rcall .+92 ; 0x3fd0 <verifySpace> + 3f82: 2e d0 rcall .+92 ; 0x3fe0 <verifySpace> putch(SIGNATURE_0); - 3f74: 8e e1 ldi r24, 0x1E ; 30 - 3f76: 0c d0 rcall .+24 ; 0x3f90 <putch> + 3f84: 8e e1 ldi r24, 0x1E ; 30 + 3f86: 0c d0 rcall .+24 ; 0x3fa0 <putch> putch(SIGNATURE_1); - 3f78: 84 e9 ldi r24, 0x94 ; 148 - 3f7a: 0a d0 rcall .+20 ; 0x3f90 <putch> + 3f88: 84 e9 ldi r24, 0x94 ; 148 + 3f8a: 0a d0 rcall .+20 ; 0x3fa0 <putch> putch(SIGNATURE_2); - 3f7c: 86 e0 ldi r24, 0x06 ; 6 - 3f7e: 96 cf rjmp .-212 ; 0x3eac <main+0xac> + 3f8c: 86 e0 ldi r24, 0x06 ; 6 + 3f8e: 8b cf rjmp .-234 ; 0x3ea6 <main+0xa6> } else if (ch == 'Q') { - 3f80: 81 35 cpi r24, 0x51 ; 81 - 3f82: 11 f4 brne .+4 ; 0x3f88 <main+0x188> + 3f90: 81 35 cpi r24, 0x51 ; 81 + 3f92: 11 f4 brne .+4 ; 0x3f98 <main+0x198> // Adaboot no-wait mod watchdogConfig(WATCHDOG_16MS); - 3f84: 88 e0 ldi r24, 0x08 ; 8 - 3f86: 19 d0 rcall .+50 ; 0x3fba <watchdogConfig> + 3f94: 88 e0 ldi r24, 0x08 ; 8 + 3f96: 19 d0 rcall .+50 ; 0x3fca <watchdogConfig> verifySpace(); } else { // This covers the response to commands like STK_ENTER_PROGMODE verifySpace(); - 3f88: 23 d0 rcall .+70 ; 0x3fd0 <verifySpace> + 3f98: 23 d0 rcall .+70 ; 0x3fe0 <verifySpace> } putch(STK_OK); - 3f8a: 80 e1 ldi r24, 0x10 ; 16 - 3f8c: 01 d0 rcall .+2 ; 0x3f90 <putch> - 3f8e: 63 cf rjmp .-314 ; 0x3e56 <main+0x56> + 3f9a: 80 e1 ldi r24, 0x10 ; 16 + 3f9c: 01 d0 rcall .+2 ; 0x3fa0 <putch> + 3f9e: 5c cf rjmp .-328 ; 0x3e58 <main+0x58> -00003f90 <putch>: +00003fa0 <putch>: } } void putch(char ch) { - 3f90: 98 2f mov r25, r24 + 3fa0: 98 2f mov r25, r24 #ifndef SOFT_UART while (!(UCSR0A & _BV(UDRE0))); - 3f92: 80 91 c0 00 lds r24, 0x00C0 - 3f96: 85 ff sbrs r24, 5 - 3f98: fc cf rjmp .-8 ; 0x3f92 <putch+0x2> + 3fa2: 80 91 c0 00 lds r24, 0x00C0 + 3fa6: 85 ff sbrs r24, 5 + 3fa8: fc cf rjmp .-8 ; 0x3fa2 <putch+0x2> UDR0 = ch; - 3f9a: 90 93 c6 00 sts 0x00C6, r25 + 3faa: 90 93 c6 00 sts 0x00C6, r25 [uartBit] "I" (UART_TX_BIT) : "r25" ); #endif } - 3f9e: 08 95 ret + 3fae: 08 95 ret -00003fa0 <getch>: +00003fb0 <getch>: return getch(); } // Watchdog functions. These are only safe with interrupts turned off. void watchdogReset() { __asm__ __volatile__ ( - 3fa0: a8 95 wdr + 3fb0: a8 95 wdr [uartBit] "I" (UART_RX_BIT) : "r25" ); #else while(!(UCSR0A & _BV(RXC0))); - 3fa2: 80 91 c0 00 lds r24, 0x00C0 - 3fa6: 87 ff sbrs r24, 7 - 3fa8: fc cf rjmp .-8 ; 0x3fa2 <getch+0x2> + 3fb2: 80 91 c0 00 lds r24, 0x00C0 + 3fb6: 87 ff sbrs r24, 7 + 3fb8: fc cf rjmp .-8 ; 0x3fb2 <getch+0x2> ch = UDR0; - 3faa: 80 91 c6 00 lds r24, 0x00C6 -#ifdef LED_DATA_FLASH + 3fba: 80 91 c6 00 lds r24, 0x00C6 LED_PIN |= _BV(LED); #endif +#endif return ch; } - 3fae: 08 95 ret + 3fbe: 08 95 ret -00003fb0 <getLen>: +00003fc0 <getLen>: } while (--count); } #endif uint8_t getLen() { getch(); - 3fb0: f7 df rcall .-18 ; 0x3fa0 <getch> + 3fc0: f7 df rcall .-18 ; 0x3fb0 <getch> length = getch(); - 3fb2: f6 df rcall .-20 ; 0x3fa0 <getch> - 3fb4: 80 93 02 02 sts 0x0202, r24 + 3fc2: f6 df rcall .-20 ; 0x3fb0 <getch> + 3fc4: 80 93 02 02 sts 0x0202, r24 return getch(); } - 3fb8: f3 cf rjmp .-26 ; 0x3fa0 <getch> + 3fc8: f3 cf rjmp .-26 ; 0x3fb0 <getch> -00003fba <watchdogConfig>: +00003fca <watchdogConfig>: "wdr\n" ); } void watchdogConfig(uint8_t x) { WDTCSR = _BV(WDCE) | _BV(WDE); - 3fba: e0 e6 ldi r30, 0x60 ; 96 - 3fbc: f0 e0 ldi r31, 0x00 ; 0 - 3fbe: 98 e1 ldi r25, 0x18 ; 24 - 3fc0: 90 83 st Z, r25 + 3fca: e0 e6 ldi r30, 0x60 ; 96 + 3fcc: f0 e0 ldi r31, 0x00 ; 0 + 3fce: 98 e1 ldi r25, 0x18 ; 24 + 3fd0: 90 83 st Z, r25 WDTCSR = x; - 3fc2: 80 83 st Z, r24 + 3fd2: 80 83 st Z, r24 } - 3fc4: 08 95 ret + 3fd4: 08 95 ret -00003fc6 <appStart>: +00003fd6 <appStart>: void appStart() { watchdogConfig(WATCHDOG_OFF); - 3fc6: 80 e0 ldi r24, 0x00 ; 0 - 3fc8: f8 df rcall .-16 ; 0x3fba <watchdogConfig> + 3fd6: 80 e0 ldi r24, 0x00 ; 0 + 3fd8: f8 df rcall .-16 ; 0x3fca <watchdogConfig> __asm__ __volatile__ ( - 3fca: ee 27 eor r30, r30 - 3fcc: ff 27 eor r31, r31 - 3fce: 09 94 ijmp + 3fda: ee 27 eor r30, r30 + 3fdc: ff 27 eor r31, r31 + 3fde: 09 94 ijmp -00003fd0 <verifySpace>: +00003fe0 <verifySpace>: do getch(); while (--count); verifySpace(); } void verifySpace() { if (getch() != CRC_EOP) appStart(); - 3fd0: e7 df rcall .-50 ; 0x3fa0 <getch> - 3fd2: 80 32 cpi r24, 0x20 ; 32 - 3fd4: 09 f0 breq .+2 ; 0x3fd8 <verifySpace+0x8> - 3fd6: f7 df rcall .-18 ; 0x3fc6 <appStart> + 3fe0: e7 df rcall .-50 ; 0x3fb0 <getch> + 3fe2: 80 32 cpi r24, 0x20 ; 32 + 3fe4: 09 f0 breq .+2 ; 0x3fe8 <verifySpace+0x8> + 3fe6: f7 df rcall .-18 ; 0x3fd6 <appStart> putch(STK_INSYNC); - 3fd8: 84 e1 ldi r24, 0x14 ; 20 + 3fe8: 84 e1 ldi r24, 0x14 ; 20 } - 3fda: da cf rjmp .-76 ; 0x3f90 <putch> + 3fea: da cf rjmp .-76 ; 0x3fa0 <putch> + +00003fec <getNch>: ::[count] "M" (UART_B_VALUE) ); } #endif void getNch(uint8_t count) { - 3fdc: 1f 93 push r17 - 3fde: 18 2f mov r17, r24 - -00003fe0 <getNch>: + 3fec: 1f 93 push r17 + 3fee: 18 2f mov r17, r24 do getch(); while (--count); - 3fe0: df df rcall .-66 ; 0x3fa0 <getch> - 3fe2: 11 50 subi r17, 0x01 ; 1 - 3fe4: e9 f7 brne .-6 ; 0x3fe0 <getNch> + 3ff0: df df rcall .-66 ; 0x3fb0 <getch> + 3ff2: 11 50 subi r17, 0x01 ; 1 + 3ff4: e9 f7 brne .-6 ; 0x3ff0 <getNch+0x4> verifySpace(); - 3fe6: f4 df rcall .-24 ; 0x3fd0 <verifySpace> + 3ff6: f4 df rcall .-24 ; 0x3fe0 <verifySpace> } - 3fe8: 1f 91 pop r17 - 3fea: 08 95 ret + 3ff8: 1f 91 pop r17 + 3ffa: 08 95 ret |