/* HardwareSerial.cpp - Hardware serial library for Wiring Copyright (c) 2006 Nicholas Zambetti. All right reserved. This library is free software; you can redistribute it and/or modify it under the terms of the GNU Lesser General Public License as published by the Free Software Foundation; either version 2.1 of the License, or (at your option) any later version. This library is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more details. You should have received a copy of the GNU Lesser General Public License along with this library; if not, write to the Free Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA Modified 23 November 2006 by David A. Mellis Modified 28 September 2010 by Mark Sproul Modified 14 August 2012 by Alarus */ #include #include #include #include #include "Arduino.h" #include "wiring_private.h" // this next line disables the entire HardwareSerial.cpp, // this is so I can support Attiny series and any other chip without a uart #if defined(UBRRH) || defined(UBRR0H) || defined(UBRR1H) || defined(UBRR2H) || defined(UBRR3H) #include "HardwareSerial.h" // Ensure that the various bit positions we use are available with a 0 // postfix, so we can always use the values for UART0 for all UARTs. The // alternative, passing the various values for each UART to the // HardwareSerial constructor also works, but makes the code bigger and // slower. #if !defined(TXC0) #if defined(TXC) // On ATmega8, the uart and its bits are not numbered, so there is no TXC0 etc. #define TXC0 TXC #define RXEN0 RXEN #define TXEN0 TXEN #define RXCIE0 RXCIE #define UDRIE0 UDRIE #define U2X0 U2X #define UPE0 UPE #define UDRE0 UDRE #elif defined(TXC1) // Some devices have uart1 but no uart0 #define TXC0 TXC1 #define RXEN0 RXEN1 #define TXEN0 TXEN1 #define RXCIE0 RXCIE1 #define UDRIE0 UDRIE1 #define U2X0 U2X1 #define UPE0 UPE1 #define UDRE0 UDRE1 #else #error No UART found in HardwareSerial.cpp #endif #endif // !defined TXC0 // Check at compiletime that it is really ok to use the bit positions of // UART0 for the other UARTs as well, in case these values ever get // changed for future hardware. #if defined(TXC1) && (TXC1 != TXC0 || RXEN1 != RXEN0 || RXCIE1 != RXCIE0 || \ UDRIE1 != UDRIE0 || U2X1 != U2X0 || UPE1 != UPE0 || \ UDRE1 != UDRE0) #error "Not all bit positions for UART1 are the same as for UART0" #endif #if defined(TXC2) && (TXC2 != TXC0 || RXEN2 != RXEN0 || RXCIE2 != RXCIE0 || \ UDRIE2 != UDRIE0 || U2X2 != U2X0 || UPE2 != UPE0 || \ UDRE2 != UDRE0) #error "Not all bit positions for UART2 are the same as for UART0" #endif #if defined(TXC3) && (TXC3 != TXC0 || RXEN3 != RXEN0 || RXCIE3 != RXCIE0 || \ UDRIE3 != UDRIE0 || U3X3 != U3X0 || UPE3 != UPE0 || \ UDRE3 != UDRE0) #error "Not all bit positions for UART3 are the same as for UART0" #endif #if !defined(USART0_RX_vect) && defined(USART1_RX_vect) // do nothing - on the 32u4 the first USART is USART1 #else #if !defined(USART_RX_vect) && !defined(USART0_RX_vect) && \ !defined(USART_RXC_vect) #error "Don't know what the Data Received vector is called for the first UART" #else void serialEvent() __attribute__((weak)); void serialEvent() {} #define serialEvent_implemented #if defined(USART_RX_vect) ISR(USART_RX_vect) #elif defined(USART0_RX_vect) ISR(USART0_RX_vect) #elif defined(USART_RXC_vect) ISR(USART_RXC_vect) // ATmega8 #endif { Serial._rx_complete_irq(); } #endif #endif #if defined(USART1_RX_vect) void serialEvent1() __attribute__((weak)); void serialEvent1() {} #define serialEvent1_implemented ISR(USART1_RX_vect) { Serial1._rx_complete_irq(); } #endif #if defined(USART2_RX_vect) && defined(UDR2) void serialEvent2() __attribute__((weak)); void serialEvent2() {} #define serialEvent2_implemented ISR(USART2_RX_vect) { Serial2._rx_complete_irq(); } #endif #if defined(USART3_RX_vect) && defined(UDR3) void serialEvent3() __attribute__((weak)); void serialEvent3() {} #define serialEvent3_implemented ISR(USART3_RX_vect) { Serial3._rx_complete_irq(); } #endif void serialEventRun(void) { #ifdef serialEvent_implemented if (Serial.available()) serialEvent(); #endif #ifdef serialEvent1_implemented if (Serial1.available()) serialEvent1(); #endif #ifdef serialEvent2_implemented if (Serial2.available()) serialEvent2(); #endif #ifdef serialEvent3_implemented if (Serial3.available()) serialEvent3(); #endif } #if !defined(USART0_UDRE_vect) && defined(USART1_UDRE_vect) // do nothing - on the 32u4 the first USART is USART1 #else #if !defined(UART0_UDRE_vect) && !defined(UART_UDRE_vect) && !defined(USART0_UDRE_vect) && !defined(USART_UDRE_vect) #error "Don't know what the Data Register Empty vector is called for the first UART" #else #if defined(UART0_UDRE_vect) ISR(UART0_UDRE_vect) #elif defined(UART_UDRE_vect) ISR(UART_UDRE_vect) #elif defined(USART0_UDRE_vect) ISR(USART0_UDRE_vect) #elif defined(USART_UDRE_vect) ISR(USART_UDRE_vect) #endif { Serial._tx_udr_empty_irq(); } #endif #endif #ifdef USART1_UDRE_vect ISR(USART1_UDRE_vect) { Serial1._tx_udr_empty_irq(); } #endif #ifdef USART2_UDRE_vect ISR(USART2_UDRE_vect) { Serial2._tx_udr_empty_irq(); } #endif #ifdef USART3_UDRE_vect ISR(USART3_UDRE_vect) { Serial3._tx_udr_empty_irq(); } #endif // Actual interrupt handlers ////////////////////////////////////////////////////////////// void HardwareSerial::_rx_complete_irq(void) { if (bit_is_clear(*_ucsra, UPE0)) { // No Parity error, read byte and store it in the buffer if there is // room unsigned char c = *_udr; int i = (unsigned int)(_rx_buffer_head + 1) % SERIAL_BUFFER_SIZE; // if we should be storing the received character into the location // just before the tail (meaning that the head would advance to the // current location of the tail), we're about to overflow the buffer // and so we don't write the character or advance the head. if (i != _rx_buffer_tail) { _rx_buffer[_rx_buffer_head] = c; _rx_buffer_head = i; } } else { // Parity error, read byte but discard it unsigned char c = *_udr; }; } void HardwareSerial::_tx_udr_empty_irq(void) { if (_tx_buffer_head == _tx_buffer_tail) { // Buffer empty, so disable interrupts cbi(*_ucsrb, UDRIE0); } else { // There is more data in the output buffer. Send the next byte unsigned char c = _tx_buffer[_tx_buffer_tail]; _tx_buffer_tail = (_tx_buffer_tail + 1) % SERIAL_BUFFER_SIZE; *_udr = c; } } // Constructors //////////////////////////////////////////////////////////////// HardwareSerial::HardwareSerial( volatile uint8_t *ubrrh, volatile uint8_t *ubrrl, volatile uint8_t *ucsra, volatile uint8_t *ucsrb, volatile uint8_t *ucsrc, volatile uint8_t *udr) { _tx_buffer_head = _tx_buffer_tail = 0; _rx_buffer_head = _rx_buffer_tail = 0; _ubrrh = ubrrh; _ubrrl = ubrrl; _ucsra = ucsra; _ucsrb = ucsrb; _ucsrc = ucsrc; _udr = udr; } // Public Methods ////////////////////////////////////////////////////////////// void HardwareSerial::begin(unsigned long baud, byte config) { // Try u2x mode first uint16_t baud_setting = (F_CPU / 4 / baud - 1) / 2; *_ucsra = 1 << U2X0; // hardcoded exception for 57600 for compatibility with the bootloader // shipped with the Duemilanove and previous boards and the firmware // on the 8U2 on the Uno and Mega 2560. Also, The baud_setting cannot // be > 4095, so switch back to non-u2x mode if the baud rate is too // low. if (((F_CPU == 16000000UL) && (baud == 57600)) || (baud_setting >4095)) { *_ucsra = 0; baud_setting = (F_CPU / 8 / baud - 1) / 2; } // assign the baud_setting, a.k.a. ubbr (USART Baud Rate Register) *_ubrrh = baud_setting >> 8; *_ubrrl = baud_setting; //set the data bits, parity, and stop bits #if defined(__AVR_ATmega8__) config |= 0x80; // select UCSRC register (shared with UBRRH) #endif *_ucsrc = config; sbi(*_ucsrb, RXEN0); sbi(*_ucsrb, TXEN0); sbi(*_ucsrb, RXCIE0); cbi(*_ucsrb, UDRIE0); } void HardwareSerial::end() { // wait for transmission of outgoing data while (_tx_buffer_head != _tx_buffer_tail) ; cbi(*_ucsrb, RXEN0); cbi(*_ucsrb, TXEN0); cbi(*_ucsrb, RXCIE0); cbi(*_ucsrb, UDRIE0); // clear any received data _rx_buffer_head = _rx_buffer_tail; } int HardwareSerial::available(void) { return (unsigned int)(SERIAL_BUFFER_SIZE + _rx_buffer_head - _rx_buffer_tail) % SERIAL_BUFFER_SIZE; } int HardwareSerial::peek(void) { if (_rx_buffer_head == _rx_buffer_tail) { return -1; } else { return _rx_buffer[_rx_buffer_tail]; } } int HardwareSerial::read(void) { // if the head isn't ahead of the tail, we don't have any characters if (_rx_buffer_head == _rx_buffer_tail) { return -1; } else { unsigned char c = _rx_buffer[_rx_buffer_tail]; _rx_buffer_tail = (unsigned int)(_rx_buffer_tail + 1) % SERIAL_BUFFER_SIZE; return c; } } void HardwareSerial::flush() { // UDR is kept full while the buffer is not empty, so TXC triggers when EMPTY && SENT while (transmitting && bit_is_clear(*_ucsra, TXC0)); transmitting = false; } size_t HardwareSerial::write(uint8_t c) { int i = (_tx_buffer_head + 1) % SERIAL_BUFFER_SIZE; // If the output buffer is full, there's nothing for it other than to // wait for the interrupt handler to empty it a bit // ???: return 0 here instead? while (i == _tx_buffer_tail) ; _tx_buffer[_tx_buffer_head] = c; _tx_buffer_head = i; sbi(*_ucsrb, UDRIE0); // clear the TXC bit -- "can be cleared by writing a one to its bit location" transmitting = true; sbi(*_ucsra, TXC0); return 1; } // Preinstantiate Objects ////////////////////////////////////////////////////// #if defined(UBRRH) && defined(UBRRL) HardwareSerial Serial(&UBRRH, &UBRRL, &UCSRA, &UCSRB, &UCSRC, &UDR); #elif defined(UBRR0H) && defined(UBRR0L) HardwareSerial Serial(&UBRR0H, &UBRR0L, &UCSR0A, &UCSR0B, &UCSR0C, &UDR0); #elif defined(USBCON) // do nothing - Serial object and buffers are initialized in CDC code #else #error no serial port defined (port 0) #endif #if defined(UBRR1H) HardwareSerial Serial1(&UBRR1H, &UBRR1L, &UCSR1A, &UCSR1B, &UCSR1C, &UDR1); #endif #if defined(UBRR2H) HardwareSerial Serial2(&UBRR2H, &UBRR2L, &UCSR2A, &UCSR2B, &UCSR2C, &UDR2); #endif #if defined(UBRR3H) HardwareSerial Serial3(&UBRR3H, &UBRR3L, &UCSR3A, &UCSR3B, &UCSR3C, &UDR3); #endif #endif // whole file