From db605dd18b11ecfb5cd9f92c721c52cb70543384 Mon Sep 17 00:00:00 2001 From: "David A. Mellis" Date: Mon, 1 Jun 2009 08:32:11 +0000 Subject: First integration of the Arduino code in Processing 5503: PreProcessor and Compiler have been integrated with changes to the Sketch. Compilation still has problems (Thread error on success, and can't handle non-pde files in a sketch). Modified the Mac OS X make.sh to copy the hardware, avr tools, and example over. Removing some of the antlr stuff. Disabling the Commander (command-line execution) for now. Added Library, LibraryManager, and Target. Added support for prefixed preferences (e.g. for boards and programmers). --- libraries/Ethernet/utility/spi.h | 58 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100755 libraries/Ethernet/utility/spi.h (limited to 'libraries/Ethernet/utility/spi.h') diff --git a/libraries/Ethernet/utility/spi.h b/libraries/Ethernet/utility/spi.h new file mode 100755 index 0000000..000705d --- /dev/null +++ b/libraries/Ethernet/utility/spi.h @@ -0,0 +1,58 @@ +//----------------------------------------------------------------------------- +//AVR Mega168 SPI HAL +#define BIT0 0x01 +#define BIT1 0x02 +#define BIT2 0x04 +#define BIT3 0x08 +#define BIT4 0x10 +#define BIT5 0x20 +#define BIT6 0x40 +#define BIT7 0x80 + +#define SPI0_SS_BIT BIT2 +#define SPI0_SS_DDR DDRB +#define SPI0_SS_PORT PORTB + +#define SPI0_SCLK_BIT BIT5 +#define SPI0_SCLK_DDR DDRB +#define SPI0_SCLK_PORT PORTB + +#define SPI0_MOSI_BIT BIT3 +#define SPI0_MOSI_DDR DDRB +#define SPI0_MOSI_PORT PORTB + +#define SPI0_MISO_BIT BIT4 +#define SPI0_MISO_DDR DDRB +#define SPI0_MISO_PORT PORTB + + +#define SPI0_WaitForReceive() +#define SPI0_RxData() (SPDR) + +#define SPI0_TxData(Data) (SPDR = Data) +#define SPI0_WaitForSend() while( (SPSR & 0x80)==0x00 ) + +#define SPI0_SendByte(Data) SPI0_TxData(Data);SPI0_WaitForSend() +#define SPI0_RecvBute() SPI0_RxData() + +// PB4(MISO), PB3(MOSI), PB5(SCK), PB2(/SS) // CS=1, waiting for SPI start // SPI mode 0, 4MHz +#define SPI0_Init() DDRB |= SPI0_SS_BIT|SPI0_SCLK_BIT|SPI0_MOSI_BIT;\ + PORTB |= SPI0_SS_BIT; PORTB &= ~(SPI0_SCLK_BIT|SPI0_MOSI_BIT);\ + SPCR = 0x50 +//----------------------------------------------------------------------------- + +//----------------------------------------------------------------------------- +//IInChip SPI HAL +#define IINCHIP_SpiInit SPI0_Init +#define IINCHIP_SpiSendData SPI0_SendByte +#define IINCHIP_SpiRecvData SPI0_RxData + + +#define IINCHIP_CS_BIT BIT2 +#define IINCHIP_CS_DDR DDRB +#define IINCHIP_CS_PORT PORTB + +#define IINCHIP_CSInit() (IINCHIP_CS_DDR |= IINCHIP_CS_BIT) +#define IINCHIP_CSon() (IINCHIP_CS_PORT |= IINCHIP_CS_BIT) +#define IINCHIP_CSoff() (IINCHIP_CS_PORT &= ~IINCHIP_CS_BIT) +//----------------------------------------------------------------------------- -- cgit v1.2.3-18-g5258