From 0d9a111face4f3629bcae8e52af843792af3b453 Mon Sep 17 00:00:00 2001 From: "David A. Mellis" Date: Thu, 13 Sep 2012 10:41:16 -0400 Subject: Moving into firmwares directory. --- firmwares/wifishield/binary/wifiHD.elf | Bin 0 -> 398956 bytes firmwares/wifishield/binary/wifiHD.hex | 15921 +++++++++++++++ firmwares/wifishield/binary/wifiHD_2_1.elf | Bin 0 -> 1308530 bytes firmwares/wifishield/binary/wifi_dnld.elf | Bin 0 -> 182489 bytes firmwares/wifishield/binary/wifi_dnld.hex | 10470 ++++++++++ firmwares/wifishield/binary/wifi_dnld_2_1.elf | Bin 0 -> 182264 bytes .../scripts/ArduinoWifiShield_upgrade.sh | 96 + .../scripts/ArduinoWifiShield_upgrade_mac.sh | 96 + firmwares/wifishield/wifiHD/.cproject | 4045 ++++ firmwares/wifishield/wifiHD/.project | 77 + firmwares/wifishield/wifiHD/Release/wifiHD.elf | Bin 0 -> 398956 bytes .../wifishield/wifiHD/src/CONFIG/conf_access.h | 170 + .../wifishield/wifiHD/src/CONFIG/conf_at45dbx.h | 83 + firmwares/wifishield/wifiHD/src/CONFIG/conf_ebi.h | 108 + .../wifishield/wifiHD/src/CONFIG/conf_sd_mmc_spi.h | 73 + .../wifiHD/src/SOFTWARE_FRAMEWORK/ASM/trampoline.x | 74 + .../SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/arduino.h | 236 + .../src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.c | 346 + .../src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.h | 191 + .../SOFTWARE_FRAMEWORK/BOARDS/EVK1105/evk1105.h | 433 + .../src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.c | 346 + .../src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.h | 187 + .../wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/board.h | 120 + .../src/SOFTWARE_FRAMEWORK/BOARDS/board.h.my | 120 + .../COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.c | 653 + .../COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.h | 270 + .../MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.c | 234 + .../MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.h | 164 + .../HD/v2.7.0/UCR1/GCC/lib_ucr1_hd_sdio_v2.7.0.a | Bin 0 -> 11978 bytes .../HD/v2.7.0/UCR1/GCC/lib_ucr1_hd_spi_v2.7.0.a | Bin 0 -> 13134 bytes .../UCR1/GCC/lib_ucr1_hd_wl_sta_intwpa_v2.7.0.a | Bin 0 -> 1007102 bytes .../HD/v2.7.0/UCR2/GCC/lib_ucr2_hd_sdio_v2.7.0.a | Bin 0 -> 11946 bytes .../HD/v2.7.0/UCR2/GCC/lib_ucr2_hd_spi_v2.7.0.a | Bin 0 -> 13110 bytes .../UCR2/GCC/lib_ucr2_hd_wl_sta_intwpa_v2.7.0.a | Bin 0 -> 1004426 bytes .../COMPONENTS/WIFI/HD/v2.7.0/revision.txt | 1 + .../SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_api.h | 1687 ++ .../SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_fw.h | 19287 +++++++++++++++++++ .../SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_os.h | 35 + .../COMPONENTS/WIFI/HD/wl_sdio.h | 172 + .../SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_spi.h | 185 + .../COMPONENTS/WIFI/HD/wlap_api.h | 154 + .../DRIVERS/CPU/CYCLE_COUNTER/cycle_counter.h | 309 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/EBI/SMC/smc.c | 995 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/EBI/SMC/smc.h | 68 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/EIC/eic.c | 183 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/EIC/eic.h | 275 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.c | 1117 ++ .../src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.h | 1002 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.c | 458 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.h | 583 + .../SOFTWARE_FRAMEWORK/DRIVERS/INTC/exception.x | 239 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.c | 214 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.h | 100 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/PDCA/pdca.c | 296 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/PDCA/pdca.h | 251 + .../wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.c | 546 + .../wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.h | 493 + .../SOFTWARE_FRAMEWORK/DRIVERS/PM/pm_conf_clocks.c | 268 + .../DRIVERS/PM/power_clocks_lib.c | 566 + .../DRIVERS/PM/power_clocks_lib.h | 379 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/RTC/rtc.c | 213 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/RTC/rtc.h | 191 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.c | 443 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.h | 342 + .../wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/TC/tc.c | 314 + .../wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/TC/tc.h | 591 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.c | 914 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.h | 889 + .../src/SOFTWARE_FRAMEWORK/SERVICES/DELAY/delay.c | 87 + .../src/SOFTWARE_FRAMEWORK/SERVICES/DELAY/delay.h | 80 + .../SERVICES/LWIP/lwip-1.3.2/src/core/dhcp.c | 1724 ++ .../SERVICES/LWIP/lwip-1.3.2/src/core/dns.c | 982 + .../SERVICES/LWIP/lwip-1.3.2/src/core/init.c | 276 + .../LWIP/lwip-1.3.2/src/core/ipv4/autoip.c | 499 + .../SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/icmp.c | 333 + .../SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/igmp.c | 759 + .../SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/inet.c | 280 + .../LWIP/lwip-1.3.2/src/core/ipv4/inet_chksum.c | 440 + .../SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/ip.c | 725 + .../LWIP/lwip-1.3.2/src/core/ipv4/ip_addr.c | 86 + .../LWIP/lwip-1.3.2/src/core/ipv4/ip_frag.c | 794 + .../SERVICES/LWIP/lwip-1.3.2/src/core/mem.c | 635 + .../SERVICES/LWIP/lwip-1.3.2/src/core/memp.c | 388 + .../SERVICES/LWIP/lwip-1.3.2/src/core/netif.c | 683 + .../SERVICES/LWIP/lwip-1.3.2/src/core/pbuf.c | 931 + .../SERVICES/LWIP/lwip-1.3.2/src/core/raw.c | 355 + .../SERVICES/LWIP/lwip-1.3.2/src/core/stats.c | 151 + .../SERVICES/LWIP/lwip-1.3.2/src/core/tcp.c | 1463 ++ .../SERVICES/LWIP/lwip-1.3.2/src/core/tcp_in.c | 1508 ++ .../SERVICES/LWIP/lwip-1.3.2/src/core/tcp_out.c | 1071 + .../SERVICES/LWIP/lwip-1.3.2/src/core/udp.c | 843 + .../LWIP/lwip-1.3.2/src/include/ipv4/lwip/autoip.h | 118 + .../LWIP/lwip-1.3.2/src/include/ipv4/lwip/icmp.h | 113 + .../LWIP/lwip-1.3.2/src/include/ipv4/lwip/igmp.h | 164 + .../LWIP/lwip-1.3.2/src/include/ipv4/lwip/inet.h | 105 + .../lwip-1.3.2/src/include/ipv4/lwip/inet_chksum.h | 62 + .../LWIP/lwip-1.3.2/src/include/ipv4/lwip/ip.h | 200 + .../lwip-1.3.2/src/include/ipv4/lwip/ip_addr.h | 175 + .../lwip-1.3.2/src/include/ipv4/lwip/ip_frag.h | 78 + .../LWIP/lwip-1.3.2/src/include/lwip/api.h | 224 + .../LWIP/lwip-1.3.2/src/include/lwip/api_msg.h | 164 + .../LWIP/lwip-1.3.2/src/include/lwip/arch.h | 235 + .../LWIP/lwip-1.3.2/src/include/lwip/debug.h | 100 + .../LWIP/lwip-1.3.2/src/include/lwip/def.h | 49 + .../LWIP/lwip-1.3.2/src/include/lwip/dhcp.h | 248 + .../LWIP/lwip-1.3.2/src/include/lwip/dns.h | 99 + .../LWIP/lwip-1.3.2/src/include/lwip/err.h | 89 + .../LWIP/lwip-1.3.2/src/include/lwip/init.h | 74 + .../LWIP/lwip-1.3.2/src/include/lwip/mem.h | 109 + .../LWIP/lwip-1.3.2/src/include/lwip/memp.h | 118 + .../LWIP/lwip-1.3.2/src/include/lwip/memp_std.h | 104 + .../LWIP/lwip-1.3.2/src/include/lwip/netbuf.h | 88 + .../LWIP/lwip-1.3.2/src/include/lwip/netdb.h | 113 + .../LWIP/lwip-1.3.2/src/include/lwip/netif.h | 265 + .../LWIP/lwip-1.3.2/src/include/lwip/netifapi.h | 107 + .../LWIP/lwip-1.3.2/src/include/lwip/opt.h | 1842 ++ .../LWIP/lwip-1.3.2/src/include/lwip/pbuf.h | 122 + .../LWIP/lwip-1.3.2/src/include/lwip/raw.h | 99 + .../LWIP/lwip-1.3.2/src/include/lwip/sio.h | 143 + .../LWIP/lwip-1.3.2/src/include/lwip/snmp.h | 366 + .../LWIP/lwip-1.3.2/src/include/lwip/snmp_asn1.h | 103 + .../LWIP/lwip-1.3.2/src/include/lwip/snmp_msg.h | 313 + .../lwip-1.3.2/src/include/lwip/snmp_structs.h | 264 + .../LWIP/lwip-1.3.2/src/include/lwip/sockets.h | 359 + .../LWIP/lwip-1.3.2/src/include/lwip/stats.h | 285 + .../LWIP/lwip-1.3.2/src/include/lwip/sys.h | 245 + .../LWIP/lwip-1.3.2/src/include/lwip/tcp.h | 709 + .../LWIP/lwip-1.3.2/src/include/lwip/tcpip.h | 143 + .../LWIP/lwip-1.3.2/src/include/lwip/udp.h | 155 + .../LWIP/lwip-1.3.2/src/include/netif/etharp.h | 194 + .../LWIP/lwip-1.3.2/src/include/netif/loopif.h | 55 + .../LWIP/lwip-1.3.2/src/include/netif/ppp_oe.h | 163 + .../LWIP/lwip-1.3.2/src/include/netif/slipif.h | 53 + .../SERVICES/LWIP/lwip-1.3.2/src/netif/etharp.c | 1224 ++ .../SERVICES/LWIP/lwip-1.3.2/src/netif/loopif.c | 68 + .../LWIP/lwip-port-1.3.2/HD/if/include/arch/cc.h | 79 + .../LWIP/lwip-port-1.3.2/HD/if/include/arch/perf.h | 7 + .../LWIP/lwip-port-1.3.2/HD/if/include/lwipopts.h | 426 + .../lwip-port-1.3.2/HD/if/include/netif/wlif.h | 10 + .../LWIP/lwip-port-1.3.2/HD/if/netif/wlif.c | 386 + .../SERVICES/LWIP/lwip-port-1.3.2/HD/readme.txt | 1 + .../SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.c | 571 + .../SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.h | 369 + .../src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.c | 119 + .../src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.h | 116 + .../SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.c | 215 + .../SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.h | 294 + .../UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_cpu.h | 63 + .../LIBS/NEWLIB_ADDONS/INCLUDE/nlao_exceptions.h | 120 + .../LIBS/NEWLIB_ADDONS/INCLUDE/nlao_interrupts.h | 82 + .../UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_io.h | 174 + .../UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_usart.h | 208 + .../libnewlib_addons-at32ucr2-speed_opt.a | Bin 0 -> 25540 bytes .../AT32UC3A/0512/GCC/link_uc3a0512.lds | 266 + .../AT32UC3A/1256/GCC/link_uc3a1256.lds | 266 + .../UTILS/PREPROCESSOR/mrepeat.h | 328 + .../UTILS/PREPROCESSOR/preprocessor.h | 55 + .../UTILS/PREPROCESSOR/stringz.h | 75 + .../SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/tpaste.h | 95 + .../UTILS/STARTUP_FILES/GCC/crt0.x | 121 + .../wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/compiler.h | 1145 ++ .../wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/conf_isp.h | 136 + .../wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/parts.h | 203 + firmwares/wifishield/wifiHD/src/ard_spi.c | 1750 ++ firmwares/wifishield/wifiHD/src/ard_spi.h | 70 + firmwares/wifishield/wifiHD/src/ard_tcp.c | 904 + firmwares/wifishield/wifiHD/src/ard_tcp.h | 71 + firmwares/wifishield/wifiHD/src/ard_utils.c | 196 + firmwares/wifishield/wifiHD/src/ard_utils.h | 267 + firmwares/wifishield/wifiHD/src/avr32_spi.c | 394 + firmwares/wifishield/wifiHD/src/board_init.c | 297 + firmwares/wifishield/wifiHD/src/board_init.h | 313 + firmwares/wifishield/wifiHD/src/cmd_wl.c | 635 + firmwares/wifishield/wifiHD/src/cmd_wl.h | 63 + firmwares/wifishield/wifiHD/src/console.c | 212 + firmwares/wifishield/wifiHD/src/console.h | 46 + firmwares/wifishield/wifiHD/src/debug.h | 109 + firmwares/wifishield/wifiHD/src/fw_download.h | 38 + .../wifishield/wifiHD/src/fw_download_extflash.c | 82 + firmwares/wifishield/wifiHD/src/license.txt | 42 + firmwares/wifishield/wifiHD/src/lwip_setup.c | 145 + firmwares/wifishield/wifiHD/src/lwip_setup.h | 21 + firmwares/wifishield/wifiHD/src/lwipopts.h | 450 + firmwares/wifishield/wifiHD/src/main.c | 455 + firmwares/wifishield/wifiHD/src/nvram.c | 153 + firmwares/wifishield/wifiHD/src/nvram.h | 10 + firmwares/wifishield/wifiHD/src/owl_os.c | 140 + firmwares/wifishield/wifiHD/src/ping.c | 340 + firmwares/wifishield/wifiHD/src/ping.h | 45 + firmwares/wifishield/wifiHD/src/printf-stdarg.c | 323 + firmwares/wifishield/wifiHD/src/printf-stdarg.h | 34 + firmwares/wifishield/wifiHD/src/timer.c | 232 + firmwares/wifishield/wifiHD/src/timer.h | 51 + firmwares/wifishield/wifiHD/src/top_defs.h | 120 + firmwares/wifishield/wifiHD/src/trace.h | 44 + firmwares/wifishield/wifiHD/src/util.c | 260 + firmwares/wifishield/wifiHD/src/util.h | 71 + firmwares/wifishield/wifiHD/src/wifi_spi.h | 152 + firmwares/wifishield/wifiHD/src/wl_cm.c | 437 + firmwares/wifishield/wifiHD/src/wl_cm.h | 51 + firmwares/wifishield/wifiHD/src/wl_definitions.h | 39 + firmwares/wifishield/wifi_dnld/.cproject | 1281 ++ firmwares/wifishield/wifi_dnld/.project | 70 + .../wifishield/wifi_dnld/Release/wifi_dnld.elf | Bin 0 -> 182489 bytes .../wifishield/wifi_dnld/src/CONFIG/conf_access.h | 170 + .../wifishield/wifi_dnld/src/CONFIG/conf_at45dbx.h | 83 + .../wifi_dnld/src/Doc/SPB104 product brief.pdf | Bin 0 -> 760252 bytes .../wifi_dnld/src/Doc/gettingstarted.pdf | Bin 0 -> 701930 bytes .../src/SOFTWARE_FRAMEWORK/ASM/trampoline.x | 74 + .../SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/arduino.h | 234 + .../src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.c | 346 + .../src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.h | 191 + .../SOFTWARE_FRAMEWORK/BOARDS/EVK1105/evk1105.h | 433 + .../src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.c | 346 + .../src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.h | 187 + .../src/SOFTWARE_FRAMEWORK/BOARDS/board.h | 120 + .../src/SOFTWARE_FRAMEWORK/BOARDS/board.h.ori | 121 + .../COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.c | 672 + .../COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.h | 269 + .../MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.c | 234 + .../MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.h | 164 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.c | 1117 ++ .../src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.h | 1002 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.c | 458 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.h | 583 + .../SOFTWARE_FRAMEWORK/DRIVERS/INTC/exception.x | 239 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.c | 214 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.h | 100 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.c | 546 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.h | 493 + .../SOFTWARE_FRAMEWORK/DRIVERS/PM/pm_conf_clocks.c | 268 + .../DRIVERS/PM/power_clocks_lib.c | 566 + .../DRIVERS/PM/power_clocks_lib.h | 379 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.c | 443 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.h | 342 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.c | 914 + .../src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.h | 889 + .../SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.c | 571 + .../SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.h | 369 + .../src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.c | 119 + .../src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.h | 116 + .../SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.c | 215 + .../SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.h | 294 + .../UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_cpu.h | 63 + .../LIBS/NEWLIB_ADDONS/INCLUDE/nlao_exceptions.h | 120 + .../LIBS/NEWLIB_ADDONS/INCLUDE/nlao_interrupts.h | 82 + .../UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_io.h | 174 + .../UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_usart.h | 208 + .../libnewlib_addons-at32ucr2-speed_opt.a | Bin 0 -> 25540 bytes .../AT32UC3A/0512/GCC/link_uc3a0512.lds | 266 + .../AT32UC3A/1256/GCC/link_uc3a1256.lds | 266 + .../UTILS/PREPROCESSOR/mrepeat.h | 328 + .../UTILS/PREPROCESSOR/preprocessor.h | 55 + .../UTILS/PREPROCESSOR/stringz.h | 75 + .../SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/tpaste.h | 95 + .../UTILS/STARTUP_FILES/GCC/crt0.x | 121 + .../src/SOFTWARE_FRAMEWORK/UTILS/compiler.h | 1145 ++ .../src/SOFTWARE_FRAMEWORK/UTILS/conf_isp.h | 136 + .../wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/parts.h | 203 + firmwares/wifishield/wifi_dnld/src/clocks.c | 101 + firmwares/wifishield/wifi_dnld/src/clocks.h | 78 + firmwares/wifishield/wifi_dnld/src/flash_fw.c | 125 + firmwares/wifishield/wifi_dnld/src/license.txt | 42 + firmwares/wifishield/wifi_dnld/src/nor_flash.c | 99 + firmwares/wifishield/wifi_dnld/src/nor_flash.h | 41 + firmwares/wifishield/wifi_dnld/src/printf-stdarg.c | 323 + firmwares/wifishield/wifi_dnld/src/printf-stdarg.h | 36 + firmwares/wifishield/wifi_dnld/src/startup.c | 75 + firmwares/wifishield/wifi_dnld/src/startup.h | 35 + firmwares/wifishield/wifi_dnld/src/wl_fw.h | 19287 +++++++++++++++++++ 270 files changed, 147275 insertions(+) create mode 100644 firmwares/wifishield/binary/wifiHD.elf create mode 100644 firmwares/wifishield/binary/wifiHD.hex create mode 100644 firmwares/wifishield/binary/wifiHD_2_1.elf create mode 100644 firmwares/wifishield/binary/wifi_dnld.elf create mode 100644 firmwares/wifishield/binary/wifi_dnld.hex create mode 100644 firmwares/wifishield/binary/wifi_dnld_2_1.elf create mode 100644 firmwares/wifishield/scripts/ArduinoWifiShield_upgrade.sh create mode 100644 firmwares/wifishield/scripts/ArduinoWifiShield_upgrade_mac.sh create mode 100644 firmwares/wifishield/wifiHD/.cproject create mode 100644 firmwares/wifishield/wifiHD/.project create mode 100644 firmwares/wifishield/wifiHD/Release/wifiHD.elf create mode 100644 firmwares/wifishield/wifiHD/src/CONFIG/conf_access.h create mode 100644 firmwares/wifishield/wifiHD/src/CONFIG/conf_at45dbx.h create mode 100644 firmwares/wifishield/wifiHD/src/CONFIG/conf_ebi.h create mode 100644 firmwares/wifishield/wifiHD/src/CONFIG/conf_sd_mmc_spi.h create mode 100644 firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/ASM/trampoline.x create mode 100644 firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/arduino.h create mode 100644 firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.c create mode 100644 firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.h create mode 100644 firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/evk1105.h create mode 100644 firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.c create mode 100644 firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.h create mode 100644 firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/board.h create mode 100644 firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/board.h.my create mode 100644 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+:108F300000000009000001780000000F0000019C03 +:108F400000000001000001D800000001000001DC69 +:108F50000000000100000108000000010000010CF9 +:108F600000000001000001100000000100000114D9 +:108F70000000000100000118000000010000011CB9 +:108F80000000000100000120000000010000012499 +:108F9000000000030000012800000001000001346F +:108FA0000000000100000138000000010000013C49 +:108FB0000000000100000140000000010000014429 +:040000058000000077 +:00000001FF diff --git a/firmwares/wifishield/binary/wifi_dnld_2_1.elf b/firmwares/wifishield/binary/wifi_dnld_2_1.elf new file mode 100644 index 0000000..7ccbf4d Binary files /dev/null and b/firmwares/wifishield/binary/wifi_dnld_2_1.elf differ diff --git a/firmwares/wifishield/scripts/ArduinoWifiShield_upgrade.sh b/firmwares/wifishield/scripts/ArduinoWifiShield_upgrade.sh new file mode 100644 index 0000000..5082392 --- /dev/null +++ b/firmwares/wifishield/scripts/ArduinoWifiShield_upgrade.sh @@ -0,0 +1,96 @@ +#!/bin/sh + +WIFI_FW_PATH="/hardware/arduino/firmwares/wifi-shield" +AVR_TOOLS_PATH="/hardware/tools/avr/bin" + +progname=$0 + +usage () { +cat <&2 + usage + exit 1 + ;; + :) + echo "Option -$OPTARG requires an argument." >&2 + exit 1 + ;; + esac + done +else + echo "You are not root!\n" +fi + +shift $(($OPTIND - 1)) diff --git a/firmwares/wifishield/scripts/ArduinoWifiShield_upgrade_mac.sh b/firmwares/wifishield/scripts/ArduinoWifiShield_upgrade_mac.sh new file mode 100644 index 0000000..5082392 --- /dev/null +++ b/firmwares/wifishield/scripts/ArduinoWifiShield_upgrade_mac.sh @@ -0,0 +1,96 @@ +#!/bin/sh + +WIFI_FW_PATH="/hardware/arduino/firmwares/wifi-shield" +AVR_TOOLS_PATH="/hardware/tools/avr/bin" + +progname=$0 + +usage () { +cat <&2 + usage + exit 1 + ;; + :) + echo "Option -$OPTARG requires an argument." >&2 + exit 1 + ;; + esac + done +else + echo "You are not root!\n" +fi + +shift $(($OPTIND - 1)) diff --git a/firmwares/wifishield/wifiHD/.cproject b/firmwares/wifishield/wifiHD/.cproject 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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/firmwares/wifishield/wifiHD/.project b/firmwares/wifishield/wifiHD/.project new file mode 100644 index 0000000..c284bab --- /dev/null +++ b/firmwares/wifishield/wifiHD/.project @@ -0,0 +1,77 @@ + + + wifiHD + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/wifiHD/Debug} + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + + + + + + com.atmel.avr32.core.nature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + UC3 Software Framework + 2 + framework:/com.atmel.avr32.sf.uc3 + + + diff --git a/firmwares/wifishield/wifiHD/Release/wifiHD.elf b/firmwares/wifishield/wifiHD/Release/wifiHD.elf new file mode 100644 index 0000000..ca98ee6 Binary files /dev/null and b/firmwares/wifishield/wifiHD/Release/wifiHD.elf differ diff --git a/firmwares/wifishield/wifiHD/src/CONFIG/conf_access.h b/firmwares/wifishield/wifiHD/src/CONFIG/conf_access.h new file mode 100644 index 0000000..2d38d50 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/CONFIG/conf_access.h @@ -0,0 +1,170 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Memory access control configuration file. + * + * This file contains the possible external configuration of the memory access + * control. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_ACCESS_H_ +#define _CONF_ACCESS_H_ + +#include "compiler.h" +#include "board.h" + + +/*! \name Activation of Logical Unit Numbers + */ +//! @{ +#define LUN_0 DISABLE //!< On-Chip Virtual Memory. +#define LUN_1 ENABLE //!< AT45DBX Data Flash. +#define LUN_2 DISABLE //!< SD/MMC Card over SPI. +#define LUN_3 DISABLE +#define LUN_4 DISABLE +#define LUN_5 DISABLE +#define LUN_6 DISABLE +#define LUN_7 DISABLE +#define LUN_USB DISABLE //!< Host Mass-Storage Memory. +//! @} + +/*! \name LUN 0 Definitions + */ +//! @{ +#define VIRTUAL_MEM LUN_0 +#define LUN_ID_VIRTUAL_MEM LUN_ID_0 +#define LUN_0_INCLUDE "virtual_mem.h" +#define Lun_0_test_unit_ready virtual_test_unit_ready +#define Lun_0_read_capacity virtual_read_capacity +#define Lun_0_wr_protect virtual_wr_protect +#define Lun_0_removal virtual_removal +#define Lun_0_usb_read_10 virtual_usb_read_10 +#define Lun_0_usb_write_10 virtual_usb_write_10 +#define Lun_0_mem_2_ram virtual_mem_2_ram +#define Lun_0_ram_2_mem virtual_ram_2_mem +#define LUN_0_NAME "\"On-Chip Virtual Memory\"" +//! @} + +/*! \name LUN 1 Definitions + */ +//! @{ +#define AT45DBX_MEM LUN_1 +#define LUN_ID_AT45DBX_MEM LUN_ID_1 +#define LUN_1_INCLUDE "at45dbx_mem.h" +#define Lun_1_test_unit_ready at45dbx_test_unit_ready +#define Lun_1_read_capacity at45dbx_read_capacity +#define Lun_1_wr_protect at45dbx_wr_protect +#define Lun_1_removal at45dbx_removal +#define Lun_1_usb_read_10 at45dbx_usb_read_10 +#define Lun_1_usb_write_10 at45dbx_usb_write_10 +#define Lun_1_mem_2_ram at45dbx_df_2_ram +#define Lun_1_ram_2_mem at45dbx_ram_2_df +#define LUN_1_NAME "\"AT45DBX Data Flash\"" +//! @} + +/*! \name LUN 2 Definitions + */ +//! @{ +#define SD_MMC_SPI_MEM LUN_2 +#define LUN_ID_SD_MMC_SPI_MEM LUN_ID_2 +#define LUN_2_INCLUDE "sd_mmc_spi_mem.h" +#define Lun_2_test_unit_ready sd_mmc_spi_test_unit_ready +#define Lun_2_read_capacity sd_mmc_spi_read_capacity +#define Lun_2_wr_protect sd_mmc_spi_wr_protect +#define Lun_2_removal sd_mmc_spi_removal +#define Lun_2_usb_read_10 sd_mmc_spi_usb_read_10 +#define Lun_2_usb_write_10 sd_mmc_spi_usb_write_10 +#define Lun_2_mem_2_ram sd_mmc_spi_mem_2_ram +#define Lun_2_ram_2_mem sd_mmc_spi_ram_2_mem +#define LUN_2_NAME "\"SD/MMC Card over SPI\"" +//! @} + +/*! \name USB LUNs Definitions + */ +//! @{ +#define MEM_USB LUN_USB +#define LUN_ID_MEM_USB LUN_ID_USB +#define LUN_USB_INCLUDE "host_mem.h" +#define Lun_usb_test_unit_ready(lun) host_test_unit_ready(lun) +#define Lun_usb_read_capacity(lun, nb_sect) host_read_capacity(lun, nb_sect) +#define Lun_usb_read_sector_size(lun) host_read_sector_size(lun) +#define Lun_usb_wr_protect(lun) host_wr_protect(lun) +#define Lun_usb_removal() host_removal() +#define Lun_usb_mem_2_ram(addr, ram) host_read_10_ram(addr, ram) +#define Lun_usb_ram_2_mem(addr, ram) host_write_10_ram(addr, ram) +#define LUN_USB_NAME "\"Host Mass-Storage Memory\"" +//! @} + +/*! \name Actions Associated with Memory Accesses + * + * Write here the action to associate with each memory access. + * + * \warning Be careful not to waste time in order not to disturb the functions. + */ +//! @{ +#define memory_start_read_action(nb_sectors) +#define memory_stop_read_action() +#define memory_start_write_action(nb_sectors) +#define memory_stop_write_action() +//! @} + +/*! \name Activation of Interface Features + */ +//! @{ +#define ACCESS_USB DISABLED //!< MEM <-> USB interface. +#define ACCESS_MEM_TO_RAM ENABLED //!< MEM <-> RAM interface. +#define ACCESS_STREAM ENABLED //!< Streaming MEM <-> MEM interface. //mlf +#define ACCESS_STREAM_RECORD DISABLED //!< Streaming MEM <-> MEM interface in record mode. +#define ACCESS_MEM_TO_MEM DISABLED //!< MEM <-> MEM interface. +#define ACCESS_CODEC DISABLED //!< Codec interface. +//! @} + +/*! \name Specific Options for Access Control + */ +//! @{ +#define GLOBAL_WR_PROTECT DISABLED //!< Management of a global write protection. +//! @} + + +#endif // _CONF_ACCESS_H_ diff --git a/firmwares/wifishield/wifiHD/src/CONFIG/conf_at45dbx.h b/firmwares/wifishield/wifiHD/src/CONFIG/conf_at45dbx.h new file mode 100644 index 0000000..3280e4f --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/CONFIG/conf_at45dbx.h @@ -0,0 +1,83 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT45DBX configuration file. + * + * This file contains the possible external configuration of the AT45DBX. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_AT45DBX_H_ +#define _CONF_AT45DBX_H_ + + +#include "conf_access.h" + +#if AT45DBX_MEM == DISABLE + #error conf_at45dbx.h is #included although AT45DBX_MEM is disabled +#endif + + +#include "at45dbx.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +//! Size of AT45DBX data flash memories to manage. +#define AT45DBX_MEM_SIZE AT45DBX_1MB + +//! Number of AT45DBX components to manage. +#define AT45DBX_MEM_CNT 1 + +//! First chip select used by AT45DBX components on the SPI module instance. +//! AT45DBX_SPI_NPCS0_PIN always corresponds to this first NPCS, whatever it is. +#define AT45DBX_SPI_FIRST_NPCS AT45DBX_SPI_NPCS + +//! SPI master speed in Hz. +#define AT45DBX_SPI_MASTER_SPEED 12000000 + +//! Number of bits in each SPI transfer. +#define AT45DBX_SPI_BITS 8 + + +#endif // _CONF_AT45DBX_H_ diff --git a/firmwares/wifishield/wifiHD/src/CONFIG/conf_ebi.h b/firmwares/wifishield/wifiHD/src/CONFIG/conf_ebi.h new file mode 100644 index 0000000..aacdb13 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/CONFIG/conf_ebi.h @@ -0,0 +1,108 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief CONF_EBI EBI/SMC driver for AVR32 UC3. + * + * \note The values defined in this file are device-specific. See the device + * datasheet for further information. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SMC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_EBI_H_ +#define _CONF_EBI_H_ + +#include "compiler.h" +#include "board.h" + +#if (ET024006DHU_SMC_USE_NCS == 0) +#define SMC_USE_NCS0 +#define SMC_COMPONENT_CS0 ET024006DHU_SMC_COMPONENT_CS +#else + +#if (ET024006DHU_SMC_USE_NCS == 2) +#define SMC_USE_NCS2 +#define SMC_COMPONENT_CS2 ET024006DHU_SMC_COMPONENT_CS + +#else +#error This board is not supported +#endif +#endif + +#define EBI_DATA_0 ET024006DHU_EBI_DATA_0 +#define EBI_DATA_1 ET024006DHU_EBI_DATA_1 +#define EBI_DATA_2 ET024006DHU_EBI_DATA_2 +#define EBI_DATA_3 ET024006DHU_EBI_DATA_3 +#define EBI_DATA_4 ET024006DHU_EBI_DATA_4 +#define EBI_DATA_5 ET024006DHU_EBI_DATA_5 +#define EBI_DATA_6 ET024006DHU_EBI_DATA_6 +#define EBI_DATA_7 ET024006DHU_EBI_DATA_7 +#define EBI_DATA_8 ET024006DHU_EBI_DATA_8 +#define EBI_DATA_9 ET024006DHU_EBI_DATA_9 +#define EBI_DATA_10 ET024006DHU_EBI_DATA_10 +#define EBI_DATA_11 ET024006DHU_EBI_DATA_11 +#define EBI_DATA_12 ET024006DHU_EBI_DATA_12 +#define EBI_DATA_13 ET024006DHU_EBI_DATA_13 +#define EBI_DATA_14 ET024006DHU_EBI_DATA_14 +#define EBI_DATA_15 ET024006DHU_EBI_DATA_15 + +#if BOARD==EVK1105 +#ifdef EVK1105_REV3 +#define EBI_ADDR_19 AVR32_EBI_ADDR_19 +#define EBI_NCS_2 ET024006DHU_EBI_NCS +#else +#define EBI_ADDR_21 ET024006DHU_EBI_ADDR_21 +#define EBI_NCS_0 ET024006DHU_EBI_NCS +#endif +#elif BOARD == UC3C_EK +#define EBI_ADDR_22 AVR32_EBI_ADDR_22 +#define EBI_NCS_0 ET024006DHU_EBI_NCS +#elif BOARD == EVK1104 +#define EBI_ADDR_21 ET024006DHU_EBI_ADDR_21 +#define EBI_NCS_0 ET024006DHU_EBI_NCS +#endif + + +#define EBI_NWE0 ET024006DHU_EBI_NWE +#define EBI_NRD ET024006DHU_EBI_NRD + +#endif // _CONF_EBI_H_ diff --git a/firmwares/wifishield/wifiHD/src/CONFIG/conf_sd_mmc_spi.h b/firmwares/wifishield/wifiHD/src/CONFIG/conf_sd_mmc_spi.h new file mode 100644 index 0000000..94b55e1 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/CONFIG/conf_sd_mmc_spi.h @@ -0,0 +1,73 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief SD/MMC configuration file. + * + * This file contains the possible external configuration of the SD/MMC. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_SD_MMC_SPI_H_ +#define _CONF_SD_MMC_SPI_H_ + + +#include "conf_access.h" + +#if SD_MMC_SPI_MEM == DISABLE + #error conf_sd_mmc_spi.h is #included although SD_MMC_SPI_MEM is disabled +#endif + + +#include "sd_mmc_spi.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +//! SPI master speed in Hz. +#define SD_MMC_SPI_MASTER_SPEED 12000000 + +//! Number of bits in each SPI transfer. +#define SD_MMC_SPI_BITS 8 + + +#endif // _CONF_SD_MMC_SPI_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/ASM/trampoline.x b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/ASM/trampoline.x new file mode 100644 index 0000000..c127121 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/ASM/trampoline.x @@ -0,0 +1,74 @@ +/* This file is part of the ATMEL AVR32-SoftwareFramework-AT32UC3A-1.4.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AVR32 UC3 ISP trampoline. + * + * In order to be able to program a project with both BatchISP and JTAGICE mkII + * without having to take the general-purpose fuses into consideration, add this + * file to the project and change the program entry point to _trampoline. + * + * The pre-programmed ISP will be erased if JTAGICE mkII is used. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32UC devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (C) 2006-2008, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#include "conf_isp.h" + + +//! @{ +//! \verbatim + + + // This must be linked @ 0x80000000 if it is to be run upon reset. + .section .reset, "ax", @progbits + + + .global _trampoline + .type _trampoline, @function +_trampoline: + // Jump to program start. + rjmp program_start + + .org PROGRAM_START_OFFSET +program_start: + // Jump to the C runtime startup routine. + lda.w pc, _stext + + +//! \endverbatim +//! @} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/arduino.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/arduino.h new file mode 100644 index 0000000..2b78ab6 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/arduino.h @@ -0,0 +1,236 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3A EVK1100 board header file. + * + * This file contains definitions and services related to the features of the + * EVK1100 board rev. B and C. + * + * To use this board, define BOARD=EVK1100. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3A devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _ARDUINO_H_ +#define _ARDUINO_H_ + +#include "compiler.h" + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. +# include "led.h" +#endif // __AVR32_ABI_COMPILER__ + + +/*! \name Oscillator Definitions + */ +//! @{ + +// RCOsc has no custom calibration by default. Set the following definition to +// the appropriate value if a custom RCOsc calibration has been applied to your +// part. +//#define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< RCOsc frequency: Hz. + +#define FOSC32 32768 //!< Osc32 frequency: Hz. +#define OSC32_STARTUP AVR32_PM_OSCCTRL32_STARTUP_8192_RCOSC //!< Osc32 startup time: RCOsc periods. + +#define FOSC0 12000000 //!< Osc0 frequency: Hz. +#define OSC0_STARTUP AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC //!< Osc0 startup time: RCOsc periods. + +// Osc1 crystal is not mounted by default. Set the following definitions to the +// appropriate values if a custom Osc1 crystal is mounted on your board. +//#define FOSC1 12000000 //!< Osc1 frequency: Hz. +//#define OSC1_STARTUP AVR32_PM_OSCCTRL1_STARTUP_2048_RCOSC //!< Osc1 startup time: RCOsc periods. + +//! @} + + +//! Number of LEDs. +#define LED_COUNT 0 + +/*! \name GPIO Connections of LEDs + */ +//! @{ +#define LED0_GPIO AVR32_PIN_PB19 +#define LED1_GPIO AVR32_PIN_PB20 +#define LED2_GPIO AVR32_PIN_PB21 +#define DEB_PIN_GPIO AVR32_PIN_PA20 +//! @} + +/*! \name PWM Channels of LEDs + */ +//! @{ +#define LED0_PWM 0 +#define LED1_PWM 1 +#define LED2_PWM 2 +//! @} + +/*! \name PWM Functions of LEDs + */ +//! @{ +#define LED0_PWM_FUNCTION AVR32_PWM_0_FUNCTION +#define LED1_PWM_FUNCTION AVR32_PWM_1_FUNCTION +#define LED2_PWM_FUNCTION AVR32_PWM_2_FUNCTION +//! @} + +/*! \name Color Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED_MONO0_GREEN LED0 +#define LED_MONO1_RED LED1 +#define LED_MONO2_BLU LED2 +//! @} + +#if 0 +/*! \name SPI Connections of the DIP204 LCD + */ +//! @{ +#define DIP204_SPI (&AVR32_SPI1) +#define DIP204_SPI_NPCS 2 +#define DIP204_SPI_SCK_PIN AVR32_SPI1_SCK_0_0_PIN +#define DIP204_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_0_FUNCTION +#define DIP204_SPI_MISO_PIN AVR32_SPI1_MISO_0_0_PIN +#define DIP204_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_0_FUNCTION +#define DIP204_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_0_PIN +#define DIP204_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_0_FUNCTION +#define DIP204_SPI_NPCS_PIN AVR32_SPI1_NPCS_2_0_PIN +#define DIP204_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_2_0_FUNCTION +//! @} + +/*! \name GPIO and PWM Connections of the DIP204 LCD Backlight + */ +//! @{ +#define DIP204_BACKLIGHT_PIN AVR32_PIN_PB18 +#define DIP204_PWM_CHANNEL 6 +#define DIP204_PWM_PIN AVR32_PWM_6_PIN +#define DIP204_PWM_FUNCTION AVR32_PWM_6_FUNCTION +//! @} +#endif + +/*! \name SPI Connections of the AT45DBX Data Flash Memory + */ +//! @{ +#define AT45DBX_SPI (&AVR32_SPI1) +#define AT45DBX_SPI_NPCS 2 +#define AT45DBX_SPI_SCK_PIN AVR32_SPI1_SCK_0_0_PIN +#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_0_FUNCTION +#define AT45DBX_SPI_MISO_PIN AVR32_SPI1_MISO_0_0_PIN +#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_0_FUNCTION +#define AT45DBX_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_0_PIN +#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_0_FUNCTION +#define AT45DBX_SPI_NPCS2_PIN AVR32_SPI1_NPCS_2_0_PIN +#define AT45DBX_SPI_NPCS2_FUNCTION AVR32_SPI1_NPCS_2_0_FUNCTION +#define AT45DBX_CHIP_RESET AVR32_PIN_PA02 +//! @} + + +/*! \name GPIO and SPI Connections of the SD/MMC Connector + */ +//! @{ +//#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PA02 +//#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PA07 +#define SD_MMC_SPI (&AVR32_SPI1) +#define SD_MMC_SPI_NPCS 1 +#define SD_MMC_SPI_SCK_PIN AVR32_SPI1_SCK_0_0_PIN +#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_0_FUNCTION +#define SD_MMC_SPI_MISO_PIN AVR32_SPI1_MISO_0_0_PIN +#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_0_FUNCTION +#define SD_MMC_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_0_PIN +#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_0_FUNCTION +#define SD_MMC_SPI_NPCS_PIN AVR32_SPI1_NPCS_1_0_PIN +#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_1_0_FUNCTION +//! @} + +/* Timer Counter to generate clock for WiFi chip*/ +# define WIFI_TC (&AVR32_TC) +# define WIFI_TC_CHANNEL_ID 0 +# define WIFI_TC_CHANNEL_PIN AVR32_TC_A0_0_0_PIN +# define WIFI_TC_CHANNEL_FUNCTION AVR32_TC_A0_0_0_FUNCTION +// Note that TC_A0_0_0 pin is pin 6 (PB23) on AT32UC3A1512 QFP100. + +/* Pin related to WiFi chip communication */ +#ifndef USE_POLL + #define USE_POLL +#endif + #define SPI_CS 0 + #define AVR32_SPI AVR32_SPI1 + #define GPIO_IRQ_PIN AVR32_PIN_PA03 + #define GPIO_IRQ AVR32_GPIO_IRQ_7 + #define GPIO_W_RESET_PIN AVR32_PIN_PA07 + #define GPIO_W_SHUTDOWN_PIN AVR32_PIN_PA09 + +/* Pin related to shield communication */ + #define ARDUINO_HANDSHAKE_PIN AVR32_PIN_PA25 + #define ARDUINO_EXTINT_PIN AVR32_PIN_PA04 //not used + + #define AVR32_PDCA_PID_TX AVR32_PDCA_PID_SPI1_TX + #define AVR32_PDCA_PID_RX AVR32_PDCA_PID_SPI1_RX + + +#if 0 +/*! \name TWI Connections of the Spare TWI Connector + */ +//! @{ +#define SPARE_TWI (&AVR32_TWI) +#define SPARE_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN +#define SPARE_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION +#define SPARE_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN +#define SPARE_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION +//! @} + + +/*! \name SPI Connections of the Spare SPI Connector + */ +//! @{ +#define SPARE_SPI (&AVR32_SPI0) +#define SPARE_SPI_NPCS 0 +#define SPARE_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN +#define SPARE_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION +#define SPARE_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN +#define SPARE_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION +#define SPARE_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN +#define SPARE_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION +#define SPARE_SPI_NPCS_PIN AVR32_SPI0_NPCS_0_0_PIN +#define SPARE_SPI_NPCS_FUNCTION AVR32_SPI0_NPCS_0_0_FUNCTION +//! @} +#endif + +#endif // _ARDUINO_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.c new file mode 100644 index 0000000..d7cd439 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.c @@ -0,0 +1,346 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3A EVK1100 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1100 board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3A devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "preprocessor.h" +#include "compiler.h" +#include "arduino.h" +#include "led.h" + + +//! Structure describing LED hardware connections. +typedef const struct +{ + struct + { + U32 PORT; //!< LED GPIO port. + U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port. + } GPIO; //!< LED GPIO descriptor. + struct + { + S32 CHANNEL; //!< LED PWM channel (< 0 if N/A). + S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A). + } PWM; //!< LED PWM descriptor. +} tLED_DESCRIPTOR; + + +//! Hardware descriptors of all LEDs. +static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] = +{ +#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \ + { \ + {LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\ + {LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \ + }, + MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~) +#undef INSERT_LED_DESCRIPTOR +}; + + +//! Saved state of all LEDs. +static volatile U32 LED_State = (1 << LED_COUNT) - 1; + + +U32 LED_Read_Display(void) +{ + return LED_State; +} + + +void LED_Display(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor; + volatile avr32_gpio_port_t *led_gpio_port; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + LED_State = leds; + + // For all LEDs... + for (led_descriptor = &LED_DESCRIPTOR[0]; + led_descriptor < LED_DESCRIPTOR + LED_COUNT; + led_descriptor++) + { + // Set the LED to the requested state. + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + } +} + + +U32 LED_Read_Display_Mask(U32 mask) +{ + return Rd_bits(LED_State, mask); +} + + +void LED_Display_Mask(U32 mask, U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + mask &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Wr_bits(LED_State, mask, leds); + + // While there are specified LEDs left to manage... + while (mask) + { + // Select the next specified LED and set it to the requested state. + led_shift = 1 + ctz(mask); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + leds >>= led_shift - 1; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + mask >>= led_shift; + } +} + + +Bool LED_Test(U32 leds) +{ + return Tst_bits(LED_State, leds); +} + + +void LED_Off(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Clr_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and turn it off. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_On(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Set_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and turn it on. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_Toggle(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Tgl_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and toggle it. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +U32 LED_Read_Display_Field(U32 field) +{ + return Rd_bitfield(LED_State, field); +} + + +void LED_Display_Field(U32 field, U32 leds) +{ + // Move the bit-field to the appropriate position for the bit-mask. + LED_Display_Mask(field, leds << ctz(field)); +} + + +U8 LED_Get_Intensity(U32 led) +{ + tLED_DESCRIPTOR *led_descriptor; + + // Check that the argument value is valid. + led = ctz(led); + led_descriptor = &LED_DESCRIPTOR[led]; + if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0; + + // Return the duty cycle value if the LED PWM channel is enabled, else 0. + return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ? + AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0; +} + + +void LED_Set_Intensity(U32 leds, U8 intensity) +{ + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_pwm_channel_t *led_pwm_channel; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // For each specified LED... + for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift) + { + // Select the next specified LED and check that it has a PWM channel. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + if (led_descriptor->PWM.CHANNEL < 0) continue; + + // Initialize or update the LED PWM channel. + led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL]; + if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL))) + { + led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) & + ~(AVR32_PWM_CALG_MASK | + AVR32_PWM_CPOL_MASK | + AVR32_PWM_CPD_MASK); + led_pwm_channel->cprd = 0x000000FF; + led_pwm_channel->cdty = intensity; + AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL; + } + else + { + AVR32_PWM.isr; + while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL))); + led_pwm_channel->cupd = intensity; + } + + // Switch the LED pin to its PWM function. + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (led_descriptor->PWM.FUNCTION & 0x1) + { + led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK; + } + if (led_descriptor->PWM.FUNCTION & 0x2) + { + led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK; + } +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.h new file mode 100644 index 0000000..a577124 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.h @@ -0,0 +1,191 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3A EVK1100 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1100 board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3A devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _LED_H_ +#define _LED_H_ + +#include "compiler.h" + + +/*! \name Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED0 0x01 +#define LED1 0x02 +#define LED2 0x04 +#define LED3 0x08 +#define LED4 0x10 +#define LED5 0x20 +#define LED6 0x40 +#define LED7 0x80 +//! @} + + +/*! \brief Gets the last state of all LEDs set through the LED API. + * + * \return State of all LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display(void); + +/*! \brief Sets the state of all LEDs. + * + * \param leds New state of all LEDs (1 bit per LED). + * + * \note The pins of all LEDs are set to GPIO output mode. + */ +extern void LED_Display(U32 leds); + +/*! \brief Gets the last state of the specified LEDs set through the LED API. + * + * \param mask LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Mask(U32 mask); + +/*! \brief Sets the state of the specified LEDs. + * + * \param mask LEDs of which to set the state (1 bit per LED). + * + * \param leds New state of the specified LEDs (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Mask(U32 mask, U32 leds); + +/*! \brief Tests the last state of the specified LEDs set through the LED API. + * + * \param leds LEDs of which to test the state (1 bit per LED). + * + * \return \c TRUE if at least one of the specified LEDs has a state on, else + * \c FALSE. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern Bool LED_Test(U32 leds); + +/*! \brief Turns off the specified LEDs. + * + * \param leds LEDs to turn off (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Off(U32 leds); + +/*! \brief Turns on the specified LEDs. + * + * \param leds LEDs to turn on (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_On(U32 leds); + +/*! \brief Toggles the specified LEDs. + * + * \param leds LEDs to toggle (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Toggle(U32 leds); + +/*! \brief Gets as a bit-field the last state of the specified LEDs set through + * the LED API. + * + * \param field LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED, beginning with the first + * specified LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Field(U32 field); + +/*! \brief Sets as a bit-field the state of the specified LEDs. + * + * \param field LEDs of which to set the state (1 bit per LED). + * \param leds New state of the specified LEDs (1 bit per LED, beginning with + * the first specified LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Field(U32 field, U32 leds); + +/*! \brief Gets the intensity of the specified LED. + * + * \param led LED of which to get the intensity (1 bit per LED; only the least + * significant set bit is used). + * + * \return Intensity of the specified LED (0x00 to 0xFF). + * + * \warning The PWM channel of the specified LED is supposed to be used only by + * this module. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U8 LED_Get_Intensity(U32 led); + +/*! \brief Sets the intensity of the specified LEDs. + * + * \param leds LEDs of which to set the intensity (1 bit per LED). + * \param intensity New intensity of the specified LEDs (0x00 to 0xFF). + * + * \warning The PWM channels of the specified LEDs are supposed to be used only + * by this module. + * + * \note The pins of the specified LEDs are set to PWM output mode. + */ +extern void LED_Set_Intensity(U32 leds, U8 intensity); + + +#endif // _LED_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/evk1105.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/evk1105.h new file mode 100644 index 0000000..edda44c --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/evk1105.h @@ -0,0 +1,433 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3A EVK1105 board header file. + * + * This file contains definitions and services related to the features of the + * EVK1105 board rev. B. + * + * To use this board, define BOARD=EVK1105. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3A devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _EVK1105_H_ +#define _EVK1105_H_ + +#ifdef EVK1105_REV3 +# include "evk1105_rev3.h" +#else + +#include "compiler.h" + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. +# include "led.h" +#endif // __AVR32_ABI_COMPILER__ + + +/*! \name Oscillator Definitions + */ +//! @{ + +// RCOsc has no custom calibration by default. Set the following definition to +// the appropriate value if a custom RCOsc calibration has been applied to your +// part. +//#define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< RCOsc frequency: Hz. + +#define FOSC32 32768 //!< Osc32 frequency: Hz. +#define OSC32_STARTUP AVR32_PM_OSCCTRL32_STARTUP_8192_RCOSC //!< Osc32 startup time: RCOsc periods. + +#define FOSC0 12000000 //!< Osc0 frequency: Hz. +#define OSC0_STARTUP AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC //!< Osc0 startup time: RCOsc periods. + +#define FOSC1 11289600 //!< Osc1 frequency: Hz +#define OSC1_STARTUP AVR32_PM_OSCCTRL1_STARTUP_2048_RCOSC //!< Osc1 startup time: RCOsc periods. + + +//! @} + + +/*! \name SDRAM Definitions + */ +//! @{ + +//! Part header file of used SDRAM(s). +#define SDRAM_PART_HDR "MT48LC16M16A2TG7E/mt48lc16m16a2tg7e.h" + +//! Data bus width to use the SDRAM(s) with (16 or 32 bits; always 16 bits on +//! UC3). +#define SDRAM_DBW 16 +//! @} + + +/*! \name USB Definitions + */ +//! @{ +//! Multiplexed pin used for USB_ID: AVR32_USBB_USB_ID_x_x. +//! To be selected according to the AVR32_USBB_USB_ID_x_x_PIN and +//! AVR32_USBB_USB_ID_x_x_FUNCTION definitions from . +#define AVR32_USBB_USB_ID_0_2_PIN 21 +#define AVR32_USBB_USB_ID_0_2_FUNCTION 2 +#define USB_ID AVR32_USBB_USB_ID_0_2 + +//! Multiplexed pin used for USB_VBOF: AVR32_USBB_USB_VBOF_x_x. +//! To be selected according to the AVR32_USBB_USB_VBOF_x_x_PIN and +//! AVR32_USBB_USB_VBOF_x_x_FUNCTION definitions from . +# define USB_VBOF AVR32_USBB_USB_VBOF_0_1 + + +//! Active level of the USB_VBOF output pin. +# define USB_VBOF_ACTIVE_LEVEL LOW + +//! USB overcurrent detection pin. +# define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PX15 + +//! @} + + +//! GPIO connection of the MAC PHY PWR_DOWN/INT signal. +# define MACB_INTERRUPT_PIN AVR32_PIN_PA26 + + + +//! Number of LEDs. +#define LED_COUNT 4 + +/*! \name GPIO Connections of LEDs + */ +//! @{ +# define LED0_GPIO AVR32_PIN_PB27 +# define LED1_GPIO AVR32_PIN_PB28 +# define LED2_GPIO AVR32_PIN_PA05 +# define LED3_GPIO AVR32_PIN_PA06 +//! @} + +/*! \name Color Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED_MONO0_GREEN LED0 +#define LED_MONO1_GREEN LED1 +#define LED_MONO2_GREEN LED2 +#define LED_MONO3_GREEN LED3 +//! @} + +/*! \name PWM Channels of LEDs + */ +//! @{ +#define LED0_PWM 4 +#define LED1_PWM 5 +#define LED2_PWM (-1) +#define LED3_PWM (-1) +//! @} + +/*! \name PWM Functions of LEDs + */ +//! @{ +/* TODO: Implement PWM functionality */ +#define LED0_PWM_FUNCTION (-1)//AVR32_PWM_0_FUNCTION +#define LED1_PWM_FUNCTION (-1)//AVR32_PWM_1_FUNCTION +#define LED2_PWM_FUNCTION (-1) +#define LED3_PWM_FUNCTION (-1) +//! @} + +//! External interrupt connection of touch sensor. +#define QT1081_EIC_EXTINT_PIN AVR32_EIC_EXTINT_1_PIN +#define QT1081_EIC_EXTINT_FUNCTION AVR32_EIC_EXTINT_1_FUNCTION +#define QT1081_EIC_EXTINT_IRQ AVR32_EIC_IRQ_1 +#define QT1081_EIC_EXTINT_INT AVR32_EIC_INT1 +/*! \name Touch sensor low power mode select + */ +#define QT1081_LP_MODE AVR32_PIN_PB29 + +/*! \name GPIO Connections of touch buttons + */ +//! @{ +#define QT1081_TOUCH_SENSOR_0 AVR32_PIN_PB22 +#define QT1081_TOUCH_SENSOR_0_PRESSED 1 +#define QT1081_TOUCH_SENSOR_1 AVR32_PIN_PB23 +#define QT1081_TOUCH_SENSOR_1_PRESSED 1 +#define QT1081_TOUCH_SENSOR_2 AVR32_PIN_PB24 +#define QT1081_TOUCH_SENSOR_2_PRESSED 1 +#define QT1081_TOUCH_SENSOR_3 AVR32_PIN_PB25 +#define QT1081_TOUCH_SENSOR_3_PRESSED 1 +#define QT1081_TOUCH_SENSOR_4 AVR32_PIN_PB26 +#define QT1081_TOUCH_SENSOR_4_PRESSED 1 + +#define QT1081_TOUCH_SENSOR_ENTER QT1081_TOUCH_SENSOR_4 +#define QT1081_TOUCH_SENSOR_ENTER_PRESSED QT1081_TOUCH_SENSOR_4_PRESSED +#define QT1081_TOUCH_SENSOR_LEFT QT1081_TOUCH_SENSOR_3 +#define QT1081_TOUCH_SENSOR_LEFT_PRESSED QT1081_TOUCH_SENSOR_3_PRESSED +#define QT1081_TOUCH_SENSOR_RIGHT QT1081_TOUCH_SENSOR_2 +#define QT1081_TOUCH_SENSOR_RIGHT_PRESSED QT1081_TOUCH_SENSOR_2_PRESSED +#define QT1081_TOUCH_SENSOR_UP QT1081_TOUCH_SENSOR_0 +#define QT1081_TOUCH_SENSOR_UP_PRESSED QT1081_TOUCH_SENSOR_0_PRESSED +#define QT1081_TOUCH_SENSOR_DOWN QT1081_TOUCH_SENSOR_1 +#define QT1081_TOUCH_SENSOR_DOWN_PRESSED QT1081_TOUCH_SENSOR_1_PRESSED +//! @} + +/*! \name SPI Connections of the AT45DBX Data Flash Memory + */ +//! @{ +#define AT45DBX_SPI (&AVR32_SPI0) +#define AT45DBX_SPI_NPCS 0 +#define AT45DBX_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN +#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION +#define AT45DBX_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN +#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION +#define AT45DBX_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN +#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION +#define AT45DBX_SPI_NPCS0_PIN AVR32_SPI0_NPCS_0_0_PIN +#define AT45DBX_SPI_NPCS0_FUNCTION AVR32_SPI0_NPCS_0_0_FUNCTION +//! @} + +/*! \name GPIO and SPI Connections of the SD/MMC Connector + */ +//! @{ +#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PA02 +#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PA18 +#define SD_MMC_SPI (&AVR32_SPI0) +#define SD_MMC_SPI_NPCS 1 +#define SD_MMC_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN +#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION +#define SD_MMC_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN +#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION +#define SD_MMC_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN +#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION +#define SD_MMC_SPI_NPCS_PIN AVR32_SPI0_NPCS_1_0_PIN +#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI0_NPCS_1_0_FUNCTION +//! @} + + +/*! \name TWI expansion + */ +//! @{ +#define EXPANSION_TWI (&AVR32_TWI) +#define EXPANSION_RESET AVR32_PIN_PX16 +#define EXPANSION_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN +#define EXPANSION_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION +#define EXPANSION_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN +#define EXPANSION_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION +//! @} + +/*! \name Wireless expansion + */ + +#define WEXPANSION_EXTINT_PIN AVR32_EIC_EXTINT_8_PIN +#define WEXPANSION_EXTINT_FUNCTION AVR32_EIC_EXTINT_8_FUNCTION +#define WEXPANSION_GPIO1 AVR32_PIN_PB30 +#define WEXPANSION_GPIO2 AVR32_PIN_PB31 + +#define WEXPANSION_SPI (&AVR32_SPI0) +#define WEXPANSION_SPI_NPCS 2 +#define WEXPANSION_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN +#define WEXPANSION_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION +#define WEXPANSION_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN +#define WEXPANSION_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION +#define WEXPANSION_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN +#define WEXPANSION_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION +#define WEXPANSION_SPI_NPCS_PIN AVR32_SPI0_NPCS_2_0_PIN +#define WEXPANSION_SPI_NPCS_FUNCTION AVR32_SPI0_NPCS_2_0_FUNCTION + +//! @} + +/*! \name ET024006DHU TFT display + */ +//! @{ + +#define ET024006DHU_TE_PIN AVR32_PIN_PX19 +#define ET024006DHU_RESET_PIN AVR32_PIN_PX22 +#define ET024006DHU_BL_PIN AVR32_PWM_6_PIN +#define ET024006DHU_BL_FUNCTION AVR32_PWM_6_FUNCTION +#define ET024006DHU_DNC_PIN AVR32_EBI_ADDR_21_1_PIN +#define ET024006DHU_DNC_FUNCTION AVR32_EBI_ADDR_21_1_FUNCTION +#define ET024006DHU_EBI_NCS_PIN AVR32_EBI_NCS_0_1_PIN +#define ET024006DHU_EBI_NCS_FUNCTION AVR32_EBI_NCS_0_1_FUNCTION + +//! @} +/*! \name Optional SPI connection to the TFT + */ +//! @{ + +#define ET024006DHU_SPI (&AVR32_SPI0) +#define ET024006DHU_SPI_NPCS 3 +#define ET024006DHU_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN +#define ET024006DHU_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION +#define ET024006DHU_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN +#define ET024006DHU_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION +#define ET024006DHU_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN +#define ET024006DHU_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION +#define ET024006DHU_SPI_NPCS_PIN AVR32_SPI1_NPCS_3_0_PIN +#define ET024006DHU_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_3_0_FUNCTION + +//! @} + + +/*! \name Audio amplifier connection to the DAC + */ +//! @{ + +#define TPA6130_ABDAC (&AVR32_ABDAC) + +#define TPA6130_DATA0_PIN AVR32_ABDAC_DATA_0_1_PIN +#define TPA6130_DATA0_FUNCTION AVR32_ABDAC_DATA_0_1_FUNCTION +#define TPA6130_DATAN0_PIN AVR32_ABDAC_DATAN_0_1_PIN +#define TPA6130_DATAN0_FUNCTION AVR32_ABDAC_DATAN_0_1_FUNCTION +#define TPA6130_DATA1_PIN AVR32_ABDAC_DATA_1_1_PIN +#define TPA6130_DATA1_FUNCTION AVR32_ABDAC_DATA_1_1_FUNCTION +#define TPA6130_DATAN1_PIN AVR32_ABDAC_DATAN_1_1_PIN +#define TPA6130_DATAN1_FUNCTION AVR32_ABDAC_DATAN_1_1_FUNCTION + +#define TPA6130_ABDAC_PDCA_PID AVR32_PDCA_PID_ABDAC_TX +#define TPA6130_ABDAC_PDCA_CHANNEL 0 +#define TPA6130_ABDAC_PDCA_IRQ AVR32_PDCA_IRQ_0 +#define TPA6130_ABDAC_PDCA_INT_LEVEL AVR32_INTC_INT3 + +#define TPA6130_TWI (&AVR32_TWI) +#define TPA6130_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN +#define TPA6130_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION +#define TPA6130_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN +#define TPA6130_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION + +//! }@ +/*! \name TI TLV320AIC23B sound chip + */ +//! @{ +#define TLV320_SSC (&AVR32_SSC) +#define TLV320_SSC_TX_CLOCK_PIN AVR32_SSC_TX_CLOCK_0_PIN +#define TLV320_SSC_TX_CLOCK_FUNCTION AVR32_SSC_TX_CLOCK_0_FUNCTION +#define TLV320_SSC_TX_DATA_PIN AVR32_SSC_TX_DATA_0_PIN +#define TLV320_SSC_TX_DATA_FUNCTION AVR32_SSC_TX_DATA_0_FUNCTION +#define TLV320_SSC_TX_FRAME_SYNC_PIN AVR32_SSC_TX_FRAME_SYNC_0_PIN +#define TLV320_SSC_TX_FRAME_SYNC_FUNCTION AVR32_SSC_TX_FRAME_SYNC_0_FUNCTION + +#define TLV320_TWI (&AVR32_TWI) +#define TLV320_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN +#define TLV320_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION +#define TLV320_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN +#define TLV320_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION + +#define TLV320_PM_GCLK_PIN AVR32_PM_GCLK_0_0_PIN +#define TLV320_PM_GCLK_FUNCTION AVR32_PM_GCLK_0_0_FUNCTION +//! @} + +////! \name SPI: Apple Authentication Chip Hardware Connections +////! @{ +#define IPOD_AUTH_CHIP_SPI (&AVR32_SPI0) +#define IPOD_AUTH_CHIP_SPI_IRQ AVR32_SPI0_IRQ +#define IPOD_AUTH_CHIP_SPI_NPCS 2 +#define IPOD_AUTH_CHIP_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN +#define IPOD_AUTH_CHIP_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION +#define IPOD_AUTH_CHIP_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN +#define IPOD_AUTH_CHIP_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION +#define IPOD_AUTH_CHIP_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN +#define IPOD_AUTH_CHIP_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION +#define IPOD_AUTH_CHIP_SPI_NPCS_PIN AVR32_SPI0_NPCS_2_0_PIN +#define IPOD_AUTH_CHIP_SPI_NPCS_FUNCTION AVR32_SPI0_NPCS_2_0_FUNCTION +#define IPOD_AUTH_CHIP_SPI_N_RESET_PIN AVR32_PIN_PB30 +#define IPOD_AUTH_CHIP_SPI_CP_READY_PIN AVR32_PIN_PB31 +//! }@ + +/*! \name Connections of the iPOD Authentication Coprocessor + */ +//! @{ + +#define IPOD_AUTH_CHIP_TWI (&AVR32_TWI) +#define IPOD_AUTH_CHIP_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN +#define IPOD_AUTH_CHIP_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION +#define IPOD_AUTH_CHIP_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN +#define IPOD_AUTH_CHIP_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION +#define IPOD_AUTH_CHIP_TWI_N_RESET_PIN AVR32_PIN_PX16 + +//! @} + +/*! \name USART connection to the UC3B board controller + */ +//! @{ + +#define USART0_RXD_PIN AVR32_USART0_RXD_0_0_PIN +#define USART0_RXD_FUNCTION AVR32_USART0_RXD_0_0_FUNCTION +#define USART0_TXD_PIN AVR32_USART0_TXD_0_0_PIN +#define USART0_TXD_FUNCTION AVR32_USART0_TXD_0_0_FUNCTION +#define USART0_RTS_PIN AVR32_USART0_RTS_0_0_PIN +#define USART0_RTS_FUNCTION AVR32_USART0_RTS_0_0_FUNCTION +#define USART0_CTS_PIN AVR32_USART0_CTS_0_0_PIN +#define USART0_CTS_FUNCTION AVR32_USART0_CTS_0_0_FUNCTION + +//! @} + +#define ADC_VEXT_PIN AVR32_ADC_AD_7_PIN +#define ADC_VEXT_FUNCTION AVR32_ADC_AD_7_FUNCTION + +/*! \name LCD Connections of the ET024006DHU display + */ +//! @{ +#define ET024006DHU_SMC_USE_NCS 0 +#define ET024006DHU_SMC_COMPONENT_CS "smc_et024006dhu.h" + +#define ET024006DHU_EBI_DATA_0 AVR32_EBI_DATA_0 +#define ET024006DHU_EBI_DATA_1 AVR32_EBI_DATA_1 +#define ET024006DHU_EBI_DATA_2 AVR32_EBI_DATA_2 +#define ET024006DHU_EBI_DATA_3 AVR32_EBI_DATA_3 +#define ET024006DHU_EBI_DATA_4 AVR32_EBI_DATA_4 +#define ET024006DHU_EBI_DATA_5 AVR32_EBI_DATA_5 +#define ET024006DHU_EBI_DATA_6 AVR32_EBI_DATA_6 +#define ET024006DHU_EBI_DATA_7 AVR32_EBI_DATA_7 +#define ET024006DHU_EBI_DATA_8 AVR32_EBI_DATA_8 +#define ET024006DHU_EBI_DATA_9 AVR32_EBI_DATA_9 +#define ET024006DHU_EBI_DATA_10 AVR32_EBI_DATA_10 +#define ET024006DHU_EBI_DATA_11 AVR32_EBI_DATA_11 +#define ET024006DHU_EBI_DATA_12 AVR32_EBI_DATA_12 +#define ET024006DHU_EBI_DATA_13 AVR32_EBI_DATA_13 +#define ET024006DHU_EBI_DATA_14 AVR32_EBI_DATA_14 +#define ET024006DHU_EBI_DATA_15 AVR32_EBI_DATA_15 + +#define ET024006DHU_EBI_ADDR_21 AVR32_EBI_ADDR_21_1 + +#define ET024006DHU_EBI_NWE AVR32_EBI_NWE0_0 +#define ET024006DHU_EBI_NRD AVR32_EBI_NRD_0 +#define ET024006DHU_EBI_NCS AVR32_EBI_NCS_0_1 +//! @} + + +#endif // !EVK1105_REVA + +#endif // _EVK1105_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.c new file mode 100644 index 0000000..561652a --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.c @@ -0,0 +1,346 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3A EVK1105 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1105 board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3A devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "preprocessor.h" +#include "compiler.h" +#include "evk1105.h" +#include "led.h" + + +//! Structure describing LED hardware connections. +typedef const struct +{ + struct + { + U32 PORT; //!< LED GPIO port. + U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port. + } GPIO; //!< LED GPIO descriptor. + struct + { + S32 CHANNEL; //!< LED PWM channel (< 0 if N/A). + S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A). + } PWM; //!< LED PWM descriptor. +} tLED_DESCRIPTOR; + + +//! Hardware descriptors of all LEDs. +static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] = +{ +#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \ + { \ + {LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\ + {LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \ + }, + MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~) +#undef INSERT_LED_DESCRIPTOR +}; + + +//! Saved state of all LEDs. +static volatile U32 LED_State = (1 << LED_COUNT) - 1; + + +U32 LED_Read_Display(void) +{ + return LED_State; +} + + +void LED_Display(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor; + volatile avr32_gpio_port_t *led_gpio_port; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + LED_State = leds; + + // For all LEDs... + for (led_descriptor = &LED_DESCRIPTOR[0]; + led_descriptor < LED_DESCRIPTOR + LED_COUNT; + led_descriptor++) + { + // Set the LED to the requested state. + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + } +} + + +U32 LED_Read_Display_Mask(U32 mask) +{ + return Rd_bits(LED_State, mask); +} + + +void LED_Display_Mask(U32 mask, U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + mask &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Wr_bits(LED_State, mask, leds); + + // While there are specified LEDs left to manage... + while (mask) + { + // Select the next specified LED and set it to the requested state. + led_shift = 1 + ctz(mask); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + leds >>= led_shift - 1; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + mask >>= led_shift; + } +} + + +Bool LED_Test(U32 leds) +{ + return Tst_bits(LED_State, leds); +} + + +void LED_Off(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Clr_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and turn it off. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_On(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Set_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and turn it on. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_Toggle(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Tgl_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and toggle it. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +U32 LED_Read_Display_Field(U32 field) +{ + return Rd_bitfield(LED_State, field); +} + + +void LED_Display_Field(U32 field, U32 leds) +{ + // Move the bit-field to the appropriate position for the bit-mask. + LED_Display_Mask(field, leds << ctz(field)); +} + + +U8 LED_Get_Intensity(U32 led) +{ + tLED_DESCRIPTOR *led_descriptor; + + // Check that the argument value is valid. + led = ctz(led); + led_descriptor = &LED_DESCRIPTOR[led]; + if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0; + + // Return the duty cycle value if the LED PWM channel is enabled, else 0. + return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ? + AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0; +} + + +void LED_Set_Intensity(U32 leds, U8 intensity) +{ + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_pwm_channel_t *led_pwm_channel; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // For each specified LED... + for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift) + { + // Select the next specified LED and check that it has a PWM channel. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + if (led_descriptor->PWM.CHANNEL < 0) continue; + + // Initialize or update the LED PWM channel. + led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL]; + if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL))) + { + led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) & + ~(AVR32_PWM_CALG_MASK | + AVR32_PWM_CPOL_MASK | + AVR32_PWM_CPD_MASK); + led_pwm_channel->cprd = 0x000000FF; + led_pwm_channel->cdty = intensity; + AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL; + } + else + { + AVR32_PWM.isr; + while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL))); + led_pwm_channel->cupd = intensity; + } + + // Switch the LED pin to its PWM function. + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (led_descriptor->PWM.FUNCTION & 0x1) + { + led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK; + } + if (led_descriptor->PWM.FUNCTION & 0x2) + { + led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK; + } +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.h new file mode 100644 index 0000000..7766b6a --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.h @@ -0,0 +1,187 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3A EVK1105 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1105 board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3A devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _LED_H_ +#define _LED_H_ + +#include "compiler.h" + + +/*! \name Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED0 0x01 +#define LED1 0x02 +#define LED2 0x04 +#define LED3 0x08 +//! @} + + +/*! \brief Gets the last state of all LEDs set through the LED API. + * + * \return State of all LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display(void); + +/*! \brief Sets the state of all LEDs. + * + * \param leds New state of all LEDs (1 bit per LED). + * + * \note The pins of all LEDs are set to GPIO output mode. + */ +extern void LED_Display(U32 leds); + +/*! \brief Gets the last state of the specified LEDs set through the LED API. + * + * \param mask LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Mask(U32 mask); + +/*! \brief Sets the state of the specified LEDs. + * + * \param mask LEDs of which to set the state (1 bit per LED). + * + * \param leds New state of the specified LEDs (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Mask(U32 mask, U32 leds); + +/*! \brief Tests the last state of the specified LEDs set through the LED API. + * + * \param leds LEDs of which to test the state (1 bit per LED). + * + * \return \c TRUE if at least one of the specified LEDs has a state on, else + * \c FALSE. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern Bool LED_Test(U32 leds); + +/*! \brief Turns off the specified LEDs. + * + * \param leds LEDs to turn off (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Off(U32 leds); + +/*! \brief Turns on the specified LEDs. + * + * \param leds LEDs to turn on (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_On(U32 leds); + +/*! \brief Toggles the specified LEDs. + * + * \param leds LEDs to toggle (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Toggle(U32 leds); + +/*! \brief Gets as a bit-field the last state of the specified LEDs set through + * the LED API. + * + * \param field LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED, beginning with the first + * specified LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Field(U32 field); + +/*! \brief Sets as a bit-field the state of the specified LEDs. + * + * \param field LEDs of which to set the state (1 bit per LED). + * \param leds New state of the specified LEDs (1 bit per LED, beginning with + * the first specified LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Field(U32 field, U32 leds); + +/*! \brief Gets the intensity of the specified LED. + * + * \param led LED of which to get the intensity (1 bit per LED; only the least + * significant set bit is used). + * + * \return Intensity of the specified LED (0x00 to 0xFF). + * + * \warning The PWM channel of the specified LED is supposed to be used only by + * this module. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U8 LED_Get_Intensity(U32 led); + +/*! \brief Sets the intensity of the specified LEDs. + * + * \param leds LEDs of which to set the intensity (1 bit per LED). + * \param intensity New intensity of the specified LEDs (0x00 to 0xFF). + * + * \warning The PWM channels of the specified LEDs are supposed to be used only + * by this module. + * + * \note The pins of the specified LEDs are set to PWM output mode. + */ +extern void LED_Set_Intensity(U32 leds, U8 intensity); + + +#endif // _LED_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/board.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/board.h new file mode 100644 index 0000000..78ee91e --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/board.h @@ -0,0 +1,120 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Standard board header file. + * + * This file includes the appropriate board header file according to the + * defined board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +#include + +/*! \name Base Boards + */ +//! @{ +#define EVK1100 1 //!< AT32UC3A EVK1100 board. +#define EVK1101 2 //!< AT32UC3B EVK1101 board. +#define UC3C_EK 3 //!< AT32UC3C UC3C_EK board. +#define EVK1104 4 //!< AT32UC3A3 EVK1104 board. +#define EVK1105 5 //!< AT32UC3A EVK1105 board. +#define STK1000 6 //!< AT32AP7000 STK1000 board. +#define NGW100 7 //!< AT32AP7000 NGW100 board. +#define STK600_RCUC3L0 8 //!< STK600 RCUC3L0 board. +#define UC3L_EK 9 //!< AT32UC3L-EK board. +#define USER_BOARD 99 //!< User-reserved board (if any). +//! @} + +/*! \name Extension Boards + */ +//! @{ +#define EXT1102 1 //!< AT32UC3B EXT1102 board. +#define MC300 2 //!< AT32UC3 MC300 board. +#define USER_EXT_BOARD 99 //!< User-reserved extension board (if any). +//! @} + +#if BOARD == EVK1100 + #include "EVK1100/evk1100.h" +#elif BOARD == EVK1101 + #include "EVK1101/evk1101.h" +#elif BOARD == UC3C_EK + #include "UC3C_EK/uc3c_ek.h" +#elif BOARD == EVK1104 + #include "EVK1104/evk1104.h" +#elif BOARD == EVK1105 + #include "EVK1105/evk1105.h" +#elif BOARD == STK1000 + #include "STK1000/stk1000.h" +#elif BOARD == NGW100 + #include "NGW100/ngw100.h" +#elif BOARD == STK600_RCUC3L0 + #include "STK600/RCUC3L0/stk600_rcuc3l0.h" +#elif BOARD == UC3L_EK + #include "UC3L_EK/uc3l_ek.h" +#elif BOARD == ARDUINO + #include "ARDUINO/arduino.h" +#else + #error No known AVR32 board defined +#endif + +#if (defined EXT_BOARD) + #if EXT_BOARD == EXT1102 + #include "EXT1102/ext1102.h" + #elif EXT_BOARD == MC300 + #include "MC300/mc300.h" + #elif EXT_BOARD == USER_EXT_BOARD + // User-reserved area: #include the header file of your extension board here + // (if any). + #endif +#endif + + +#ifndef FRCOSC + #define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< Default RCOsc frequency. +#endif + + +#endif // _BOARD_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/board.h.my b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/board.h.my new file mode 100644 index 0000000..78ee91e --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/BOARDS/board.h.my @@ -0,0 +1,120 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Standard board header file. + * + * This file includes the appropriate board header file according to the + * defined board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +#include + +/*! \name Base Boards + */ +//! @{ +#define EVK1100 1 //!< AT32UC3A EVK1100 board. +#define EVK1101 2 //!< AT32UC3B EVK1101 board. +#define UC3C_EK 3 //!< AT32UC3C UC3C_EK board. +#define EVK1104 4 //!< AT32UC3A3 EVK1104 board. +#define EVK1105 5 //!< AT32UC3A EVK1105 board. +#define STK1000 6 //!< AT32AP7000 STK1000 board. +#define NGW100 7 //!< AT32AP7000 NGW100 board. +#define STK600_RCUC3L0 8 //!< STK600 RCUC3L0 board. +#define UC3L_EK 9 //!< AT32UC3L-EK board. +#define USER_BOARD 99 //!< User-reserved board (if any). +//! @} + +/*! \name Extension Boards + */ +//! @{ +#define EXT1102 1 //!< AT32UC3B EXT1102 board. +#define MC300 2 //!< AT32UC3 MC300 board. +#define USER_EXT_BOARD 99 //!< User-reserved extension board (if any). +//! @} + +#if BOARD == EVK1100 + #include "EVK1100/evk1100.h" +#elif BOARD == EVK1101 + #include "EVK1101/evk1101.h" +#elif BOARD == UC3C_EK + #include "UC3C_EK/uc3c_ek.h" +#elif BOARD == EVK1104 + #include "EVK1104/evk1104.h" +#elif BOARD == EVK1105 + #include "EVK1105/evk1105.h" +#elif BOARD == STK1000 + #include "STK1000/stk1000.h" +#elif BOARD == NGW100 + #include "NGW100/ngw100.h" +#elif BOARD == STK600_RCUC3L0 + #include "STK600/RCUC3L0/stk600_rcuc3l0.h" +#elif BOARD == UC3L_EK + #include "UC3L_EK/uc3l_ek.h" +#elif BOARD == ARDUINO + #include "ARDUINO/arduino.h" +#else + #error No known AVR32 board defined +#endif + +#if (defined EXT_BOARD) + #if EXT_BOARD == EXT1102 + #include "EXT1102/ext1102.h" + #elif EXT_BOARD == MC300 + #include "MC300/mc300.h" + #elif EXT_BOARD == USER_EXT_BOARD + // User-reserved area: #include the header file of your extension board here + // (if any). + #endif +#endif + + +#ifndef FRCOSC + #define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< Default RCOsc frequency. +#endif + + +#endif // _BOARD_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.c new file mode 100644 index 0000000..93d3dd9 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.c @@ -0,0 +1,653 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Management of the AT45DBX data flash controller through SPI. + * + * This file manages the accesses to the AT45DBX data flash components. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +//_____ I N C L U D E S ___________________________________________________ + +#include "conf_access.h" + + +#if AT45DBX_MEM == ENABLE + +#include "compiler.h" +#include "board.h" +#include "gpio.h" +#include "spi.h" +#include "conf_at45dbx.h" +#include "at45dbx.h" + + +#if AT45DBX_MEM_CNT > 4 + #error AT45DBX_MEM_CNT must not exceed 4 +#endif + + +//_____ D E F I N I T I O N S ______________________________________________ + +/*! \name AT45DBX Group A Commands + */ +//! @{ +#define AT45DBX_CMDA_RD_PAGE 0xD2 //!< Main Memory Page Read (Serial/8-bit Mode). +#define AT45DBX_CMDA_RD_ARRAY_LEG 0xE8 //!< Continuous Array Read, Legacy Command (Serial/8-bit Mode). +#define AT45DBX_CMDA_RD_ARRAY_LF_SM 0x03 //!< Continuous Array Read, Low-Frequency Mode (Serial Mode). +#define AT45DBX_CMDA_RD_ARRAY_AF_SM 0x0B //!< Continuous Array Read, Any-Frequency Mode (Serial Mode). +#define AT45DBX_CMDA_RD_SECTOR_PROT_REG 0x32 //!< Read Sector Protection Register (Serial/8-bit Mode). +#define AT45DBX_CMDA_RD_SECTOR_LKDN_REG 0x35 //!< Read Sector Lockdown Register (Serial/8-bit Mode). +#define AT45DBX_CMDA_RD_SECURITY_REG 0x77 //!< Read Security Register (Serial/8-bit Mode). +//! @} + +/*! \name AT45DBX Group B Commands + */ +//! @{ +#define AT45DBX_CMDB_ER_PAGE 0x81 //!< Page Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_ER_BLOCK 0x50 //!< Block Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_ER_SECTOR 0x7C //!< Sector Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_ER_CHIP 0xC794809A //!< Chip Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_XFR_PAGE_TO_BUF1 0x53 //!< Main Memory Page to Buffer 1 Transfer (Serial/8-bit Mode). +#define AT45DBX_CMDB_XFR_PAGE_TO_BUF2 0x55 //!< Main Memory Page to Buffer 2 Transfer (Serial/8-bit Mode). +#define AT45DBX_CMDB_CMP_PAGE_TO_BUF1 0x60 //!< Main Memory Page to Buffer 1 Compare (Serial/8-bit Mode). +#define AT45DBX_CMDB_CMP_PAGE_TO_BUF2 0x61 //!< Main Memory Page to Buffer 2 Compare (Serial/8-bit Mode). +#define AT45DBX_CMDB_PR_BUF1_TO_PAGE_ER 0x83 //!< Buffer 1 to Main Memory Page Program with Built-in Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_PR_BUF2_TO_PAGE_ER 0x86 //!< Buffer 2 to Main Memory Page Program with Built-in Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_PR_BUF1_TO_PAGE 0x88 //!< Buffer 1 to Main Memory Page Program without Built-in Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_PR_BUF2_TO_PAGE 0x89 //!< Buffer 2 to Main Memory Page Program without Built-in Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_PR_PAGE_TH_BUF1 0x82 //!< Main Memory Page Program through Buffer 1 (Serial/8-bit Mode). +#define AT45DBX_CMDB_PR_PAGE_TH_BUF2 0x85 //!< Main Memory Page Program through Buffer 2 (Serial/8-bit Mode). +#define AT45DBX_CMDB_RWR_PAGE_TH_BUF1 0x58 //!< Auto Page Rewrite through Buffer 1 (Serial/8-bit Mode). +#define AT45DBX_CMDB_RWR_PAGE_TH_BUF2 0x59 //!< Auto Page Rewrite through Buffer 2 (Serial/8-bit Mode). +//! @} + +/*! \name AT45DBX Group C Commands + */ +//! @{ +#define AT45DBX_CMDC_RD_BUF1_LF_SM 0xD1 //!< Buffer 1 Read, Low-Frequency Mode (Serial Mode). +#define AT45DBX_CMDC_RD_BUF2_LF_SM 0xD3 //!< Buffer 2 Read, Low-Frequency Mode (Serial Mode). +#define AT45DBX_CMDC_RD_BUF1_AF_SM 0xD4 //!< Buffer 1 Read, Any-Frequency Mode (Serial Mode). +#define AT45DBX_CMDC_RD_BUF2_AF_SM 0xD6 //!< Buffer 2 Read, Any-Frequency Mode (Serial Mode). +#define AT45DBX_CMDC_RD_BUF1_AF_8M 0x54 //!< Buffer 1 Read, Any-Frequency Mode (8-bit Mode). +#define AT45DBX_CMDC_RD_BUF2_AF_8M 0x56 //!< Buffer 2 Read, Any-Frequency Mode (8-bit Mode). +#define AT45DBX_CMDC_WR_BUF1 0x84 //!< Buffer 1 Write (Serial/8-bit Mode). +#define AT45DBX_CMDC_WR_BUF2 0x87 //!< Buffer 2 Write (Serial/8-bit Mode). +#define AT45DBX_CMDC_RD_STATUS_REG 0xD7 //!< Status Register Read (Serial/8-bit Mode). +#define AT45DBX_CMDC_RD_MNFCT_DEV_ID_SM 0x9F //!< Manufacturer and Device ID Read (Serial Mode). +//! @} + +/*! \name AT45DBX Group D Commands + */ +//! @{ +#define AT45DBX_CMDD_EN_SECTOR_PROT 0x3D2A7FA9 //!< Enable Sector Protection (Serial/8-bit Mode). +#define AT45DBX_CMDD_DIS_SECTOR_PROT 0x3D2A7F9A //!< Disable Sector Protection (Serial/8-bit Mode). +#define AT45DBX_CMDD_ER_SECTOR_PROT_REG 0x3D2A7FCF //!< Erase Sector Protection Register (Serial/8-bit Mode). +#define AT45DBX_CMDD_PR_SECTOR_PROT_REG 0x3D2A7FFC //!< Program Sector Protection Register (Serial/8-bit Mode). +#define AT45DBX_CMDD_LKDN_SECTOR 0x3D2A7F30 //!< Sector Lockdown (Serial/8-bit Mode). +#define AT45DBX_CMDD_PR_SECURITY_REG 0x9B000000 //!< Program Security Register (Serial/8-bit Mode). +#define AT45DBX_CMDD_PR_CONF_REG 0x3D2A80A6 //!< Program Configuration Register (Serial/8-bit Mode). +#define AT45DBX_CMDD_DEEP_PWR_DN 0xB9 //!< Deep Power-down (Serial/8-bit Mode). +#define AT45DBX_CMDD_RSM_DEEP_PWR_DN 0xAB //!< Resume from Deep Power-down (Serial/8-bit Mode). +//! @} + + +/*! \name Bit-Masks and Values for the Status Register + */ +//! @{ +#define AT45DBX_MSK_BUSY 0x80 //!< Busy status bit-mask. +#define AT45DBX_BUSY 0x00 //!< Busy status value (0x00 when busy, 0x80 when ready). +#define AT45DBX_MSK_DENSITY 0x3C //!< Device density bit-mask. +//! @} +#if AT45DBX_MEM_SIZE == AT45DBX_1MB + +/*! \name AT45DB081 Memories + */ +//! @{ +#define AT45DBX_DENSITY 0x24 //!< Device density value. +#define AT45DBX_BYTE_ADDR_BITS 9 //!< Address bits for byte position within buffer. + +//! @} +#elif AT45DBX_MEM_SIZE == AT45DBX_2MB + +/*! \name AT45DB161 Memories + */ +//! @{ +#define AT45DBX_DENSITY 0x2C //!< Device density value. +#define AT45DBX_BYTE_ADDR_BITS 10 //!< Address bits for byte position within buffer. +//! @} + +#elif AT45DBX_MEM_SIZE == AT45DBX_4MB + +/*! \name AT45DB321 Memories + */ +//! @{ +#define AT45DBX_DENSITY 0x34 //!< Device density value. +#define AT45DBX_BYTE_ADDR_BITS 10 //!< Address bits for byte position within buffer. +//! @} + +#elif AT45DBX_MEM_SIZE == AT45DBX_8MB + +/*! \name AT45DB642 Memories + */ +//! @{ +#define AT45DBX_DENSITY 0x3C //!< Device density value. +#define AT45DBX_BYTE_ADDR_BITS 11 //!< Address bits for byte position within buffer. +//! @} + +#else + #error AT45DBX_MEM_SIZE is not defined to a supported value +#endif + +//! Address bits for page selection. +#define AT45DBX_PAGE_ADDR_BITS (AT45DBX_MEM_SIZE - AT45DBX_PAGE_BITS) + +//! Number of bits for addresses within pages. +#define AT45DBX_PAGE_BITS (AT45DBX_BYTE_ADDR_BITS - 1) + +//! Page size in bytes. +#define AT45DBX_PAGE_SIZE (1 << AT45DBX_PAGE_BITS) + +//! Bit-mask for byte position within buffer in \ref gl_ptr_mem. +#define AT45DBX_MSK_PTR_BYTE ((1 << AT45DBX_PAGE_BITS) - 1) + +//! Bit-mask for page selection in \ref gl_ptr_mem. +#define AT45DBX_MSK_PTR_PAGE (((1 << AT45DBX_PAGE_ADDR_BITS) - 1) << AT45DBX_PAGE_BITS) + +//! Bit-mask for byte position within sector in \ref gl_ptr_mem. +#define AT45DBX_MSK_PTR_SECTOR ((1 << AT45DBX_SECTOR_BITS) - 1) + + +/*! \brief Sends a dummy byte through SPI. + */ +#define spi_write_dummy() spi_write(AT45DBX_SPI, 0xFF) + + +//! Boolean indicating whether memory is in busy state. +static Bool at45dbx_busy; + +//! Memory data pointer. +static U32 gl_ptr_mem; + +//! Sector buffer. +static U8 sector_buf[AT45DBX_SECTOR_SIZE]; + + +/*! \name Control Functions + */ +//! @{ + + +Bool at45dbx_init(spi_options_t spiOptions, unsigned int pba_hz) +{ + // Setup SPI registers according to spiOptions. + for (spiOptions.reg = AT45DBX_SPI_FIRST_NPCS; + spiOptions.reg < AT45DBX_SPI_FIRST_NPCS + AT45DBX_MEM_CNT; + spiOptions.reg++) + { + if (spi_setupChipReg(AT45DBX_SPI, &spiOptions, pba_hz) != SPI_OK) return KO; + } + + // Memory ready. + at45dbx_busy = FALSE; + + return OK; +} + + +/*! \brief Selects or unselects a DF memory. + * + * \param memidx Memory ID of DF to select or unselect. + * \param bSelect Boolean indicating whether the DF memory has to be selected. + */ +static void at45dbx_chipselect_df(U8 memidx, Bool bSelect) +{ + if (bSelect) + { + // Select SPI chip. + spi_selectChip(AT45DBX_SPI, AT45DBX_SPI_FIRST_NPCS + memidx); + } + else + { + // Unselect SPI chip. + spi_unselectChip(AT45DBX_SPI, AT45DBX_SPI_FIRST_NPCS + memidx); + } +} + + +Bool at45dbx_mem_check(void) +{ + U8 df; + U16 status = 0; + + // DF memory check. + for (df = 0; df < AT45DBX_MEM_CNT; df++) + { + // Select the DF memory to check. + at45dbx_chipselect_df(df, TRUE); + + // Send the Status Register Read command. + spi_write(AT45DBX_SPI, AT45DBX_CMDC_RD_STATUS_REG); + + // Send a dummy byte to read the status register. + spi_write_dummy(); + spi_read(AT45DBX_SPI, &status); + + // Unselect the checked DF memory. + at45dbx_chipselect_df(df, FALSE); + + // Unexpected device density value. + if ((status & AT45DBX_MSK_DENSITY) < AT45DBX_DENSITY) return KO; + } + + return OK; +} + + +/*! \brief Waits until the DF is ready. + */ +static void at45dbx_wait_ready(void) +{ + U16 status; + + // Select the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE); + + // Send the Status Register Read command. + spi_write(AT45DBX_SPI, AT45DBX_CMDC_RD_STATUS_REG); + + // Read the status register until the DF is ready. + do + { + // Send a dummy byte to read the status register. + spi_write_dummy(); + spi_read(AT45DBX_SPI, &status); + } while ((status & AT45DBX_MSK_BUSY) == AT45DBX_BUSY); + + // Unselect the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); +} + + +Bool at45dbx_read_open(U32 sector) +{ + U32 addr; + + // Set the global memory pointer to a byte address. + gl_ptr_mem = sector << AT45DBX_SECTOR_BITS; // gl_ptr_mem = sector * AT45DBX_SECTOR_SIZE. + + // If the DF memory is busy, wait until it's ready. + if (at45dbx_busy) at45dbx_wait_ready(); + at45dbx_busy = FALSE; + + // Select the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE); + + // Initiate a page read at a given sector. + + // Send the Main Memory Page Read command. + spi_write(AT45DBX_SPI, AT45DBX_CMDA_RD_PAGE); + + // Send the three address bytes, which comprise: + // - (24 - (AT45DBX_PAGE_ADDR_BITS + AT45DBX_BYTE_ADDR_BITS)) reserved bits; + // - then AT45DBX_PAGE_ADDR_BITS bits specifying the page in main memory to be read; + // - then AT45DBX_BYTE_ADDR_BITS bits specifying the starting byte address within that page. + // NOTE: The bits of gl_ptr_mem above the AT45DBX_MEM_SIZE bits are useless for the local + // DF addressing. They are used for DF discrimination when there are several DFs. + addr = (Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_PAGE) << AT45DBX_BYTE_ADDR_BITS) | + Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE); + spi_write(AT45DBX_SPI, LSB2W(addr)); + spi_write(AT45DBX_SPI, LSB1W(addr)); + spi_write(AT45DBX_SPI, LSB0W(addr)); + + // Send 32 don't care clock cycles to initialize the read operation. + spi_write_dummy(); + spi_write_dummy(); + spi_write_dummy(); + spi_write_dummy(); + + return OK; +} + + +void at45dbx_read_close(void) +{ + // Unselect the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); + + // Memory ready. + at45dbx_busy = FALSE; +} + + +Bool at45dbx_write_open(U32 sector) +{ + U32 addr; + + // Set the global memory pointer to a byte address. + gl_ptr_mem = sector << AT45DBX_SECTOR_BITS; // gl_ptr_mem = sector * AT45DBX_SECTOR_SIZE. + + // If the DF memory is busy, wait until it's ready. + if (at45dbx_busy) at45dbx_wait_ready(); + at45dbx_busy = FALSE; + +#if AT45DBX_PAGE_SIZE > AT45DBX_SECTOR_SIZE + // Select the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE); + + // Transfer the content of the current page to buffer 1. + + // Send the Main Memory Page to Buffer 1 Transfer command. + spi_write(AT45DBX_SPI, AT45DBX_CMDB_XFR_PAGE_TO_BUF1); + + // Send the three address bytes, which comprise: + // - (24 - (AT45DBX_PAGE_ADDR_BITS + AT45DBX_BYTE_ADDR_BITS)) reserved bits; + // - then AT45DBX_PAGE_ADDR_BITS bits specifying the page in main memory to be read; + // - then AT45DBX_BYTE_ADDR_BITS don't care bits. + // NOTE: The bits of gl_ptr_mem above the AT45DBX_MEM_SIZE bits are useless for the local + // DF addressing. They are used for DF discrimination when there are several DFs. + addr = Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_PAGE) << AT45DBX_BYTE_ADDR_BITS; + spi_write(AT45DBX_SPI, LSB2W(addr)); + spi_write(AT45DBX_SPI, LSB1W(addr)); + spi_write(AT45DBX_SPI, LSB0W(addr)); + + // Unselect the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); + + // Wait for end of page transfer. + at45dbx_wait_ready(); +#endif + + // Select the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE); + + // Initiate a page write at a given sector. + + // Send the Main Memory Page Program through Buffer 1 command. + spi_write(AT45DBX_SPI, AT45DBX_CMDB_PR_PAGE_TH_BUF1); + + // Send the three address bytes, which comprise: + // - (24 - (AT45DBX_PAGE_ADDR_BITS + AT45DBX_BYTE_ADDR_BITS)) reserved bits; + // - then AT45DBX_PAGE_ADDR_BITS bits specifying the page in main memory to be written; + // - then AT45DBX_BYTE_ADDR_BITS bits specifying the starting byte address within that page. + // NOTE: The bits of gl_ptr_mem above the AT45DBX_MEM_SIZE bits are useless for the local + // DF addressing. They are used for DF discrimination when there are several DFs. + addr = (Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_PAGE) << AT45DBX_BYTE_ADDR_BITS) | + Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE); + spi_write(AT45DBX_SPI, LSB2W(addr)); + spi_write(AT45DBX_SPI, LSB1W(addr)); + spi_write(AT45DBX_SPI, LSB0W(addr)); + + return OK; +} + + +void at45dbx_write_close(void) +{ + // While end of logical sector not reached, zero-fill remaining memory bytes. + while (Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_SECTOR)) + { + spi_write(AT45DBX_SPI, 0x00); + gl_ptr_mem++; + } + + // Unselect the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); + + // Memory busy. + at45dbx_busy = TRUE; +} + + +//! @} + + +/*! \name Single-Byte Access Functions + */ +//! @{ + + +U8 at45dbx_read_byte(void) +{ + U16 data; + + // Memory busy. + if (at45dbx_busy) + { + // Being here, we know that we previously finished a page read. + // => We have to access the next page. + + // Memory ready. + at45dbx_busy = FALSE; + + // Eventually select the next DF and open the next page. + // NOTE: at45dbx_read_open input parameter is a sector. + at45dbx_read_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE. + } + + // Send a dummy byte to read the next data byte. + spi_write_dummy(); + spi_read(AT45DBX_SPI, &data); + gl_ptr_mem++; + + // If end of page reached, + if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE)) + { + // unselect the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); + + // Memory busy. + at45dbx_busy = TRUE; + } + + return data; +} + + +Bool at45dbx_write_byte(U8 b) +{ + // Memory busy. + if (at45dbx_busy) + { + // Being here, we know that we previously launched a page programming. + // => We have to access the next page. + + // Eventually select the next DF and open the next page. + // NOTE: at45dbx_write_open input parameter is a sector. + at45dbx_write_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE. + } + + // Write the next data byte. + spi_write(AT45DBX_SPI, b); + gl_ptr_mem++; + + // If end of page reached, + if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE)) + { + // unselect the DF memory gl_ptr_mem points to in order to program the page. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); + + // Memory busy. + at45dbx_busy = TRUE; + } + + return OK; +} + + +//! @} + + +/*! \name Multiple-Sector Access Functions + */ +//! @{ + + +Bool at45dbx_read_multiple_sector(U16 nb_sector) +{ + while (nb_sector--) + { + // Read the next sector. + at45dbx_read_sector_2_ram(sector_buf); + at45dbx_read_multiple_sector_callback(sector_buf); + } + + return OK; +} + + +Bool at45dbx_write_multiple_sector(U16 nb_sector) +{ + while (nb_sector--) + { + // Write the next sector. + at45dbx_write_multiple_sector_callback(sector_buf); + at45dbx_write_sector_from_ram(sector_buf); + } + + return OK; +} + + +//! @} + + +/*! \name Single-Sector Access Functions + */ +//! @{ + + +Bool at45dbx_read_sector_2_ram(void *ram) +{ + U8 *_ram = ram; + U16 i; + U16 data; + + // Memory busy. + if (at45dbx_busy) + { + // Being here, we know that we previously finished a page read. + // => We have to access the next page. + + // Memory ready. + at45dbx_busy = FALSE; + + // Eventually select the next DF and open the next page. + // NOTE: at45dbx_read_open input parameter is a sector. + at45dbx_read_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE. + } + + // Read the next sector. + for (i = AT45DBX_SECTOR_SIZE; i; i--) + { + // Send a dummy byte to read the next data byte. + spi_write_dummy(); + spi_read(AT45DBX_SPI, &data); + *_ram++ = data; + } + + // Update the memory pointer. + gl_ptr_mem += AT45DBX_SECTOR_SIZE; + +#if AT45DBX_PAGE_SIZE > AT45DBX_SECTOR_SIZE + // If end of page reached, + if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE)) +#endif + { + // unselect the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); + + // Memory busy. + at45dbx_busy = TRUE; + } + + return OK; +} + + +Bool at45dbx_write_sector_from_ram(const void *ram) +{ + const U8 *_ram = ram; + U16 i; + + // Memory busy. + if (at45dbx_busy) + { + // Being here, we know that we previously launched a page programming. + // => We have to access the next page. + + // Eventually select the next DF and open the next page. + // NOTE: at45dbx_write_open input parameter is a sector. + at45dbx_write_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE. + } + + // Write the next sector. + for (i = AT45DBX_SECTOR_SIZE; i; i--) + { + // Write the next data byte. + spi_write(AT45DBX_SPI, *_ram++); + } + + // Update the memory pointer. + gl_ptr_mem += AT45DBX_SECTOR_SIZE; + +#if AT45DBX_PAGE_SIZE > AT45DBX_SECTOR_SIZE + // If end of page reached, + if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE)) +#endif + { + // unselect the DF memory gl_ptr_mem points to in order to program the page. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); + + // Memory busy. + at45dbx_busy = TRUE; + } + + return OK; +} + + +//! @} + + +#endif // AT45DBX_MEM == ENABLE diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.h new file mode 100644 index 0000000..e5263b2 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.h @@ -0,0 +1,270 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Management of the AT45DBX data flash controller through SPI. + * + * This file manages the accesses to the AT45DBX data flash components. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _AT45DBX_H_ +#define _AT45DBX_H_ + + +#include "conf_access.h" + +#if AT45DBX_MEM == DISABLE + #error at45dbx.h is #included although AT45DBX_MEM is disabled +#endif + + +#include "spi.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +/*! \name Available AT45DBX Sizes + * + * Number of address bits of available AT45DBX data flash memories. + * + * \note Only memories with page sizes of at least 512 bytes (sector size) are + * supported. + */ +//! @{ +#define AT45DBX_1MB 20 +#define AT45DBX_2MB 21 +#define AT45DBX_4MB 22 +#define AT45DBX_8MB 23 +//! @} + +// AT45DBX_1MB +#define AT45DBX_SECTOR_BITS 8 //! Number of bits for addresses within sectors. +// AT45DBX_2MB AT45DBX_4MB AT45DBX_8MB +//#define AT45DBX_SECTOR_BITS 9 //! Number of bits for addresses within sectors. + +//! Sector size in bytes. +#define AT45DBX_SECTOR_SIZE (1 << AT45DBX_SECTOR_BITS) + + +//_____ D E C L A R A T I O N S ____________________________________________ + +/*! \name Control Functions + */ +//! @{ + +/*! \brief Initializes the data flash controller and the SPI channel by which + * the DF is controlled. + * + * \param spiOptions Initialization options of the DF SPI channel. + * \param pba_hz SPI module input clock frequency (PBA clock, Hz). + * + * \retval OK Success. + * \retval KO Failure. + */ +extern Bool at45dbx_init(spi_options_t spiOptions, unsigned int pba_hz); + +/*! \brief Performs a memory check on all DFs. + * + * \retval OK Success. + * \retval KO Failure. + */ +extern Bool at45dbx_mem_check(void); + +/*! \brief Opens a DF memory in read mode at a given sector. + * + * \param sector Start sector. + * + * \retval OK Success. + * \retval KO Failure. + * + * \note Sector may be page-unaligned (depending on the DF page size). + */ +extern Bool at45dbx_read_open(U32 sector); + +/*! \brief Unselects the current DF memory. + */ +extern void at45dbx_read_close(void); + +/*! \brief This function opens a DF memory in write mode at a given sector. + * + * \param sector Start sector. + * + * \retval OK Success. + * \retval KO Failure. + * + * \note Sector may be page-unaligned (depending on the DF page size). + * + * \note If \ref AT45DBX_PAGE_SIZE > \ref AT45DBX_SECTOR_SIZE, page content is + * first loaded in buffer to then be partially updated by write byte or + * write sector functions. + */ +extern Bool at45dbx_write_open(U32 sector); + +/*! \brief Fills the end of the current logical sector and launches page programming. + */ +extern void at45dbx_write_close(void); + +//! @} + + +/*! \name Single-Byte Access Functions + */ +//! @{ + +/*! \brief Performs a single byte read from DF memory. + * + * \return The read byte. + * + * \note First call must be preceded by a call to the \ref at45dbx_read_open + * function. + */ +extern U8 at45dbx_read_byte(void); + +/*! \brief Performs a single byte write to DF memory. + * + * \param b The byte to write. + * + * \retval OK Success. + * \retval KO Failure. + * + * \note First call must be preceded by a call to the \ref at45dbx_write_open + * function. + */ +extern Bool at45dbx_write_byte(U8 b); + +//! @} + + +/*! \name Multiple-Sector Access Functions + */ +//! @{ + +/*! \brief Reads \a nb_sector sectors from DF memory. + * + * Data flow is: DF -> callback. + * + * \param nb_sector Number of contiguous sectors to read. + * + * \retval OK Success. + * \retval KO Failure. + * + * \note First call must be preceded by a call to the \ref at45dbx_read_open + * function. + * + * \note As \ref AT45DBX_PAGE_SIZE is always a multiple of + * \ref AT45DBX_SECTOR_SIZE, there is no need to check page end for each + * byte. + */ +extern Bool at45dbx_read_multiple_sector(U16 nb_sector); + +/*! \brief Callback function invoked after each sector read during + * \ref at45dbx_read_multiple_sector. + * + * \param psector Pointer to read sector. + */ +extern void at45dbx_read_multiple_sector_callback(const void *psector); + +/*! \brief Writes \a nb_sector sectors to DF memory. + * + * Data flow is: callback -> DF. + * + * \param nb_sector Number of contiguous sectors to write. + * + * \retval OK Success. + * \retval KO Failure. + * + * \note First call must be preceded by a call to the \ref at45dbx_write_open + * function. + * + * \note As \ref AT45DBX_PAGE_SIZE is always a multiple of + * \ref AT45DBX_SECTOR_SIZE, there is no need to check page end for each + * byte. + */ +extern Bool at45dbx_write_multiple_sector(U16 nb_sector); + +/*! \brief Callback function invoked before each sector write during + * \ref at45dbx_write_multiple_sector. + * + * \param psector Pointer to sector to write. + */ +extern void at45dbx_write_multiple_sector_callback(void *psector); + +//! @} + + +/*! \name Single-Sector Access Functions + */ +//! @{ + +/*! \brief Reads 1 DF sector to a RAM buffer. + * + * Data flow is: DF -> RAM. + * + * \param ram Pointer to RAM buffer. + * + * \retval OK Success. + * \retval KO Failure. + * + * \note First call must be preceded by a call to the \ref at45dbx_read_open + * function. + */ +extern Bool at45dbx_read_sector_2_ram(void *ram); + +/*! \brief Writes 1 DF sector from a RAM buffer. + * + * Data flow is: RAM -> DF. + * + * \param ram Pointer to RAM buffer. + * + * \retval OK Success. + * \retval KO Failure. + * + * \note First call must be preceded by a call to the \ref at45dbx_write_open + * function. + */ +extern Bool at45dbx_write_sector_from_ram(const void *ram); + +//! @} + + +#endif // _AT45DBX_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.c new file mode 100644 index 0000000..4c0ace2 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.c @@ -0,0 +1,234 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief CTRL_ACCESS interface for the AT45DBX data flash controller. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +//_____ I N C L U D E S ___________________________________________________ + +#include "conf_access.h" + + +#if AT45DBX_MEM == ENABLE + +#include "conf_at45dbx.h" +#include "at45dbx.h" +#include "at45dbx_mem.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +//! Whether to detect write accesses to the memory. +#define AT45DBX_MEM_TEST_CHANGE_STATE ENABLED + + +#if (ACCESS_USB == ENABLED || ACCESS_MEM_TO_RAM == ENABLED) && AT45DBX_MEM_TEST_CHANGE_STATE == ENABLED + +//! Memory data modified flag. +static volatile Bool s_b_data_modify = FALSE; + +#endif + + +/*! \name Control Interface + */ +//! @{ + + +Ctrl_status at45dbx_test_unit_ready(void) +{ + return (at45dbx_mem_check() == OK) ? CTRL_GOOD : CTRL_NO_PRESENT; +} + + +Ctrl_status at45dbx_read_capacity(U32 *u32_nb_sector) +{ + *u32_nb_sector = (AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) - 1; + + return CTRL_GOOD; +} + + +Bool at45dbx_wr_protect(void) +{ + return FALSE; +} + + +Bool at45dbx_removal(void) +{ + return FALSE; +} + + +//! @} + + +#if ACCESS_USB == ENABLED + +#include "usb_drv.h" +#include "scsi_decoder.h" + + +/*! \name MEM <-> USB Interface + */ +//! @{ + + +Ctrl_status at45dbx_usb_read_10(U32 addr, U16 nb_sector) +{ + if (addr + nb_sector > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL; + + at45dbx_read_open(addr); + at45dbx_read_multiple_sector(nb_sector); + at45dbx_read_close(); + + return CTRL_GOOD; +} + + +void at45dbx_read_multiple_sector_callback(const void *psector) +{ + U16 data_to_transfer = AT45DBX_SECTOR_SIZE; + + // Transfer read sector to the USB interface. + while (data_to_transfer) + { + while (!Is_usb_in_ready(g_scsi_ep_ms_in)) + { + if(!Is_usb_endpoint_enabled(g_scsi_ep_ms_in)) + return; // USB Reset + } + + Usb_reset_endpoint_fifo_access(g_scsi_ep_ms_in); + data_to_transfer = usb_write_ep_txpacket(g_scsi_ep_ms_in, psector, + data_to_transfer, &psector); + Usb_ack_in_ready_send(g_scsi_ep_ms_in); + } +} + + +Ctrl_status at45dbx_usb_write_10(U32 addr, U16 nb_sector) +{ + if (addr + nb_sector > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL; + +#if AT45DBX_MEM_TEST_CHANGE_STATE == ENABLED + if (nb_sector) s_b_data_modify = TRUE; +#endif + + at45dbx_write_open(addr); + at45dbx_write_multiple_sector(nb_sector); + at45dbx_write_close(); + + return CTRL_GOOD; +} + + +void at45dbx_write_multiple_sector_callback(void *psector) +{ + U16 data_to_transfer = AT45DBX_SECTOR_SIZE; + + // Transfer sector to write from the USB interface. + while (data_to_transfer) + { + while (!Is_usb_out_received(g_scsi_ep_ms_out)) + { + if(!Is_usb_endpoint_enabled(g_scsi_ep_ms_out)) + return; // USB Reset + } + + Usb_reset_endpoint_fifo_access(g_scsi_ep_ms_out); + data_to_transfer = usb_read_ep_rxpacket(g_scsi_ep_ms_out, psector, + data_to_transfer, &psector); + Usb_ack_out_received_free(g_scsi_ep_ms_out); + } +} + + +//! @} + +#endif // ACCESS_USB == ENABLED + + +#if ACCESS_MEM_TO_RAM == ENABLED + +/*! \name MEM <-> RAM Interface + */ +//! @{ + + +Ctrl_status at45dbx_df_2_ram(U32 addr, void *ram) +{ + if (addr + 1 > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL; + + at45dbx_read_open(addr); + at45dbx_read_sector_2_ram(ram); + at45dbx_read_close(); + + return CTRL_GOOD; +} + + +Ctrl_status at45dbx_ram_2_df(U32 addr, const void *ram) +{ + if (addr + 1 > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL; + +#if AT45DBX_MEM_TEST_CHANGE_STATE == ENABLED + s_b_data_modify = TRUE; +#endif + + at45dbx_write_open(addr); + at45dbx_write_sector_from_ram(ram); + at45dbx_write_close(); + + return CTRL_GOOD; +} + + +//! @} + +#endif // ACCESS_MEM_TO_RAM == ENABLED + + +#endif // AT45DBX_MEM == ENABLE diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.h new file mode 100644 index 0000000..de24fa3 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.h @@ -0,0 +1,164 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief CTRL_ACCESS interface for the AT45DBX data flash controller. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _AT45DBX_MEM_H_ +#define _AT45DBX_MEM_H_ + + +#include "conf_access.h" + +#if AT45DBX_MEM == DISABLE + #error at45dbx_mem.h is #included although AT45DBX_MEM is disabled +#endif + + +#include "ctrl_access.h" + + +//_____ D E C L A R A T I O N S ____________________________________________ + +/*! \name Control Interface + */ +//! @{ + +/*! \brief Tests the memory state and initializes the memory if required. + * + * The TEST UNIT READY SCSI primary command allows an application client to poll + * a LUN until it is ready without having to allocate memory for returned data. + * + * This command may be used to check the media status of LUNs with removable + * media. + * + * \return Status. + */ +extern Ctrl_status at45dbx_test_unit_ready(void); + +/*! \brief Returns the address of the last valid sector in the memory. + * + * \param u32_nb_sector Pointer to the address of the last valid sector. + * + * \return Status. + */ +extern Ctrl_status at45dbx_read_capacity(U32 *u32_nb_sector); + +/*! \brief Returns the write-protection state of the memory. + * + * \return \c TRUE if the memory is write-protected, else \c FALSE. + * + * \note Only used by removable memories with hardware-specific write + * protection. + */ +extern Bool at45dbx_wr_protect(void); + +/*! \brief Tells whether the memory is removable. + * + * \return \c TRUE if the memory is removable, else \c FALSE. + */ +extern Bool at45dbx_removal(void); + +//! @} + + +#if ACCESS_USB == ENABLED + +/*! \name MEM <-> USB Interface + */ +//! @{ + +/*! \brief Tranfers data from the memory to USB. + * + * \param addr Address of first memory sector to read. + * \param nb_sector Number of sectors to transfer. + * + * \return Status. + */ +extern Ctrl_status at45dbx_usb_read_10(U32 addr, U16 nb_sector); + +/*! \brief Tranfers data from USB to the memory. + * + * \param addr Address of first memory sector to write. + * \param nb_sector Number of sectors to transfer. + * + * \return Status. + */ +extern Ctrl_status at45dbx_usb_write_10(U32 addr, U16 nb_sector); + +//! @} + +#endif + + +#if ACCESS_MEM_TO_RAM == ENABLED + +/*! \name MEM <-> RAM Interface + */ +//! @{ + +/*! \brief Copies 1 data sector from the memory to RAM. + * + * \param addr Address of first memory sector to read. + * \param ram Pointer to RAM buffer to write. + * + * \return Status. + */ +extern Ctrl_status at45dbx_df_2_ram(U32 addr, void *ram); + +/*! \brief Copies 1 data sector from RAM to the memory. + * + * \param addr Address of first memory sector to write. + * \param ram Pointer to RAM buffer to read. + * + * \return Status. + */ +extern Ctrl_status at45dbx_ram_2_df(U32 addr, const void *ram); + +//! @} + +#endif + + +#endif // _AT45DBX_MEM_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR1/GCC/lib_ucr1_hd_sdio_v2.7.0.a b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR1/GCC/lib_ucr1_hd_sdio_v2.7.0.a new file mode 100644 index 0000000..e01ab14 Binary files /dev/null and b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR1/GCC/lib_ucr1_hd_sdio_v2.7.0.a differ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR1/GCC/lib_ucr1_hd_spi_v2.7.0.a b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR1/GCC/lib_ucr1_hd_spi_v2.7.0.a new file mode 100644 index 0000000..9aa4f24 Binary files /dev/null and b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR1/GCC/lib_ucr1_hd_spi_v2.7.0.a differ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR1/GCC/lib_ucr1_hd_wl_sta_intwpa_v2.7.0.a b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR1/GCC/lib_ucr1_hd_wl_sta_intwpa_v2.7.0.a new file mode 100644 index 0000000..00536f5 Binary files /dev/null and b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR1/GCC/lib_ucr1_hd_wl_sta_intwpa_v2.7.0.a differ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR2/GCC/lib_ucr2_hd_sdio_v2.7.0.a b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR2/GCC/lib_ucr2_hd_sdio_v2.7.0.a new file mode 100644 index 0000000..a61dea3 Binary files /dev/null and b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR2/GCC/lib_ucr2_hd_sdio_v2.7.0.a differ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR2/GCC/lib_ucr2_hd_spi_v2.7.0.a b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR2/GCC/lib_ucr2_hd_spi_v2.7.0.a new file mode 100644 index 0000000..6883192 Binary files /dev/null and b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR2/GCC/lib_ucr2_hd_spi_v2.7.0.a differ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR2/GCC/lib_ucr2_hd_wl_sta_intwpa_v2.7.0.a b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR2/GCC/lib_ucr2_hd_wl_sta_intwpa_v2.7.0.a new file mode 100644 index 0000000..0b09aa8 Binary files /dev/null and b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/UCR2/GCC/lib_ucr2_hd_wl_sta_intwpa_v2.7.0.a differ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/revision.txt b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/revision.txt new file mode 100644 index 0000000..5420c93 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/v2.7.0/revision.txt @@ -0,0 +1 @@ +Revision: 2491 diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_api.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_api.h new file mode 100644 index 0000000..17ba2ba --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_api.h @@ -0,0 +1,1687 @@ +/* + * Programming interface for wl_api. + * Copyright (C) 2010 HD Wireless AB + * + * You should have received a copy of the license along with this library. + */ + +/*! \file wl_api.h ************************************************************* + * + * \brief Basic WiFi API + * + * This file provides the wl_api interface. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: + * \li SPB104 + EVK1100 + * \li SPB104 + EVK1101 + * \li SPB104 + EVK1104 + * \li SPB104 + EVK1105 (SPI) + * \li SPB104 + EVK1105 (SPI + irq) + * \li SPB105 + EVK1105 (SPI) + * - AppNote: + * + * \author H&D Wireless AB: \n + * + ***************************************************************************** + * + * \section intro Introduction + * This is the documentation for the generic WiFi Driver API \a wl_api. + * + * \section files Main Files + * - wl_api.h : WiFi driver interface. + * - lib_ucr*_hd_wifi_standalone_v*.*.a - Driver library. + * + */ +/** \mainpage wl_api Reference Manual + +\image html images/wl_api_block_diagram_small.png "wl_api Architecture" + +(o)WL API © is a programming interface for WiFi (802.11). It aims +to be a complete interface for embedded applications wanting to use +wireless as a communications interface. (o)WL API © is shortened +"wl_api" in this document. + +wl_api has been designed to meet the following goals : + \li Simple : The API is as simple as is practicable + to make it easy to use. + \li Minimal size : The API is usable on very resource constrained + platforms. + \li Portable : The API is deployable on any platform with a standards + compliant C compiler. + \li OS independent : The API is deployable on systems using a real time + operating system as well as with applications running on the + "bare metal" of a hardware platform (that is without an operating system). + +As a consequence of these design goals wl_api does not allow very fine +grained control of most parameters relating to 802.11 networks. That +would increase the flexibility of the API while also increasing +complexity and code size. When the underlying WiFi hardware can +support a richer feature set the extra features can be offered as a +add-on library if required. + +The wl_api is implemented by two libraries. The core library is +compiled for a hardware platform and is independent of operating +system or IP stack. The core library contains all WiFi +functionality. The core library is supported by a suite of transport +libraries. The transport libraries implements the hardware +communication layer and are specific to the type of hardware interface +used to connect the host platform to the WiFi hardware. For example, +there are transport libraries for SPI and for SDIO. Only the core +library has a public interface (wl_api.h) but applications will need +to link with both the core library and a transport library matching +the hardware configuration. + +\section wl_api_princ Operation Principles + +There are three important properties of wl_api to keep in mind when +programming with it. + +The first is that wl_api is \b asynchronous. For instance, when the +\a wl_connect() function is called to attempt connection with an access +point it will trigger a sequence of packets being exchanged with the +access point after which, if everything is okay, a connection has been +established. The \a wl_connect() call is asynchronous (or non-blocking) +which means that you don't know if the connection attempt has +succeeded after the call returns. You only know if the sequence was +successfully started or not. To find out if, and when, the connection +attempt was successful you must register an event handler using the +function \a wl_register_event_cb(). This is true of a number of API calls +(which is indicated in their documentation). + +The second important property is that wl_api is \b polled. wl_api +never executes "by itself", since it would then have to support +interrupts, timers, locks and other operating system dependent +features. Instead all asynchronous processes proceed when wl_api is +polled by calling the \a wl_tick() function. When \a wl_tick() is called +wl_api reacts to any received management frames, expires any internal timers and +performs any other tasks necessary for forward progress. After +\a wl_tick() returns nothing will happen unless it or some other wl_api +function is called again. Also, to send and receive data, the \a wl_process_rx() +and \a wl_process_tx() must be invoked upon reception and transmission of data. + +The third important property is that wl_api is \b not \b thread \b safe. +All wl_api calls must execute in the same context since the +library has no knowledge of the locking mechanisms available (if any). + +\section wl_api_code_examples A note on the code examples + +The code examples illustrate how to call the different wl_api functions. +They do not constitute a complete program. Functions with the prefix "app_" +in the code examples are application specific calls that illustrate a +particular action. These functions are not part of the API and will have +to be implemented if needed. For a complete working code example see +one of the H&D Wireless software reference designs, such as the WiFi HTTP +server demo code in the Atmel Software Framework. + +The API is structured into these functional groups: + +\li \ref wl_api +\li \ref wl_wifi +\li \ref wl_data +\li \ref wl_transport +\li \ref wl_custom + +Also documented here is the transport layers for SPI and SDIO. +There interfaces are only necessary when porting the library to +a new hardware platform. + +\li \ref wl_spi +\li \ref wl_sdio + + * \section contactinfo Contact Information + * For further information, visit + * H&D Wireless.\n + * Support and FAQ: http://www.atmel.com/ + */ + +#ifndef WL_API_H +#define WL_API_H + +#define WL_API_RELEASE_NAME "v2.7.0" + +/*! Maximum size of a SSID */ +#define WL_SSID_MAX_LENGTH 32 +/*! Size of a MAC-address or BSSID */ +#define WL_MAC_ADDR_LENGTH 6 +/*! Maximum length of a passphrase */ +#define WL_MAX_PASS_LEN 64 +/*! Indicates that there is no SNR information */ +#define WL_SNR_UNKNOWN -128 + +#define SPB104 104 +#define SPB105 105 + +/*! \ingroup wl_api + * API Error codes */ +typedef enum { + WL_FAILURE = -1, + WL_SUCCESS = 1, + WL_NOEFFECT, + WL_OOM, + WL_INVALID_LENGTH, + WL_NOT_SUPPORTED, + WL_ABSORBED, + WL_RESOURCES, + WL_BUSY, + WL_RETRY, /*!< Retry the operation later. The driver is busy + resolving an operation that conflicts with the + request. */ + WL_INVALID_ARGS, + WL_AVAIL, + WL_CARD_FAILURE, /*!< Could not detect SPB device */ + WL_FIRMWARE_INVALID, /*!< Invalid firmware data */ + +} wl_err_t; + +/*! \ingroup wl_wifi + * Event identifiers */ +enum wl_event_id_t { + WL_EVENT_MEDIA_CONNECTED = 0, + WL_EVENT_CONN_FAILURE, + WL_EVENT_MEDIA_DISCONNECTED, + WL_EVENT_SCAN_COMPLETE, + WL_EVENT_FAILURE, + MAX_WL_EVENT +}; + +/*! \ingroup wl_wifi + * Authentication modes */ +enum wl_auth_mode { + AUTH_MODE_INVALID, + AUTH_MODE_AUTO, + AUTH_MODE_OPEN_SYSTEM, + AUTH_MODE_SHARED_KEY, + AUTH_MODE_WPA, + AUTH_MODE_WPA2, + AUTH_MODE_WPA_PSK, + AUTH_MODE_WPA2_PSK +}; + +/*! \ingroup wl_wifi + * Encryption modes */ +enum wl_enc_type { /* Values map to 802.11 encryption suites... */ + ENC_TYPE_WEP = 5, + ENC_TYPE_TKIP = 2, + ENC_TYPE_CCMP = 4, + /* ... except these two, 7 and 8 are reserved in 802.11-2007 */ + ENC_TYPE_NONE = 7, + ENC_TYPE_AUTO = 8 +}; + +enum wl_host_attention_mode { + WL_HOST_ATTENTION_SDIO = 0x1, /*!< For SDIO or polled SPI */ + WL_HOST_ATTENTION_SPI = 0x5a /*!< For SPI with interrupt line */ +}; + +/*! \ingroup wl_wifi + * Event descriptor +*/ +struct wl_event_t { + enum wl_event_id_t id; /**< Event identifier. */ + +}; + +/*! \ingroup wl_wifi + * Infrastructure (ESS) or Ad-hoc (IBSS) connection modes. + */ +enum wl_conn_type_t { + WL_CONN_TYPE_INFRA, /*!< For infrastructure mode (default) */ + WL_CONN_TYPE_ADHOC /*!< For ad-hoc mode */ +}; + +/* Note: + * If your environment does not have stdint.h you will have to + * define the fixed-width integer types specified in that file + * yourself, make sure that those definitions are included + * before any inclusions of wl_api.h, and build with the macro + * WITHOUT_STDINT defined. In this case the wl_api library + * must have been built with the same integer type definitions. + */ + +#ifndef WITHOUT_STDINT +#include +#endif + +/* Note: + * If your environment does not have stdio.h you will have to define + * the size_t type yourself, make sure that that definition is + * included before any inclusions of wl_api.h, and build with the + * macro WITHOUT_STDIO defined. In this case the wl_api library must + * have been built with the same size_t type definition. + */ +#ifndef WITHOUT_STDIO +#include +#endif + +/*! \ingroup wl_wifi + * + * \brief SSID representation. + * + * The SSID is a binary string and cannot be treated as a + * C-string safely. An empty SSID is represented by a + * SSID struct with the len field set to 0. + */ +struct wl_ssid_t +{ + char ssid[WL_SSID_MAX_LENGTH]; /**< Octet array containing the SSID data. */ + uint8_t len; /**< Length of valid data in ssid member. + * Cannot be longer than WL_SSID_MAX_LENGTH. */ +}; + +/*! \ingroup wl_wifi + * + * MAC-address/BSSID representation + * + * A broadcast BSSID is one with all octets set to 0xFF. + */ +struct wl_mac_addr_t +{ + uint8_t octet[WL_MAC_ADDR_LENGTH]; /**< Octet array containing the MAC address + * data. This array is always WL_MAC_ADDR_LENGTH bytes. + */ +}; + +/*! \ingroup wl_wifi + * + * Network representation + * + */ +struct wl_network_t +{ + struct wl_ssid_t ssid; /**< The SSID of the network. */ + struct wl_mac_addr_t bssid; /**< The BSSID of the network. */ + uint8_t channel; /**< The wlan channel which the network uses */ + uint32_t beacon_period; /**< Beacon period for the network */ + uint16_t dtim_period; /**< DTIM period for the network */ + int32_t rssi; /**< Received Signal Strength in dBm (measured on beacons) */ + int32_t snr; /**< Received Signal to noise ratio in dBm (measured on beacons) */ + uint8_t enc_type; /**< The encryption type used in the network. */ + + enum wl_conn_type_t net_type; /**< Type of network (Infrastructure or Ad-Hoc */ + size_t ie_len; /**< Always 0 unless wl_api has been built with WL_CONFIG_WPA_SUPPLICANT */ + + uint8_t ie[0]; /**< Not used unless wl_api has been built with WL_CONFIG_WPA_SUPPLICANT */ +}; + +/*! \ingroup wl_wifi + * Network list representation. Array of pointers to wl_network_t entries. + * + */ +struct wl_network_list_t +{ + struct wl_network_t **net; /**< The list of pointers to networks */ + size_t cnt; /**< Number of networks */ +}; + +#define WL_RATE_1MBIT 2 +#define WL_RATE_2MBIT 4 +#define WL_RATE_5_5MBIT 11 +#define WL_RATE_6MBIT 12 +#define WL_RATE_9MBIT 18 +#define WL_RATE_11MBIT 22 +#define WL_RATE_12MBIT 24 +#define WL_RATE_18MBIT 36 +#define WL_RATE_22MBIT 44 +#define WL_RATE_24MBIT 48 +#define WL_RATE_33MBIT 66 +#define WL_RATE_36MBIT 72 +#define WL_RATE_48MBIT 96 +#define WL_RATE_54MBIT 108 +#define WL_RATE_NUM_RATES 14 +#define WL_RATE_INVALID WL_RATE_NUM_RATES + +/*! \ingroup wl_wifi + * + * Rate representation + * + */ +typedef uint8_t wl_rate_t; + +/** \defgroup wl_api Library support functions + * + * These functions manage the library in general. They concern initalizing + * the library, downloading firmware to the WiFi chip and handling events + * from the library. + +For this example we assume that the application is running stand-alone +without an operating system. + +Before the library can do anything it needs to start up the WiFi +hardware by downloading a firmware image. The firmware image is +relatively big (around 144kB) and is therefore not included in the library +it is only needed once. It is up to the application to decide where to +store the firmware image and how to read it into the wl_api library. + +Step one is to write a function of the type \a ::wl_fw_read_cb_t +that wl_api will call to retrive the firmware image. Assuming that you +have some spare RAM (or whatever memory type is used for read only +data, such as FLASH memory) on your platform you can simply include +the firmware image from the \a wl_fw.h header file and write a +firmware read function like this + +\code +static size_t fw_read_cb(void* ctx, + uint8_t** buf, + size_t offset, + size_t len) +{ + if ( NULL == buf ) { + return 0; + } + *buf = ((uint8_t*) fw_buf) + offset; + if ( len > ( fw_len - offset ) ) { + return fw_len - offset; + } + return len; +} + +\endcode + +If the firmware image is stored in ROM this function may have to read +it back block by block instead. + +First, firmware must be downloaded to the device + +\code +if ( wl_transport_init(fw_read_cb, NULL, &mode) != WL_SUCCESS ) { + app_error("Firmware download failed"); + return 0; +} +\endcode + +The wl_api library is then initialized like this + +\code +if ( wl_init(NULL, init_complete_cb, mode) != WL_SUCCESS ) { + app_error("Init failed"); + return 0; +} +\endcode + +The library startup process will now require \a wl_poll() to be called +a number of times before it can complete. In addition, if the +application needs to know when the startup process has completed so +that it can, for example, start up an IP stack it will have to supply +a valid callback function of the type \a ::wl_init_complete_cb_t as a parameter +to the \a wl_init() call and start polling the wl_api library. + +The init complete callback will only be executed during a call to \a wl_poll() +or another wl_api function. This simplifies the implementation since no +internal locking is required and the wl_api library becomes OS-independent. + +\code +static void init_complete_cb(void* ctx) { + init_ip_stack(); +} +\endcode + +Registering the event callback is straightforward : + +\code +if (wl_register_event_cb(event_cb, NULL) != WL_SUCCESS) { + app_error("Failed to register event handler"); + return 0; +} +\endcode + +Similar to \a wl_poll(), there is also a \a wl_tick() function that takes a +free running "tick" counter with millisecond resolution as an argument so +that it can trigger internal timers when necessary. Assuming that such a tick +counter is provided by the macro GET_MS_TICK() the wl_api execution loop becomes + +\code +while (TRUE) { + wl_tick(GET_MS_TICK()); + wl_poll(); +} +\endcode + +In a stand-alone application this loop would usually be the main application +loop and include application specific calls as well. + +After some number of main loop iterations the init_complete_cb will be +invoked and the application can initialize its IP stack. + + * @{ + */ + +/*! \brief WiFi event callback. + * + * This function receives WiFi events that the application + * wants notification of. This function is supplied by the user + * of the API. + * + * @param event Struct describing the type of event and, for some + * events, additional information regarding the + * status of the event. See wl_event_t for additional + * information. + * @param ctx A context handle. This handle is passed + * untouched to the callback and has the same value + * as the context registered with the callback in + * wl_register_event_cb(). + */ +typedef void (*wl_event_cb_t) (struct wl_event_t event, void* ctx); + + +/*! \brief Initialization complete callback function. + * + * Invoked when WiFi initialization is complete. + * + * @param ctx Opaque context pointer as provided to \a wl_init() that will be + * passed back to the callback. + */ +typedef void (wl_init_complete_cb_t)(void* ctx); + + +/*! \brief Register an event handler. + * + * Register an event handler with the driver. This + * event handler will be called whenever a event + * listed in #wl_event_id_t occurs. + * See #wl_event_cb_t and #wl_event_id_t for more details. + * + * @param cb Event callback function to register. + * @param ctx Opaque context pointer that will be + * passed to the callback when it is + * invoked. This parameter is never + * accessed by the API. + * @return WL_SUCCESS + */ +wl_err_t wl_register_event_cb(wl_event_cb_t cb, void* ctx); + +/*! \brief Initialize the wl_api library. + * + * Note that \a wl_poll() must be called for this function to progress + * towards complete init + * + * The startup process will proceed asynchronously and will inkove + * init_complete_cb when completed. The callback will not be invoked if any + * error occurs during initialization. + * + * This function should be called after firmware has been downloaded to the + * device. + * + * @param ctx Opaque context pointer that will be passed to the callback + * when invoked. This parameter is never accessed by the API. + * @param init_complete_cb callback function to invoke when initialization is + * complete. + * @param mode Indicates the host attention mode used by the device. If + * \a wl_transport_init() was used to download the firmware image to the + * device, the proper mode can be obtained from the mode parameter of + * that function. + * + * @return + * - WL_SUCCESS + * - WL_FAILURE + */ +wl_err_t wl_init(void* ctx, wl_init_complete_cb_t init_complete_cb, + enum wl_host_attention_mode mode); + + +/*! \brief Shutdown the wl_api library and free resources. + * + * \a wl_init() must be invoked to startup the library + * again. + * + * @return + * - WL_SUCCESS on success + * - WL_FAILURE + * + */ +wl_err_t wl_shutdown(void); + + +/*! \brief WiFi driver timer tick function + * + * Periodic timers are triggered from this function so it should be called as + * often as possible if precision timing is required (traffic timeouts, + * authentication timeouts etc). + * + * @param tick A tick count in us. This is used to expire timers + * in the driver. + */ +void wl_tick(uint32_t tick); + +/*! @} */ + + +/** \defgroup wl_wifi Connection Management + * + * These functions access WiFi-specific functionality such as + * scanning, connect/disconnect, authentication and encryption, + * and power save modes. + * + +\section scanning Scanning + +To scan all channels that are available in the current regulatory +domain + +\code + if ( wl_scan() != WL_SUCCESS ) { + // May be busy scanning already, no fatal error + return 0; + } +\endcode + +Since wl_scan() only starts the scanning process the application +should add code to the event handler to catch the "scan complete" event +and retrieve the list of seen networks from the library + +\code +static void event_cb(struct wl_event_t event, void* ctx) { + switch(event.id) { + case WL_EVENT_SCAN_COMPLETE: + struct wl_network_list_t *netlist; + uint8_t netcnt; + + wl_get_network_list(&netlist); + netcnt = netlist->cnt; + while (--netcnt) { + print_network(netlist->net[netcnt]); + } + break; + } +} +\endcode + +The function print_network() could display the network name, the SSID, in +a user interface. It is important to keep in mind is that despite the fact +that the SSID is usually presented as a ASCII string, it is +in fact just a byte string and can legally contain all kinds of +non-printable characters, including a 0-byte. This means that it is +easy to end up with buffer overrun bugs if the SSID is ever treated +as a normal string without precautions. + +\code +void print_network(struct wl_network_t* wl_network) +{ + char ssid[WL_SSID_MAX_LENGTH + 1]; + memset(ssid, 0, sizeof(ssid)); + memcpy(ssid, wl_network->ssid.ssid, wl_network->ssid.len); + if (app_is_printable(ssid)) { + app_print("\"%s\" ", ssid); + } + else { + app_print(" "); + } + switch (wl_network->enc_type) { + case ENC_TYPE_WEP : + app_print("(WEP encryption)"); + break; + case ENC_TYPE_TKIP : + app_print("(TKIP encryption)"); + break; + case ENC_TYPE_CCMP : + app_print("(CCMP encryption)"); + break; + } + app_print("\n"); +} +\endcode + +\section connecting Connecting + +To connect to an access point (beware binary SSIDs) the connection process +must be started + +\code + if ( wl_connect("My AP", strlen("My AP")) + != WL_SUCCESS ) { + app_error("Connection failed.\n"); + return 0; + } +\endcode + +and the \a WL_EVENT_MEDIA_CONNECTED and \a WL_EVENT_CONN_FAILURE events should be +caught. To detect that a connection is terminated after it has been successfully established +(such as when the AP goes out of range) the \a WL_EVENT_MEDIA_DISCONNECTED event +must be also be caught + + +\code +static void event_cb(struct wl_event_t event, void* ctx) { + switch(event.id) { + case WL_EVENT_SCAN_COMPLETE: + struct wl_network_list_t *netlist; + uint8_t netcnt; + + wl_get_network_list(&netlist); + netcnt = netlist->cnt; + while (--netcnt) { + print_network(netlist->net[netcnt]); + } + break; + case WL_EVENT_CONN_FAILURE: + app_error("Connection failed\n"); + break; + case WL_EVENT_MEDIA_CONNECTED: + app_print("Connected to Access Point\n"); + app_ip_interface_up(); + break; + case WL_EVENT_MEDIA_DISCONNECTED: + app_print("Disconnected from Access Point\n"); + app_ip_interface_down(); + break; + } +} +\endcode + +\section security Security + +To use WEP a WEP key must be added before the connection is initiated. +To set the 40-bit WEP key 0xDEADBEEF00 as default key for key index 0 do + +\code + char key[5] = { 0xDE, 0xAD, 0xBE, 0xEF, 0x00 }; + struct wl_mac_addr_t bssid; + + // This means that the bssid is a broadcast bssid and the WEP key will be a default key instead of a key-mapping key. + memset(&bssid.octet, 0xff, sizeof bssid.octet); + + if ( wl_add_wep_key(0, sizeof key, key, &bssid) + != WL_SUCCESS ) { + app_error("Failed to add WEP key."); + return 0; + } +\endcode + +To use WPA/WPA2 with a Pre-shared key a passphrase must be associated +with the network before the connection is initiated. + +\code + struct wl_network_t net; + char passphrase[] = "MySecretKey"; + + memset(&net, 0, sizeof net); + memset(net.bssid.octet, 0xFF, sizeof net.bssid.octet); + strncpy(net.ssid.ssid, "My AP", strlen("My AP")); + net.ssid.len = strlen("My AP"); + net.enc_type = ENC_TYPE_AUTO; + if (wl_set_passphrase(&net, + passphrase, + strlen(passphrase), + ENC_TYPE_AUTO, + AUTH_MODE_AUTO) + != WL_SUCCESS) { + app_error("Failed to add passphrase"); + } +\endcode + +The library supports several passphrase-network associations to be +configured simultaneously. Be aware that the \a wl_connect() call +can take up to 15 seconds longer than normal when using a pre-shared +WPA/WPA2 key since the platform must calculate a temporal encryption +key from the passphrase before the connection attempt can start. + + * @{ + */ + + +/*! \brief Scan all channels. + * + * Starts a scan of all WiFi channels allowed in this regulatory + * domain. The list of allowed channels (the domain) is adapted to the + * channels announced as allowed by the first AP heard. + * + * The scan will proceed asynchronously and will raise a + * WL_EVENT_SCAN_COMPLETE event when completed. + * + * Currently, there's a limit on the scan list size that depends on the + * architecture (6 networks for the AVR32 UCR1 architecture 16 networks for + * other architectures. If more network exist, the strongest networks are + * chosen. Note that the limitation on the scan list size does not limit the + * networks which the device can connect to. See wl_connect() for more + * details. + * + * @return + * - WL_SUCCESS + * - WL_FAILURE. + */ +wl_err_t wl_scan(void); + +/*! \brief Get the list of currently known networks. + * + * Retrieves the list of currently known networks from + * the driver. To ensure that this list is up-to-date + * a wl_scan() call should be issued and this function + * should be called upon reception of the WL_EVENT_SCAN_COMPLETE + * event. This function can be called at other times + * but the list of networks retrieved then might not + * correspond to the networks actually in range. + * + * Note that a successful scan does not necessarily + * find any networks. + * + * @param network_list Output buffer. The API call returns + * a pointer to allocated memory containing the network list. + * @return + * - WL_SUCCESS + * - WL_FAILURE. + */ +wl_err_t wl_get_network_list(struct wl_network_list_t **network_list); + +#ifdef WFE_6_12 +/*! \brief Start a Ad-hoc network. + * + * Attempt to start a Ad-hoc (IBSS) network. If a Ad-hoc network + * is successfully started then a WL_EVENT_MEDIA_CONNECTED event + * will be raised once the first peer station connects to the Ad-hoc + * network (and not when the network is announced on the air). + * + * If a Ad-hoc network should be started with encryption + * enabled then \a wl_set_passphrase() should be called before + * \a wl_start_adhoc_net() to configure the security parameters. + * The Ad-hoc network is started with the security parameters + * (if any) that was configured for the specified \a ssid. + * + * @param ssid The SSID of the new network. If there's a network + * already present with this SSID this call will fail. + * @param channel The channel to use. Valid channels are 1-14 + * @param auth_mode The authentication mode to use. Supported + * authentication modes for Ad-hoc networks are + * AUTH_MODE_OPEN_SYSTEM and AUTH_MODE_SHARED_KEY. + * Passing other modes will cause a WL_INVALID_ARGS return. + * If AUTH_MODE_SHARED_KEY is used then a valid WEP + * key must be set with a call to \a wl_add_wep_key() + * and the default WEP key index must be set with a + * call to \a wl_set_default_wep_key(). + * @return + * - WL_SUCCESS on success. + * - WL_INVALID_ARGS if the ssid is malformed, if + * the channel not valid or if the authentication mode + * is invalid. + * - WL_RETRY if the driver is busy resolving a conflicting + * operation. The operation should be retried after a wait + * (at least one call to wl_poll() for polled implementations). + * - WL_BUSY if the driver is already connected or if a network + * with the same SSID is already known. + * + */ +wl_err_t wl_start_adhoc_net(struct wl_ssid_t ssid, + uint8_t channel, + enum wl_auth_mode auth_mode); +#endif +/*! \brief Connect to a SSID. + * + * Attempt to connect to a given SSID. If the driver is already + * connected to an AP with a different SSID then this call will + * return WL_BUSY and wl_disconnect() should be called before + * trying again. + * + * The connection process will proceed asynchronously and will raise a + * WL_EVENT_MEDIA_CONNECTED event when completed, or a WL_EVENT_CONN_FAILURE + * when failed. After a WL_EVENT_MEDIA_CONNECTED event has been raised + * a WL_EVENT_MEDIA_DISCONNECT event will be raised if the connection is + * terminated. Note that this can be caused by external factors and can + * happen at any time. + * + * If wl_connect() is invoked with a network that is not shown in the + * scan list, the device will probe for that specific network and connect + * to it, if found. This is also the method to use in order to connect to + * "hidden" networks (AP's that doesn't broadcast its SSID). + * + * @param ssid Pointer to the SSID string. + * Freed by caller. + * @param ssid_len Length of the SSID string in octets. Max value is 32. + * @return + * - WL_SUCCESS + * - WL_FAILURE if the network could not be found + * - WL_BUSY if the driver is already connected + * - WL_RETRY if the driver is busy resolving a conflicting operation. + * The operation should be retried after a wait (at least one call to wl_poll() + * for polled implementations). + */ +wl_err_t wl_connect(char* ssid, size_t ssid_len); + +/*! \brief Connect to a BSSID + * + * Attempt to connect to a given BSSID. If the driver is already + * connected to an AP with a different BSSID then this call will + * return WL_BUSY and wl_disconnect() should be called before + * trying again. + * + * The connection process will proceed asynchronously and will raise a + * WL_EVENT_MEDIA_CONNECTED event when completed, or a WL_EVENT_CONN_FAILURE + * when failed. After a WL_EVENT_MEDIA_CONNECTED event has been raised + * a WL_EVENT_MEDIA_DISCONNECT event will be raised if the connection is + * terminated. Note that this can be caused by external factors and can + * happen at any time. + * + * If wl_connect_bssid() is invoked with a network that is not shown in the + * scan list, the device will probe for that specific network and connect + * to it, if found. + * + * @param bssid Pointer to the BSSID. Freed by caller. + * @return + * - WL_SUCCESS + * - WL_FAILURE if the network could not be found + * - WL_BUSY if the driver is already connected + * - WL_RETRY if the driver is busy resolving a conflicting operation. + * The operation should be retried after a wait (at least one call to wl_poll() + * for polled implementations). + */ +wl_err_t wl_connect_bssid(struct wl_mac_addr_t bssid); + +/*! \brief Disconnect from the network + * + * Disconnect from any currently associated network. + * + * The disconnection process will proceed asynchronously and will raise a + * WL_EVENT_MEDIA_DISCONNECTED event when completed. + * @return + * - WL_SUCCESS if the disconnect process was started + * - WL_FAILURE if the driver was not connected + * - WL_RETRY if the driver is in the process of connecting. + * In this case the disconnect must be retried after + * the connection attempt has completed (resulted in a + * WL_EVENT_MEDIA_CONNECTED or a WL_EVENT_CONN_FAILURE event). + */ +wl_err_t wl_disconnect(void); + +/*! + * @brief Add a WEP encryption key to the device. + * + * Configure a key into the device. The key type (WEP-40, WEP-104) + * is determined by the size of the key (5 bytes for WEP-40, 13 bytes for WEP-104). + * + * @param key_idx The key index to set. Valid values are 0-3. + * @param key_len Length of key in bytes. Valid values are 5 and 13. + * @param key Key input buffer. + * @param bssid BSSID that the key applies to. If this is + * the broadcast BSSID then the key is configured + * as one of the default keys (not _the_ default key, + * this must be set by calling set_default_wep_key() + * after adding it). If the BSSID is a valid unicast + * bssid then the key is configured as a key-mapping + * key ( See 802.11-2007 8.2.1.3 ). + * @return + * - WL_SUCCESS on success. + * - WL_INVALID_LENGTH if the key length is bad. + * - WL_FAILURE on failure + */ +wl_err_t wl_add_wep_key(uint8_t key_idx, + size_t key_len, + const void *key, + struct wl_mac_addr_t *bssid); + +/*! @brief Set the default WEP key index. + * + * Select which WEP key to use for transmitted packets. + * For this to work correctly you must have added a WEP + * key with \a wl_add_wep_key() as a default key, using the + * same index as the one set in this call. + * @param key_idx Index of the key to make the default key. + * Valid values are 0-3. + * @return WL_SUCCESS or WL_FAILURE. + */ +wl_err_t wl_set_default_wep_key(uint8_t key_idx); + +/*! \brief Delete a WEP key. + * + * Deletes a WEP key from the driver. + * + * @param key_idx The index of the key to delete. Valid values are 0-3. + * @param bssid BSSID that the key applies to. If this is + * the broadcast BSSID then the key deleted is a default key. + * If the BSSID is a valid unicast bssid then the deleted + * key is a key-mapping key. + * @return WL_SUCCESS or WL_FAILURE + */ +wl_err_t wl_delete_wep_key(uint8_t key_idx, struct wl_mac_addr_t *bssid); + +/*! @brief Set a WPA/WPA2 passphase + * + * Associate a WPA/WPA2/RSN passphrase with a network. + * The number of passphrases that can be stored can + * vary but is always at least one. Passphrases can + * be added until \a wl_add_wpa_passphrase() returns + * WL_RESOURCES. + * + * @param net Network with which to associate the passphrase. + * @param passphrase Passphrase. Valid characters in a passphrase + * must lie between ASCII 32-126 (decimal). + * @param len Length of passphrase. Valid lengths are 8-63. + * @param enc_type Encryption type. If this is set to ENC_TYPE_AUTO + * then the most secure supported mode will be automatically + * selected. Normally you only need to pass something else here + * if you need to enforce picking a certain encryption mode when + * the network supports several modes and you don't want to use + * the best one. + * @param auth_mode Authentication mode. If this is set to AUTH_MODE_AUTO + * then the most secure mode will be automatically selected. + * Normally you only need to pass something else here if the network + * announces support for both WPA and WPA2/RSN and the passphrases are + * different. + * @return + * - WL_SUCCESS + * - WL_INVALID_ARGS if the passphrase length is invalid. + * - WL_RESOURCES if no more passphrases can be added. + */ +wl_err_t wl_set_passphrase(const struct wl_network_t *net, + const char *passphrase, + const size_t len, + const enum wl_enc_type enc_type, + const enum wl_auth_mode auth_mode); + +/*! @brief Remove a WPA/WPA2 passphase + * + * Remove a WPA/WPA2/RSN passphrase associated with a network. + * + * @param net Network with which to associate the passphrase. + * If net is NULL then all stored passphrases will be + * cleared. + * @return + * - WL_SUCCESS + * - WL_FAILURE if no passphrase was associated with the net. + */ +wl_err_t wl_clear_passphrase(struct wl_network_t *net); + + +/*! \brief Enable legacy power save mode + * + * Enable legacy power save mode. In legacy power save mode, the device + * will power down when idle. When connected, the device will wake up to + * receive beacon frames and any buffered data from the AP. The response + * time when legacy power save is enabled might therefore be as long as the + * AP beacon interval (mostly 100 ms). However, the throughput should not + * be affected. + * + * @return WL_SUCCESS or WL_FAILURE. + */ +wl_err_t wl_enable_ps(void); + +/*! \brief Disable legacy power save mode + * + * @return WL_SUCCESS or WL_FAILURE. + */ +wl_err_t wl_disable_ps(void); + +/*! \brief Configure power save parameters. + * + * @param use_ps_poll Use PS-Poll frames to retrieve buffered data. Any changes + * to this parameter will take effect upon next connect + * or when power save is enabled through wl_enable_ps(). + * Note: To retrieve one buffered packet, the ps poll scheme + * needs one ps poll packet to the AP instead of two null + * packets in the power management bit scheme. Ps poll avoids + * the overhead of traffic monitoring time in active mode as + * well. But since each ps poll request can make the AP + * release only one buffered packet, it is not the optimal + * scheme for applications with heavy downlink traffic. + * @param ps_traffic_timeout Timeout in [ms] to wait for more buffered data + * from AP. This setting has no effect if + * use_ps_poll is 1. Any changes to this parameter + * will take effect immediately. + * @param ps_delay Power save will de delayed ps_delay [ms] after connecting to + * an AP. + * @param rx_all_dtim If set to 1, then STA will wake up to listen to every + * beacon containing DTIM (delivery traffic indication messages) when + * connected. The actual DTIM interval is configured in the AP. + * If the DTIM interval, as configured in the AP, is larger than + * \a listen_interval, the STA will wakeup according to the + * \a listen_interval parameter. + * @param listen_interval The Listen Interval field is used to indicate to the + * AP how often a STA in power save mode wakes to listen + * to beacon frames. The value of this parameter is expressed in units + * of Beacon Interval. An AP may use the Listen Interval information in + * determining the lifetime of frames that it buffers for a STA. + * Any changes to this parameter will take effect upon next association. + * + * @return WL_SUCCESS or WL_FAILURE. + */ +wl_err_t wl_conf_ps(uint8_t use_ps_poll, + uint32_t ps_traffic_timeout, + uint32_t ps_delay, + uint8_t rx_all_dtim, + uint16_t listen_interval); + +/*! \brief Get the interface MAC address. + * + * Return the 802.3 MAC address of the network interface. + * + * @param buf Output buffer. It must be at least WL_MAC_ADDR_LENGTH + * bytes long and only the first WL_MAC_ADDR_LENGTH bytes + * will contain valid data. + * @return + * - WL_FAILURE if the interface is not up. + * - WL_SUCCESS + */ +wl_err_t wl_get_mac_addr(uint8_t* buf); + +/*! \brief Return the associated network. + * + * Return the description of the currently associated + * network, if any. + * + * @return The network description, or NULL of the driver + * is unconnected. + */ +struct wl_network_t* wl_get_current_network(void); +/*! @} */ + +/** \defgroup wl_data Data Transfer + * + * \brief Packet processing interface. + * + * Note that the examples in this group assumes that the transport library + * functions in the \a wl_transport group are being used. For more information, + * See the documentation for those functions in the \a wl_transport group. + +For the IP stack integration you need to intercept received packets so +they can be sent up the stack and to transmit packets coming down the +stack. + +By default the wl_api library discards all data packets. To receive +them the application must register a rx interrupt service routine (isr) +using the \a wl_register_rx_isr() function. + +\code +static void rx_isr(void* ctx) { + rx_pending = TRUE; +} +\endcode + +Since the rx_isr() function is only called in interrupt context, it is not +safe to perform the actual read directly from rx_isr(). If an OS is used, +the normal case is to signal a receiver thread to invoke the ip stack +read function to read the pending data. In a system that runs without an OS +(as in the example), a flag is set to indicate that wl_rx() can be invoked +from the ip stack read function next time the ip stack is polled. +The beginning of a ip stack read function can look like this + +\code +static void ip_stack_rx_pkt() { + char *pkt = malloc(MAX_PKT_SIZE); + uint16_t len = MAX_PKT_SIZE; + + if (p == NULL) { + app_error("Out of memory."); + return; + } + wl_rx(pkt, &len); + if (0 == len) { + app_error("Packet reception failed."); + free(pkt); + return + } +} +\endcode + +Since the ip_stack_rx_pkt() function should only be called when there is +actually a packet ready to read you do not have to check the return value +from \a wl_rx() since it only returns failure if there is no packet ready to +read. + +A packet arriving from the WiFi interface can be either a data +packet or a message from the WiFi hardware to the WiFi driver +(which is implemented by the wl_api library). This means that +wl_api must process every packet to decide if it is an internal +message or a data frame that +should be passed up to the application. Data packets are +prefixed with an extra header containing some administrative +information, and may be followed by padding bytes and so +wl_api also needs to strip the extra header and any padding +before the packet can be safely ingested by the IP stack. +All this happens in the function \a wl_process_rx() which \b must +be called on every packet received by a call to \a wl_rx(). + +Continuing the ip_stack_rx_pkt() example + +\code + { + char* stripped_pkt; + size_t stripped_pkt_len; + uint16_t vlan; + int status; + + status = wl_process_rx(pkt, + len, + &stripped_pkt, + &stripped_pkt_len, + &vlan); + if (WL_ABSORBED == status) { + // This is normal. The packet was a + // wl_api-internal message. + free(pkt); + return; + } + app_ip_stack_input(stripped_pkt, + stripped_pkt_len, + vlan); + free(pkt); + } +} +\endcode + +If \a wl_process_rx() decides that the packet was a command it processes +it and returns \a WL_ABSORBED to signal that the packet should +not be used by anyone else. Otherwise stripped_pkt is +pointing to the beginning of a 802.3 Ethernet frame of length +stripped_pkt_len. If the IP stack supports VLAN and QoS +the extra VLAN tag should be passed to the IP stack +together with the packet. For IP stacks without this support the VLAN tag +contents can safely be ignored, but it must still be filled in by \a wl_process_tx(). + +To register the receive isr + +\code + wl_register_rx_isr(rx_isr, NULL); +\endcode + +Transmitting data packets happens in a similar way but does not +require a callback/isr since the application/IP stack knows when it has +packets to send. + +\code +int ip_stack_tx_pkt(char *pkt, size_t len, uint16_t vlan_tag) { + int status; + char wlan_hdr[WL_HEADER_SIZE]; + // The packet must have an Ethernet header + if (len < ETHERNET_HEADER_SIZE) { + app_error("Invalid packet length"); + return 0; + } + hdr_len = sizeof wlan_hdr; + status = wl_process_tx(pkt, + ETHERNET_HEADER_SIZE, + len, + wlan_hdr, + vlan_tag, + NULL); + if ( WL_SUCCESS != status ) { + app_error("Packet processing failed"); + return 0; + } + // Transmit the header first + if (wl_tx(wlan_hdr, hdr_len) != WL_SUCCESS) { + app_error("Header transmission failed"); + return 0; + } + // Then transmit the data packet + if (wl_tx(pkt, len) != WL_SUCCESS) { + app_error("Packet transmission failed"); + return 0; + } +} +\endcode + +The final piece of the puzzle in the IP stack integration is +the MAC address of the WiFi interface + +\code + char mac_addr[WL_MAC_ADDR_LENGTH]; + + wl_get_mac_addr(mac_addr); + ip_stack_set_mac_address(mac_addr); +\endcode + + * @{ + */ + +/*! Size of the wl_api packet header */ +#ifdef WFE_6_12 +#define WL_HEADER_SIZE 16 +#else +#define WL_HEADER_SIZE 14 +#endif + +/*! Maximum packet size (including wl_api headers and paddings) + * + * Maximum packet size is obtained with the following data: + * + * 1500 bytes of Ethernet payload (MTU) + 14 bytes of Ethernet header + + * WL_HEADER_SIZE of wl header. This data is then size-aligned to 16. + * + */ +#define WL_MAX_PKT_LEN 1536 + + +/*! + * \brief Process rx packet. + * + * Processes a raw rx packet by unencrypting it (if necessary) + * and stripping headers so as to output a 802.3 frame. + * + * wl_process_rx() will strip bytes both from the head and from the tail. + * + * Upon return from wl_process_rx(), the pointer at stripped_pkt will + * point to the start of the Ethernet header, hence adjusting the offset + * by WL_HEADER_LEN bytes. Any padding (added by the wifi device) will + * be removed from the tail of the packet, hence making len smaller. + * + * The wl_api library of the device will not perform any Ethernet padding + * removal. The padding removal performed by wl_process_rx() is only for + * the padding used in the protocol shared by the host and the device. + * This padding is mainly there to ensure that the host does not have to + * deal with rx of odd-sized data buffers (which some DMA's have problems + * to handle). + * + * @param pkt Input buffer (raw packet) + * @param pkt_len Length of the input buffer (in bytes) + * @param stripped_pkt Pointer to the packet with the + * transport header stripped. + * @param stripped_pkt_len Length of the stripped packet. + * @param vlanid_prio VLAN ID and 802.1p priority value + * using following format: + * 
+ *        1
+ *  5|432109876543|210
+ *  -+------------+---
+ *  0|   VLANID   |PRI
+ *
+ * + * @returns + * - WL_FAILURE + * - WL_ABSORBED if the packet was an internal driver command + * and not a proper data packet. The packet should + * be freed and the stripped_pkt will not point + * to a valid packet. + * - WL_SUCCESS + */ +wl_err_t wl_process_rx(char *pkt, size_t pkt_len, char **stripped_pkt, + size_t *stripped_pkt_len, uint16_t *vlanid_prio); + +/*! \brief Process tx packet. + * + * Prepare tx packet for transmission. + * + * This function is typically used only by the TCP/IP stack driver. + * + * Takes a Ethernet II frame header and generates a message passing header + * for it. + * + * The caller should ensure that any frames injected into wl_process_tx() + * are proper Ethernet frames. The wl_api library or the device will not + * perform any Ethernet padding if the frames are too short. + * + * The Ethernet header is assumed to have the following layout : + * ... + * The rest of the Ethernet header buffer (if any) is ignored. + * + * A note on the TX packet representation : + * If your TX packets are simple contiguous buffers you can ignore + * the rest of this note and pass NULL in parameter \a pkt_handle. + * A TX packet may have a more complex structure than a RX packet + * (which must be a contiguous, flat buffer). The IP stack may + * for example represent a packet as a linked list of buffers where + * the Ethernet header, the IP header and other headers, are represented + * by separate buffers. In some cases, such as when the driver is + * running in SoftAP mode, a TX packet has to be copied and queued + * internally for later processing and to support this when packets + * have a complicated structure a special data access function can + * be registered. See \a wl_register_pkt_read_cb() for details. + * If you use \a wl_process_tx() with non-simple packets you + * should pass a handle to the packet in parameter \a pkt_handle + * and register an access function with \a wl_register_pkt_read_cb(). + * + * @param eth_hdr Input buffer (Ethernet header) + * @param eth_hdr_len Input buffer length (must be >= 14) + * This is usually the same as pkt_len unless e.g linked list or buffers + * chained in other ways are being used. + * @param pkt_len Length of the complete data packet (in bytes) + * @param hdr Pointer to the header buffer (must be + * allocated by the caller). The length of the buffer + * must be at least WL_HEADER_SIZE bytes. + * @param vlanid_prio VLAN ID and 802.1p priority value + * using following format: + * 
+ *        1
+ *  5|432109876543|210
+ *  -+------------+---
+ *  0|   VLANID   |PRI
+ *
+ * Ignored for legacy association (no WMM) + * @param pkt_handle A handle to the complete packet. If this parameter + * is NULL then \a eth_hdr is expected to point to the whole packet + * in a single contiguous buffer (the default). If a different packet + * representation is used this parameter should be a handle to the + * complete packet and will be passed unmodified to the data + * access function that was registered with \a wl_register_pkt_read_cb(). + * + * @returns + * - WL_FAILURE + * - WL_RESOURCES if packet can not be processed at the moment. + * The caller must either drop the packet or try + * retransmit it later. + * - WL_AVAIL if network not available + * - WL_SUCCESS if packet is ready for transmission through wl_tx(). + */ +wl_err_t wl_process_tx(char *eth_hdr, + size_t eth_hdr_len, + size_t pkt_len, + char *hdr, + uint16_t vlanid_prio, + void *pkt_handle); + + +/*! \brief Get current TX and RX rate used for data transfer + * + * During transmission and reception of data, the actual rate used will depend + * on the signal quality. This function can be used to get the actual rate used + * for the last tx and rx data. + * + * @param tx will hold the tx rate upon successful return. + * @param rx will hold the rx rate upon successful return. + * + * @return + * - WL_SUCCESS on success + * - WL_FAILURE on failure. + */ +wl_err_t wl_get_rate(wl_rate_t *tx, wl_rate_t *rx); + + +/*! @} */ /* End wl_data group */ + + +/** \defgroup wl_transport Transport interface + * + * \brief Low level transport interface. + * + * These functions access the low level transport driver which makes + * the application independent of the actual physical transport + * layer (usually SDIO or SPI). + * + +For applications running on an real time kernel or without an +operating system, the provided transport library will fit right into the +application design. However, when running on a more complex operating system +(such as windows or linux) which has its own transport primitivies and +components (and probably its own IP stack) it might be preferred to design a +custom transport library for that specific environment. Therefore, these +transport interface functions are fully optional. + + + * @{ + */ + +#define WL_RX_MIN_PKT_LEN 32 + + +/*! \brief WiFi event callback. + * + * This function is invoked in interrupt context when there is new data + * available from the mac. This function is supplied by the user + * of the API. + * + * This function is typically used only by the TCP/IP stack driver. + * + * @param ctx A context handle. This handle is passed + * untouched to the callback and has the same value + * as the context registered with the callback in + * wl_register_event_cb(). + */ +typedef void (*wl_rx_isr_t) (void* ctx); + + +/*! \brief Firmware access function. + * + * Reads the WiFi firmware image. This function is supplied by + * the user of this API since storage for the firmware image is + * managed by the application. + * + * This function should read the specified number of bytes of the + * firmware image starting at the specified \a offset. The number of + * bytes to read is given in \a len. Upon return, \a buf should point + * to a buffer which holds the read data and the number of valid bytes + * in \a buf is returned from the call. + * + * This function will be called repeatedly until the complete firmware + * image has been read. + * + * This function may be called again at any time while the driver is + * running to download further pieces of the WiFi firmware image as + * needed by the runtime requirements. This will normally only happen + * when the driver switches between networks of different kinds such + * as from WEP to WPA, or from ESS to IBSS for example. + * + * For convenience, any time a firmware chunk has been completely + * downloaded this function will be called once with the \a buf + * parameter set to NULL to indicate that no more data is needed right + * now and that any dynamically allocated buffers which holds firmware + * data can be freed without much performance impact. + * + * @param ctx Opaque context pointer as provided to \a wl_init() that will be + * passed back to the callback. + * @param buf Should be assigned the address of the buffer holding the read + * data upon return. This parameter can be NULL which indicates + * that there are no further immediately pending accesses. + * @param offset Offset in bytes from the start of the firmware image. + * Data should be copied into buf starting at \a offset. + * @param len The number of bytes to copy into \a buf. + * @return The number of bytes copied into buf. This may be smaller than + * \len if the implementation of the function so requires. + */ +typedef size_t (wl_fw_read_cb_t)(void *ctx, + const uint8_t **buf, + size_t offset, + size_t len); + + +/*! \brief Initialize the transport interface and download the WiFi firmware + * image to the device. + * + * This operation will proceed synchronously until the firmware is completely + * downloaded. wl_init() should be called after this function has returned to + * perform device initialization. + * + * @param fw_read_cb callback function to invoke during firmware download. + * @param ctx Opaque context pointer that will be passed to the callbacks + * when they are invoked. This parameter is never + * accessed by the API. + * @param mode will hold the host attention mode used by the transport layer. + * This parameter can be passed directly to \a wl_init(). + * + * @return + * + * - WL_CARD_FAILURE if the wl hardware device is not available + * - WL_FIRMWARE_INVALID if the firmware obtained through fw_read_cb is + * invalid. + * - WL_OOM if the necessary memory could not be allocated. + */ +wl_err_t wl_transport_init(wl_fw_read_cb_t *fw_read_cb, + void *ctx, + enum wl_host_attention_mode *mode); + +/*! \brief WiFi driver forward progress function + * + * This function must be called in polled environments to + * ensure forward progress. The call can be made as often as possible from + * the main application loop. However, the call will not have any effect unless + * there is an interrupt pending from the hardware. + * + * In interrupt mode, wl_poll() must be called if no interrupt + * handler is registered through wl_register_rx_isr(). When an interrupt + * handler is registered, it is no longer necessary to invoke wl_poll(). + * + * Note that this function should not be invoked from interrupt context. + * + */ +void wl_poll(void); + + +/*! \brief Register RX callback + * + * Register function to be called by the low level transport driver + * when a new packet is available or when there is a state change in the + * data path. When invoked, any pending data can be fetched by calling wl_rx(). + * + * This function is typically used only by the TCP/IP stack driver. + * Note, the registered function is called in interrupt context. + * + * @param isr rx interrup handler. + * @param ctx Opaque context pointer that is passed unmodified to the + * rx_cb callback when it is invoked. + * + * @return WL_SUCCESS + */ +wl_err_t wl_register_rx_isr(wl_rx_isr_t isr, void* ctx); + + +/*! \brief Read pending packet + * + * Read a pending packet from the low level transport driver. + * The read packet must be passed to the wl_process_rx() function + * for proper driver operation. + * + * @param buf Buffer to read the packet into. This buffer must be + * at least WL_MAX_PKT_LEN bytes long. + * @param len Length of buf in bytes. Contains the length of the + * read packet in bytes on output. + * @return + * - WL_FAILURE if no RX packet is pending. + * - WL_SUCCESS + */ +wl_err_t wl_rx(uint8_t* buf, uint16_t* len); + +/*! \brief Send processed tx packet + * + * Send a packet to the low level transport driver. + * This packet has to have been successfully processed by the + * wl_process_tx() function. + * + * @param buf Buffer to send. + * @param len Length of buf in bytes. + * + * @return + * - WL_FAILURE if the interface is not ready to send. + * - WL_SUCCESS if the packet was successfully transmitted. + */ +wl_err_t wl_tx(const uint8_t* buf, uint16_t len); + + +/*! \brief Configure data alignment + * + * This function can be used if the host SDIO/SPI controller has certain + * requirements on the data transfer sizes that can be used on the SDIO/SPI bus. + * + * If the txsize parameter is non-zero, additional padding data should be added + * when performing the low level transfer of data buffer of sizes that are not + * a multiple of the size_align parameter. See \ref wl_sdio and \ref wl_spi for + * more information. + * + * @param txsize will configure the size alignment for tx data. + * + */ +void wl_conf_alignment(uint8_t txsize); + + +/*! @} */ /* End wl_transport group */ + + +/** \defgroup wl_custom Custom environment support + * + * \brief Support for custom environments + * + * These functions should only be used in cases where the transport library is + * not used at all. This usually applies to operating systems and environments + * where there already exists a transport layer framework, e.g. linux or + * windows. + * + * + +Note that the \a wl_poll() function is part of the transport library. Therefore, +it should not be used in custom environments. Therefore, it is necessary to +implement a custom polling or interrupt based scheme to ensure that any +incoming packets are processed by the core. + + * @{ + */ + + /*! \brief Wakeup callback function. + * + * Invoked when the WiFi device should wake up from power save mode. + * This function should send the proper commands to the device. + * + * Note that this type should only be used in custom environments, where + * the transport library is not used. + * + * @param ctx Opaque context pointer as provided to \a wl_register_wakeup_cb() + * that will be passed back to the callback. + * @param wakeup indicates whether wakeup should be set or cleared in the + * device. + */ +typedef void (wl_wakeup_cb_t)(void* ctx, uint8_t wakeup); + +/*! \brief Register wakeup callback function. + * + * Register a function that will be invoked when the WiFi device should wake + * up from power save mode. + * + * Note that this function should only be used in custom environments, where + * the transport library is not used. + * + * @param wakeup_cb Will be invoked when the device should wakeup from sleep + * mode. + * @param ctx Opaque context pointer that will be passed back to the callback. + */ +void wl_register_wakeup_cb(wl_wakeup_cb_t *wakeup_cb, void *ctx); + + +/*! \brief Management tx callback function. + * + * Invoked when the a management message should be transmitted to the + * WiFi device. This function should ensure that the message is passed through + * to the device and should never fail. + * + * Note that this type should only be used in custom environments, where + * the transport library is not used. + * + * @param ctx Opaque context pointer as provided to \a wl_register_mgmt_tx_cb() + * that will be passed back to the callback. + * @param buf Points to the buffer which holds the management data, + * @param len Size of the buffer. + */ +typedef void (wl_mgmt_tx_cb_t)(void *ctx, const uint8_t *buf, uint16_t len); + + +/*! \brief Register management tx callback function + * + * Register a function that will be invoked when a management message should + * be transmitted to the device. + * + * Note that this function should only be used in custom environments, where + * the transport library is not used. + * + * IMPORTANT : In a custom environment without a transport library \a + * wl_register_mgmt_tx_cb() \b must have been called + * before \a wl_fw_download() is called since \a + * wl_fw_download() depends on the \a mgmt_tx_cb() to send + * the firmware data to the WiFi chip. + * + * @param mgmt_tx_cb The callback function to invoke. + * @param ctx Opaque context pointer that will be passed back to the callback. + */ +void wl_register_mgmt_tx_cb(wl_mgmt_tx_cb_t *mgmt_tx_cb, void *ctx); + + + +/*! \brief Download the WiFi firmware image to the device. + * + * This operation will proceed synchronously until the firmware is completely + * downloaded. wl_init() should be called after this function has returned to + * perform device initialization. This function depends on \a + * wl_register_mgmt_tx_cb(). See that function for details. + * + * @param ctx Opaque context pointer that will be passed to the callbacks + * when they are invoked. This parameter is never + * accessed by the API. + * @param fw_read_cb callback function to invoke during firmware download. + * + * @return + * + * - WL_CARD_FAILURE if the wl hardware device is not available + * - WL_FIRMWARE_INVALID if the firmware obtained through fw_read_cb is + * invalid. + * - WL_OOM if the necessary memory could not be allocated. + */ + wl_err_t wl_fw_download(wl_fw_read_cb_t *fw_read_cb, void *ctx); + + + +/*! @} */ /* End wl_custom group */ + + + +#endif diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_fw.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_fw.h new file mode 100644 index 0000000..5be5f37 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_fw.h @@ -0,0 +1,19287 @@ +/* + * Programming interface for wl_api. + * Copyright (C) 2010 HD Wireless AB + * + * You should have received a copy of the license along with this library. + */ + +#ifndef WITHOUT_STDINT +#include +#endif +const uint8_t fw_buf[154188] = { + 0x10, 0x61, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x30, 0x00, 0x00, 0x00, 0x10, 0x61, 0x04, 0x00, + 0x38, 0x61, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x20, 0x61, 0x04, 0x00, + 0x30, 0x61, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x30, 0x61, 0x04, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x10, 0x61, 0x04, 0x00, + 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0xee, 0xee, + 0xee, 0xee, 0x18, 0xf0, 0x9f, 0xe5, 0x18, 0xf0, + 0x9f, 0xe5, 0x18, 0xf0, 0x9f, 0xe5, 0x18, 0xf0, + 0x9f, 0xe5, 0x00, 0x00, 0xa0, 0xe1, 0x18, 0xf0, + 0x9f, 0xe5, 0x18, 0xf0, 0x9f, 0xe5, 0x44, 0x00, + 0x00, 0x00, 0xb4, 0x08, 0x00, 0x00, 0xb4, 0x08, + 0x00, 0x00, 0xb4, 0x08, 0x00, 0x00, 0xb4, 0x08, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe4, 0x08, + 0x00, 0x00, 0x3c, 0x00, 0x3c, 0x00, 0x00, 0x00, + 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x0f, 0xe1, 0x1f, 0x00, 0xc0, 0xe3, + 0x13, 0x00, 0x80, 0xe3, 0xc0, 0x00, 0x80, 0xe3, + 0x00, 0xf0, 0x2f, 0xe1, 0x1c, 0xf0, 0x9f, 0xe5, + 0x3d, 0x02, 0x00, 0xeb, 0x5a, 0x02, 0x00, 0xeb, + 0x8d, 0x02, 0x00, 0xeb, 0x01, 0x00, 0x8f, 0xe2, + 0x10, 0xff, 0x2f, 0xe1, 0x41, 0xf0, 0xde, 0xfb, + 0x01, 0xf0, 0xdc, 0xfd, 0x3c, 0x00, 0x78, 0x00, + 0x00, 0x00, 0xfe, 0xe7, 0x00, 0x00, 0x5c, 0x00, + 0x00, 0x00, 0x78, 0x47, 0xc0, 0x46, 0x01, 0x00, + 0x00, 0xea, 0x78, 0x47, 0xc0, 0x46, 0x17, 0x00, + 0x00, 0xea, 0x8c, 0x11, 0x9f, 0xe5, 0x00, 0x20, + 0x91, 0xe5, 0x00, 0x30, 0x0f, 0xe1, 0x84, 0x11, + 0x9f, 0xe5, 0xfd, 0x20, 0xa1, 0xe8, 0x80, 0x01, + 0x9f, 0xe5, 0x80, 0x21, 0x9f, 0xe5, 0x01, 0x20, + 0x42, 0xe0, 0x0d, 0x00, 0x40, 0xe0, 0x3c, 0x00, + 0xb4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x50, 0xe1, + 0x28, 0x00, 0x00, 0xaa, 0x68, 0x01, 0x9f, 0xe5, + 0x0d, 0x00, 0x50, 0xe1, 0x02, 0x00, 0x00, 0xba, + 0x04, 0x20, 0x10, 0xe4, 0x04, 0x20, 0x81, 0xe4, + 0xfa, 0xff, 0xff, 0xea, 0x58, 0x11, 0x9f, 0xe5, + 0x58, 0x01, 0x9f, 0xe5, 0x00, 0x00, 0x81, 0xe5, + 0x3c, 0x11, 0x9f, 0xe5, 0x50, 0x01, 0x9f, 0xe5, + 0x00, 0x00, 0x81, 0xe5, 0x1e, 0xff, 0x2f, 0xe1, + 0x3c, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x48, 0x11, + 0x9f, 0xe5, 0x00, 0x00, 0x91, 0xe5, 0x24, 0x11, + 0x9f, 0xe5, 0x00, 0x00, 0x81, 0xe5, 0x2c, 0x11, + 0x9f, 0xe5, 0x38, 0x01, 0x9f, 0xe5, 0x00, 0x00, + 0x81, 0xe5, 0x1e, 0xff, 0x2f, 0xe1, 0x74, 0x02, + 0x00, 0xeb, 0x10, 0x01, 0x9f, 0xe5, 0x28, 0x11, + 0x9f, 0xe5, 0x04, 0x20, 0x91, 0xe4, 0x04, 0x20, + 0x00, 0xe4, 0x04, 0x21, 0x9f, 0xe5, 0x02, 0x00, + 0x51, 0xe1, 0x3c, 0x00, 0x2c, 0x01, 0x00, 0x00, + 0xfa, 0xff, 0xff, 0x1a, 0xf0, 0x10, 0x9f, 0xe5, + 0xfd, 0x20, 0xb1, 0xe8, 0x03, 0xf0, 0x2f, 0xe1, + 0xe0, 0x10, 0x9f, 0xe5, 0x00, 0x20, 0x81, 0xe5, + 0xe8, 0x10, 0x9f, 0xe5, 0xf4, 0x20, 0x9f, 0xe5, + 0x00, 0x20, 0x81, 0xe5, 0x02, 0x10, 0x80, 0xe2, + 0x00, 0x00, 0x20, 0xe0, 0x01, 0x00, 0x40, 0xe2, + 0x11, 0xff, 0x2f, 0xe1, 0x01, 0x00, 0x8f, 0xe2, + 0x10, 0xff, 0x2f, 0xe1, 0x3c, 0x00, 0x68, 0x01, + 0x00, 0x00, 0x01, 0xf0, 0x9c, 0xf8, 0x78, 0x47, + 0x00, 0x00, 0x01, 0x00, 0x8f, 0xe2, 0x10, 0xff, + 0x2f, 0xe1, 0x01, 0xf0, 0x94, 0xf8, 0x78, 0x47, + 0x00, 0x00, 0x03, 0x00, 0x2d, 0xe9, 0x00, 0x10, + 0x0f, 0xe1, 0x00, 0x10, 0x80, 0xe5, 0xb8, 0x10, + 0x9f, 0xe5, 0x04, 0x10, 0x80, 0xe5, 0x00, 0x10, + 0xa0, 0xe1, 0x10, 0x00, 0x80, 0xe2, 0xfc, 0x1f, + 0xa0, 0xe8, 0x00, 0x20, 0xa0, 0xe1, 0x3c, 0x00, + 0xa4, 0x01, 0x00, 0x00, 0x01, 0x30, 0xa0, 0xe1, + 0x03, 0x00, 0xbd, 0xe8, 0x08, 0x00, 0x83, 0xe5, + 0x0c, 0x10, 0x83, 0xe5, 0xd3, 0x00, 0xa0, 0xe3, + 0x00, 0xf0, 0x21, 0xe1, 0x00, 0x60, 0xa2, 0xe8, + 0x00, 0x10, 0x4f, 0xe1, 0x04, 0x10, 0x82, 0xe4, + 0xd2, 0x00, 0xa0, 0xe3, 0x00, 0xf0, 0x21, 0xe1, + 0x00, 0x60, 0xa2, 0xe8, 0x00, 0x10, 0x4f, 0xe1, + 0x04, 0x10, 0x82, 0xe4, 0xd1, 0x00, 0xa0, 0xe3, + 0x3c, 0x00, 0xe0, 0x01, 0x00, 0x00, 0x00, 0xf0, + 0x21, 0xe1, 0x00, 0x7f, 0xa2, 0xe8, 0x00, 0x10, + 0x4f, 0xe1, 0x04, 0x10, 0x82, 0xe4, 0xd7, 0x00, + 0xa0, 0xe3, 0x00, 0xf0, 0x21, 0xe1, 0x00, 0x60, + 0xa2, 0xe8, 0x00, 0x10, 0x4f, 0xe1, 0x04, 0x10, + 0x82, 0xe4, 0xdb, 0x00, 0xa0, 0xe3, 0x00, 0xf0, + 0x21, 0xe1, 0x00, 0x60, 0xa2, 0xe8, 0x00, 0x10, + 0x4f, 0xe1, 0x00, 0x10, 0x82, 0xe5, 0x00, 0x00, + 0x93, 0xe5, 0x3c, 0x00, 0x1c, 0x02, 0x00, 0x00, + 0x00, 0xf0, 0x2f, 0xe1, 0x1e, 0xff, 0x2f, 0xe1, + 0x20, 0x00, 0x00, 0x00, 0x04, 0x03, 0x00, 0x00, + 0x20, 0xee, 0x01, 0x00, 0xd8, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x18, 0xf0, 0x9f, 0xe5, + 0x10, 0x01, 0x00, 0x00, 0x08, 0x03, 0x00, 0x00, + 0xee, 0xee, 0xee, 0xee, 0x24, 0x03, 0x00, 0x00, + 0x20, 0x02, 0x00, 0x00, 0xb0, 0xb5, 0x04, 0x1c, + 0x63, 0x1c, 0x0b, 0x4d, 0x3c, 0x00, 0x58, 0x02, + 0x00, 0x00, 0x01, 0xd1, 0x6c, 0x69, 0x10, 0xe0, + 0x00, 0xf0, 0x6c, 0xfb, 0x09, 0x48, 0xff, 0xf7, + 0x0c, 0xff, 0xec, 0x60, 0x08, 0x4a, 0x51, 0x68, + 0x50, 0x68, 0x88, 0x42, 0xfc, 0xd0, 0x02, 0x20, + 0x28, 0x70, 0x01, 0x21, 0x8a, 0x20, 0x01, 0xf0, + 0x12, 0xf8, 0x20, 0x1c, 0xb0, 0xbd, 0x30, 0x00, + 0x07, 0x00, 0x51, 0x02, 0x00, 0x00, 0x00, 0x03, + 0x07, 0x00, 0xb0, 0xb5, 0x05, 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0x49, 0x0d, 0x20, + 0xbd, 0xf7, 0x33, 0xfe, 0x01, 0x20, 0x0b, 0x49, + 0x40, 0x03, 0x08, 0x60, 0x48, 0x60, 0x25, 0x73, + 0x2d, 0x20, 0xc0, 0x03, 0x20, 0x60, 0x25, 0x73, + 0x20, 0x7a, 0x10, 0x21, 0x08, 0x43, 0x20, 0x72, + 0x06, 0x48, 0x06, 0x49, 0x08, 0x60, 0x00, 0x20, + 0x48, 0x60, 0x38, 0xbd, 0x00, 0x00, 0x00, 0x03, + 0x07, 0x00, 0x8d, 0x3e, 0x01, 0x00, 0x24, 0x00, + 0xa0, 0x33, 0x04, 0x00, 0x00, 0x10, 0x07, 0x00, + 0x00, 0x87, 0x93, 0x03, 0x04, 0x79, 0x01, 0x00, + 0x80, 0xb5, 0x02, 0x21, 0x15, 0x20, 0x02, 0x4a, + 0xd0, 0xf7, 0xc8, 0xf9, 0x80, 0xbd, 0x00, 0x00, + 0x0d, 0x3e, 0x01, 0x00, 0x70, 0x47, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x60, 0x04, 0x00, 0x44, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x40, 0x20, 0x07, 0x00, + 0xff, 0xff, 0xff, 0xff, +}; +const uint32_t fw_len = sizeof(fw_buf) / sizeof(fw_buf[0]); diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_os.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_os.h new file mode 100644 index 0000000..1a3b75f --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_os.h @@ -0,0 +1,35 @@ +#ifndef WL_OS_H +#define WL_OS_H + +#include +#include + +void *owl_os_alloc(size_t size); +void *owl_os_realloc(void *ptr, size_t size); +void owl_os_free(void *p); +void *owl_os_memcpy(void *dst, const void *src, size_t n); +void *owl_os_memset(void *s, int c, size_t n); +void *owl_os_memmove(void *dst, const void *src, size_t n); +size_t owl_os_strlen(char *s); +char *owl_os_strncpy(char *dst, const char *src, size_t n); +int owl_os_strncmp(const char *s1, const char *s2, size_t n); +int owl_os_strcmp(const char *s1, const char *s2); +char *owl_os_strcpy(char *dst, const char *src); +char *owl_os_strdup(const char *s); +char *owl_os_strndup(const char *s, size_t n); +int owl_os_memcmp(const void *s1, const void *s2, size_t n); +long int owl_os_strtol(const char *nptr, char **endptr, int base); +char *owl_os_strchr(const char *s, int c); +char *owl_os_strrchr(const char *s, int c); +int owl_os_strcasecmp(const char *s1, const char *s2); +char *owl_os_strstr(const char *haystack, const char *needle); + +int owl_os_snprintf(char *str, size_t size, const char *format, ...) + __attribute__((format(printf, 3, 4))); + +int owl_os_vprintf(const char *format, va_list arg); /* debug only */ +int owl_os_printf(const char *format, ...) /* debug only */ + __attribute__((format(printf, 1, 2))); + +#endif /* WL_OS_H */ + diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_sdio.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_sdio.h new file mode 100644 index 0000000..ee08fad --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_sdio.h @@ -0,0 +1,172 @@ +/*! + * \file wl_sdio.h + * \brief SDIO interface for wl_api. + * Copyright (C) 2010 HD Wireless AB + * + * You should have received a copy of the license along with this library. + */ + +#ifndef WL_SDIO_H +#define WL_SDIO_H + +/** \defgroup wl_sdio SDIO Interface + * + * These functions implement the interface that the wl_api library + * needs to work with a SDIO transport layer. + * + * The functions prototyped here must be implemented when porting the + * wl_api library to a new platform with a different SDIO configuration + * + * On platforms supported by H&D Wireless these functions are + * implemented in the file avr32_sdio.c + * + * @{ + */ + +/** + * Maximum transfer size. This will set an upper limit on the len parameter + * passed to owl_sdio_tx() and owl_sdio_rx(). + * + */ +#define MAX_BLOCK_LEN 512 + + +/** + * This flag might be set when owl_sdio_cmd() is called in case the cmd will + * be followed by a data transfer. If the flag is set, the transfer direction is + * from the device to the host (read). Otherwise, the transfer direction is + * from the host to the device (write). + * + */ + #define CMD_FLAG_TO_HOST (1 << 0) + + +/** + * Indicates that the sdio driver needs to be polled in order to make + * forward progress, i.e. it does not support interrupts + * + * The actual polling will result in owl_sdio_cmd() being called to + * request status information from the device. + * + * To activate polling, this flag should be set in owl_sdio_init(). + */ +#define SDIO_FLAG_POLL (1 << 0) + +/** + * Indicates that the sdio driver only supports 1-bit mode. + * + * To set 1-bit mode, this flag should be set in owl_sdio_init(). + */ +#define SDIO_FLAG_1BIT_MODE (1 << 1) + +/** + * This function will be invoked when wlan initialization should be performed, + * this happens when the wl_fw_download() function in the transport group of + * wl_api is invoked. + * + * The wifi device supports sdio high speed mode and clock frequencies up to + * 50 MHz. + * + * The function is responsible for doing any necessary sdio initialization such + * as allocating gpio's, setting up the mci master, one time allocations of + * dma buffers etc. + * + * @param flags is an out parameter that should hold any sdio flags upon return. + * The avaible flags are prefixed with SDIO_FLAG_ + * + * + */ +void owl_sdio_init(uint8_t *flags); + + + +/** + * This function will be invoked when an sdio cmd should be sent to the + * device. + * + * @param idx is the sdio command number + * @param arg is the sdio command argument + * @param flags specifies other options, such as any transfer direction. + * @param rsp should hold the command response upon return. If null, the + * response can be ignored. + * @param data holds a pointer to any data that might follow the command. This + * allows the sdio driver to setup dma transfers while waiting for the + * command response. NULL if no data transfer will follow. Note that + * the same data pointer will be passed to owl_sdio_tx(), which should + * start the actual transfer. + * @param len is the length of the data buffer. + * + */ +void owl_sdio_cmd(uint8_t idx, uint32_t arg, uint8_t flags, uint32_t *rsp, + const uint8_t *data, uint16_t len); + + +/** + * This function will be invoked when data should be transmitted to the device. + * + * If wl_fw_downlad() was called with the size_align parameter set to non-zero, + * the pad parameter should be used. If the pad parameter is not 0, additional + * data must be transmitted after the data buffer has be sent. Depending on + * how the data buffer was first allocated (probably by an TCP/IP stack), it + * might be safe or unsafe to continue reading beyond the data buffer to + * transmit the additional padding bytes. + * + * @param data holds a pointer to the data to transmit, the pointer is the + * same as the one passed to wl_tx(). + * @param len is the number of bytes that should be transmitted, including + * padding. + * @param pad is the number of padding bytes to send. + * + */ +void owl_sdio_tx(const uint8_t *data, uint16_t len, uint8_t pad); + + +/** + * This function will be invoked when data should be received from the device. + * + * @param data should hold the read data upon return. + * @param len is the number of bytes to read. + * + */ +void owl_sdio_rx(uint8_t *data, uint16_t len); + + +/** + * Invoked when sdio rx interrupts from the device should be enabled or + * disabled. + * + * If SDIO_FLAG_POLL was set in wl_spi_init(), then this function can be + * left empty. + * + * @param enable specifies if interrupts should be enabled or disabled. + * + */ +void owl_sdio_irq(uint8_t enable); + + +/** + * Delay executiom for the specified number of ms. This function will be called + * with delays in the 10-20 ms range during fw download and startup of the + * Wi-Fi device. This function can be implemented with a simple for-loop if + * desired (beware of optimization). The timing does not have to be accurate as + * long as the actual delay becomes at least the specified number of ms. + * + * @param ms is the minimal amount of time to wait [ms]. + * + */ +void owl_sdio_mdelay(uint32_t ms); + + +/** + * This function should be called whenever an interrupt is detected. It can + * be called from an interrupt context. + * + * If SDIO_FLAG_POLL was set in owl_sdio_init(), then wl_sdio_irq() + * should never be called. + * + */ +extern void wl_sdio_irq(void); + +/*! @} */ + +#endif diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_spi.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_spi.h new file mode 100644 index 0000000..5d91374 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wl_spi.h @@ -0,0 +1,185 @@ +/*! + * \file wl_spi.h + * \brief SPI interface for wl_api. + * Copyright (C) 2010 HD Wireless AB + * + * You should have received a copy of the license along with this library. + */ + +#ifndef WL_SPI_H +#define WL_SPI_H + +#ifndef WITHOUT_STDINT +#include +#endif + +/** \defgroup wl_spi SPI Interface + * + * These functions implement the interface that the wl_api library + * needs to work with a SPI transport layer. + * + * The functions prototyped here must be implemented when porting the + * wl_api library to a new platform with a different SPI configuration + * + * On platforms supported by H&D Wireless these functions are + * implemented in the file avr32_spi.c + * + * @{ + */ + +/** + * Maximum transfer size. This will set an upper limit on the len parameter + * passed to owl_spi_txrx(). + * + * + */ +#define MAX_BLOCK_LEN 512 + + +/** + * Indicates that the spi driver needs to be polled in order to make + * forward progress, i.e. it does not support interrupts through SD pin 8. + * + * The actual polling will result in owl_spi_txrx() being call to + * request status information from the device. + * + * To activate polling, this flag should be set in owl_spi_init(). + * + * See wl_poll() and wl_register_rx_isr() for more information regarding + * polled and interrupt modes. + * + */ +#define SPI_FLAG_POLL (1 << 0) + + +/** + * This function will be invoked when wlan device initialization should be + * performed, this happens when the wl_fw_download() function in the transport + * group of wl_api is invoked. + * + * The wifi device requires spi mode 3, i.e. clock polarity high and sample + * on second phase. This corresponds to CPOL=1, CPHA=1. Maximum frequency on + * spi clock is 30 MHz. + * + * The function is also responsible for doing any necessary spi initialization + * such as allocating gpio's, setting up the SPI master, one time allocations of + * dma buffers etc. + * + * + * If the SPB105 device is used, two signals; POWER (pin 10 on SPB105) and + * SHUTDOWN (pin 4 on SPB105) might be connected to gpio's on the host. + * The GPIO_POWER_PIN is the main power supply to the device. The + * GPIO_SHUTDOWN_PIN (active low) should be defined as an input. + * + * After GPIO_POWER_PIN is pulled high by the host, the device will pull the + * GPIO_SHUTDOWN_PIN high once the device is properly powered. + * + * However, if pin 4 (GPIO_SHUTDOWN_PIN) is not connected to the host, a delay + * of up to 250 ms must be added after GPIO_POWER_PIN is pulled high to ensure + * that startup is completed. The actual time is usually much shorter, therefore + * one might try to reduce the delay for a particualar hardware design. + * + * On SPB104, the GPIO_POWER_PIN will be connected to VCC and GPIO_SHUTDOWN_PIN + * will be unconnected; hence we have to make sure that we have enough delay + * after powering on the host. Since the device power-on usually happens at the + * same time as the host power-on, the startup time of the host can be + * subtracted from any delay put into owl_spi_init(). + * + * @param flags is an out parameter that should hold any spi flags upon return. + * The avaible flags are prefixed with SPI_FLAG_ + * + * @return 0 on success + * -1 if any error occurs + * + */ +int owl_spi_init(uint8_t *flags); + + +/** + * Invoked when a spi transfer should be performed. + * + * All buffers that are allocated by the wl library will have a size that is + * aligned to 4. If size-unaligned data is passed to this function, it is + * always allocated by the ip stack. If 4-byte size alignment (e.g. for DMA) + * is required, 1-3 extra padding bytes can be transmitted after the in buffer. + * These bytes must be 0xff. + * + * Since size-unaligned data always comes from the ip stack, the out ptr is + * always NULL for such data. + * + * @param in points a buffer which holds the data to be transmitted. If NULL, + * then \a len bytes with the value 0xff should be transmitted on the + * bus. + * @param out points a buffer should hold the data received from the device. If + * NULL, any received data can be discarded. + * @param len is the length of the in and out buffers. + * + */ +void owl_spi_txrx(const uint8_t *in, uint8_t* out, uint16_t len); + + +/** + * Invoked when spi rx interrupts from the device should be enabled or disabled. + * Note that the spi interrupts are obtained from pin 8 on SPB104 or pin 3 from + * SPB105. This pin can be be connected to a gpio on the host. The irq line + * will signal an interrupt on both edges. + * + * In general, the wifi device will not issue a new interrupt unless the + * last interrupt has been handled. Also, during normal operation (i.e after + * the complete callback registered in wl_init() has been invoked), + * owl_spi_irq() will never be invoked so interrupts will be enabled all + * the time. For the SPI-mode, the purpose of owl_spi_irq() is basically to + * make sure that the first interrupt (coming after the reset performed in + * owl_spi_init()) is ignored. + * + * If SPI_FLAG_POLL was set in owl_spi_init(), then this function can be + * left empty and the wifi device will be used in polled mode. In polled mode, + * the interrupt line is not used. Regardless of polled or interrupt-mode, + * wl_poll() must be called to ensure progress of the driver. + * + * @param enable specifies if interrupts should be enabled or disabled. + * + */ +void owl_spi_irq(uint8_t enable); + + +/** + * Invoked when the spi cs for the wifi device should be enabled. Note that + * multiple calls to owl_spi_txrx() might be done during a 'single' chip + * select. + * + * @param enable specifies whether chip select should be asserted or deasserted, + * The chip select signal is active low, so if enable is '1' then the + * chip select connected to the wifi device should be set to '0'. + * + */ +void owl_spi_cs(uint8_t enable); + + +/** + * Delay executiom for the specified number of ms. This function will be called + * with delays in the 10-20 ms range during fw download and startup of the + * Wi-Fi device. This function can be implemented with a simple for-loop if + * desired (beware of optimization). The timing does not have to be accurate as + * long as the actual delay becomes at least the specified number of ms. + * + * @param ms is the minimal amount of time to wait [ms]. + * + */ +void owl_spi_mdelay(uint32_t ms); + + +/** + * This function should be called whenever an interrupt is detected. It can + * be called from an interrupt context. + * + * If SPI_FLAG_POLL was set in owl_spi_init(), then wl_spi_irq() + * should never be called. + * + */ +extern void wl_spi_irq(void); + + +/*! @} */ + +#endif diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wlap_api.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wlap_api.h new file mode 100644 index 0000000..9a4483a --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/WIFI/HD/wlap_api.h @@ -0,0 +1,154 @@ +/* + * Programming interface for wlap_api. + * Copyright (C) 2011 HD Wireless AB + * + * You should have received a copy of the license along with this library. + */ + +/*! \file wlap_api.h ************************************************************* + * + * \brief WiFi AP API + * + * This file provides the wlap_api interface. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: + * \li SPB104 + EVK1100 + * \li SPB104 + EVK1101 + * \li SPB104 + EVK1104 + * \li SPB104 + EVK1105 (SPI) + * \li SPB104 + EVK1105 (SPI + irq) + * \li SPB105 + EVK1105 (SPI) + * - AppNote: + * + * \author H&D Wireless AB: \n + * + ***************************************************************************** + * + * \section intro Introduction + * This is the documentation for the WiFi AP Driver API \a wlap_api. + * + * \section files Main Files + * - wlap_api.h : WiFi driver interface. + * - libwlap_api_*.*.a - Driver library. + * + */ + +#ifndef WLAP_API_H +#define WLAP_API_H + +#define WLAP_API_RELEASE_NAME "unknown" + +#include + +/** \defgroup wl_softap Access Point Mode + * + * \brief Support the WiFi Access Point mode. + * + * @{ + */ +/* + * Station representation + * + */ +struct wl_sta_t +{ + struct wl_mac_addr_t bssid; /**< The BSSID of the network. */ + uint8_t queued_pkt_cnt; /**< Number of queueud packets for + this STA. */ + uint8_t in_ps; /**< Is the STA in power save mode. */ + uint8_t aid; /**< STA AID */ +}; + +/* Station list representation. Array of pointers to wl_sta_t entries. */ +struct wl_sta_list_t +{ + struct wl_sta_t **sta; /**< The list of pointers to stations */ + size_t cnt; /**< Number of stations */ +}; + +/*! \brief Get the list of currently associated stations (SoftAP). + * + * Retrieves the list of current stations from + * the driver. + * + * This function is not thread safe. It must be called in the + * same execution context as wl_poll(). + * + * @param network_list Output buffer. The API call returns + * a pointer to allocated memory containing the network list. + * @return + * - WL_SUCCESS + * - WL_FAILURE. + */ +wl_err_t wlap_get_sta_list(struct wl_sta_list_t **network_list); + + +/*! Callback used to read data from a TX packet. + * This function is supplied by the user of the API. + * + * @param dst Destination buffer. The data should be copied + * to this buffer. + * @param src_handle Handle to the source packet from where + * the data should be copied. This handle is the same one that + * is passed in parameter \a pkt_handle to \a wl_process_tx(). + * @param read_len Number of bytes to copy from \a src_handle + * to \a dst. + * @param offset The offset in bytes, counting from the + * beginning of the Ethernet header, from where to copy data. + * @return + * - The number of bytes copied. This number may be smaller + * than the length requested in \a read_len but it may not + * be shorter than the length of the packet counting from + * \a offset. In other words, if the caller of this function + * receives a return count that is shorter than \a read_len + * he will assume that all packet data has been read. + * - < 0 on error. + */ +typedef ssize_t (*wl_pkt_read_cb_t)(char *dst, + void *src_handle, + size_t read_len, + int offset); + +/*! \brief Register a data access function for TX packets (SoftAP). + * + * When a TX data packet has a different representation than a single + * contiguous buffer in memory then a packet read function must be + * implemented and registered with this call. Whenever the library + * needs to read packet data it will call this function to do it. + * + * This function can be ignored if the TX packet representation is + * a single contiguous buffer. This function is only needed in SoftAP + * mode. + * + * @param pkt_read_cb Read callback. + * @param ctx Context + */ +void wl_register_pkt_read_cb(wl_pkt_read_cb_t pkt_read_cb); + +/*! \brief Start a network using the SoftAP mode. + * + * This call will cause the WiFi chip to start sending beacons + * and accept associations from WiFi stations. + * + */ +wl_err_t wlap_start_ap(const char *ssid, + const size_t ssid_len, + const uint8_t channel, + const enum wl_auth_mode auth_mode, + const enum wl_enc_type enc_type); + +/*! \brief Disconnect a STA (SoftAP) + * + * @param bssid The BSSID of the station to disconnect. + * @return + * - WL_SUCCESS + * - WL_FAILURE. + */ +wl_err_t wlap_disconnect_sta(const struct wl_mac_addr_t bssid); + + +/*! @} */ /* End wl_softap group */ + + +#endif diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/CPU/CYCLE_COUNTER/cycle_counter.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/CPU/CYCLE_COUNTER/cycle_counter.h new file mode 100644 index 0000000..d0c51df --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/CPU/CYCLE_COUNTER/cycle_counter.h @@ -0,0 +1,309 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Cycle counter driver. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32UC devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CYCLE_COUNTER_H_ +#define _CYCLE_COUNTER_H_ + +#include "compiler.h" + + +//! Structure holding private information, automatically initialized by the +//! cpu_set_timeout() function. +typedef struct +{ + //! The cycle count at the begining of the timeout. + unsigned long delay_start_cycle; + + //! The cycle count at the end of the timeout. + unsigned long delay_end_cycle; + + //! Enable/disable the timout detection + unsigned char timer_state; + #define CPU_TIMER_STATE_STARTED 0 + #define CPU_TIMER_STATE_REACHED 1 + #define CPU_TIMER_STATE_STOPPED 2 +} t_cpu_time; + + +/*! + * \brief Convert milli-seconds into CPU cycles. + * + * \param ms: Number of millisecond. + * \param fcpu_hz: CPU frequency in Hz. + * + * \return the converted number of CPU cycles. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ U32 cpu_ms_2_cy(unsigned long ms, unsigned long fcpu_hz) +{ + return ((unsigned long long)ms * fcpu_hz + 999) / 1000; +} + + +/*! + * \brief Convert micro-seconds into CPU cycles. + * + * \param us: Number of microsecond. + * \param fcpu_hz: CPU frequency in Hz. + * + * \return the converted number of CPU cycles. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ U32 cpu_us_2_cy(unsigned long us, unsigned long fcpu_hz) +{ + return ((unsigned long long)us * fcpu_hz + 999999) / 1000000; +} + + +/*! + * \brief Convert CPU cycles into milli-seconds. + * + * \param cy: Number of CPU cycles. + * \param fcpu_hz: CPU frequency in Hz. + * + * \return the converted number of milli-second. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ U32 cpu_cy_2_ms(unsigned long cy, unsigned long fcpu_hz) +{ + return ((unsigned long long)cy * 1000 + fcpu_hz-1) / fcpu_hz; +} + + +/*! + * \brief Convert CPU cycles into micro-seconds. + * + * \param cy: Number of CPU cycles. + * \param fcpu_hz: CPU frequency in Hz. + * + * \return the converted number of micro-second. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ U32 cpu_cy_2_us(unsigned long cy, unsigned long fcpu_hz) +{ + return ((unsigned long long)cy * 1000000 + fcpu_hz-1) / fcpu_hz; +} + + +/*! + * \brief Set a timer variable. + * + * Ex: t_cpu_time timer; + * cpu_set_timeout( cpu_ms_2_cy(10, FOSC0), &timer ); // timeout in 10 ms + * if( cpu_is_timeout(&timer) ) + * cpu_stop_timeout(&timer); + * ../.. + * + * \param delay: (input) delay in CPU cycles before timeout. + * \param cpu_time: (output) internal information used by the timer API. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void cpu_set_timeout(unsigned long delay, t_cpu_time *cpu_time) +{ + cpu_time->delay_start_cycle = Get_system_register(AVR32_COUNT); + cpu_time->delay_end_cycle = cpu_time->delay_start_cycle + delay; + cpu_time->timer_state = CPU_TIMER_STATE_STARTED; +} + + +/*! + * \brief Test if a timer variable reached its timeout. + * + * Once the timeout is reached, the function will always return TRUE, + * until the cpu_stop_timeout() function is called. + * + * Ex: t_cpu_time timer; + * cpu_set_timeout( 10, FOSC0, &timer ); // timeout in 10 ms + * if( cpu_is_timeout(&timer) ) + * cpu_stop_timeout(&timer); + * ../.. + * + * \param cpu_time: (input) internal information used by the timer API. + * + * \return TRUE if timeout occured, otherwise FALSE. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ unsigned long cpu_is_timeout(t_cpu_time *cpu_time) +{ + unsigned long current_cycle_count = Get_system_register(AVR32_COUNT); + + if( cpu_time->timer_state==CPU_TIMER_STATE_STOPPED ) + return FALSE; + + // Test if the timeout as already occured. + else if (cpu_time->timer_state == CPU_TIMER_STATE_REACHED) + return TRUE; + + // If the ending cycle count of this timeout is wrapped, ... + else if (cpu_time->delay_start_cycle > cpu_time->delay_end_cycle) + { + if (current_cycle_count < cpu_time->delay_start_cycle && current_cycle_count > cpu_time->delay_end_cycle) + { + cpu_time->timer_state = CPU_TIMER_STATE_REACHED; + return TRUE; + } + return FALSE; + } + else + { + if (current_cycle_count < cpu_time->delay_start_cycle || current_cycle_count > cpu_time->delay_end_cycle) + { + cpu_time->timer_state = CPU_TIMER_STATE_REACHED; + return TRUE; + } + return FALSE; + } +} + + +/*! + * \brief Stop a timeout detection. + * + * Ex: t_cpu_time timer; + * cpu_set_timeout( 10, FOSC0, &timer ); // timeout in 10 ms + * if( cpu_is_timeout(&timer) ) + * cpu_stop_timeout(&timer); + * ../.. + * + * \param cpu_time: (input) internal information used by the timer API. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void cpu_stop_timeout(t_cpu_time *cpu_time) +{ + cpu_time->timer_state = CPU_TIMER_STATE_STOPPED; +} + + +/*! + * \brief Test if a timer is stopped. + * + * \param cpu_time: (input) internal information used by the timer API. + * + * \return TRUE if timer is stopped, otherwise FALSE. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ unsigned long cpu_is_timer_stopped(t_cpu_time *cpu_time) +{ + + if( cpu_time->timer_state==CPU_TIMER_STATE_STOPPED ) + return TRUE; + else + return FALSE; +} + + +/*! + * \brief Waits during at least the specified delay (in millisecond) before returning. + * + * \param delay: Number of millisecond to wait. + * \param fcpu_hz: CPU frequency in Hz. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void cpu_delay_ms(unsigned long delay, unsigned long fcpu_hz) +{ + t_cpu_time timer; + cpu_set_timeout( cpu_ms_2_cy(delay, fcpu_hz), &timer); + while( !cpu_is_timeout(&timer) ); +} + +/*! + * \brief Waits during at least the specified delay (in microsecond) before returning. + * + * \param delay: Number of microsecond to wait. + * \param fcpu_hz: CPU frequency in Hz. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void cpu_delay_us(unsigned long delay, unsigned long fcpu_hz) +{ + t_cpu_time timer; + cpu_set_timeout( cpu_us_2_cy(delay, fcpu_hz), &timer); + while( !cpu_is_timeout(&timer) ); +} + +/*! + * \brief Waits during at least the specified delay (in CPU cycles) before returning. + * + * \param delay: Number of CPU cycles to wait. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void cpu_delay_cy(unsigned long delay) +{ + t_cpu_time timer; + cpu_set_timeout( delay, &timer); + while( !cpu_is_timeout(&timer) ); +} + + +#define Get_sys_count() ( Get_system_register(AVR32_COUNT) ) +#define Set_sys_count(x) ( Set_system_register(AVR32_COUNT, (x)) ) +#define Get_sys_compare() ( Get_system_register(AVR32_COMPARE) ) +#define Set_sys_compare(x) ( Set_system_register(AVR32_COMPARE, (x)) ) + + +#endif // _CYCLE_COUNTER_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/EBI/SMC/smc.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/EBI/SMC/smc.c new file mode 100644 index 0000000..543fed6 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/EBI/SMC/smc.c @@ -0,0 +1,995 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief SMC on EBI driver for AVR32 UC3. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a SMC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "compiler.h" +#include "preprocessor.h" +#include "gpio.h" +#include "smc.h" + +// Configure the SM Controller with SM setup and timing information for all chip select +#define SMC_CS_SETUP(ncs) { \ + U32 nwe_setup = ((NWE_SETUP * hsb_mhz_up + 999) / 1000); \ + U32 ncs_wr_setup = ((NCS_WR_SETUP * hsb_mhz_up + 999) / 1000); \ + U32 nrd_setup = ((NRD_SETUP * hsb_mhz_up + 999) / 1000); \ + U32 ncs_rd_setup = ((NCS_RD_SETUP * hsb_mhz_up + 999) / 1000); \ + U32 nwe_pulse = ((NWE_PULSE * hsb_mhz_up + 999) / 1000); \ + U32 ncs_wr_pulse = ((NCS_WR_PULSE * hsb_mhz_up + 999) / 1000); \ + U32 nrd_pulse = ((NRD_PULSE * hsb_mhz_up + 999) / 1000); \ + U32 ncs_rd_pulse = ((NCS_RD_PULSE * hsb_mhz_up + 999) / 1000); \ + U32 nwe_cycle = ((NWE_CYCLE * hsb_mhz_up + 999) / 1000); \ + U32 nrd_cycle = ((NRD_CYCLE * hsb_mhz_up + 999) / 1000); \ + \ + /* Some coherence checks... */ \ + /* Ensures CS is active during Rd or Wr */ \ + if( ncs_rd_setup + ncs_rd_pulse < nrd_setup + nrd_pulse ) \ + ncs_rd_pulse = nrd_setup + nrd_pulse - ncs_rd_setup; \ + if( ncs_wr_setup + ncs_wr_pulse < nwe_setup + nwe_pulse ) \ + ncs_wr_pulse = nwe_setup + nwe_pulse - ncs_wr_setup; \ + \ + /* ncs_hold = n_cycle - ncs_setup - ncs_pulse */ \ + /* n_hold = n_cycle - n_setup - n_pulse */ \ + /* */ \ + /* All holds parameters must be positive or null, so: */ \ + /* nwe_cycle shall be >= ncs_wr_setup + ncs_wr_pulse */ \ + if( nwe_cycle < ncs_wr_setup + ncs_wr_pulse ) \ + nwe_cycle = ncs_wr_setup + ncs_wr_pulse; \ + \ + /* nwe_cycle shall be >= nwe_setup + nwe_pulse */ \ + if( nwe_cycle < nwe_setup + nwe_pulse ) \ + nwe_cycle = nwe_setup + nwe_pulse; \ + \ + /* nrd_cycle shall be >= ncs_rd_setup + ncs_rd_pulse */ \ + if( nrd_cycle < ncs_rd_setup + ncs_rd_pulse ) \ + nrd_cycle = ncs_rd_setup + ncs_rd_pulse; \ + \ + /* nrd_cycle shall be >= nrd_setup + nrd_pulse */ \ + if( nrd_cycle < nrd_setup + nrd_pulse ) \ + nrd_cycle = nrd_setup + nrd_pulse; \ + \ + AVR32_SMC.cs[ncs].setup = (nwe_setup << AVR32_SMC_SETUP0_NWE_SETUP_OFFSET) | \ + (ncs_wr_setup << AVR32_SMC_SETUP0_NCS_WR_SETUP_OFFSET) | \ + (nrd_setup << AVR32_SMC_SETUP0_NRD_SETUP_OFFSET) | \ + (ncs_rd_setup << AVR32_SMC_SETUP0_NCS_RD_SETUP_OFFSET); \ + AVR32_SMC.cs[ncs].pulse = (nwe_pulse << AVR32_SMC_PULSE0_NWE_PULSE_OFFSET) | \ + (ncs_wr_pulse << AVR32_SMC_PULSE0_NCS_WR_PULSE_OFFSET) | \ + (nrd_pulse << AVR32_SMC_PULSE0_NRD_PULSE_OFFSET) | \ + (ncs_rd_pulse << AVR32_SMC_PULSE0_NCS_RD_PULSE_OFFSET); \ + AVR32_SMC.cs[ncs].cycle = (nwe_cycle << AVR32_SMC_CYCLE0_NWE_CYCLE_OFFSET) | \ + (nrd_cycle << AVR32_SMC_CYCLE0_NRD_CYCLE_OFFSET); \ + AVR32_SMC.cs[ncs].mode = (((NCS_CONTROLLED_READ) ? AVR32_SMC_MODE0_READ_MODE_NCS_CONTROLLED : \ + AVR32_SMC_MODE0_READ_MODE_NRD_CONTROLLED) << AVR32_SMC_MODE0_READ_MODE_OFFSET) | \ + + (((NCS_CONTROLLED_WRITE) ? AVR32_SMC_MODE0_WRITE_MODE_NCS_CONTROLLED : \ + AVR32_SMC_MODE0_WRITE_MODE_NWE_CONTROLLED) << AVR32_SMC_MODE0_WRITE_MODE_OFFSET) | \ + (NWAIT_MODE << AVR32_SMC_MODE0_EXNW_MODE_OFFSET) | \ + (((SMC_8_BIT_CHIPS) ? AVR32_SMC_MODE0_BAT_BYTE_WRITE : \ + AVR32_SMC_MODE0_BAT_BYTE_SELECT) << AVR32_SMC_MODE0_BAT_OFFSET) | \ + (((SMC_DBW <= 8 ) ? AVR32_SMC_MODE0_DBW_8_BITS : \ + (SMC_DBW <= 16) ? AVR32_SMC_MODE0_DBW_16_BITS : \ + AVR32_SMC_MODE0_DBW_32_BITS) << AVR32_SMC_MODE0_DBW_OFFSET) | \ + (TDF_CYCLES << AVR32_SMC_MODE0_TDF_CYCLES_OFFSET) | \ + (TDF_OPTIM << AVR32_SMC_MODE0_TDF_MODE_OFFSET) | \ + (PAGE_MODE << AVR32_SMC_MODE0_PMEN_OFFSET) | \ + (PAGE_SIZE << AVR32_SMC_MODE0_PS_OFFSET); \ + smc_tab_cs_size[ncs] = (U8)EXT_SM_SIZE; \ + } + +static U8 smc_tab_cs_size[6]; + +static void smc_enable_muxed_pins(void); + + +void smc_init(unsigned long hsb_hz) +{ + unsigned long hsb_mhz_up = (hsb_hz + 999999) / 1000000; + +//! Whether to use the NCS0 pin +#ifdef SMC_USE_NCS0 + #include SMC_COMPONENT_CS0 + + // Setup SMC for NCS0 + SMC_CS_SETUP(0) + + #ifdef SMC_DBW_GLOBAL + #if (SMC_DBW_GLOBAL < SMC_DBW) + #undef SMC_DBW_GLOBAL + #if (SMC_DBW == 8) + #define SMC_DBW_GLOBAL 8 + #elif (SMC_DBW == 16) + #define SMC_DBW_GLOBAL 16 + #elif (SMC_DBW == 32) + #define SMC_DBW_GLOBAL 32 + #else + #error error in SMC_DBW size + #endif + #endif + #else + #if (SMC_DBW == 8) + #define SMC_DBW_GLOBAL 8 + #elif (SMC_DBW == 16) + #define SMC_DBW_GLOBAL 16 + #elif (SMC_DBW == 32) + #define SMC_DBW_GLOBAL 32 + #else + #error error in SMC_DBW size + #endif + #endif + + #ifdef SMC_8_BIT_CHIPS_GLOBAL + #if (SMC_8_BIT_CHIPS_GLOBAL < SMC_8_BIT) + #undef SMC_8_BIT_CHIPS_GLOBAL + #if (SMC_8_BIT_CHIPS == TRUE) + #define SMC_8_BIT_CHIPS_GLOBAL TRUE + #elif (SMC_8_BIT_CHIPS == FALSE) + #define SMC_8_BIT_CHIPS_GLOBAL FALSE + #else + #error error in SMC_8_BIT_CHIPS size + #endif + #endif + #else + #if (SMC_8_BIT_CHIPS == TRUE) + #define SMC_8_BIT_CHIPS_GLOBAL TRUE + #elif (SMC_8_BIT_CHIPS == FALSE) + #define SMC_8_BIT_CHIPS_GLOBAL FALSE + #else + #error error in SMC_8_BIT_CHIPS size + #endif + #endif + + #ifdef NWAIT_MODE_GLOBAL + #if (NWAIT_MODE_GLOBAL < NWAIT_MODE) + #undef NWAIT_MODE_GLOBAL + #if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED + #elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN + #else + #error error in NWAIT_MODE size + #endif + #endif + #else + #if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED + #elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN + #else + #error error in NWAIT_MODE size + #endif + #endif + + #undef EXT_SM_SIZE + #undef SMC_DBW + #undef SMC_8_BIT_CHIPS + #undef NWE_SETUP + #undef NCS_WR_SETUP + #undef NRD_SETUP + #undef NCS_RD_SETUP + #undef NCS_WR_PULSE + #undef NWE_PULSE + #undef NCS_RD_PULSE + #undef NRD_PULSE + #undef NCS_WR_HOLD + #undef NWE_HOLD + #undef NWE_CYCLE + #undef NCS_RD_HOLD + #undef NRD_CYCLE + #undef TDF_CYCLES + #undef TDF_OPTIM + #undef PAGE_MODE + #undef PAGE_SIZE + #undef NCS_CONTROLLED_READ + #undef NCS_CONTROLLED_WRITE + #undef NWAIT_MODE +#endif + + +//! Whether to use the NCS1 pin +#ifdef SMC_USE_NCS1 + #include SMC_COMPONENT_CS1 + + // Enable SM mode for CS1 if necessary. + AVR32_HMATRIX.sfr[AVR32_EBI_HMATRIX_NR] &= ~(1 << AVR32_EBI_SDRAM_CS); + AVR32_HMATRIX.sfr[AVR32_EBI_HMATRIX_NR]; + + // Setup SMC for NCS1 + SMC_CS_SETUP(1) + + #ifdef SMC_DBW_GLOBAL + #if (SMC_DBW_GLOBAL < SMC_DBW) + #undef SMC_DBW_GLOBAL + #if (SMC_DBW == 8) + #define SMC_DBW_GLOBAL 8 + #elif (SMC_DBW == 16) + #define SMC_DBW_GLOBAL 16 + #elif (SMC_DBW == 32) + #define SMC_DBW_GLOBAL 32 + #else + #error error in SMC_DBW size + #endif + #endif + #else + #if (SMC_DBW == 8) + #define SMC_DBW_GLOBAL 8 + #elif (SMC_DBW == 16) + #define SMC_DBW_GLOBAL 16 + #elif (SMC_DBW == 32) + #define SMC_DBW_GLOBAL 32 + #else + #error error in SMC_DBW size + #endif + #endif + + #ifdef SMC_8_BIT_CHIPS_GLOBAL + #if (SMC_8_BIT_CHIPS_GLOBAL < SMC_8_BIT) + #undef SMC_8_BIT_CHIPS_GLOBAL + #if (SMC_8_BIT_CHIPS == TRUE) + #define SMC_8_BIT_CHIPS_GLOBAL TRUE + #elif (SMC_8_BIT_CHIPS == FALSE) + #define SMC_8_BIT_CHIPS_GLOBAL FALSE + #else + #error error in SMC_8_BIT_CHIPS size + #endif + #endif + #else + #if (SMC_8_BIT_CHIPS == TRUE) + #define SMC_8_BIT_CHIPS_GLOBAL TRUE + #elif (SMC_8_BIT_CHIPS == FALSE) + #define SMC_8_BIT_CHIPS_GLOBAL FALSE + #else + #error error in SMC_8_BIT_CHIPS size + #endif + #endif + + #ifdef NWAIT_MODE_GLOBAL + #if (NWAIT_MODE_GLOBAL < NWAIT_MODE) + #undef NWAIT_MODE_GLOBAL + #if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED + #elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN + #else + #error error in NWAIT_MODE size + #endif + #endif + #else + #if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED + #elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN + #else + #error error in NWAIT_MODE size + #endif + #endif + + #undef EXT_SM_SIZE + #undef SMC_DBW + #undef SMC_8_BIT_CHIPS + #undef NWE_SETUP + #undef NCS_WR_SETUP + #undef NRD_SETUP + #undef NCS_RD_SETUP + #undef NCS_WR_PULSE + #undef NWE_PULSE + #undef NCS_RD_PULSE + #undef NRD_PULSE + #undef NCS_WR_HOLD + #undef NWE_HOLD + #undef NWE_CYCLE + #undef NCS_RD_HOLD + #undef NRD_CYCLE + #undef TDF_CYCLES + #undef TDF_OPTIM + #undef PAGE_MODE + #undef PAGE_SIZE + #undef NCS_CONTROLLED_READ + #undef NCS_CONTROLLED_WRITE + #undef NWAIT_MODE +#endif + +//! Whether to use the NCS2 pin +#ifdef SMC_USE_NCS2 + #include SMC_COMPONENT_CS2 + + // Setup SMC for NCS2 + SMC_CS_SETUP(2) + + #ifdef SMC_DBW_GLOBAL + #if (SMC_DBW_GLOBAL < SMC_DBW) + #undef SMC_DBW_GLOBAL + #if (SMC_DBW == 8) + #define SMC_DBW_GLOBAL 8 + #elif (SMC_DBW == 16) + #define SMC_DBW_GLOBAL 16 + #elif (SMC_DBW == 32) + #define SMC_DBW_GLOBAL 32 + #else + #error error in SMC_DBW size + #endif + #endif + #else + #if (SMC_DBW == 8) + #define SMC_DBW_GLOBAL 8 + #elif (SMC_DBW == 16) + #define SMC_DBW_GLOBAL 16 + #elif (SMC_DBW == 32) + #define SMC_DBW_GLOBAL 32 + #else + #error error in SMC_DBW size + #endif + #endif + + #ifdef SMC_8_BIT_CHIPS_GLOBAL + #if (SMC_8_BIT_CHIPS_GLOBAL < SMC_8_BIT) + #undef SMC_8_BIT_CHIPS_GLOBAL + #if (SMC_8_BIT_CHIPS == TRUE) + #define SMC_8_BIT_CHIPS_GLOBAL TRUE + #elif (SMC_8_BIT_CHIPS == FALSE) + #define SMC_8_BIT_CHIPS_GLOBAL FALSE + #else + #error error in SMC_8_BIT_CHIPS size + #endif + #endif + #else + #if (SMC_8_BIT_CHIPS == TRUE) + #define SMC_8_BIT_CHIPS_GLOBAL TRUE + #elif (SMC_8_BIT_CHIPS == FALSE) + #define SMC_8_BIT_CHIPS_GLOBAL FALSE + #else + #error error in SMC_8_BIT_CHIPS size + #endif + #endif + + #ifdef NWAIT_MODE_GLOBAL + #if (NWAIT_MODE_GLOBAL < NWAIT_MODE) + #undef NWAIT_MODE_GLOBAL + #if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED + #elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN + #else + #error error in NWAIT_MODE size + #endif + #endif + #else + #if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED + #elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN + #else + #error error in NWAIT_MODE size + #endif + #endif + + + #undef EXT_SM_SIZE + #undef SMC_DBW + #undef SMC_8_BIT_CHIPS + #undef NWE_SETUP + #undef NCS_WR_SETUP + #undef NRD_SETUP + #undef NCS_RD_SETUP + #undef NCS_WR_PULSE + #undef NWE_PULSE + #undef NCS_RD_PULSE + #undef NRD_PULSE + #undef NCS_WR_HOLD + #undef NWE_HOLD + #undef NWE_CYCLE + #undef NCS_RD_HOLD + #undef NRD_CYCLE + #undef TDF_CYCLES + #undef TDF_OPTIM + #undef PAGE_MODE + #undef PAGE_SIZE + #undef NCS_CONTROLLED_READ + #undef NCS_CONTROLLED_WRITE + #undef NWAIT_MODE +#endif + +//! Whether to use the NCS3 pin +#ifdef SMC_USE_NCS3 + #include SMC_COMPONENT_CS3 + + // Setup SMC for NCS3 + SMC_CS_SETUP(3) + + #ifdef SMC_DBW_GLOBAL + #if (SMC_DBW_GLOBAL < SMC_DBW) + #undef SMC_DBW_GLOBAL + #if (SMC_DBW == 8) + #define SMC_DBW_GLOBAL 8 + #elif (SMC_DBW == 16) + #define SMC_DBW_GLOBAL 16 + #elif (SMC_DBW == 32) + #define SMC_DBW_GLOBAL 32 + #else + #error error in SMC_DBW size + #endif + #endif + #else + #if (SMC_DBW == 8) + #define SMC_DBW_GLOBAL 8 + #elif (SMC_DBW == 16) + #define SMC_DBW_GLOBAL 16 + #elif (SMC_DBW == 32) + #define SMC_DBW_GLOBAL 32 + #else + #error error in SMC_DBW size + #endif + #endif + + #ifdef SMC_8_BIT_CHIPS_GLOBAL + #if (SMC_8_BIT_CHIPS_GLOBAL < SMC_8_BIT) + #undef SMC_8_BIT_CHIPS_GLOBAL + #if (SMC_8_BIT_CHIPS == TRUE) + #define SMC_8_BIT_CHIPS_GLOBAL TRUE + #elif (SMC_8_BIT_CHIPS == FALSE) + #define SMC_8_BIT_CHIPS_GLOBAL FALSE + #else + #error error in SMC_8_BIT_CHIPS size + #endif + #endif + #else + #if (SMC_8_BIT_CHIPS == TRUE) + #define SMC_8_BIT_CHIPS_GLOBAL TRUE + #elif (SMC_8_BIT_CHIPS == FALSE) + #define SMC_8_BIT_CHIPS_GLOBAL FALSE + #else + #error error in SMC_8_BIT_CHIPS size + #endif + #endif + + #ifdef NWAIT_MODE_GLOBAL + #if (NWAIT_MODE_GLOBAL < NWAIT_MODE) + #undef NWAIT_MODE_GLOBAL + #if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED + #elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN + #else + #error error in NWAIT_MODE size + #endif + #endif + #else + #if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED + #elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN + #else + #error error in NWAIT_MODE size + #endif + #endif + + + #undef EXT_SM_SIZE + #undef SMC_DBW + #undef SMC_8_BIT_CHIPS + #undef NWE_SETUP + #undef NCS_WR_SETUP + #undef NRD_SETUP + #undef NCS_RD_SETUP + #undef NCS_WR_PULSE + #undef NWE_PULSE + #undef NCS_RD_PULSE + #undef NRD_PULSE + #undef NCS_WR_HOLD + #undef NWE_HOLD + #undef NWE_CYCLE + #undef NCS_RD_HOLD + #undef NRD_CYCLE + #undef TDF_CYCLES + #undef TDF_OPTIM + #undef PAGE_MODE + #undef PAGE_SIZE + #undef NCS_CONTROLLED_READ + #undef NCS_CONTROLLED_WRITE + #undef NWAIT_MODE +#endif + +//! Whether to use the NCS4 pin +#ifdef SMC_USE_NCS4 + #include SMC_COMPONENT_CS4 + + // Setup SMC for NCS4 + SMC_CS_SETUP(4) + + #ifdef SMC_DBW_GLOBAL + #if (SMC_DBW_GLOBAL < SMC_DBW) + #undef SMC_DBW_GLOBAL + #if (SMC_DBW == 8) + #define SMC_DBW_GLOBAL 8 + #elif (SMC_DBW == 16) + #define SMC_DBW_GLOBAL 16 + #elif (SMC_DBW == 32) + #define SMC_DBW_GLOBAL 32 + #else + #error error in SMC_DBW size + #endif + #endif + #else + #if (SMC_DBW == 8) + #define SMC_DBW_GLOBAL 8 + #elif (SMC_DBW == 16) + #define SMC_DBW_GLOBAL 16 + #elif (SMC_DBW == 32) + #define SMC_DBW_GLOBAL 32 + #else + #error error in SMC_DBW size + #endif + #endif + + #ifdef SMC_8_BIT_CHIPS_GLOBAL + #if (SMC_8_BIT_CHIPS_GLOBAL < SMC_8_BIT) + #undef SMC_8_BIT_CHIPS_GLOBAL + #if (SMC_8_BIT_CHIPS == TRUE) + #define SMC_8_BIT_CHIPS_GLOBAL TRUE + #elif (SMC_8_BIT_CHIPS == FALSE) + #define SMC_8_BIT_CHIPS_GLOBAL FALSE + #else + #error error in SMC_8_BIT_CHIPS size + #endif + #endif + #else + #if (SMC_8_BIT_CHIPS == TRUE) + #define SMC_8_BIT_CHIPS_GLOBAL TRUE + #elif (SMC_8_BIT_CHIPS == FALSE) + #define SMC_8_BIT_CHIPS_GLOBAL FALSE + #else + #error error in SMC_8_BIT_CHIPS size + #endif + #endif + + #ifdef NWAIT_MODE_GLOBAL + #if (NWAIT_MODE_GLOBAL < NWAIT_MODE) + #undef NWAIT_MODE_GLOBAL + #if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED + #elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN + #else + #error error in NWAIT_MODE size + #endif + #endif + #else + #if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED + #elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN + #else + #error error in NWAIT_MODE size + #endif + #endif + + + #undef EXT_SM_SIZE + #undef SMC_DBW + #undef SMC_8_BIT_CHIPS + #undef NWE_SETUP + #undef NCS_WR_SETUP + #undef NRD_SETUP + #undef NCS_RD_SETUP + #undef NCS_WR_PULSE + #undef NWE_PULSE + #undef NCS_RD_PULSE + #undef NRD_PULSE + #undef NCS_WR_HOLD + #undef NWE_HOLD + #undef NWE_CYCLE + #undef NCS_RD_HOLD + #undef NRD_CYCLE + #undef TDF_CYCLES + #undef TDF_OPTIM + #undef PAGE_MODE + #undef PAGE_SIZE + #undef NCS_CONTROLLED_READ + #undef NCS_CONTROLLED_WRITE + #undef NWAIT_MODE +#endif + +//! Whether to use the NCS5 pin +#ifdef SMC_USE_NCS5 + #include SMC_COMPONENT_CS5 + + // Setup SMC for NCS5 + SMC_CS_SETUP(5) + + #ifdef SMC_DBW_GLOBAL + #if (SMC_DBW_GLOBAL < SMC_DBW) + #undef SMC_DBW_GLOBAL + #if (SMC_DBW == 8) + #define SMC_DBW_GLOBAL 8 + #elif (SMC_DBW == 16) + #define SMC_DBW_GLOBAL 16 + #elif (SMC_DBW == 32) + #define SMC_DBW_GLOBAL 32 + #else + #error error in SMC_DBW size + #endif + #endif + #else + #if (SMC_DBW == 8) + #define SMC_DBW_GLOBAL 8 + #elif (SMC_DBW == 16) + #define SMC_DBW_GLOBAL 16 + #elif (SMC_DBW == 32) + #define SMC_DBW_GLOBAL 32 + #else + #error error in SMC_DBW size + #endif + #endif + + #ifdef SMC_8_BIT_CHIPS_GLOBAL + #if (SMC_8_BIT_CHIPS_GLOBAL < SMC_8_BIT) + #undef SMC_8_BIT_CHIPS_GLOBAL + #if (SMC_8_BIT_CHIPS == TRUE) + #define SMC_8_BIT_CHIPS_GLOBAL TRUE + #elif (SMC_8_BIT_CHIPS == FALSE) + #define SMC_8_BIT_CHIPS_GLOBAL FALSE + #else + #error error in SMC_8_BIT_CHIPS size + #endif + #endif + #else + #if (SMC_8_BIT_CHIPS == TRUE) + #define SMC_8_BIT_CHIPS_GLOBAL TRUE + #elif (SMC_8_BIT_CHIPS == FALSE) + #define SMC_8_BIT_CHIPS_GLOBAL FALSE + #else + #error error in SMC_8_BIT_CHIPS size + #endif + #endif + + #ifdef NWAIT_MODE_GLOBAL + #if (NWAIT_MODE_GLOBAL < NWAIT_MODE) + #undef NWAIT_MODE_GLOBAL + #if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED + #elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN + #else + #error error in NWAIT_MODE size + #endif + #endif + #else + #if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED + #elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN) + #define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN + #else + #error error in NWAIT_MODE size + #endif + #endif + + + #undef EXT_SM_SIZE + #undef SMC_DBW + #undef SMC_8_BIT_CHIPS + #undef NWE_SETUP + #undef NCS_WR_SETUP + #undef NRD_SETUP + #undef NCS_RD_SETUP + #undef NCS_WR_PULSE + #undef NWE_PULSE + #undef NCS_RD_PULSE + #undef NRD_PULSE + #undef NCS_WR_HOLD + #undef NWE_HOLD + #undef NWE_CYCLE + #undef NCS_RD_HOLD + #undef NRD_CYCLE + #undef TDF_CYCLES + #undef TDF_OPTIM + #undef PAGE_MODE + #undef PAGE_SIZE + #undef NCS_CONTROLLED_READ + #undef NCS_CONTROLLED_WRITE + #undef NWAIT_MODE +#endif + // Put the multiplexed MCU pins used for the SM under control of the SMC. + smc_enable_muxed_pins(); +} + +/*! \brief Puts the multiplexed MCU pins used for the SMC + * + */ +static void smc_enable_muxed_pins(void) +{ + static const gpio_map_t SMC_EBI_GPIO_MAP = + { + // Enable data pins. +#ifdef EBI_DATA_0 + {ATPASTE2(EBI_DATA_0,_PIN),ATPASTE2(EBI_DATA_0,_FUNCTION)}, +#endif +#ifdef EBI_DATA_1 + {ATPASTE2(EBI_DATA_1,_PIN),ATPASTE2(EBI_DATA_1,_FUNCTION)}, +#endif +#ifdef EBI_DATA_2 + {ATPASTE2(EBI_DATA_2,_PIN),ATPASTE2(EBI_DATA_2,_FUNCTION)}, +#endif +#ifdef EBI_DATA_3 + {ATPASTE2(EBI_DATA_3,_PIN),ATPASTE2(EBI_DATA_3,_FUNCTION)}, +#endif +#ifdef EBI_DATA_4 + {ATPASTE2(EBI_DATA_4,_PIN),ATPASTE2(EBI_DATA_4,_FUNCTION)}, +#endif +#ifdef EBI_DATA_5 + {ATPASTE2(EBI_DATA_5,_PIN),ATPASTE2(EBI_DATA_5,_FUNCTION)}, +#endif +#ifdef EBI_DATA_6 + {ATPASTE2(EBI_DATA_6,_PIN),ATPASTE2(EBI_DATA_6,_FUNCTION)}, +#endif +#ifdef EBI_DATA_7 + {ATPASTE2(EBI_DATA_7,_PIN),ATPASTE2(EBI_DATA_7,_FUNCTION)}, +#endif +#ifdef EBI_DATA_8 + {ATPASTE2(EBI_DATA_8,_PIN),ATPASTE2(EBI_DATA_8,_FUNCTION)}, +#endif +#ifdef EBI_DATA_9 + {ATPASTE2(EBI_DATA_9,_PIN),ATPASTE2(EBI_DATA_9,_FUNCTION)}, +#endif +#ifdef EBI_DATA_10 + {ATPASTE2(EBI_DATA_10,_PIN),ATPASTE2(EBI_DATA_10,_FUNCTION)}, +#endif +#ifdef EBI_DATA_11 + {ATPASTE2(EBI_DATA_11,_PIN),ATPASTE2(EBI_DATA_11,_FUNCTION)}, +#endif +#ifdef EBI_DATA_12 + {ATPASTE2(EBI_DATA_12,_PIN),ATPASTE2(EBI_DATA_12,_FUNCTION)}, +#endif +#ifdef EBI_DATA_13 + {ATPASTE2(EBI_DATA_13,_PIN),ATPASTE2(EBI_DATA_13,_FUNCTION)}, +#endif +#ifdef EBI_DATA_14 + {ATPASTE2(EBI_DATA_14,_PIN),ATPASTE2(EBI_DATA_14,_FUNCTION)}, +#endif +#ifdef EBI_DATA_15 + {ATPASTE2(EBI_DATA_15,_PIN),ATPASTE2(EBI_DATA_15,_FUNCTION)}, +#endif +#ifdef EBI_DATA_16 + {ATPASTE2(EBI_DATA_16,_PIN),ATPASTE2(EBI_DATA_16,_FUNCTION)}, +#endif +#ifdef EBI_DATA_17 + {ATPASTE2(EBI_DATA_17,_PIN),ATPASTE2(EBI_DATA_17,_FUNCTION)}, +#endif +#ifdef EBI_DATA_18 + {ATPASTE2(EBI_DATA_18,_PIN),ATPASTE2(EBI_DATA_18,_FUNCTION)}, +#endif +#ifdef EBI_DATA_19 + {ATPASTE2(EBI_DATA_19,_PIN),ATPASTE2(EBI_DATA_19,_FUNCTION)}, +#endif +#ifdef EBI_DATA_20 + {ATPASTE2(EBI_DATA_20,_PIN),ATPASTE2(EBI_DATA_20,_FUNCTION)}, +#endif +#ifdef EBI_DATA_21 + {ATPASTE2(EBI_DATA_21,_PIN),ATPASTE2(EBI_DATA_21,_FUNCTION)}, +#endif +#ifdef EBI_DATA_22 + {ATPASTE2(EBI_DATA_22,_PIN),ATPASTE2(EBI_DATA_22,_FUNCTION)}, +#endif +#ifdef EBI_DATA_23 + {ATPASTE2(EBI_DATA_23,_PIN),ATPASTE2(EBI_DATA_23,_FUNCTION)}, +#endif +#ifdef EBI_DATA_24 + {ATPASTE2(EBI_DATA_24,_PIN),ATPASTE2(EBI_DATA_24,_FUNCTION)}, +#endif +#ifdef EBI_DATA_25 + {ATPASTE2(EBI_DATA_25,_PIN),ATPASTE2(EBI_DATA_25,_FUNCTION)}, +#endif +#ifdef EBI_DATA_26 + {ATPASTE2(EBI_DATA_26,_PIN),ATPASTE2(EBI_DATA_26,_FUNCTION)}, +#endif +#ifdef EBI_DATA_27 + {ATPASTE2(EBI_DATA_27,_PIN),ATPASTE2(EBI_DATA_27,_FUNCTION)}, +#endif +#ifdef EBI_DATA_28 + {ATPASTE2(EBI_DATA_28,_PIN),ATPASTE2(EBI_DATA_28,_FUNCTION)}, +#endif +#ifdef EBI_DATA_29 + {ATPASTE2(EBI_DATA_29,_PIN),ATPASTE2(EBI_DATA_29,_FUNCTION)}, +#endif +#ifdef EBI_DATA_30 + {ATPASTE2(EBI_DATA_30,_PIN),ATPASTE2(EBI_DATA_30,_FUNCTION)}, +#endif +#ifdef EBI_DATA_31 + {ATPASTE2(EBI_DATA_31,_PIN),ATPASTE2(EBI_DATA_31,_FUNCTION)}, +#endif + + // Enable address pins. +#if SMC_DBW_GLOBAL <= 8 +#ifdef EBI_ADDR_0 + {ATPASTE2(EBI_ADDR_0,_PIN),ATPASTE2(EBI_ADDR_0,_FUNCTION)}, +#endif +#endif +#if SMC_DBW_GLOBAL <= 16 +#ifdef EBI_ADDR_1 + {ATPASTE2(EBI_ADDR_1,_PIN),ATPASTE2(EBI_ADDR_1,_FUNCTION)}, +#endif +#endif + +#ifdef EBI_ADDR_2 + {ATPASTE2(EBI_ADDR_2,_PIN),ATPASTE2(EBI_ADDR_2,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_3 + {ATPASTE2(EBI_ADDR_3,_PIN),ATPASTE2(EBI_ADDR_3,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_4 + {ATPASTE2(EBI_ADDR_4,_PIN),ATPASTE2(EBI_ADDR_4,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_5 + {ATPASTE2(EBI_ADDR_5,_PIN),ATPASTE2(EBI_ADDR_5,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_6 + {ATPASTE2(EBI_ADDR_6,_PIN),ATPASTE2(EBI_ADDR_6,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_7 + {ATPASTE2(EBI_ADDR_7,_PIN),ATPASTE2(EBI_ADDR_7,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_8 + {ATPASTE2(EBI_ADDR_8,_PIN),ATPASTE2(EBI_ADDR_8,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_9 + {ATPASTE2(EBI_ADDR_9,_PIN),ATPASTE2(EBI_ADDR_9,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_10 + {ATPASTE2(EBI_ADDR_10,_PIN),ATPASTE2(EBI_ADDR_10,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_11 + {ATPASTE2(EBI_ADDR_11,_PIN),ATPASTE2(EBI_ADDR_11,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_12 + {ATPASTE2(EBI_ADDR_12,_PIN),ATPASTE2(EBI_ADDR_12,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_13 + {ATPASTE2(EBI_ADDR_13,_PIN),ATPASTE2(EBI_ADDR_13,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_14 + {ATPASTE2(EBI_ADDR_14,_PIN),ATPASTE2(EBI_ADDR_14,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_15 + {ATPASTE2(EBI_ADDR_15,_PIN),ATPASTE2(EBI_ADDR_15,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_16 + {ATPASTE2(EBI_ADDR_16,_PIN),ATPASTE2(EBI_ADDR_16,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_17 + {ATPASTE2(EBI_ADDR_17,_PIN),ATPASTE2(EBI_ADDR_17,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_18 + {ATPASTE2(EBI_ADDR_18,_PIN),ATPASTE2(EBI_ADDR_18,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_19 + {ATPASTE2(EBI_ADDR_19,_PIN),ATPASTE2(EBI_ADDR_19,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_20 + {ATPASTE2(EBI_ADDR_20,_PIN),ATPASTE2(EBI_ADDR_20,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_21 + {ATPASTE2(EBI_ADDR_21,_PIN),ATPASTE2(EBI_ADDR_21,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_22 + {ATPASTE2(EBI_ADDR_22,_PIN),ATPASTE2(EBI_ADDR_22,_FUNCTION)}, +#endif +#ifdef EBI_ADDR_23 + {ATPASTE2(EBI_ADDR_23,_PIN),ATPASTE2(EBI_ADDR_23,_FUNCTION)}, +#endif + +#if SMC_DBW_GLOBAL <= 8 + #undef SMC_8_BIT_CHIPS + #define SMC_8_BIT_CHIPS TRUE +#endif + + // Enable data mask pins. +#if !SMC_8_BIT_CHIPS_GLOBAL +#ifdef EBI_ADDR_0 + {ATPASTE2(EBI_ADDR_0,_PIN),ATPASTE2(EBI_ADDR_0,_FUNCTION)}, +#endif +#endif +#ifdef EBI_NWE0 + {ATPASTE2(EBI_NWE0,_PIN),ATPASTE2(EBI_NWE0,_FUNCTION)}, +#endif + +#if SMC_DBW_GLOBAL >= 16 + #ifdef EBI_NWE1 + {ATPASTE2(EBI_NWE1,_PIN),ATPASTE2(EBI_NWE1,_FUNCTION)}, + #endif + #if SMC_DBW_GLOBAL >= 32 + #ifdef EBI_ADDR_1 + {ATPASTE2(EBI_ADDR_1,_PIN),ATPASTE2(EBI_ADDR_1,_FUNCTION)}, + #endif + #ifdef EBI_NWE3 + {ATPASTE2(EBI_NWE3,_PIN),ATPASTE2(EBI_NWE3,_FUNCTION)}, + #endif + #endif +#endif + #ifdef EBI_NRD + {ATPASTE2(EBI_NRD,_PIN),ATPASTE2(EBI_NRD,_FUNCTION)}, + #endif + + // Enable control pins. +#if NWAIT_MODE_GLOBAL != AVR32_SMC_EXNW_MODE_DISABLED + #ifdef EBI_NWAIT + {ATPASTE2(EBI_NWAIT,_PIN),ATPASTE2(EBI_NWAIT,_FUNCTION)}, + #endif +#endif +#ifdef SMC_USE_NCS0 + #ifdef EBI_NCS_0 + {ATPASTE2(EBI_NCS_0,_PIN),ATPASTE2(EBI_NCS_0,_FUNCTION)}, + #endif +#endif +#ifdef SMC_USE_NCS1 + #ifdef EBI_NCS_1 + {ATPASTE2(EBI_NCS_1,_PIN),ATPASTE2(EBI_NCS_1,_FUNCTION)}, + #endif +#endif +#ifdef SMC_USE_NCS2 + #ifdef EBI_NCS_2 + {ATPASTE2(EBI_NCS_2,_PIN),ATPASTE2(EBI_NCS_2,_FUNCTION)}, + #endif +#endif +#ifdef SMC_USE_NCS3 + #ifdef EBI_NCS_3 + {ATPASTE2(EBI_NCS_3,_PIN),ATPASTE2(EBI_NCS_3,_FUNCTION)}, + #endif +#endif +#ifdef SMC_USE_NCS4 + #ifdef EBI_NCS_4 + {ATPASTE2(EBI_NCS_4,_PIN),ATPASTE2(EBI_NCS_4,_FUNCTION)}, + #endif +#endif +#ifdef SMC_USE_NCS5 + #ifdef EBI_NCS_5 + {ATPASTE2(EBI_NCS_5,_PIN),ATPASTE2(EBI_NCS_5,_FUNCTION)}, + #endif +#endif + }; + + gpio_enable_module(SMC_EBI_GPIO_MAP, sizeof(SMC_EBI_GPIO_MAP) / sizeof(SMC_EBI_GPIO_MAP[0])); +} + +unsigned char smc_get_cs_size(unsigned char cs) +{ + return smc_tab_cs_size[cs]; +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/EBI/SMC/smc.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/EBI/SMC/smc.h new file mode 100644 index 0000000..c3bdf43 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/EBI/SMC/smc.h @@ -0,0 +1,68 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief SMC on EBI driver for AVR32 UC3. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a SMC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _SMC_H_ +#define _SMC_H_ + +#include + +#include "compiler.h" +#include "conf_ebi.h" + +/*! \brief Initializes the AVR32 SMC module and the connected SRAM(s). + * \param hsb_hz HSB frequency in Hz (the HSB frequency is applied to the SMC). + * \note Each access to the SMC address space validates the mode of the SMC + * and generates an operation corresponding to this mode. + */ +extern void smc_init(unsigned long hsb_hz); + +/*! \brief Return the size of the peripheral connected . + * \param cs The chip select value + */ +extern unsigned char smc_get_cs_size(unsigned char cs); + +#endif // _SMC_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/EIC/eic.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/EIC/eic.c new file mode 100644 index 0000000..1008c94 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/EIC/eic.c @@ -0,0 +1,183 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief EIC driver for AVR32 UC3. + * + * AVR32 External Interrupt Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an EIC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "compiler.h" +#include "preprocessor.h" +#include "eic.h" + + + +void eic_init(volatile avr32_eic_t *eic, const eic_options_t *opt, unsigned int nb_lines) +{ + int i; + for (i = 0; i < nb_lines; i++) + { + // Set up mode level + eic->mode = (opt[i].eic_mode == 1) ? (eic->mode | (1 << opt[i].eic_line)) : (eic->mode & ~(1 << opt[i].eic_line)); + // Set up edge type + eic->edge = (opt[i].eic_edge == 1) ? (eic->edge | (1 << opt[i].eic_line)) : (eic->edge & ~(1 << opt[i].eic_line)); + // Set up level + eic->level = (opt[i].eic_level == 1) ? (eic->level | (1 << opt[i].eic_line)) : (eic->level & ~(1 << opt[i].eic_line)); + // Set up if filter is used + eic->filter = (opt[i].eic_filter == 1) ? (eic->filter | (1 << opt[i].eic_line)) : (eic->filter & ~(1 << opt[i].eic_line)); + // Set up which mode is used : asynchronous mode/ synchronous mode + eic->async = (opt[i].eic_async == 1) ? (eic->async | (1 << opt[i].eic_line)) : (eic->async & ~(1 << opt[i].eic_line)); + } +} + +void eic_enable_lines(volatile avr32_eic_t *eic, unsigned int mask_lines) +{ + eic->en = mask_lines; +} + +void eic_enable_line(volatile avr32_eic_t *eic, unsigned int line_number) +{ + // Enable line line_number + eic->en = 1 << line_number; +} + +void eic_disable_lines(volatile avr32_eic_t *eic, unsigned int mask_lines) +{ + eic->dis = mask_lines; +} + +void eic_disable_line(volatile avr32_eic_t *eic, unsigned int line_number) +{ + // Disable line line_number + eic->dis = 1 << line_number; +} + +Bool eic_is_line_enabled(volatile avr32_eic_t *eic, unsigned int line_number) +{ + return (eic->ctrl & (1 << line_number)) != 0; +} + +void eic_enable_interrupt_lines(volatile avr32_eic_t *eic, unsigned int mask_lines) +{ + eic->ier = mask_lines; +} + +void eic_enable_interrupt_line(volatile avr32_eic_t *eic, unsigned int line_number) +{ + // Enable line line_number + eic->ier = 1 << line_number; +} + +void eic_disable_interrupt_lines(volatile avr32_eic_t *eic, unsigned int mask_lines) +{ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + if (global_interrupt_enabled) Disable_global_interrupt(); + eic->idr = mask_lines; + eic->imr; + if (global_interrupt_enabled) Enable_global_interrupt(); +} + +void eic_disable_interrupt_line(volatile avr32_eic_t *eic, unsigned int line_number) +{ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + // Disable line line_number + if (global_interrupt_enabled) Disable_global_interrupt(); + eic->idr = 1 << line_number; + eic->imr; + if (global_interrupt_enabled) Enable_global_interrupt(); +} + +Bool eic_is_interrupt_line_enabled(volatile avr32_eic_t *eic, unsigned int line_number) +{ + return (eic->imr & (1 << line_number)) != 0; +} + +void eic_clear_interrupt_lines(volatile avr32_eic_t *eic, unsigned int mask_lines) +{ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + if (global_interrupt_enabled) Disable_global_interrupt(); + eic->icr = mask_lines; + eic->isr; + if (global_interrupt_enabled) Enable_global_interrupt(); +} + +void eic_clear_interrupt_line(volatile avr32_eic_t *eic, unsigned int line_number) +{ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + // Clear line line_number + if (global_interrupt_enabled) Disable_global_interrupt(); + eic->icr = 1 << line_number; + eic->isr; + if (global_interrupt_enabled) Enable_global_interrupt(); +} + +Bool eic_is_interrupt_line_pending(volatile avr32_eic_t *eic, unsigned int line_number) +{ + return (eic->isr & (1 << line_number)) != 0; +} + +#if !defined(AVR32_EIC_301_H_INCLUDED) +void eic_enable_interrupt_scan(volatile avr32_eic_t *eic,unsigned int presc) +{ + // Enable SCAN function with PRESC value + eic->scan |= (presc << AVR32_EIC_SCAN_PRESC_OFFSET) | (1 << AVR32_EIC_SCAN_EN_OFFSET); +} + +void eic_disable_interrupt_scan(volatile avr32_eic_t *eic) +{ + // Disable SCAN function + eic->scan = 0 << AVR32_EIC_SCAN_EN_OFFSET; +} + +unsigned long eic_get_interrupt_pad_scan(volatile avr32_eic_t *eic) +{ + // Return pad number that causes interrupt + return(eic->scan>>AVR32_EIC_SCAN_PIN_OFFSET); +} +#endif \ No newline at end of file diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/EIC/eic.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/EIC/eic.h new file mode 100644 index 0000000..32641b7 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/EIC/eic.h @@ -0,0 +1,275 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief EIC driver for AVR32 UC3. + * + * AVR32 External Interrupt Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an EIC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _EIC_H_ +#define _EIC_H_ + +#include "compiler.h" + +/*! \name External Interrupt lines + */ +//! @{ +#if (UC3A || UC3B) +#define EXT_INT0 AVR32_EIC_INT0 //!< Line 0 +#define EXT_INT1 AVR32_EIC_INT1 //!< Line 1 +#define EXT_INT2 AVR32_EIC_INT2 //!< Line 2 +#define EXT_INT3 AVR32_EIC_INT3 //!< Line 3 +#define EXT_INT4 AVR32_EIC_INT4 //!< Line 4 +#define EXT_INT5 AVR32_EIC_INT5 //!< Line 5 +#define EXT_INT6 AVR32_EIC_INT6 //!< Line 6 +#define EXT_INT7 AVR32_EIC_INT7 //!< Line 7 +#define EXT_NMI AVR32_EIC_NMI //!< Line 8 +#else +#define EXT_INT0 AVR32_EIC_INT1 //!< Line 0 +#define EXT_INT1 AVR32_EIC_INT2 //!< Line 1 +#define EXT_INT2 AVR32_EIC_INT3 //!< Line 2 +#define EXT_INT3 AVR32_EIC_INT4 //!< Line 3 +#define EXT_INT4 AVR32_EIC_INT5 //!< Line 4 +#define EXT_INT5 AVR32_EIC_INT6 //!< Line 5 +#define EXT_INT6 AVR32_EIC_INT7 //!< Line 6 +#define EXT_INT7 AVR32_EIC_INT8 //!< Line 7 +#define EXT_NMI AVR32_EIC_NMI //!< Line 8 + +#endif + +//! @} + +/*! \name Mode Trigger Options + */ +//! @{ +#define EIC_MODE_EDGE_TRIGGERED AVR32_EIC_EDGE_IRQ //!< +#define EIC_MODE_LEVEL_TRIGGERED AVR32_EIC_LEVEL_IRQ //!< +//! @} + +/*! \name Edge level Options + */ +//! @{ +#define EIC_EDGE_FALLING_EDGE AVR32_EIC_FALLING_EDGE //!< +#define EIC_EDGE_RISING_EDGE AVR32_EIC_RISING_EDGE //!< +//! @} + +/*! \name Level Options + */ +//! @{ +#define EIC_LEVEL_LOW_LEVEL AVR32_EIC_LOW_LEVEL //!< +#define EIC_LEVEL_HIGH_LEVEL AVR32_EIC_HIGH_LEVEL //!< +//! @} + +/*! \name Filter Options + */ +//! @{ +#define EIC_FILTER_ENABLED AVR32_EIC_FILTER_ON //!< +#define EIC_FILTER_DISABLED AVR32_EIC_FILTER_OFF //!< +//! @} + +/*! \name Synch Mode Options + */ +//! @{ +#define EIC_SYNCH_MODE AVR32_EIC_SYNC //!< +#define EIC_ASYNCH_MODE AVR32_EIC_USE_ASYNC //!< +//! @} + +//! Configuration parameters of the EIC module. +typedef struct +{ + //!Line + unsigned char eic_line; + + //! Mode : EDGE_LEVEL or TRIGGER_LEVEL + unsigned char eic_mode; + + //! Edge : FALLING_EDGE or RISING_EDGE + unsigned char eic_edge; + + //! Level : LOW_LEVEL or HIGH_LEVEL + unsigned char eic_level; + + //! Filter: NOT_FILTERED or FILTERED + unsigned char eic_filter; + + //! Async: SYNC mode or ASYNC + unsigned char eic_async; + +} eic_options_t; + + +/*! \brief Init the EIC driver. + * + * \param eic Base address of the EIC module + * \param opt Configuration parameters of the EIC module (see \ref eic_options_t) + * \param nb_lines Number of lines to consider, equal to size of opt buffer + */ +extern void eic_init(volatile avr32_eic_t *eic, const eic_options_t *opt, unsigned int nb_lines); + +/*! \brief Enable the EIC driver. + * + * \param eic Base address of the EIC module + * \param mask_lines Mask for current selected lines + */ +extern void eic_enable_lines(volatile avr32_eic_t *eic, unsigned int mask_lines); + +/*! \brief Enable the EIC driver. + * + * \param eic Base address of the EIC module + * \param line_number Line number to enable + */ +extern void eic_enable_line(volatile avr32_eic_t *eic, unsigned int line_number); + +/*! \brief Disable the EIC driver. + * + * \param eic Base address of the EIC module + * \param mask_lines Mask for current selected lines + */ +extern void eic_disable_lines(volatile avr32_eic_t *eic, unsigned int mask_lines); + +/*! \brief Disable the EIC driver. + * + * \param eic Base address of the EIC module + * \param line_number Line number to disable + */ +extern void eic_disable_line(volatile avr32_eic_t *eic, unsigned int line_number); + +/*! \brief Tells whether an EIC line is enabled. + * + * \param eic Base address of the EIC module + * \param line_number Line number to test + * + * \return Whether an EIC line is enabled. + */ +extern Bool eic_is_line_enabled(volatile avr32_eic_t *eic, unsigned int line_number); + +/*! \name Interrupt Control Functions + */ +//! @{ + +/*! \brief Enable the interrupt feature of the EIC. + * + * \param eic Base address of the EIC (i.e. &AVR32_EIC). + * \param mask_lines Mask for current selected lines + */ +extern void eic_enable_interrupt_lines(volatile avr32_eic_t *eic, unsigned int mask_lines); + +/*! \brief Enable the interrupt feature of the EIC. + * + * \param eic Base address of the EIC (i.e. &AVR32_EIC). + * \param line_number Line number to enable + */ +extern void eic_enable_interrupt_line(volatile avr32_eic_t *eic, unsigned int line_number); + +/*! \brief Disable the interrupt feature of the EIC. + * + * \param eic Base address of the EIC (i.e. &AVR32_EIC). + * \param mask_lines Mask for current selected lines + */ +extern void eic_disable_interrupt_lines(volatile avr32_eic_t *eic, unsigned int mask_lines); + +/*! \brief Disable the interrupt feature of the EIC. + * + * \param eic Base address of the EIC (i.e. &AVR32_EIC). + * \param line_number Line number to disable + */ +extern void eic_disable_interrupt_line(volatile avr32_eic_t *eic, unsigned int line_number); + +/*! \brief Tells whether an EIC interrupt line is enabled. + * + * \param eic Base address of the EIC module + * \param line_number Line number to test + * + * \return Whether an EIC interrupt line is enabled. + */ +extern Bool eic_is_interrupt_line_enabled(volatile avr32_eic_t *eic, unsigned int line_number); + +/*! \brief Clear the interrupt flag. + * Call this function once you've handled the interrupt. + * + * \param eic Base address of the EIC (i.e. &AVR32_EIC). + * \param mask_lines Mask for current selected lines + */ +extern void eic_clear_interrupt_lines(volatile avr32_eic_t *eic, unsigned int mask_lines); + +/*! \brief Clear the interrupt flag. + * Call this function once you've handled the interrupt. + * + * \param eic Base address of the EIC (i.e. &AVR32_EIC). + * \param line_number Line number to clear + */ +extern void eic_clear_interrupt_line(volatile avr32_eic_t *eic, unsigned int line_number); + +/*! \brief Tells whether an EIC interrupt line is pending. + * + * \param eic Base address of the EIC module + * \param line_number Line number to test + * + * \return Whether an EIC interrupt line is pending. + */ +extern Bool eic_is_interrupt_line_pending(volatile avr32_eic_t *eic, unsigned int line_number); + +/*! \brief Enable the interrupt scan feature of the EIC. + * + * \param eic Base address of the EIC (i.e. &AVR32_EIC). + * \param presc Prescale select for the keypad scan rate in the range [0,31]. + */ +extern void eic_enable_interrupt_scan(volatile avr32_eic_t *eic, unsigned int presc); + +/*! \brief Disable the interrupt scan feature of the EIC. + * + * \param eic Base address of the EIC (i.e. &AVR32_EIC). + */ +extern void eic_disable_interrupt_scan(volatile avr32_eic_t *eic); + +/*! \brief Return scan pad number that causes interrupt. + * + * \param eic Base address of the EIC (i.e. &AVR32_EIC). + */ +extern unsigned long eic_get_interrupt_pad_scan(volatile avr32_eic_t *eic); + +//! @} + + +#endif // _EIC_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.c new file mode 100644 index 0000000..2eee15c --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.c @@ -0,0 +1,1117 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FLASHC driver for AVR32 UC3. + * + * AVR32 Flash Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a FLASHC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include +#include "compiler.h" +#include "flashc.h" + + +/*! \name FLASHC Writable Bit-Field Registers + */ +//! @{ + +typedef union +{ + unsigned long fcr; + avr32_flashc_fcr_t FCR; +} u_avr32_flashc_fcr_t; + +typedef union +{ + unsigned long fcmd; + avr32_flashc_fcmd_t FCMD; +} u_avr32_flashc_fcmd_t; + +//! @} + + +/*! \name Flash Properties + */ +//! @{ + + +unsigned int flashc_get_flash_size(void) +{ +#if (defined AVR32_FLASHC_300_H_INCLUDED) + static const unsigned int FLASH_SIZE[1 << AVR32_FLASHC_PR_FSZ_SIZE] = + { + 32 << 10, + 64 << 10, + 128 << 10, + 256 << 10, + 384 << 10, + 512 << 10, + 768 << 10, + 1024 << 10 + }; + return FLASH_SIZE[(AVR32_FLASHC.pr & AVR32_FLASHC_PR_FSZ_MASK) >> AVR32_FLASHC_PR_FSZ_OFFSET]; +#else + static const unsigned int FLASH_SIZE[1 << AVR32_FLASHC_FSR_FSZ_SIZE] = + { + 32 << 10, + 64 << 10, + 128 << 10, + 256 << 10, + 384 << 10, + 512 << 10, + 768 << 10, + 1024 << 10 + }; + return FLASH_SIZE[(AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FSZ_MASK) >> AVR32_FLASHC_FSR_FSZ_OFFSET]; +#endif +} + + +unsigned int flashc_get_page_count(void) +{ + return flashc_get_flash_size() / AVR32_FLASHC_PAGE_SIZE; +} + + +unsigned int flashc_get_page_count_per_region(void) +{ + return flashc_get_page_count() / AVR32_FLASHC_REGIONS; +} + + +unsigned int flashc_get_page_region(int page_number) +{ + return ((page_number >= 0) ? page_number : flashc_get_page_number()) / flashc_get_page_count_per_region(); +} + + +unsigned int flashc_get_region_first_page_number(unsigned int region) +{ + return region * flashc_get_page_count_per_region(); +} + + +//! @} + + +/*! \name FLASHC Control + */ +//! @{ + + +unsigned int flashc_get_wait_state(void) +{ + return (AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FWS_MASK) >> AVR32_FLASHC_FCR_FWS_OFFSET; +} + + +void flashc_set_wait_state(unsigned int wait_state) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.fws = wait_state; + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +Bool flashc_is_ready_int_enabled(void) +{ + return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FRDY_MASK) != 0); +} + + +void flashc_enable_ready_int(Bool enable) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.frdy = (enable != FALSE); + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +Bool flashc_is_lock_error_int_enabled(void) +{ + return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_LOCKE_MASK) != 0); +} + + +void flashc_enable_lock_error_int(Bool enable) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.locke = (enable != FALSE); + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +Bool flashc_is_prog_error_int_enabled(void) +{ + return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_PROGE_MASK) != 0); +} + + +void flashc_enable_prog_error_int(Bool enable) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.proge = (enable != FALSE); + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +//! @} + + +/*! \name FLASHC Status + */ +//! @{ + + +Bool flashc_is_ready(void) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FRDY_MASK) != 0); +} + + +void flashc_default_wait_until_ready(void) +{ + while (!flashc_is_ready()); +} + + +void (*volatile flashc_wait_until_ready)(void) = flashc_default_wait_until_ready; + + +/*! \brief Gets the error status of the FLASHC. + * + * \return The error status of the FLASHC built up from + * \c AVR32_FLASHC_FSR_LOCKE_MASK and \c AVR32_FLASHC_FSR_PROGE_MASK. + * + * \warning This hardware error status is cleared by all functions reading the + * Flash Status Register (FSR). This function is therefore not part of + * the driver's API which instead presents \ref flashc_is_lock_error + * and \ref flashc_is_programming_error. + */ +static unsigned int flashc_get_error_status(void) +{ + return AVR32_FLASHC.fsr & (AVR32_FLASHC_FSR_LOCKE_MASK | + AVR32_FLASHC_FSR_PROGE_MASK); +} + + +//! Sticky error status of the FLASHC. +//! This variable is updated by functions that issue FLASHC commands. It +//! contains the cumulated FLASHC error status of all the FLASHC commands issued +//! by a function. +static unsigned int flashc_error_status = 0; + + +Bool flashc_is_lock_error(void) +{ + return ((flashc_error_status & AVR32_FLASHC_FSR_LOCKE_MASK) != 0); +} + + +Bool flashc_is_programming_error(void) +{ + return ((flashc_error_status & AVR32_FLASHC_FSR_PROGE_MASK) != 0); +} + + +//! @} + + +/*! \name FLASHC Command Control + */ +//! @{ + + +unsigned int flashc_get_command(void) +{ + return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_CMD_MASK) >> AVR32_FLASHC_FCMD_CMD_OFFSET; +} + + +unsigned int flashc_get_page_number(void) +{ + return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_PAGEN_MASK) >> AVR32_FLASHC_FCMD_PAGEN_OFFSET; +} + + +void flashc_issue_command(unsigned int command, int page_number) +{ + u_avr32_flashc_fcmd_t u_avr32_flashc_fcmd; + flashc_wait_until_ready(); + u_avr32_flashc_fcmd.fcmd = AVR32_FLASHC.fcmd; + u_avr32_flashc_fcmd.FCMD.cmd = command; + if (page_number >= 0) u_avr32_flashc_fcmd.FCMD.pagen = page_number; + u_avr32_flashc_fcmd.FCMD.key = AVR32_FLASHC_FCMD_KEY_KEY; + AVR32_FLASHC.fcmd = u_avr32_flashc_fcmd.fcmd; + flashc_error_status = flashc_get_error_status(); + flashc_wait_until_ready(); +} + + +//! @} + + +/*! \name FLASHC Global Commands + */ +//! @{ + + +void flashc_no_operation(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_NOP, -1); +} + + +void flashc_erase_all(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EA, -1); +} + + +//! @} + + +/*! \name FLASHC Protection Mechanisms + */ +//! @{ + + +Bool flashc_is_security_bit_active(void) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_SECURITY_MASK) != 0); +} + + +void flashc_activate_security_bit(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_SSB, -1); +} + + +unsigned int flashc_get_bootloader_protected_size(void) +{ + unsigned int bootprot = (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 - + flashc_read_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET, + AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE); + return (bootprot) ? AVR32_FLASHC_PAGE_SIZE << bootprot : 0; +} + + +unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size) +{ + flashc_set_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET, + AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE, + (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 - + ((bootprot_size) ? + 32 - clz((((min(max(bootprot_size, AVR32_FLASHC_PAGE_SIZE << 1), + AVR32_FLASHC_PAGE_SIZE << + ((1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1)) + + AVR32_FLASHC_PAGE_SIZE - 1) / + AVR32_FLASHC_PAGE_SIZE) << 1) - 1) - 1 : + 0)); + return flashc_get_bootloader_protected_size(); +} + + +Bool flashc_is_external_privileged_fetch_locked(void) +{ + return (!flashc_read_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET)); +} + + +void flashc_lock_external_privileged_fetch(Bool lock) +{ + flashc_set_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET, !lock); +} + + +Bool flashc_is_page_region_locked(int page_number) +{ + return flashc_is_region_locked(flashc_get_page_region(page_number)); +} + + +Bool flashc_is_region_locked(unsigned int region) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_LOCK0_MASK << (region & (AVR32_FLASHC_REGIONS - 1))) != 0); +} + + +void flashc_lock_page_region(int page_number, Bool lock) +{ + flashc_issue_command((lock) ? AVR32_FLASHC_FCMD_CMD_LP : AVR32_FLASHC_FCMD_CMD_UP, page_number); +} + + +void flashc_lock_region(unsigned int region, Bool lock) +{ + flashc_lock_page_region(flashc_get_region_first_page_number(region), lock); +} + + +void flashc_lock_all_regions(Bool lock) +{ + unsigned int error_status = 0; + unsigned int region = AVR32_FLASHC_REGIONS; + while (region) + { + flashc_lock_region(--region, lock); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +//! @} + + +/*! \name Access to General-Purpose Fuses + */ +//! @{ + + +Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit) +{ + return ((flashc_read_all_gp_fuses() & 1ULL << (gp_fuse_bit & 0x3F)) != 0); +} + + +U64 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width) +{ + return flashc_read_all_gp_fuses() >> (pos & 0x3F) & ((1ULL << min(width, 64)) - 1); +} + + +U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte) +{ + return flashc_read_all_gp_fuses() >> ((gp_fuse_byte & 0x07) << 3); +} + + +U64 flashc_read_all_gp_fuses(void) +{ + return AVR32_FLASHC.fgpfrlo | (U64)AVR32_FLASHC.fgpfrhi << 32; +} + + +Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EGPB, gp_fuse_bit & 0x3F); + return (check) ? flashc_read_gp_fuse_bit(gp_fuse_bit) : TRUE; +} + + +Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_bit; + pos &= 0x3F; + width = min(width, 64); + for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++) + { + flashc_erase_gp_fuse_bit(gp_fuse_bit, FALSE); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; + return (check) ? (flashc_read_gp_fuse_bitfield(pos, width) == (1ULL << width) - 1) : TRUE; +} + + +Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check) +{ + unsigned int error_status; + unsigned int current_gp_fuse_byte; + U64 value = flashc_read_all_gp_fuses(); + flashc_erase_all_gp_fuses(FALSE); + error_status = flashc_error_status; + for (current_gp_fuse_byte = 0; current_gp_fuse_byte < 8; current_gp_fuse_byte++, value >>= 8) + { + if (current_gp_fuse_byte != gp_fuse_byte) + { + flashc_write_gp_fuse_byte(current_gp_fuse_byte, value); + error_status |= flashc_error_status; + } + } + flashc_error_status = error_status; + return (check) ? (flashc_read_gp_fuse_byte(gp_fuse_byte) == 0xFF) : TRUE; +} + + +Bool flashc_erase_all_gp_fuses(Bool check) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EAGPF, -1); + return (check) ? (flashc_read_all_gp_fuses() == 0xFFFFFFFFFFFFFFFFULL) : TRUE; +} + + +void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value) +{ + if (!value) + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WGPB, gp_fuse_bit & 0x3F); +} + + +void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_bit; + pos &= 0x3F; + width = min(width, 64); + for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1) + { + flashc_write_gp_fuse_bit(gp_fuse_bit, value & 0x01); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_PGPFB, (gp_fuse_byte & 0x07) | value << 3); +} + + +void flashc_write_all_gp_fuses(U64 value) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_byte; + for (gp_fuse_byte = 0; gp_fuse_byte < 8; gp_fuse_byte++, value >>= 8) + { + flashc_write_gp_fuse_byte(gp_fuse_byte, value); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value) +{ + if (value) + flashc_erase_gp_fuse_bit(gp_fuse_bit, FALSE); + else + flashc_write_gp_fuse_bit(gp_fuse_bit, FALSE); +} + + +void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_bit; + pos &= 0x3F; + width = min(width, 64); + for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1) + { + flashc_set_gp_fuse_bit(gp_fuse_bit, value & 0x01); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value) +{ + unsigned int error_status; + switch (value) + { + case 0xFF: + flashc_erase_gp_fuse_byte(gp_fuse_byte, FALSE); + break; + case 0x00: + flashc_write_gp_fuse_byte(gp_fuse_byte, 0x00); + break; + default: + flashc_erase_gp_fuse_byte(gp_fuse_byte, FALSE); + error_status = flashc_error_status; + flashc_write_gp_fuse_byte(gp_fuse_byte, value); + flashc_error_status |= error_status; + } +} + + +void flashc_set_all_gp_fuses(U64 value) +{ + unsigned int error_status; + switch (value) + { + case 0xFFFFFFFFFFFFFFFFULL: + flashc_erase_all_gp_fuses(FALSE); + break; + case 0x0000000000000000ULL: + flashc_write_all_gp_fuses(0x0000000000000000ULL); + break; + default: + flashc_erase_all_gp_fuses(FALSE); + error_status = flashc_error_status; + flashc_write_all_gp_fuses(value); + flashc_error_status |= error_status; + } +} + + +//! @} + + +/*! \name Access to Flash Pages + */ +//! @{ + + +void flashc_clear_page_buffer(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_CPB, -1); +} + + +Bool flashc_is_page_erased(void) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_QPRR_MASK) != 0); +} + + +Bool flashc_quick_page_read(int page_number) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPR, page_number); + return flashc_is_page_erased(); +} + + +Bool flashc_erase_page(int page_number, Bool check) +{ + Bool page_erased = TRUE; + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EP, page_number); + if (check) + { + unsigned int error_status = flashc_error_status; + page_erased = flashc_quick_page_read(-1); + flashc_error_status |= error_status; + } + return page_erased; +} + + +Bool flashc_erase_all_pages(Bool check) +{ + Bool all_pages_erased = TRUE; + unsigned int error_status = 0; + unsigned int page_number = flashc_get_page_count(); + while (page_number) + { + all_pages_erased &= flashc_erase_page(--page_number, check); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; + return all_pages_erased; +} + + +void flashc_write_page(int page_number) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WP, page_number); +} + + +Bool flashc_quick_user_page_read(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPRUP, -1); + return flashc_is_page_erased(); +} + + +Bool flashc_erase_user_page(Bool check) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EUP, -1); + return (check) ? flashc_quick_user_page_read() : TRUE; +} + + +void flashc_write_user_page(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WUP, -1); +} + + +volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase) +{ + return flashc_memset16(dst, src | (U16)src << 8, nbytes, erase); +} + + +volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase) +{ + return flashc_memset32(dst, src | (U32)src << 16, nbytes, erase); +} + + +volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase) +{ + return flashc_memset64(dst, src | (U64)src << 32, nbytes, erase); +} + + +volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase) +{ + // Use aggregated pointers to have several alignments available for a same address. + UnionCVPtr flash_array_end; + UnionVPtr dest; + Union64 source = {0}; + StructCVPtr dest_end; + UnionCVPtr flash_page_source_end; + Bool incomplete_flash_page_end; + Union64 flash_dword; + UnionVPtr tmp; + unsigned int error_status = 0; + unsigned int i; + + // Reformat arguments. + flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size(); + dest.u8ptr = dst; + for (i = (Get_align((U32)dest.u8ptr, sizeof(U64)) - 1) & (sizeof(U64) - 1); + src; i = (i - 1) & (sizeof(U64) - 1)) + { + source.u8[i] = src; + src >>= 8; + } + dest_end.u8ptr = dest.u8ptr + nbytes; + + // If destination is outside flash, go to next flash page if any. + if (dest.u8ptr < AVR32_FLASH) + { + dest.u8ptr = AVR32_FLASH; + } + else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE) + { + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + + // If end of destination is outside flash, move it to the end of the previous flash page if any. + if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE) + { + dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE; + } + else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr) + { + dest_end.u8ptr = flash_array_end.u8ptr; + } + + // Align each end of destination pointer with its natural boundary. + dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16)); + dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32)); + dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64)); + + // While end of destination is not reached... + while (dest.u8ptr < dest_end.u8ptr) + { + // Clear the page buffer in order to prepare data for a flash page write. + flashc_clear_page_buffer(); + error_status |= flashc_error_status; + + // Determine where the source data will end in the current flash page. + flash_page_source_end.u64ptr = + (U64 *)min((U32)dest_end.u64ptr, + Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE); + + // Determine if the current destination page has an incomplete end. + incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >= + Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE)); + + // Use a flash double-word buffer to manage unaligned accesses. + flash_dword.u64 = source.u64; + + // If destination does not point to the beginning of the current flash page... + if (!Test_align((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE)) + { + // Fill the beginning of the page buffer with the current flash page data. + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE); + tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + + // If destination is not 64-bit aligned... + if (!Test_align((U32)dest.u8ptr, sizeof(U64))) + { + // Fill the beginning of the flash double-word buffer with the current + // flash page data. + // This is required by the hardware, even if page erase is not + // requested, in order to be able to write successfully to erased parts + // of flash pages that have already been written to. + for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Align the destination pointer with its 64-bit boundary. + dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + + // If the current destination double-word is not the last one... + if (dest.u64ptr < dest_end.u64ptr) + { + // Write the flash double-word buffer to the page buffer and reinitialize it. + *dest.u64ptr++ = flash_dword.u64; + flash_dword.u64 = source.u64; + } + } + } + + // Write the source data to the page buffer with 64-bit alignment. + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + *dest.u64ptr++ = source.u64; + + // If the current destination page has an incomplete end... + if (incomplete_flash_page_end) + { + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + { + tmp.u8ptr = (volatile U8 *)dest_end.u8ptr; + + // If end of destination is not 64-bit aligned... + if (!Test_align((U32)dest_end.u8ptr, sizeof(U64))) + { + // Fill the end of the flash double-word buffer with the current flash page data. + for (i = Get_align((U32)dest_end.u8ptr, sizeof(U64)); i < sizeof(U64); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Write the flash double-word buffer to the page buffer. + *dest.u64ptr++ = flash_dword.u64; + } + + // Fill the end of the page buffer with the current flash page data. + for (; !Test_align((U32)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + } + } + + // If the current flash page is in the flash array... + if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE) + { + // Erase the current page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_page(-1, FALSE); + error_status |= flashc_error_status; + } + flashc_write_page(-1); + error_status |= flashc_error_status; + + // If the end of the flash array is reached, go to the User page. + if (dest.u8ptr >= flash_array_end.u8ptr) + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + // If the current flash page is the User page... + else + { + // Erase the User page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_user_page(FALSE); + error_status |= flashc_error_status; + } + flashc_write_user_page(); + error_status |= flashc_error_status; + } + } + + // Update the FLASHC error status. + flashc_error_status = error_status; + + // Return the initial destination pointer as the standard memset function does. + return dst; +} + + +volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase) +{ + // Use aggregated pointers to have several alignments available for a same address. + UnionCVPtr flash_array_end; + UnionVPtr dest; + UnionCPtr source; + StructCVPtr dest_end; + UnionCVPtr flash_page_source_end; + Bool incomplete_flash_page_end; + Union64 flash_dword; + Bool flash_dword_pending = FALSE; + UnionVPtr tmp; + unsigned int error_status = 0; + unsigned int i, j; + + // Reformat arguments. + flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size(); + dest.u8ptr = dst; + source.u8ptr = src; + dest_end.u8ptr = dest.u8ptr + nbytes; + + // If destination is outside flash, go to next flash page if any. + if (dest.u8ptr < AVR32_FLASH) + { + source.u8ptr += AVR32_FLASH - dest.u8ptr; + dest.u8ptr = AVR32_FLASH; + } + else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE) + { + source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr; + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + + // If end of destination is outside flash, move it to the end of the previous flash page if any. + if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE) + { + dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE; + } + else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr) + { + dest_end.u8ptr = flash_array_end.u8ptr; + } + + // Align each end of destination pointer with its natural boundary. + dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16)); + dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32)); + dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64)); + + // While end of destination is not reached... + while (dest.u8ptr < dest_end.u8ptr) + { + // Clear the page buffer in order to prepare data for a flash page write. + flashc_clear_page_buffer(); + error_status |= flashc_error_status; + + // Determine where the source data will end in the current flash page. + flash_page_source_end.u64ptr = + (U64 *)min((U32)dest_end.u64ptr, + Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE); + + // Determine if the current destination page has an incomplete end. + incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >= + Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE)); + + // If destination does not point to the beginning of the current flash page... + if (!Test_align((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE)) + { + // Fill the beginning of the page buffer with the current flash page data. + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE); + tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + + // If destination is not 64-bit aligned... + if (!Test_align((U32)dest.u8ptr, sizeof(U64))) + { + // Fill the beginning of the flash double-word buffer with the current + // flash page data. + // This is required by the hardware, even if page erase is not + // requested, in order to be able to write successfully to erased parts + // of flash pages that have already been written to. + for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Fill the end of the flash double-word buffer with the source data. + for (; i < sizeof(U64); i++) + flash_dword.u8[i] = *source.u8ptr++; + + // Align the destination pointer with its 64-bit boundary. + dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + + // If the current destination double-word is not the last one... + if (dest.u64ptr < dest_end.u64ptr) + { + // Write the flash double-word buffer to the page buffer. + *dest.u64ptr++ = flash_dword.u64; + } + // If the current destination double-word is the last one, the flash + // double-word buffer must be kept for later. + else flash_dword_pending = TRUE; + } + } + + // Read the source data with the maximal possible alignment and write it to + // the page buffer with 64-bit alignment. + switch (Get_align((U32)source.u8ptr, sizeof(U32))) + { + case 0: + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + *dest.u64ptr++ = *source.u64ptr++; + break; + + case sizeof(U16): + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + { + for (j = 0; j < sizeof(U64) / sizeof(U16); j++) flash_dword.u16[j] = *source.u16ptr++; + *dest.u64ptr++ = flash_dword.u64; + } + break; + + default: + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + { + for (j = 0; j < sizeof(U64); j++) flash_dword.u8[j] = *source.u8ptr++; + *dest.u64ptr++ = flash_dword.u64; + } + } + + // If the current destination page has an incomplete end... + if (incomplete_flash_page_end) + { + // If the flash double-word buffer is in use, do not initialize it. + if (flash_dword_pending) i = Get_align((U32)dest_end.u8ptr, sizeof(U64)); + // If the flash double-word buffer is free... + else + { + // Fill the beginning of the flash double-word buffer with the source data. + for (i = 0; i < Get_align((U32)dest_end.u8ptr, sizeof(U64)); i++) + flash_dword.u8[i] = *source.u8ptr++; + } + + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + { + tmp.u8ptr = (volatile U8 *)dest_end.u8ptr; + + // If end of destination is not 64-bit aligned... + if (!Test_align((U32)dest_end.u8ptr, sizeof(U64))) + { + // Fill the end of the flash double-word buffer with the current flash page data. + for (; i < sizeof(U64); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Write the flash double-word buffer to the page buffer. + *dest.u64ptr++ = flash_dword.u64; + } + + // Fill the end of the page buffer with the current flash page data. + for (; !Test_align((U32)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + } + } + + // If the current flash page is in the flash array... + if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE) + { + // Erase the current page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_page(-1, FALSE); + error_status |= flashc_error_status; + } + flashc_write_page(-1); + error_status |= flashc_error_status; + + // If the end of the flash array is reached, go to the User page. + if (dest.u8ptr >= flash_array_end.u8ptr) + { + source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr; + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + } + // If the current flash page is the User page... + else + { + // Erase the User page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_user_page(FALSE); + error_status |= flashc_error_status; + } + flashc_write_user_page(); + error_status |= flashc_error_status; + } + } + + // Update the FLASHC error status. + flashc_error_status = error_status; + + // Return the initial destination pointer as the standard memcpy function does. + return dst; +} + + +#if UC3C +void flashc_set_flash_waitstate_and_readmode(unsigned long cpu_f_hz) +{ + //! Device-specific data + #undef AVR32_FLASHC_FWS_0_MAX_FREQ + #undef AVR32_FLASHC_FWS_1_MAX_FREQ + #undef AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ + #undef AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ + #define AVR32_FLASHC_FWS_0_MAX_FREQ 33000000 + #define AVR32_FLASHC_FWS_1_MAX_FREQ 66000000 + #define AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ 33000000 + #define AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ 72000000 + // These defines are missing from or wrong in the toolchain header files uc3cxxx.h + // Put a Bugzilla + + if(cpu_f_hz > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ) // > 33MHz + { + // Set a wait-state + flashc_set_wait_state(1); + if(cpu_f_hz <= AVR32_FLASHC_FWS_1_MAX_FREQ) // <= 66MHz and >33Mhz + { + // Disable the high-speed read mode. + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); + } + else // > 66Mhz + { + // Enable the high-speed read mode. + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1); + } + } + else // <= 33 MHz + { + // Disable wait-state + flashc_set_wait_state(0); + + // Disable the high-speed read mode. + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); + + } +} +#endif // UC3C device-specific implementation + +//! @} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.h new file mode 100644 index 0000000..9f2547a --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.h @@ -0,0 +1,1002 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FLASHC driver for AVR32 UC3. + * + * AVR32 Flash Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a FLASHC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _FLASHC_H_ +#define _FLASHC_H_ + +#include +#include +#include "compiler.h" + +//! Number of flash regions defined by the FLASHC. +#define AVR32_FLASHC_REGIONS (AVR32_FLASHC_FLASH_SIZE /\ + (AVR32_FLASHC_PAGES_PR_REGION * AVR32_FLASHC_PAGE_SIZE)) + + +/*! \name Flash Properties + */ +//! @{ + +/*! \brief Gets the size of the whole flash array. + * + * \return The size of the whole flash array in bytes. + */ +extern unsigned int flashc_get_flash_size(void); + +/*! \brief Gets the total number of pages in the flash array. + * + * \return The total number of pages in the flash array. + */ +extern unsigned int flashc_get_page_count(void); + +/*! \brief Gets the number of pages in each flash region. + * + * \return The number of pages in each flash region. + */ +extern unsigned int flashc_get_page_count_per_region(void); + +/*! \brief Gets the region number of a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \return The region number of the specified page. + */ +extern unsigned int flashc_get_page_region(int page_number); + +/*! \brief Gets the number of the first page of a region. + * + * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1). + * + * \return The number of the first page of the specified region. + */ +extern unsigned int flashc_get_region_first_page_number(unsigned int region); + +//! @} + + +/*! \name FLASHC Control + */ +//! @{ + +/*! \brief Gets the number of wait states of flash read accesses. + * + * \return The number of wait states of flash read accesses. + */ +extern unsigned int flashc_get_wait_state(void); + +/*! \brief Sets the number of wait states of flash read accesses. + * + * \param wait_state The number of wait states of flash read accesses: \c 0 to + * \c 1. + */ +extern void flashc_set_wait_state(unsigned int wait_state); + +/*! \brief Tells whether the Flash Ready interrupt is enabled. + * + * \return Whether the Flash Ready interrupt is enabled. + */ +extern Bool flashc_is_ready_int_enabled(void); + +/*! \brief Enables or disables the Flash Ready interrupt. + * + * \param enable Whether to enable the Flash Ready interrupt: \c TRUE or + * \c FALSE. + */ +extern void flashc_enable_ready_int(Bool enable); + +/*! \brief Tells whether the Lock Error interrupt is enabled. + * + * \return Whether the Lock Error interrupt is enabled. + */ +extern Bool flashc_is_lock_error_int_enabled(void); + +/*! \brief Enables or disables the Lock Error interrupt. + * + * \param enable Whether to enable the Lock Error interrupt: \c TRUE or + * \c FALSE. + */ +extern void flashc_enable_lock_error_int(Bool enable); + +/*! \brief Tells whether the Programming Error interrupt is enabled. + * + * \return Whether the Programming Error interrupt is enabled. + */ +extern Bool flashc_is_prog_error_int_enabled(void); + +/*! \brief Enables or disables the Programming Error interrupt. + * + * \param enable Whether to enable the Programming Error interrupt: \c TRUE or + * \c FALSE. + */ +extern void flashc_enable_prog_error_int(Bool enable); + +//! @} + + +/*! \name FLASHC Status + */ +//! @{ + +/*! \brief Tells whether the FLASHC is ready to run a new command. + * + * \return Whether the FLASHC is ready to run a new command. + */ +extern Bool flashc_is_ready(void); + +/*! \brief Waits actively until the FLASHC is ready to run a new command. + * + * This is the default function assigned to \ref flashc_wait_until_ready. + */ +extern void flashc_default_wait_until_ready(void); + +//! Pointer to the function used by the driver when it needs to wait until the +//! FLASHC is ready to run a new command. +//! The default function is \ref flashc_default_wait_until_ready. +//! The user may change this pointer to use another implementation. +extern void (*volatile flashc_wait_until_ready)(void); + +/*! \brief Tells whether a Lock Error has occurred during the last function + * called that issued one or more FLASHC commands. + * + * \return Whether a Lock Error has occurred during the last function called + * that issued one or more FLASHC commands. + */ +extern Bool flashc_is_lock_error(void); + +/*! \brief Tells whether a Programming Error has occurred during the last + * function called that issued one or more FLASHC commands. + * + * \return Whether a Programming Error has occurred during the last function + * called that issued one or more FLASHC commands. + */ +extern Bool flashc_is_programming_error(void); + +//! @} + + +/*! \name FLASHC Command Control + */ +//! @{ + +/*! \brief Gets the last issued FLASHC command. + * + * \return The last issued FLASHC command. + */ +extern unsigned int flashc_get_command(void); + +/*! \brief Gets the current FLASHC page number. + * + * \return The current FLASHC page number. + */ +extern unsigned int flashc_get_page_number(void); + +/*! \brief Issues a FLASHC command. + * + * \param command The command: \c AVR32_FLASHC_FCMD_CMD_x. + * \param page_number The page number to apply the command to: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: use this to apply the command to the current page number + * or if the command does not apply to any page number; + * \arg this argument may have other meanings according to the command. See + * the FLASHC chapter of the MCU datasheet. + * + * \warning A Lock Error is issued if the command violates the protection + * mechanism. + * + * \warning A Programming Error is issued if the command is invalid. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_issue_command(unsigned int command, int page_number); + +//! @} + + +/*! \name FLASHC Global Commands + */ +//! @{ + +/*! \brief Issues a No Operation command to the FLASHC. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_no_operation(void); + +/*! \brief Issues an Erase All command to the FLASHC. + * + * This command erases all bits in the flash array, the general-purpose fuse + * bits and the Security bit. The User page is not erased. + * + * This command also ensures that all volatile memories, such as register file + * and RAMs, are erased before the Security bit is erased, i.e. deactivated. + * + * \warning A Lock Error is issued if at least one region is locked or the + * bootloader protection is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern void flashc_erase_all(void); + +//! @} + + +/*! \name FLASHC Protection Mechanisms + */ +//! @{ + +/*! \brief Tells whether the Security bit is active. + * + * \return Whether the Security bit is active. + */ +extern Bool flashc_is_security_bit_active(void); + +/*! \brief Activates the Security bit. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_activate_security_bit(void); + +/*! \brief Gets the bootloader protected size. + * + * \return The bootloader protected size in bytes. + */ +extern unsigned int flashc_get_bootloader_protected_size(void); + +/*! \brief Sets the bootloader protected size. + * + * \param bootprot_size The wanted bootloader protected size in bytes. If this + * size is not supported, the actual size will be the + * nearest greater available size or the maximal possible + * size if the requested size is too large. + * + * \return The actual bootloader protected size in bytes. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size); + +/*! \brief Tells whether external privileged fetch is locked. + * + * \return Whether external privileged fetch is locked. + */ +extern Bool flashc_is_external_privileged_fetch_locked(void); + +/*! \brief Locks or unlocks external privileged fetch. + * + * \param lock Whether to lock external privileged fetch: \c TRUE or \c FALSE. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_external_privileged_fetch(Bool lock); + +/*! \brief Tells whether the region of a page is locked. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \return Whether the region of the specified page is locked. + */ +extern Bool flashc_is_page_region_locked(int page_number); + +/*! \brief Tells whether a region is locked. + * + * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1). + * + * \return Whether the specified region is locked. + */ +extern Bool flashc_is_region_locked(unsigned int region); + +/*! \brief Locks or unlocks the region of a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * \param lock Whether to lock the region of the specified page: \c TRUE or + * \c FALSE. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_page_region(int page_number, Bool lock); + +/*! \brief Locks or unlocks a region. + * + * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1). + * \param lock Whether to lock the specified region: \c TRUE or \c FALSE. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_region(unsigned int region, Bool lock); + +/*! \brief Locks or unlocks all regions. + * + * \param lock Whether to lock the regions: \c TRUE or \c FALSE. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_all_regions(Bool lock); + +//! @} + + +/*! \name Access to General-Purpose Fuses + */ +//! @{ + +/*! \brief Reads a general-purpose fuse bit. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * + * \return The value of the specified general-purpose fuse bit. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit); + +/*! \brief Reads a general-purpose fuse bit-field. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * + * \return The value of the specified general-purpose fuse bit-field. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern U64 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width); + +/*! \brief Reads a general-purpose fuse byte. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * + * \return The value of the specified general-purpose fuse byte. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte); + +/*! \brief Reads all general-purpose fuses. + * + * \return The value of all general-purpose fuses as a word. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern U64 flashc_read_all_gp_fuses(void); + +/*! \brief Erases a general-purpose fuse bit. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * \param check Whether to check erase: \c TRUE or \c FALSE. + * + * \return Whether the erase succeeded or always \c TRUE if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check); + +/*! \brief Erases a general-purpose fuse bit-field. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * \param check Whether to check erase: \c TRUE or \c FALSE. + * + * \return Whether the erase succeeded or always \c TRUE if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check); + +/*! \brief Erases a general-purpose fuse byte. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * \param check Whether to check erase: \c TRUE or \c FALSE. + * + * \return Whether the erase succeeded or always \c TRUE if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check); + +/*! \brief Erases all general-purpose fuses. + * + * \param check Whether to check erase: \c TRUE or \c FALSE. + * + * \return Whether the erase succeeded or always \c TRUE if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_all_gp_fuses(Bool check); + +/*! \brief Writes a general-purpose fuse bit. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * \param value The value of the specified general-purpose fuse bit. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value); + +/*! \brief Writes a general-purpose fuse bit-field. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * \param value The value of the specified general-purpose fuse bit-field. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value); + +/*! \brief Writes a general-purpose fuse byte. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * \param value The value of the specified general-purpose fuse byte. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value); + +/*! \brief Writes all general-purpose fuses. + * + * \param value The value of all general-purpose fuses as a word. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_all_gp_fuses(U64 value); + +/*! \brief Sets a general-purpose fuse bit with the appropriate erase and write + * operations. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * \param value The value of the specified general-purpose fuse bit. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value); + +/*! \brief Sets a general-purpose fuse bit-field with the appropriate erase and + * write operations. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * \param value The value of the specified general-purpose fuse bit-field. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value); + +/*! \brief Sets a general-purpose fuse byte with the appropriate erase and write + * operations. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * \param value The value of the specified general-purpose fuse byte. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value); + +/*! \brief Sets all general-purpose fuses with the appropriate erase and write + * operations. + * + * \param value The value of all general-purpose fuses as a word. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_all_gp_fuses(U64 value); + +//! @} + + +/*! \name Access to Flash Pages + */ +//! @{ + +/*! \brief Clears the page buffer. + * + * This command resets all bits in the page buffer to one. Write accesses to the + * page buffer can only change page buffer bits from one to zero. + * + * \warning The page buffer is not automatically reset after a page write. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_clear_page_buffer(void); + +/*! \brief Tells whether the page to which the last Quick Page Read or Quick + * Page Read User Page command was applied was erased. + * + * \return Whether the page to which the last Quick Page Read or Quick Page Read + * User Page command was applied was erased. + */ +extern Bool flashc_is_page_erased(void); + +/*! \brief Applies the Quick Page Read command to a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \return Whether the specified page is erased. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern Bool flashc_quick_page_read(int page_number); + +/*! \brief Erases a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * \param check Whether to check erase: \c TRUE or \c FALSE. + * + * \return Whether the erase succeeded or always \c TRUE if erase check was not + * requested. + * + * \warning A Lock Error is issued if the command is applied to a page belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern Bool flashc_erase_page(int page_number, Bool check); + +/*! \brief Erases all pages within the flash array. + * + * \param check Whether to check erase: \c TRUE or \c FALSE. + * + * \return Whether the erase succeeded or always \c TRUE if erase check was not + * requested. + * + * \warning A Lock Error is issued if at least one region is locked or the + * bootloader protection is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern Bool flashc_erase_all_pages(Bool check); + +/*! \brief Writes a page from the page buffer. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \warning A Lock Error is issued if the command is applied to a page belonging + * to a locked region or to the bootloader protected area. + * + * \warning The page buffer is not automatically reset after a page write. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits. + */ +extern void flashc_write_page(int page_number); + +/*! \brief Issues a Quick Page Read User Page command to the FLASHC. + * + * \return Whether the User page is erased. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern Bool flashc_quick_user_page_read(void); + +/*! \brief Erases the User page. + * + * \param check Whether to check erase: \c TRUE or \c FALSE. + * + * \return Whether the erase succeeded or always \c TRUE if erase check was not + * requested. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern Bool flashc_erase_user_page(Bool check); + +/*! \brief Writes the User page from the page buffer. + * + * \warning The page buffer is not automatically reset after a page write. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits. + */ +extern void flashc_write_user_page(void); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src source byte. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source byte. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c TRUE or \c FALSE. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c FALSE only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source half-word. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source half-word. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c TRUE or \c FALSE. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c FALSE only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source word. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source word. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c TRUE or \c FALSE. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c FALSE only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source double-word. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source double-word. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c TRUE or \c FALSE. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c FALSE only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source pattern. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source double-word. + * \param src_width \a src width in bits: 8, 16, 32 or 64. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c TRUE or \c FALSE. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c FALSE only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +#define flashc_memset(dst, src, src_width, nbytes, erase) \ + TPASTE2(flashc_memset, src_width)((dst), (src), (nbytes), (erase)) + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the source pointed to by \a src. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Pointer to source data. + * \param nbytes Number of bytes to copy. + * \param erase Whether to erase before writing: \c TRUE or \c FALSE. + * + * \return The value of \a dst. + * + * \warning If copying takes place between areas that overlap, the behavior is + * undefined. + * + * \warning This function may be called with \a erase set to \c FALSE only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase); + +#if UC3C + +/*! \brief Depednding to the CPU frequency, set the wait states of flash read + * accesses and enable or disable the High speed read mode. + * + * \param cpu_f_hz The CPU frequency + */ +void flashc_set_flash_waitstate_and_readmode(unsigned long cpu_f_hz); +#endif // UC3C device-specific implementation + +//! @} + + +#endif // _FLASHC_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.c new file mode 100644 index 0000000..b6b83c7 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.c @@ -0,0 +1,458 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief GPIO driver for AVR32 UC3. + * + * This file defines a useful set of functions for the GPIO. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a GPIO module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "gpio.h" + +//! GPIO module instance. +#define GPIO AVR32_GPIO + + +/*! \name Peripheral Bus Interface + */ +//! @{ + + +int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size) +{ + int status = GPIO_SUCCESS; + unsigned int i; + + for (i = 0; i < size; i++) + { + status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function); + gpiomap++; + } + + return status; +} + + +int gpio_enable_module_pin(unsigned int pin, unsigned int function) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + // Enable the correct function. + switch (function) + { + case 0: // A function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + + case 1: // B function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + + case 2: // C function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + + case 3: // D function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) + case 4: // E function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; + + case 5: // F function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; + + case 6: // G function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; + + case 7: // H function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; +#endif + + default: + return GPIO_INVALID_ARGUMENT; + } + + // Disable GPIO control. + gpio_port->gperc = 1 << (pin & 0x1F); + + return GPIO_SUCCESS; +} + + +void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size) +{ + unsigned int i; + + for (i = 0; i < size; i++) + { + gpio_enable_gpio_pin(gpiomap->pin); + gpiomap++; + } +} + + +void gpio_enable_gpio_pin(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->oderc = 1 << (pin & 0x1F); + gpio_port->gpers = 1 << (pin & 0x1F); +} + + +// The open-drain mode is not synthesized on the current AVR32 products. +// If one day some AVR32 products have this feature, the corresponding part +// numbers should be listed in the #if below. +// Note that other functions are available in this driver to use pins with open +// drain in GPIO mode. The advantage of the open-drain mode functions over these +// other functions is that they can be used not only in GPIO mode but also in +// module mode. +#if 0 + + +void gpio_enable_pin_open_drain(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->odmers = 1 << (pin & 0x1F); +} + + +void gpio_disable_pin_open_drain(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->odmerc = 1 << (pin & 0x1F); +} + + +#endif + + +void gpio_enable_pin_pull_up(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puers = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) + gpio_port->pderc = 1 << (pin & 0x1F); +#endif +} + + +void gpio_disable_pin_pull_up(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puerc = 1 << (pin & 0x1F); +} + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) +// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control. + +/*! \brief Enables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +void gpio_enable_pin_pull_down(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puerc = 1 << (pin & 0x1F); + gpio_port->pders = 1 << (pin & 0x1F); +} + +/*! \brief Disables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +void gpio_disable_pin_pull_down(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->pderc = 1 << (pin & 0x1F); +} + +/*! \brief Enables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +void gpio_enable_pin_buskeeper(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puers = 1 << (pin & 0x1F); + gpio_port->pders = 1 << (pin & 0x1F); +} + +/*! \brief Disables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +void gpio_disable_pin_buskeeper(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puerc = 1 << (pin & 0x1F); + gpio_port->pderc = 1 << (pin & 0x1F); +} + +#endif + +int gpio_get_pin_value(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return (gpio_port->pvr >> (pin & 0x1F)) & 1; +} + + +int gpio_get_gpio_pin_output_value(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return (gpio_port->ovr >> (pin & 0x1F)) & 1; +} + + +int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return ((gpio_port->oder >> (pin & 0x1F)) & 1) ^ 1; +} + + +void gpio_set_gpio_pin(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrs = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_clr_gpio_pin(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_tgl_gpio_pin(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrt = 1 << (pin & 0x1F); // Toggle the I/O line. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_set_gpio_open_drain_pin(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_clr_gpio_open_drain_pin(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_tgl_gpio_open_drain_pin(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line if the GPIO output driver is enabled: 0. + gpio_port->odert = 1 << (pin & 0x1F); // The GPIO output driver is toggled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_enable_pin_glitch_filter(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->gfers = 1 << (pin & 0x1F); +} + + +void gpio_disable_pin_glitch_filter(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->gferc = 1 << (pin & 0x1F); +} + +/*! \brief Configure the edge detector of an input pin + * + * \param pin The pin number. + * \param mode The edge detection mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE + * or \ref GPIO_FALLING_EDGE). + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +static int gpio_configure_edge_detector(unsigned int pin, unsigned int mode) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + // Configure the edge detector. + switch (mode) + { + case GPIO_PIN_CHANGE: + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + break; + + case GPIO_RISING_EDGE: + gpio_port->imr0s = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + break; + + case GPIO_FALLING_EDGE: + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1s = 1 << (pin & 0x1F); + break; + + default: + return GPIO_INVALID_ARGUMENT; + } + + return GPIO_SUCCESS; +} + + +int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + // Enable the glitch filter. + gpio_port->gfers = 1 << (pin & 0x1F); + + // Configure the edge detector. + if(GPIO_INVALID_ARGUMENT == gpio_configure_edge_detector(pin, mode)) + return(GPIO_INVALID_ARGUMENT); + + // Enable interrupt. + gpio_port->iers = 1 << (pin & 0x1F); + + return GPIO_SUCCESS; +} + + +void gpio_disable_pin_interrupt(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ierc = 1 << (pin & 0x1F); +} + + +int gpio_get_pin_interrupt_flag(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return (gpio_port->ifr >> (pin & 0x1F)) & 1; +} + + +void gpio_clear_pin_interrupt_flag(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ifrc = 1 << (pin & 0x1F); +} + + +//# +//# Peripheral Event System Support. +//# +#if UC3L +int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + if(TRUE == use_igf) + { + // Enable the glitch filter. + gpio_port->gfers = 1 << (pin & 0x1F); + } + else + { + // Disable the glitch filter. + gpio_port->gferc = 1 << (pin & 0x1F); + } + + // Configure the edge detector. + return(gpio_configure_edge_detector(pin, mode)); +} + +#endif + +//! @} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.h new file mode 100644 index 0000000..f0b5fd8 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.h @@ -0,0 +1,583 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief GPIO header for AVR32 UC3. + * + * This file contains basic GPIO driver functions. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a GPIO module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _GPIO_H_ +#define _GPIO_H_ + +#include +#include "compiler.h" + +/*! \name Return Values of the GPIO API + */ +//! @{ +#define GPIO_SUCCESS 0 //!< Function successfully completed. +#define GPIO_INVALID_ARGUMENT 1 //!< Input parameters are out of range. +//! @} + + +/*! \name Interrupt Trigger Modes + */ +//! @{ +#define GPIO_PIN_CHANGE 0 //!< Interrupt triggered upon pin change. +#define GPIO_RISING_EDGE 1 //!< Interrupt triggered upon rising edge. +#define GPIO_FALLING_EDGE 2 //!< Interrupt triggered upon falling edge. +//! @} + + +//! A type definition of pins and modules connectivity. +typedef struct +{ + unsigned char pin; //!< Module pin. + unsigned char function; //!< Module function. +} gpio_map_t[]; + + +/*! \name Peripheral Bus Interface + * + * Low-speed interface with a non-deterministic number of clock cycles per + * access. + * + * This interface operates with lower clock frequencies (fPB <= fCPU), and its + * timing is not deterministic since it needs to access a shared bus which may + * be heavily loaded. + * + * \note This interface is immediately available without initialization. + */ +//! @{ + +/*! \brief Enables specific module modes for a set of pins. + * + * \param gpiomap The pin map. + * \param size The number of pins in \a gpiomap. + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size); + +/*! \brief Enables a specific module mode for a pin. + * + * \param pin The pin number.\n + * Refer to the product header file `uc3x.h' (where x is the part + * number; e.g. x = a0512) for module pins. E.g., to enable a PWM + * channel output, the pin number can be AVR32_PWM_3_PIN for PWM + * channel 3. + * \param function The pin function.\n + * Refer to the product header file `uc3x.h' (where x is the + * part number; e.g. x = a0512) for module pin functions. E.g., + * to enable a PWM channel output, the pin function can be + * AVR32_PWM_3_FUNCTION for PWM channel 3. + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_enable_module_pin(unsigned int pin, unsigned int function); + +/*! \brief Enables the GPIO mode of a set of pins. + * + * \param gpiomap The pin map. + * \param size The number of pins in \a gpiomap. + */ +extern void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size); + +/*! \brief Enables the GPIO mode of a pin. + * + * \param pin The pin number.\n + * Refer to the product header file `uc3x.h' (where x is the part + * number; e.g. x = a0512) for pin definitions. E.g., to enable the + * GPIO mode of PX21, AVR32_PIN_PX21 can be used. Module pins such as + * AVR32_PWM_3_PIN for PWM channel 3 can also be used to release + * module pins for GPIO. + */ +extern void gpio_enable_gpio_pin(unsigned int pin); + +// The open-drain mode is not synthesized on the current AVR32 products. +// If one day some AVR32 products have this feature, the corresponding part +// numbers should be listed in the #if below. +// Note that other functions are available in this driver to use pins with open +// drain in GPIO mode. The advantage of the open-drain mode functions over these +// other functions is that they can be used not only in GPIO mode but also in +// module mode. +#if 0 + +/*! \brief Enables the open-drain mode of a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_open_drain(unsigned int pin); + +/*! \brief Disables the open-drain mode of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_open_drain(unsigned int pin); + +#endif + +/*! \brief Enables the pull-up resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_pull_up(unsigned int pin); + +/*! \brief Disables the pull-up resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_pull_up(unsigned int pin); + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) +// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control. + +/*! \brief Enables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_pull_down(unsigned int pin); + +/*! \brief Disables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_pull_down(unsigned int pin); + +/*! \brief Enables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_buskeeper(unsigned int pin); + +/*! \brief Disables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_buskeeper(unsigned int pin); + +#endif + +/*! \brief Returns the value of a pin. + * + * \param pin The pin number. + * + * \return The pin value. + */ +extern int gpio_get_pin_value(unsigned int pin); + +/*! \brief Returns the output value set for a GPIO pin. + * + * \param pin The pin number. + * + * \return The pin output value. + * + * \note This function must be used in conjunction with \ref gpio_set_gpio_pin, + * \ref gpio_clr_gpio_pin and \ref gpio_tgl_gpio_pin. + */ +extern int gpio_get_gpio_pin_output_value(unsigned int pin); + +/*! \brief Returns the output value set for a GPIO pin using open drain. + * + * \param pin The pin number. + * + * \return The pin output value. + * + * \note This function must be used in conjunction with + * \ref gpio_set_gpio_open_drain_pin, \ref gpio_clr_gpio_open_drain_pin + * and \ref gpio_tgl_gpio_open_drain_pin. + */ +extern int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin); + +/*! \brief Drives a GPIO pin to 1. + * + * \param pin The pin number. + */ +extern void gpio_set_gpio_pin(unsigned int pin); + +/*! \brief Drives a GPIO pin to 0. + * + * \param pin The pin number. + */ +extern void gpio_clr_gpio_pin(unsigned int pin); + +/*! \brief Toggles a GPIO pin. + * + * \param pin The pin number. + */ +extern void gpio_tgl_gpio_pin(unsigned int pin); + +/*! \brief Drives a GPIO pin to 1 using open drain. + * + * \param pin The pin number. + */ +extern void gpio_set_gpio_open_drain_pin(unsigned int pin); + +/*! \brief Drives a GPIO pin to 0 using open drain. + * + * \param pin The pin number. + */ +extern void gpio_clr_gpio_open_drain_pin(unsigned int pin); + +/*! \brief Toggles a GPIO pin using open drain. + * + * \param pin The pin number. + */ +extern void gpio_tgl_gpio_open_drain_pin(unsigned int pin); + +/*! \brief Enables the glitch filter of a pin. + * + * When the glitch filter is enabled, a glitch with duration of less than 1 + * clock cycle is automatically rejected, while a pulse with duration of 2 clock + * cycles or more is accepted. For pulse durations between 1 clock cycle and 2 + * clock cycles, the pulse may or may not be taken into account, depending on + * the precise timing of its occurrence. Thus for a pulse to be guaranteed + * visible it must exceed 2 clock cycles, whereas for a glitch to be reliably + * filtered out, its duration must not exceed 1 clock cycle. The filter + * introduces 2 clock cycles latency. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_glitch_filter(unsigned int pin); + +/*! \brief Disables the glitch filter of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_glitch_filter(unsigned int pin); + +/*! \brief Enables the interrupt of a pin with the specified settings. + * + * \param pin The pin number. + * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or + * \ref GPIO_FALLING_EDGE). + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode); + +/*! \brief Disables the interrupt of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_interrupt(unsigned int pin); + +/*! \brief Gets the interrupt flag of a pin. + * + * \param pin The pin number. + * + * \return The pin interrupt flag. + */ +extern int gpio_get_pin_interrupt_flag(unsigned int pin); + +/*! \brief Clears the interrupt flag of a pin. + * + * \param pin The pin number. + */ +extern void gpio_clear_pin_interrupt_flag(unsigned int pin); + +//! @} + + +#if (defined AVR32_GPIO_LOCAL_ADDRESS) +/*! \name Local Bus Interface + * + * High-speed interface with only one clock cycle per access. + * + * This interface operates with high clock frequency (fCPU), and its timing is + * deterministic since it does not need to access a shared bus which may be + * heavily loaded. + * + * \warning To use this interface, the clock frequency of the peripheral bus on + * which the GPIO peripheral is connected must be set to the CPU clock + * frequency (fPB = fCPU). + * + * \note This interface has to be initialized in order to be available. + */ +//! @{ + +/*! \brief Enables the local bus interface for GPIO. + * + * \note This function must have been called at least once before using other + * functions in this interface. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_init(void) +{ + Set_system_register(AVR32_CPUCR, + Get_system_register(AVR32_CPUCR) | AVR32_CPUCR_LOCEN_MASK); +} + +/*! \brief Enables the output driver of a pin. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_enable_pin_output_driver(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F); +} + +/*! \brief Disables the output driver of a pin. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_disable_pin_output_driver(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F); +} + +/*! \brief Returns the value of a pin. + * + * \param pin The pin number. + * + * \return The pin value. + * + * \note \ref gpio_local_init must have been called beforehand. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int gpio_local_get_pin_value(unsigned int pin) +{ + return (AVR32_GPIO_LOCAL.port[pin >> 5].pvr >> (pin & 0x1F)) & 1; +} + +/*! \brief Drives a GPIO pin to 1. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin nor its output + * driver. \ref gpio_enable_gpio_pin and + * \ref gpio_local_enable_pin_output_driver can be called for this + * purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_set_gpio_pin(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrs = 1 << (pin & 0x1F); +} + +/*! \brief Drives a GPIO pin to 0. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin nor its output + * driver. \ref gpio_enable_gpio_pin and + * \ref gpio_local_enable_pin_output_driver can be called for this + * purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_clr_gpio_pin(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F); +} + +/*! \brief Toggles a GPIO pin. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin nor its output + * driver. \ref gpio_enable_gpio_pin and + * \ref gpio_local_enable_pin_output_driver can be called for this + * purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_tgl_gpio_pin(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrt = 1 << (pin & 0x1F); +} + +/*! \brief Initializes the configuration of a GPIO pin so that it can be used + * with GPIO open-drain functions. + * + * \note This function must have been called at least once before using + * \ref gpio_local_set_gpio_open_drain_pin, + * \ref gpio_local_clr_gpio_open_drain_pin or + * \ref gpio_local_tgl_gpio_open_drain_pin. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_init_gpio_open_drain_pin(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F); +} + +/*! \brief Drives a GPIO pin to 1 using open drain. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must + * have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_set_gpio_open_drain_pin(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F); +} + +/*! \brief Drives a GPIO pin to 0 using open drain. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must + * have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_clr_gpio_open_drain_pin(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F); +} + +/*! \brief Toggles a GPIO pin using open drain. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must + * have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_tgl_gpio_open_drain_pin(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].odert = 1 << (pin & 0x1F); +} + +//! @} +#endif // AVR32_GPIO_LOCAL_ADDRESS + +#if UC3L +//! @{ +/*! \name Peripheral Event System support + * + * The GPIO can be programmed to output peripheral events whenever an interrupt + * condition is detected, such as pin value change, or only when a rising or + * falling edge is detected. + * + */ + +/*! \brief Enables the peripheral event generation of a pin. + * + * \param pin The pin number. + * + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_enable_pin_periph_event(unsigned int pin) +{ + AVR32_GPIO.port[pin >> 5].oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin. + AVR32_GPIO.port[pin >> 5].evers = 1 << (pin & 0x1F); +} + +/*! \brief Disables the peripheral event generation of a pin. + * + * \param pin The pin number. + * + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_disable_pin_periph_event(unsigned int pin) +{ + AVR32_GPIO.port[pin >> 5].everc = 1 << (pin & 0x1F); +} + +/*! \brief Configure the peripheral event trigger mode of a pin + * + * \param pin The pin number. + * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or + * \ref GPIO_FALLING_EDGE). + * \param use_igf use the Input Glitch Filter (TRUE) or not (FALSE). + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf); + +//! @} +#endif + + +#endif // _GPIO_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/exception.x b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/exception.x new file mode 100644 index 0000000..ec4109d --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/exception.x @@ -0,0 +1,239 @@ +/* This file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Exception and interrupt vectors. + * + * This file maps all events supported by an AVR32. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an INTC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#if !__AVR32_UC__ && !__AVR32_AP__ + #error Implementation of the AVR32 architecture not supported by the INTC driver. +#endif + + +#include + + +//! @{ +//! \verbatim + + + .section .exception, "ax", @progbits + + +// Start of Exception Vector Table. + + // EVBA must be aligned with a power of two strictly greater than the EVBA- + // relative offset of the last vector. + .balign 0x200 + + // Export symbol. + .global _evba + .type _evba, @function +_evba: + + .org 0x000 + // Unrecoverable Exception. +_handle_Unrecoverable_Exception: + rjmp $ + + .org 0x004 + // TLB Multiple Hit. +_handle_TLB_Multiple_Hit: + rjmp $ + + .org 0x008 + // Bus Error Data Fetch. +_handle_Bus_Error_Data_Fetch: + rjmp $ + + .org 0x00C + // Bus Error Instruction Fetch. +_handle_Bus_Error_Instruction_Fetch: + rjmp $ + + .org 0x010 + // NMI. +_handle_NMI: + rjmp $ + + .org 0x014 + // Instruction Address. +_handle_Instruction_Address: + rjmp $ + + .org 0x018 + // ITLB Protection. +_handle_ITLB_Protection: + rjmp $ + + .org 0x01C + // Breakpoint. +_handle_Breakpoint: + rjmp $ + + .org 0x020 + // Illegal Opcode. +_handle_Illegal_Opcode: + rjmp $ + + .org 0x024 + // Unimplemented Instruction. +_handle_Unimplemented_Instruction: + rjmp $ + + .org 0x028 + // Privilege Violation. +_handle_Privilege_Violation: + rjmp $ + + .org 0x02C + // Floating-Point: UNUSED IN AVR32UC and AVR32AP. +_handle_Floating_Point: + rjmp $ + + .org 0x030 + // Coprocessor Absent: UNUSED IN AVR32UC. +_handle_Coprocessor_Absent: + rjmp $ + + .org 0x034 + // Data Address (Read). +_handle_Data_Address_Read: + rjmp $ + + .org 0x038 + // Data Address (Write). +_handle_Data_Address_Write: + rjmp $ + + .org 0x03C + // DTLB Protection (Read). +_handle_DTLB_Protection_Read: + rjmp $ + + .org 0x040 + // DTLB Protection (Write). +_handle_DTLB_Protection_Write: + rjmp $ + + .org 0x044 + // DTLB Modified: UNUSED IN AVR32UC. +_handle_DTLB_Modified: + rjmp $ + + .org 0x050 + // ITLB Miss. +_handle_ITLB_Miss: + rjmp $ + + .org 0x060 + // DTLB Miss (Read). +_handle_DTLB_Miss_Read: + rjmp $ + + .org 0x070 + // DTLB Miss (Write). +_handle_DTLB_Miss_Write: + rjmp $ + + .org 0x100 + // Supervisor Call. +_handle_Supervisor_Call: + rjmp $ + + +// Interrupt support. +// The interrupt controller must provide the offset address relative to EVBA. +// Important note: +// All interrupts call a C function named _get_interrupt_handler. +// This function will read group and interrupt line number to then return in +// R12 a pointer to a user-provided interrupt handler. + + .balign 4 + + .irp priority, 0, 1, 2, 3 +_int\priority: +#if __AVR32_UC__ + // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the + // CPU upon interrupt entry. No other register is saved by hardware. +#elif __AVR32_AP__ + // PC and SR are automatically saved in respectively RAR_INTx and RSR_INTx by + // the CPU upon interrupt entry. No other register is saved by hardware. + pushm r8-r12, lr +#endif + mov r12, \priority // Pass the int_level parameter to the _get_interrupt_handler function. + call _get_interrupt_handler + cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function. +#if __AVR32_UC__ + movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler. +#elif __AVR32_AP__ + breq spint\priority // If this was a spurious interrupt (R12 == NULL), branch. + st.w --sp, r12 // Push the pointer to the interrupt handler onto the system stack since no register may be altered. + popm r8-r12, lr, pc // Restore registers and jump to the handler. +spint\priority: + popm r8-r12, lr +#endif + rete // If this was a spurious interrupt (R12 == NULL), return from event handler. + .endr + + +// Constant data area. + + .balign 4 + + // Values to store in the interrupt priority registers for the various interrupt priority levels. + // The interrupt priority registers contain the interrupt priority level and + // the EVBA-relative interrupt vector offset. + .global ipr_val + .type ipr_val, @object +ipr_val: + .word (AVR32_INTC_INT0 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int0 - _evba),\ + (AVR32_INTC_INT1 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int1 - _evba),\ + (AVR32_INTC_INT2 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int2 - _evba),\ + (AVR32_INTC_INT3 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int3 - _evba) + + +//! \endverbatim +//! @} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.c new file mode 100644 index 0000000..84d498d --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.c @@ -0,0 +1,214 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief INTC driver for AVR32 UC3. + * + * AVR32 Interrupt Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an INTC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "compiler.h" +#include "preprocessor.h" +#include "intc.h" + +// define _evba from exception.S +extern void _evba; + +//! Values to store in the interrupt priority registers for the various interrupt priority levels. +extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS]; + +//! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space. +//! Each line handler table contains a set of pointers to interrupt handlers. +#if (defined __GNUC__) +#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \ +static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)]; +#elif (defined __ICCAVR32__) +#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \ +static volatile __no_init __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)]; +#endif +MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~); +#undef DECL_INT_LINE_HANDLER_TABLE + +//! Table containing for each interrupt group the number of interrupt request +//! lines and a pointer to the table of interrupt line handlers. +static const struct +{ + unsigned int num_irqs; + volatile __int_handler *_int_line_handler_table; +} _int_handler_table[AVR32_INTC_NUM_INT_GRPS] = +{ +#define INSERT_INT_LINE_HANDLER_TABLE(GRP, unused) \ + {AVR32_INTC_NUM_IRQS_PER_GRP##GRP, _int_line_handler_table_##GRP}, + MREPEAT(AVR32_INTC_NUM_INT_GRPS, INSERT_INT_LINE_HANDLER_TABLE, ~) +#undef INSERT_INT_LINE_HANDLER_TABLE +}; + + +/*! \brief Default interrupt handler. + * + * \note Taken and adapted from Newlib. + */ +#if (defined __GNUC__) +__attribute__((__interrupt__)) +#elif (defined __ICCAVR32__) +__interrupt +#endif +static void _unhandled_interrupt(void) +{ + // Catch unregistered interrupts. + while (TRUE); +} + + +/*! \brief Gets the interrupt handler of the current event at the \a int_level + * interrupt priority level (called from exception.S). + * + * \param int_level Interrupt priority level to handle. + * + * \return Interrupt handler to execute. + * + * \note Taken and adapted from Newlib. + */ +__int_handler _get_interrupt_handler(unsigned int int_level) +{ + // ICR3 is mapped first, ICR0 last. + // Code in exception.S puts int_level in R12 which is used by AVR32-GCC to + // pass a single argument to a function. + unsigned int int_grp = AVR32_INTC.icr[AVR32_INTC_INT3 - int_level]; + unsigned int int_req = AVR32_INTC.irr[int_grp]; + + // As an interrupt may disappear while it is being fetched by the CPU + // (spurious interrupt caused by a delayed response from an MCU peripheral to + // an interrupt flag clear or interrupt disable instruction), check if there + // are remaining interrupt lines to process. + // If a spurious interrupt occurs, the status register (SR) contains an + // execution mode and interrupt level masks corresponding to a level 0 + // interrupt, whatever the interrupt priority level causing the spurious + // event. This behavior has been chosen because a spurious interrupt has not + // to be a priority one and because it may not cause any trouble to other + // interrupts. + // However, these spurious interrupts place the hardware in an unstable state + // and could give problems in other/future versions of the CPU, so the + // software has to be written so that they never occur. The only safe way of + // achieving this is to always clear or disable peripheral interrupts with the + // following sequence: + // 1: Mask the interrupt in the CPU by setting GM (or IxM) in SR. + // 2: Perform the bus access to the peripheral register that clears or + // disables the interrupt. + // 3: Wait until the interrupt has actually been cleared or disabled by the + // peripheral. This is usually performed by reading from a register in the + // same peripheral (it DOES NOT have to be the same register that was + // accessed in step 2, but it MUST be in the same peripheral), what takes + // bus system latencies into account, but peripheral internal latencies + // (generally 0 cycle) also have to be considered. + // 4: Unmask the interrupt in the CPU by clearing GM (or IxM) in SR. + // Note that steps 1 and 4 are useless inside interrupt handlers as the + // corresponding interrupt level is automatically masked by IxM (unless IxM is + // explicitly cleared by the software). + // + // Get the right IRQ handler. + // + // If several interrupt lines are active in the group, the interrupt line with + // the highest number is selected. This is to be coherent with the + // prioritization of interrupt groups performed by the hardware interrupt + // controller. + // + // If no handler has been registered for the pending interrupt, + // _unhandled_interrupt will be selected thanks to the initialization of + // _int_line_handler_table_x by INTC_init_interrupts. + // + // exception.S will provide the interrupt handler with a clean interrupt stack + // frame, with nothing more pushed onto the stack. The interrupt handler must + // manage the `rete' instruction, what can be done thanks to pure assembly, + // inline assembly or the `__attribute__((__interrupt__))' C function + // attribute. + return (int_req) ? _int_handler_table[int_grp]._int_line_handler_table[32 - clz(int_req) - 1] : NULL; +} + +//! Init EVBA address. This sequence might also be done in the UTILS/STARTUP/GCC/crt0.S +static __inline__ void INTC_init_evba(void) +{ + Set_system_register(AVR32_EVBA, (int)&_evba ); +} + +void INTC_init_interrupts(void) +{ + unsigned int int_grp, int_req; + + INTC_init_evba(); + + // For all interrupt groups, + for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++) + { + // For all interrupt request lines of each group, + for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++) + { + // Assign _unhandled_interrupt as default interrupt handler. + _int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt; + } + + // Set the interrupt group priority register to its default value. + // By default, all interrupt groups are linked to the interrupt priority + // level 0 and to the interrupt vector _int0. + AVR32_INTC.ipr[int_grp] = ipr_val[AVR32_INTC_INT0]; + } +} + + +void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level) +{ + // Determine the group of the IRQ. + unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP; + + // Store in _int_line_handler_table_x the pointer to the interrupt handler, so + // that _get_interrupt_handler can retrieve it when the interrupt is vectored. + _int_handler_table[int_grp]._int_line_handler_table[irq % AVR32_INTC_MAX_NUM_IRQS_PER_GRP] = handler; + + // Program the corresponding IPRX register to set the interrupt priority level + // and the interrupt vector offset that will be fetched by the core interrupt + // system. + // NOTE: The _intx functions are intermediate assembly functions between the + // core interrupt system and the user interrupt handler. + AVR32_INTC.ipr[int_grp] = ipr_val[int_level & (AVR32_INTC_IPR_INTLEVEL_MASK >> AVR32_INTC_IPR_INTLEVEL_OFFSET)]; +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.h new file mode 100644 index 0000000..31a4fc1 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.h @@ -0,0 +1,100 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief INTC driver for AVR32 UC3. + * + * AVR32 Interrupt Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an INTC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _INTC_H_ +#define _INTC_H_ + +#include "compiler.h" + + +//! Maximal number of interrupt request lines per group. +#define AVR32_INTC_MAX_NUM_IRQS_PER_GRP 32 + +//! Number of interrupt priority levels. +#define AVR32_INTC_NUM_INT_LEVELS (1 << AVR32_INTC_IPR_INTLEVEL_SIZE) + + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +//! Pointer to interrupt handler. +#if (defined __GNUC__) +typedef void (*__int_handler)(void); +#elif (defined __ICCAVR32__) +typedef void (__interrupt *__int_handler)(void); +#endif + + +/*! \brief Initializes the hardware interrupt controller driver. + * + * \note Taken and adapted from Newlib. + */ +extern void INTC_init_interrupts(void); + +/*! \brief Registers an interrupt handler. + * + * \param handler Interrupt handler to register. + * \param irq IRQ of the interrupt handler to register. + * \param int_level Interrupt priority level to assign to the group of this IRQ. + * + * \warning The interrupt handler must manage the `rete' instruction, what can + * be done thanks to pure assembly, inline assembly or the + * `__attribute__((__interrupt__))' C function attribute. + * + * \warning If several interrupt handlers of a same group are registered with + * different priority levels, only the latest priority level set will + * be effective. + * + * \note Taken and adapted from Newlib. + */ +extern void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level); + +#endif // __AVR32_ABI_COMPILER__ + + +#endif // _INTC_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PDCA/pdca.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PDCA/pdca.c new file mode 100644 index 0000000..6c00f9e --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PDCA/pdca.c @@ -0,0 +1,296 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief PDCA driver for AVR32 UC3. + * + * This file defines a useful set of functions for the PDCA interface on AVR32 + * devices. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a PDCA module. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "compiler.h" +#include "pdca.h" + + +volatile avr32_pdca_channel_t *pdca_get_handler(unsigned int pdca_ch_number) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = &AVR32_PDCA.channel[pdca_ch_number]; + + if (pdca_ch_number >= AVR32_PDCA_CHANNEL_LENGTH) + return (volatile avr32_pdca_channel_t *)PDCA_INVALID_ARGUMENT; + + return pdca_channel; +} + + +int pdca_init_channel(unsigned int pdca_ch_number, const pdca_channel_options_t *opt) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + pdca_disable_interrupt_transfer_complete(pdca_ch_number); // disable channel interrupt + pdca_disable_interrupt_reload_counter_zero(pdca_ch_number); // disable channel interrupt + + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + if (global_interrupt_enabled) Disable_global_interrupt(); + pdca_channel->mar = (unsigned long)opt->addr; + pdca_channel->tcr = opt->size; + pdca_channel->psr = opt->pid; + pdca_channel->marr = (unsigned long)opt->r_addr; + pdca_channel->tcrr = opt->r_size; + pdca_channel->mr = +#if (defined AVR32_PDCA_120_H_INCLUDED ) || (defined AVR32_PDCA_121_H_INCLUDED ) || (defined AVR32_PDCA_122_H_INCLUDED ) +opt->etrig << AVR32_PDCA_ETRIG_OFFSET | +#endif // #ifdef AVR32_PDCA_120_H_INCLUDED + opt->transfer_size << AVR32_PDCA_SIZE_OFFSET; + pdca_channel->cr = AVR32_PDCA_ECLR_MASK; + pdca_channel->isr; + if (global_interrupt_enabled) Enable_global_interrupt(); + + return PDCA_SUCCESS; +} + + +unsigned int pdca_get_channel_status(unsigned int pdca_ch_number) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + return (pdca_channel->sr & AVR32_PDCA_TEN_MASK) != 0; +} + + +void pdca_disable(unsigned int pdca_ch_number) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + // Disable transfer + pdca_channel->cr = AVR32_PDCA_TDIS_MASK; + +} + + +void pdca_enable(unsigned int pdca_ch_number) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + // Enable transfer + pdca_channel->cr = AVR32_PDCA_TEN_MASK; +} + + +unsigned int pdca_get_load_size(unsigned int pdca_ch_number) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + return pdca_channel->tcr; +} + + +void pdca_load_channel(unsigned int pdca_ch_number, volatile void *addr, unsigned int size) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + if (global_interrupt_enabled) Disable_global_interrupt(); + pdca_channel->mar = (unsigned long)addr; + pdca_channel->tcr = size; + pdca_channel->cr = AVR32_PDCA_ECLR_MASK; + pdca_channel->isr; + if (global_interrupt_enabled) Enable_global_interrupt(); +} + + +unsigned int pdca_get_reload_size(unsigned int pdca_ch_number) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + return pdca_channel->tcrr; +} + + +void pdca_reload_channel(unsigned int pdca_ch_number, volatile void *addr, unsigned int size) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + if (global_interrupt_enabled) Disable_global_interrupt(); + // set up next memory address + pdca_channel->marr = (unsigned long)addr; + // set up next memory size + pdca_channel->tcrr = size; + pdca_channel->cr = AVR32_PDCA_ECLR_MASK; + pdca_channel->isr; + if (global_interrupt_enabled) Enable_global_interrupt(); +} + + +void pdca_set_peripheral_select(unsigned int pdca_ch_number, unsigned int pid) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + pdca_channel->psr = pid; +} + + +void pdca_set_transfer_size(unsigned int pdca_ch_number, unsigned int transfer_size) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + pdca_channel->mr = (pdca_channel->mr & ~AVR32_PDCA_SIZE_MASK) | + transfer_size << AVR32_PDCA_SIZE_OFFSET; +} + + +#if (defined AVR32_PDCA_120_H_INCLUDED ) || (defined AVR32_PDCA_121_H_INCLUDED ) || (defined AVR32_PDCA_122_H_INCLUDED ) + + +void pdca_disable_event_trigger(unsigned int pdca_ch_number) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + pdca_channel->mr &= ~AVR32_PDCA_ETRIG_MASK; +} + + +void pdca_enable_event_trigger(unsigned int pdca_ch_number) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + pdca_channel->mr |= AVR32_PDCA_ETRIG_MASK; +} + + +#endif // #ifdef AVR32_PDCA_120_H_INCLUDED + + +void pdca_disable_interrupt_transfer_error(unsigned int pdca_ch_number) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + if (global_interrupt_enabled) Disable_global_interrupt(); + pdca_channel->idr = AVR32_PDCA_TERR_MASK; + pdca_channel->isr; + if (global_interrupt_enabled) Enable_global_interrupt(); +} + + +void pdca_enable_interrupt_transfer_error(unsigned int pdca_ch_number) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + pdca_channel->ier = AVR32_PDCA_TERR_MASK; +} + + +void pdca_disable_interrupt_transfer_complete(unsigned int pdca_ch_number) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + if (global_interrupt_enabled) Disable_global_interrupt(); + pdca_channel->idr = AVR32_PDCA_TRC_MASK; + pdca_channel->isr; + if (global_interrupt_enabled) Enable_global_interrupt(); +} + + +void pdca_enable_interrupt_transfer_complete(unsigned int pdca_ch_number) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + pdca_channel->ier = AVR32_PDCA_TRC_MASK; +} + + +void pdca_disable_interrupt_reload_counter_zero(unsigned int pdca_ch_number) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + if (global_interrupt_enabled) Disable_global_interrupt(); + pdca_channel->idr = AVR32_PDCA_RCZ_MASK; + pdca_channel->isr; + if (global_interrupt_enabled) Enable_global_interrupt(); +} + + +void pdca_enable_interrupt_reload_counter_zero(unsigned int pdca_ch_number) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + pdca_channel->ier = AVR32_PDCA_RCZ_MASK; +} + + +unsigned long pdca_get_transfer_status(unsigned int pdca_ch_number) +{ + // get the correct channel pointer + volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number); + + return pdca_channel->isr; +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PDCA/pdca.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PDCA/pdca.h new file mode 100644 index 0000000..5668fe9 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PDCA/pdca.h @@ -0,0 +1,251 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief PDCA driver for AVR32 UC3. + * + * This file defines a useful set of functions for the PDCA interface on AVR32 + * devices. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a PDCA module. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _PDCA_H_ +#define _PDCA_H_ + +#include + + +//! Size of PDCA transfer: byte. +#define PDCA_TRANSFER_SIZE_BYTE AVR32_PDCA_BYTE + +//! Size of PDCA transfer: half-word. +#define PDCA_TRANSFER_SIZE_HALF_WORD AVR32_PDCA_HALF_WORD + +//! Size of PDCA transfer: word. +#define PDCA_TRANSFER_SIZE_WORD AVR32_PDCA_WORD + +/*! \name PDCA Driver Status Codes + */ +//! @{ +#define PDCA_SUCCESS 0 +#define PDCA_INVALID_ARGUMENT -1 +//! @} + +/*! \name PDCA Transfer Status Codes + */ +//! @{ +#define PDCA_TRANSFER_ERROR AVR32_PDCA_TERR_MASK +#define PDCA_TRANSFER_COMPLETE AVR32_PDCA_TRC_MASK +#define PDCA_TRANSFER_COUNTER_RELOAD_IS_ZERO AVR32_PDCA_RCZ_MASK +//! @} + + +//! PDCA channel options. +typedef struct +{ + //! Memory address. + volatile void *addr ; + //! Transfer counter. + unsigned int size ; + //! Next memory address. + volatile void *r_addr ; + //! Next transfer counter. + unsigned int r_size ; + //! Select peripheral ID. + unsigned int pid ; + //! Select the size of the transfer (byte, half-word or word). + unsigned int transfer_size ; +#if (defined AVR32_PDCA_120_H_INCLUDED ) || (defined AVR32_PDCA_121_H_INCLUDED ) || (defined AVR32_PDCA_122_H_INCLUDED ) +// Note: the options in this preprocessor section are only available from the PDCA IP version 1.2.0 on. + //! Enable (\c 1) or disable (\c 0) the transfer upon event trigger. + unsigned char etrig ; +#endif // #ifdef AVR32_PDCA_120_H_INCLUDED +} pdca_channel_options_t; + + +/*! \brief Get PDCA channel handler + * + * \param pdca_ch_number PDCA channel + * + * \return channel handled or PDCA_INVALID_ARGUMENT + */ +extern volatile avr32_pdca_channel_t *pdca_get_handler(unsigned int pdca_ch_number); + +/*! \brief Set the channel configuration + * + * \param pdca_ch_number PDCA channel + * \param opt channel option + */ +extern int pdca_init_channel(unsigned int pdca_ch_number, const pdca_channel_options_t *opt); + +/*! \brief Get the PDCA channel transfer enable status + * + * \param pdca_ch_number PDCA channel + * + * \return \c 1 if channel transfer is enabled, else \c 0 + */ +extern unsigned int pdca_get_channel_status(unsigned int pdca_ch_number); + +/*! \brief Disable the PDCA for the given channel + * + * \param pdca_ch_number PDCA channel + */ +extern void pdca_disable(unsigned int pdca_ch_number); + +/*! \brief Enable the PDCA for the given channel + * + * \param pdca_ch_number PDCA channel + */ +extern void pdca_enable(unsigned int pdca_ch_number); + +/*! \brief Get PDCA channel load size (or remaining size if transfer started) + * + * \param pdca_ch_number PDCA channel + * + * \return size current size to transfer + */ +extern unsigned int pdca_get_load_size(unsigned int pdca_ch_number); + +/*! \brief Set PDCA channel load values + * + * \param pdca_ch_number PDCA channel + * \param addr address where data to load are stored + * \param size size of the data block to load + */ +extern void pdca_load_channel(unsigned int pdca_ch_number, volatile void *addr, unsigned int size); + +/*! \brief Get PDCA channel reload size + * + * \param pdca_ch_number PDCA channel + * + * \return size current reload size + */ +extern unsigned int pdca_get_reload_size(unsigned int pdca_ch_number); + +/*! \brief Set PDCA channel reload values + * + * \param pdca_ch_number PDCA channel + * \param addr address where data to load are stored + * \param size size of the data block to load + */ +extern void pdca_reload_channel(unsigned int pdca_ch_number, volatile void *addr, unsigned int size); + +/*! \brief Set the peripheral function to use with the PDCA channel + * + * \param pdca_ch_number PDCA channel + * \param pid the peripheral ID + */ +extern void pdca_set_peripheral_select(unsigned int pdca_ch_number, unsigned int pid); + +/*! \brief Set the size of the transfer + * + * \param pdca_ch_number PDCA channel + * \param transfer_size size of the transfer (byte, half-word or word) + */ +extern void pdca_set_transfer_size(unsigned int pdca_ch_number, unsigned int transfer_size); + +#if (defined AVR32_PDCA_120_H_INCLUDED ) || (defined AVR32_PDCA_121_H_INCLUDED ) || (defined AVR32_PDCA_122_H_INCLUDED ) +// Note: the functions in this preprocessor section are only available from the PDCA IP version 1.2.0 on. + +/*! \brief Disable the event-triggered transfer feature + * + * \param pdca_ch_number PDCA channel + */ +extern void pdca_disable_event_trigger(unsigned int pdca_ch_number); + +/*! \brief Enable the event-triggered transfer feature + * + * \param pdca_ch_number PDCA channel + */ +extern void pdca_enable_event_trigger(unsigned int pdca_ch_number); + +#endif // #ifdef AVR32_PDCA_120_H_INCLUDED + +/*! \brief Disable PDCA transfer error interrupt + * + * \param pdca_ch_number PDCA channel + */ +extern void pdca_disable_interrupt_transfer_error(unsigned int pdca_ch_number); + +/*! \brief Enable PDCA transfer error interrupt + * + * \param pdca_ch_number PDCA channel + */ +extern void pdca_enable_interrupt_transfer_error(unsigned int pdca_ch_number); + +/*! \brief Disable PDCA transfer interrupt when completed (ie TCR and TCRR are both zero) + * + * \param pdca_ch_number PDCA channel + */ +extern void pdca_disable_interrupt_transfer_complete(unsigned int pdca_ch_number); + +/*! \brief Enable PDCA transfer interrupt when completed (ie TCR and TCRR are both zero) + * + * \param pdca_ch_number PDCA channel + */ +extern void pdca_enable_interrupt_transfer_complete(unsigned int pdca_ch_number); + +/*! \brief Disable PDCA transfer interrupt when TCRR reaches zero + * + * \param pdca_ch_number PDCA channel + */ +extern void pdca_disable_interrupt_reload_counter_zero(unsigned int pdca_ch_number); + +/*! \brief Enable PDCA transfer interrupt when TCRR reaches zero + * + * \param pdca_ch_number PDCA channel + */ +extern void pdca_enable_interrupt_reload_counter_zero(unsigned int pdca_ch_number); + +/*! \brief Get PDCA channel transfer status + * + * \param pdca_ch_number PDCA channel + * + * \return PDCA transfer status with the following bit-masks:\n + * - \c PDCA_TRANSFER_ERROR;\n + * - \c PDCA_TRANSFER_COMPLETE;\n + * - \c PDCA_TRANSFER_COUNTER_RELOAD_IS_ZERO. + */ +extern unsigned long pdca_get_transfer_status(unsigned int pdca_ch_number); + + +#endif // _PDCA_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.c new file mode 100644 index 0000000..76d9268 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.c @@ -0,0 +1,546 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Power Manager driver. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "compiler.h" +#include "pm.h" + + +/*! \name PM Writable Bit-Field Registers + */ +//! @{ + +typedef union +{ + unsigned long mcctrl; + avr32_pm_mcctrl_t MCCTRL; +} u_avr32_pm_mcctrl_t; + +typedef union +{ + unsigned long cksel; + avr32_pm_cksel_t CKSEL; +} u_avr32_pm_cksel_t; + +typedef union +{ + unsigned long pll; + avr32_pm_pll_t PLL; +} u_avr32_pm_pll_t; + +typedef union +{ + unsigned long oscctrl0; + avr32_pm_oscctrl0_t OSCCTRL0; +} u_avr32_pm_oscctrl0_t; + +typedef union +{ + unsigned long oscctrl1; + avr32_pm_oscctrl1_t OSCCTRL1; +} u_avr32_pm_oscctrl1_t; + +typedef union +{ + unsigned long oscctrl32; + avr32_pm_oscctrl32_t OSCCTRL32; +} u_avr32_pm_oscctrl32_t; + +typedef union +{ + unsigned long ier; + avr32_pm_ier_t IER; +} u_avr32_pm_ier_t; + +typedef union +{ + unsigned long idr; + avr32_pm_idr_t IDR; +} u_avr32_pm_idr_t; + +typedef union +{ + unsigned long icr; + avr32_pm_icr_t ICR; +} u_avr32_pm_icr_t; + +typedef union +{ + unsigned long gcctrl; + avr32_pm_gcctrl_t GCCTRL; +} u_avr32_pm_gcctrl_t; + +typedef union +{ + unsigned long rccr; + avr32_pm_rccr_t RCCR; +} u_avr32_pm_rccr_t; + +typedef union +{ + unsigned long bgcr; + avr32_pm_bgcr_t BGCR; +} u_avr32_pm_bgcr_t; + +typedef union +{ + unsigned long vregcr; + avr32_pm_vregcr_t VREGCR; +} u_avr32_pm_vregcr_t; + +typedef union +{ + unsigned long bod; + avr32_pm_bod_t BOD; +} u_avr32_pm_bod_t; + +//! @} + + +/*! \brief Sets the mode of the oscillator 0. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * \param mode Oscillator 0 mode (i.e. AVR32_PM_OSCCTRL0_MODE_x). + */ +static void pm_set_osc0_mode(volatile avr32_pm_t *pm, unsigned int mode) +{ + // Read + u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0}; + // Modify + u_avr32_pm_oscctrl0.OSCCTRL0.mode = mode; + // Write + pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0; +} + + +void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm) +{ + pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK); +} + + +void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0) +{ + pm_set_osc0_mode(pm, (fosc0 < 900000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G0 : + (fosc0 < 3000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G1 : + (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 : + AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3); +} + + +void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup) +{ + pm_enable_clk0_no_wait(pm, startup); + pm_wait_for_clk0_ready(pm); +} + + +void pm_disable_clk0(volatile avr32_pm_t *pm) +{ + pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC0EN_MASK; +} + + +void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + // Read register + u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0}; + // Modify + u_avr32_pm_oscctrl0.OSCCTRL0.startup = startup; + // Write back + pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0; + + pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK; +} + + +void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_OSC0RDY_MASK)); +} + + +/*! \brief Sets the mode of the oscillator 1. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * \param mode Oscillator 1 mode (i.e. AVR32_PM_OSCCTRL1_MODE_x). + */ +static void pm_set_osc1_mode(volatile avr32_pm_t *pm, unsigned int mode) +{ + // Read + u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1}; + // Modify + u_avr32_pm_oscctrl1.OSCCTRL1.mode = mode; + // Write + pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1; +} + + +void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm) +{ + pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK); +} + + +void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1) +{ + pm_set_osc1_mode(pm, (fosc1 < 900000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G0 : + (fosc1 < 3000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G1 : + (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 : + AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3); +} + + +void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup) +{ + pm_enable_clk1_no_wait(pm, startup); + pm_wait_for_clk1_ready(pm); +} + + +void pm_disable_clk1(volatile avr32_pm_t *pm) +{ + pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC1EN_MASK; +} + + +void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + // Read register + u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1}; + // Modify + u_avr32_pm_oscctrl1.OSCCTRL1.startup = startup; + // Write back + pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1; + + pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK; +} + + +void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_OSC1RDY_MASK)); +} + + +/*! \brief Sets the mode of the 32-kHz oscillator. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * \param mode 32-kHz oscillator mode (i.e. AVR32_PM_OSCCTRL32_MODE_x). + */ +static void pm_set_osc32_mode(volatile avr32_pm_t *pm, unsigned int mode) +{ + // Read + u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32}; + // Modify + u_avr32_pm_oscctrl32.OSCCTRL32.mode = mode; + // Write + pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32; +} + + +void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm) +{ + pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK); +} + + +void pm_enable_osc32_crystal(volatile avr32_pm_t *pm) +{ + pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL); +} + + +void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup) +{ + pm_enable_clk32_no_wait(pm, startup); + pm_wait_for_clk32_ready(pm); +} + + +void pm_disable_clk32(volatile avr32_pm_t *pm) +{ + pm->oscctrl32 &= ~AVR32_PM_OSCCTRL32_OSC32EN_MASK; +} + + +void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + // Read register + u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32}; + // Modify + u_avr32_pm_oscctrl32.OSCCTRL32.osc32en = 1; + u_avr32_pm_oscctrl32.OSCCTRL32.startup = startup; + // Write back + pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32; +} + + +void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_OSC32RDY_MASK)); +} + + +void pm_cksel(volatile avr32_pm_t *pm, + unsigned int pbadiv, + unsigned int pbasel, + unsigned int pbbdiv, + unsigned int pbbsel, + unsigned int hsbdiv, + unsigned int hsbsel) +{ + u_avr32_pm_cksel_t u_avr32_pm_cksel = {0}; + + u_avr32_pm_cksel.CKSEL.cpusel = hsbsel; + u_avr32_pm_cksel.CKSEL.cpudiv = hsbdiv; + u_avr32_pm_cksel.CKSEL.hsbsel = hsbsel; + u_avr32_pm_cksel.CKSEL.hsbdiv = hsbdiv; + u_avr32_pm_cksel.CKSEL.pbasel = pbasel; + u_avr32_pm_cksel.CKSEL.pbadiv = pbadiv; + u_avr32_pm_cksel.CKSEL.pbbsel = pbbsel; + u_avr32_pm_cksel.CKSEL.pbbdiv = pbbdiv; + + pm->cksel = u_avr32_pm_cksel.cksel; + + // Wait for ckrdy bit and then clear it + while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK)); +} + + +void pm_gc_setup(volatile avr32_pm_t *pm, + unsigned int gc, + unsigned int osc_or_pll, // Use Osc (=0) or PLL (=1) + unsigned int pll_osc, // Sel Osc0/PLL0 or Osc1/PLL1 + unsigned int diven, + unsigned int div) +{ + u_avr32_pm_gcctrl_t u_avr32_pm_gcctrl = {0}; + + u_avr32_pm_gcctrl.GCCTRL.oscsel = pll_osc; + u_avr32_pm_gcctrl.GCCTRL.pllsel = osc_or_pll; + u_avr32_pm_gcctrl.GCCTRL.diven = diven; + u_avr32_pm_gcctrl.GCCTRL.div = div; + + pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl; +} + + +void pm_gc_enable(volatile avr32_pm_t *pm, + unsigned int gc) +{ + pm->gcctrl[gc] |= AVR32_PM_GCCTRL_CEN_MASK; +} + + +void pm_gc_disable(volatile avr32_pm_t *pm, + unsigned int gc) +{ + pm->gcctrl[gc] &= ~AVR32_PM_GCCTRL_CEN_MASK; +} + + +void pm_pll_setup(volatile avr32_pm_t *pm, + unsigned int pll, + unsigned int mul, + unsigned int div, + unsigned int osc, + unsigned int lockcount) +{ + u_avr32_pm_pll_t u_avr32_pm_pll = {0}; + + u_avr32_pm_pll.PLL.pllosc = osc; + u_avr32_pm_pll.PLL.plldiv = div; + u_avr32_pm_pll.PLL.pllmul = mul; + u_avr32_pm_pll.PLL.pllcount = lockcount; + + pm->pll[pll] = u_avr32_pm_pll.pll; +} + + +void pm_pll_set_option(volatile avr32_pm_t *pm, + unsigned int pll, + unsigned int pll_freq, + unsigned int pll_div2, + unsigned int pll_wbwdisable) +{ + u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]}; + u_avr32_pm_pll.PLL.pllopt = pll_freq | (pll_div2 << 1) | (pll_wbwdisable << 2); + pm->pll[pll] = u_avr32_pm_pll.pll; +} + + +unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, + unsigned int pll) +{ + return (pm->pll[pll] & AVR32_PM_PLLOPT_MASK) >> AVR32_PM_PLLOPT_OFFSET; +} + + +void pm_pll_enable(volatile avr32_pm_t *pm, + unsigned int pll) +{ + pm->pll[pll] |= AVR32_PM_PLLEN_MASK; +} + + +void pm_pll_disable(volatile avr32_pm_t *pm, + unsigned int pll) +{ + pm->pll[pll] &= ~AVR32_PM_PLLEN_MASK; +} + + +void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK0_MASK)); +} + + +void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK1_MASK)); +} + + +void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock) +{ + // Read + u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl}; + // Modify + u_avr32_pm_mcctrl.MCCTRL.mcsel = clock; + // Write back + pm->mcctrl = u_avr32_pm_mcctrl.mcctrl; +} + + +void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup) +{ + pm_enable_osc0_crystal(pm, fosc0); // Enable the Osc0 in crystal mode + pm_enable_clk0(pm, startup); // Crystal startup time - This parameter is critical and depends on the characteristics of the crystal + pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0); // Then switch main clock to Osc0 +} + + +void pm_bod_enable_irq(volatile avr32_pm_t *pm) +{ + pm->ier = AVR32_PM_IER_BODDET_MASK; +} + + +void pm_bod_disable_irq(volatile avr32_pm_t *pm) +{ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + if (global_interrupt_enabled) Disable_global_interrupt(); + pm->idr = AVR32_PM_IDR_BODDET_MASK; + pm->isr; + if (global_interrupt_enabled) Enable_global_interrupt(); +} + + +void pm_bod_clear_irq(volatile avr32_pm_t *pm) +{ + pm->icr = AVR32_PM_ICR_BODDET_MASK; +} + + +unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm) +{ + return ((pm->isr & AVR32_PM_ISR_BODDET_MASK) != 0); +} + + +unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm) +{ + return ((pm->imr & AVR32_PM_IMR_BODDET_MASK) != 0); +} + + +unsigned long pm_bod_get_level(volatile avr32_pm_t *pm) +{ + return (pm->bod & AVR32_PM_BOD_LEVEL_MASK) >> AVR32_PM_BOD_LEVEL_OFFSET; +} + + +unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp) +{ + return pm->gplp[gplp]; +} + + +void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value) +{ + pm->gplp[gplp] = value; +} + + +long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module) +{ + unsigned long domain = module>>5; + unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain); + + // Implementation-specific shortcut: the ckMASK registers are contiguous and + // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK. + + *regptr |= (1<<(module%32)); + + return PASS; +} + +long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module) +{ + unsigned long domain = module>>5; + unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain); + + // Implementation-specific shortcut: the ckMASK registers are contiguous and + // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK. + + *regptr &= ~(1<<(module%32)); + + return PASS; +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.h new file mode 100644 index 0000000..ca679f7 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.h @@ -0,0 +1,493 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Power Manager driver. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _PM_H_ +#define _PM_H_ + +#include +#include "compiler.h" +#include "preprocessor.h" + + +/*! \brief Sets the MCU in the specified sleep mode. + * + * \param mode Sleep mode: + * \arg \c AVR32_PM_SMODE_IDLE: Idle; + * \arg \c AVR32_PM_SMODE_FROZEN: Frozen; + * \arg \c AVR32_PM_SMODE_STANDBY: Standby; + * \arg \c AVR32_PM_SMODE_STOP: Stop; + * \arg \c AVR32_PM_SMODE_DEEP_STOP: DeepStop; + * \arg \c AVR32_PM_SMODE_STATIC: Static. + */ +#define SLEEP(mode) {__asm__ __volatile__ ("sleep "STRINGZ(mode));} + + +//! Input and output parameters when initializing PM clocks using pm_configure_clocks(). +typedef struct +{ + //! CPU frequency (input/output argument). + unsigned long cpu_f; + + //! PBA frequency (input/output argument). + unsigned long pba_f; + + //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument). + unsigned long osc0_f; + + //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument). + unsigned long osc0_startup; +} pm_freq_param_t; + +#define PM_FREQ_STATUS_FAIL (-1) +#define PM_FREQ_STATUS_OK (0) + + +/*! \brief Gets the MCU reset cause. + * + * \param pm Base address of the Power Manager instance (i.e. &AVR32_PM). + * + * \return The MCU reset cause which can be masked with the + * \c AVR32_PM_RCAUSE_x_MASK bit-masks to isolate specific causes. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ unsigned int pm_get_reset_cause(volatile avr32_pm_t *pm) +{ + return pm->rcause; +} + + +/*! + * \brief This function will enable the external clock mode of the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc0 Oscillator 0 crystal frequency (Hz) + */ +extern void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0); + + +/*! + * \brief This function will enable the oscillator 0 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk0(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 0 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 0 startup time, for which the function does not wait. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the Osc0 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the external clock mode of the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc1 Oscillator 1 crystal frequency (Hz) + */ +extern void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1); + + +/*! + * \brief This function will enable the oscillator 1 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 1 startup time. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk1(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 1 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 1 startup time, for which the function does not wait. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the Osc1 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the external clock mode of the 32-kHz oscillator. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the 32-kHz oscillator. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc32_crystal(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 32 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 32 kHz startup time. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 32. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk32(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 32 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 32 kHz startup time, for which the function does not wait. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the osc32 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will select all the power manager clocks. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pbadiv Peripheral Bus A clock divisor enable + * \param pbasel Peripheral Bus A select + * \param pbbdiv Peripheral Bus B clock divisor enable + * \param pbbsel Peripheral Bus B select + * \param hsbdiv High Speed Bus clock divisor enable (CPU clock = HSB clock) + * \param hsbsel High Speed Bus select (CPU clock = HSB clock ) + */ +extern void pm_cksel(volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel); + + +/*! + * \brief This function will setup a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + * \param osc_or_pll Use OSC (=0) or PLL (=1) + * \param pll_osc Select Osc0/PLL0 or Osc1/PLL1 + * \param diven Generic clock divisor enable + * \param div Generic clock divisor + */ +extern void pm_gc_setup(volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div); + + +/*! + * \brief This function will enable a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + */ +extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc); + + +/*! + * \brief This function will disable a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + */ +extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc); + + +/*! + * \brief This function will setup a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \param mul PLL MUL in the PLL formula + * \param div PLL DIV in the PLL formula + * \param osc OSC number (0 for osc0, 1 for osc1) + * \param lockcount PLL lockount + */ +extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount); + + +/*! + * \brief This function will set a PLL option. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \param pll_freq Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + * \param pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + * \param pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + */ +extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int pll_freq, unsigned int pll_div2, unsigned int pll_wbwdisable); + + +/*! + * \brief This function will get a PLL option. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \return Option + */ +extern unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will enable a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + */ +extern void pm_pll_enable(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will disable a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + */ +extern void pm_pll_disable(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will wait for PLL0 locked + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will wait for PLL1 locked + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will switch the power manager main clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param clock Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0. + */ +extern void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock); + + +/*! + * \brief Switch main clock to clock Osc0 (crystal mode) + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc0 Oscillator 0 crystal frequency (Hz) + * \param startup Crystal 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. + */ +extern void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup); + + +/*! \brief Enables the Brown-Out Detector interrupt. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + */ +extern void pm_bod_enable_irq(volatile avr32_pm_t *pm); + + +/*! \brief Disables the Brown-Out Detector interrupt. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + */ +extern void pm_bod_disable_irq(volatile avr32_pm_t *pm); + + +/*! \brief Clears the Brown-Out Detector interrupt flag. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + */ +extern void pm_bod_clear_irq(volatile avr32_pm_t *pm); + + +/*! \brief Gets the Brown-Out Detector interrupt flag. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * + * \retval 0 No BOD interrupt. + * \retval 1 BOD interrupt pending. + */ +extern unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm); + + +/*! \brief Gets the Brown-Out Detector interrupt enable status. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * + * \retval 0 BOD interrupt disabled. + * \retval 1 BOD interrupt enabled. + */ +extern unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm); + + +/*! \brief Gets the triggering threshold of the Brown-Out Detector. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * + * \return Triggering threshold of the BOD. See the electrical characteristics + * in the part datasheet for actual voltage levels. + */ +extern unsigned long pm_bod_get_level(volatile avr32_pm_t *pm); + + +/*! + * \brief Read the content of the PM GPLP registers + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * + * \return The content of the chosen GPLP register. + */ +extern unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp); + + +/*! + * \brief Write into the PM GPLP registers + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * \param value Value to write + */ +extern void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value); + + +/*! \brief Enable the clock of a module. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param module The module to clock (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks") + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module); + +/*! \brief Disable the clock of a module. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param module The module to shut down (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks") + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module); + + + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks + * according to the user wishes. + * + * This function needs some parameters stored in a pm_freq_param_t structure: + * - cpu_f and pba_f are the wanted frequencies, + * - osc0_f is the oscillator 0 on-board frequency (e.g. FOSC0), + * - osc0_startup is the oscillator 0 startup time (e.g. OSC0_STARTUP). + * + * The function will then configure the clocks using the following rules: + * - It first try to find a valid PLL frequency (the highest possible value to avoid jitter) in order + * to satisfy the CPU frequency, + * - It optimizes the configuration depending the various divide stages, + * - Then, the PBA frequency is configured from the CPU freq. + * - Note that HSB and PBB are configured with the same frequency as CPU. + * - Note also that the number of wait states of the flash read accesses is automatically set-up depending + * the CPU frequency. As a consequence, the application needs the FLASHC driver to compile. + * + * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f. + * + * \param param pointer on the configuration structure. + * + * \retval PM_FREQ_STATUS_OK Mode successfully initialized. + * \retval PM_FREQ_STATUS_FAIL The configuration can not be done. + */ +extern int pm_configure_clocks(pm_freq_param_t *param); + + +/*! \brief Automatically configure the USB clock. + * + * USB clock is configured to 48MHz, using the PLL1 from the Oscillator0, assuming + * a 12 MHz crystal is connected to it. + */ +extern void pm_configure_usb_clock(void); + + +#endif // _PM_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm_conf_clocks.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm_conf_clocks.c new file mode 100644 index 0000000..8beb83b --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm_conf_clocks.c @@ -0,0 +1,268 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Power Manager clocks configuration helper. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "compiler.h" +#include "pm.h" + +extern void flashc_set_wait_state(unsigned int wait_state); +#if (defined AVR32_FLASHC_210_H_INCLUDED) +extern void flashc_issue_command(unsigned int command, int page_number); +#endif + + +#define PM_MAX_MUL ((1 << AVR32_PM_PLL0_PLLMUL_SIZE) - 1) + + +int pm_configure_clocks(pm_freq_param_t *param) +{ + // Supported frequencies: + // Fosc0 mul div PLL div2_en cpu_f pba_f Comment + // 12 15 1 192 1 12 12 + // 12 9 3 40 1 20 20 PLL out of spec + // 12 15 1 192 1 24 12 + // 12 9 1 120 1 30 15 + // 12 9 3 40 0 40 20 PLL out of spec + // 12 15 1 192 1 48 12 + // 12 15 1 192 1 48 24 + // 12 8 1 108 1 54 27 + // 12 9 1 120 1 60 15 + // 12 9 1 120 1 60 30 + // 12 10 1 132 1 66 16.5 + // + unsigned long in_cpu_f = param->cpu_f; + unsigned long in_osc0_f = param->osc0_f; + unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0; + unsigned long pll_freq, rest; + Bool b_div2_pba, b_div2_cpu; + + // Switch to external Oscillator 0 + pm_switch_to_osc0(&AVR32_PM, in_osc0_f, param->osc0_startup); + + // Start with CPU freq config + if (in_cpu_f == in_osc0_f) + { + param->cpu_f = in_osc0_f; + param->pba_f = in_osc0_f; + return PM_FREQ_STATUS_OK; + } + else if (in_cpu_f < in_osc0_f) + { + // TBD + } + + rest = in_cpu_f % in_osc0_f; + + for (div = 1; div < 32; div++) + { + if ((div * rest) % in_osc0_f == 0) + break; + } + if (div == 32) + return PM_FREQ_STATUS_FAIL; + + mul = (in_cpu_f * div) / in_osc0_f; + + if (mul > PM_MAX_MUL) + return PM_FREQ_STATUS_FAIL; + + // export 2power from PLL div to div2_cpu + while (!(div % 2)) + { + div /= 2; + div2_cpu++; + } + + // Here we know the mul and div parameter of the PLL config. + // . Check out if the PLL has a valid in_cpu_f. + // . Try to have for the PLL frequency (VCO output) the highest possible value + // to reduce jitter. + while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ) + { + if (2 * mul > PM_MAX_MUL) + break; + mul *= 2; + div2_cpu++; + } + + if (div2_cpu != 0) + { + div2_cpu--; + div2_en = 1; + } + + pll_freq = in_osc0_f * mul / (div * (1 << div2_en)); + + // Update real CPU Frequency + param->cpu_f = pll_freq / (1 << div2_cpu); + mul--; + + pm_pll_setup(&AVR32_PM + , 0 // pll + , mul // mul + , div // div + , 0 // osc + , 16 // lockcount + ); + + pm_pll_set_option(&AVR32_PM + , 0 // pll + // PLL clock is lower than 160MHz: need to set pllopt. + , (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0 // pll_freq + , div2_en // pll_div2 + , 0 // pll_wbwdisable + ); + + rest = pll_freq; + while (rest > AVR32_PM_PBA_MAX_FREQ || + rest != param->pba_f) + { + div2_pba++; + rest = pll_freq / (1 << div2_pba); + if (rest < param->pba_f) + break; + } + + // Update real PBA Frequency + param->pba_f = pll_freq / (1 << div2_pba); + + // Enable PLL0 + pm_pll_enable(&AVR32_PM, 0); + + // Wait for PLL0 locked + pm_wait_for_pll0_locked(&AVR32_PM); + + if (div2_cpu) + { + b_div2_cpu = TRUE; + div2_cpu--; + } + else + b_div2_cpu = FALSE; + + if (div2_pba) + { + b_div2_pba = TRUE; + div2_pba--; + } + else + b_div2_pba = FALSE; + + pm_cksel(&AVR32_PM + , b_div2_pba, div2_pba // PBA + , b_div2_cpu, div2_cpu // PBB + , b_div2_cpu, div2_cpu // HSB + ); + + if (param->cpu_f > AVR32_FLASHC_FWS_0_MAX_FREQ) + { + flashc_set_wait_state(1); +#if (defined AVR32_FLASHC_210_H_INCLUDED) + if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ) + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1); + else + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); +#endif + } + else + { + flashc_set_wait_state(0); +#if (defined AVR32_FLASHC_210_H_INCLUDED) + if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ) + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1); + else + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); +#endif + } + + pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0); + + return PM_FREQ_STATUS_OK; +} + + +void pm_configure_usb_clock(void) +{ +#if UC3A3 + + // Setup USB GCLK. + pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc + 0, // osc_or_pll: use Osc (if 0) or PLL (if 1) + 0, // pll_osc: select Osc0/PLL0 or Osc1/PLL1 + 0, // diven + 0); // div + + // Enable USB GCLK. + pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB); +#else + // Use 12MHz from OSC0 and generate 96 MHz + pm_pll_setup(&AVR32_PM, 1, // pll. + 7, // mul. + 1, // div. + 0, // osc. + 16); // lockcount. + + pm_pll_set_option(&AVR32_PM, 1, // pll. + 1, // pll_freq: choose the range 80-180MHz. + 1, // pll_div2. + 0); // pll_wbwdisable. + + // start PLL1 and wait forl lock + pm_pll_enable(&AVR32_PM, 1); + + // Wait for PLL1 locked. + pm_wait_for_pll1_locked(&AVR32_PM); + + pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc. + 1, // osc_or_pll: use Osc (if 0) or PLL (if 1). + 1, // pll_osc: select Osc0/PLL0 or Osc1/PLL1. + 0, // diven. + 0); // div. + pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB); +#endif +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.c new file mode 100644 index 0000000..f5fc155 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.c @@ -0,0 +1,566 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief High-level library abstracting features such as oscillators/pll/dfll + * configuration, clock configuration, System-sensible parameters + * configuration, buses clocks configuration, sleep mode, reset. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +#include "power_clocks_lib.h" + + +//! Device-specific data +#if UC3L +static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param); // FORWARD declaration +#endif + +#if UC3C +static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param); // FORWARD declaration +#endif + +long int pcl_configure_clocks(pcl_freq_param_t *param) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE + // Implementation for UC3A, UC3A3, UC3B parts. + return(pm_configure_clocks(param)); +#else + #ifdef AVR32_PM_410_H_INCLUDED + // Implementation for UC3C parts. + return(pcl_configure_clocks_uc3c(param)); + #else + // Implementation for UC3L parts. + return(pcl_configure_clocks_uc3l(param)); + #endif +#endif +} + + +//! Device-specific implementation +#if UC3L +// FORWARD declaration +static long int pcl_configure_synchronous_clocks( pm_clk_src_t main_clk_src, + unsigned long main_clock_freq_hz, + pcl_freq_param_t *param); + +long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_RCSYS + + // Supported synchronous clocks frequencies if RCSYS is the main clock source: + // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target frequencies are reachable. + if((param->cpu_f > SCIF_SLOWCLOCK_FREQ_HZ) || (param->pba_f > SCIF_SLOWCLOCK_FREQ_HZ) + || (param->pbb_f > SCIF_SLOWCLOCK_FREQ_HZ)) + return(-1); +#endif + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_SLOW, SCIF_SLOWCLOCK_FREQ_HZ, param)); +} + + +long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_RC120M + + // Supported synchronous clocks frequencies if RC120M is the main clock source: + // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target frequencies are reachable. + if((param->cpu_f > SCIF_RC120M_FREQ_HZ) || (param->pba_f > SCIF_RC120M_FREQ_HZ) + || (param->pbb_f > SCIF_RC120M_FREQ_HZ)) + return(-1); +#endif + + // Start the 120MHz internal RCosc (RC120M) clock + scif_start_rc120M(); + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_RC120M, SCIF_RC120M_FREQ_HZ, param)); +} + + +long int pcl_configure_clocks_osc0(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_OSC0 + + // Supported synchronous clocks frequencies if OSC0 is the main clock source: + // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) + // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + + unsigned long main_clock_freq; + + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + + main_clock_freq = param->osc0_f; +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target frequencies are reachable. + if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq) + || (param->pbb_f > main_clock_freq)) + return(-1); +#endif + // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, main_clock_freq); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, param->osc0_startup, true); + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_OSC0, main_clock_freq, param)); +} + + +long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_DFLL + + // Supported synchronous clocks frequencies if DFLL is the main clock source: + // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) + // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + + unsigned long main_clock_freq; + scif_gclk_opt_t *pgc_dfllif_ref_opt; + + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + + main_clock_freq = param->dfll_f; +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target DFLL output frequency is in the correct range. + if((main_clock_freq > SCIF_DFLL_MAXFREQ_HZ) || (main_clock_freq < SCIF_DFLL_MINFREQ_HZ)) + return(-1); + // Verify that the target frequencies are reachable. + if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq) + || (param->pbb_f > main_clock_freq)) + return(-1); +#endif + pgc_dfllif_ref_opt = (scif_gclk_opt_t *)param->pextra_params; + // Implementation note: this implementation configures the DFLL in closed-loop + // mode (because it gives the best accuracy) which enables the generic clock CLK_DFLLIF_REF + // as a reference (RCSYS being used as the generic clock source, undivided). + scif_dfll0_closedloop_configure_and_start(pgc_dfllif_ref_opt, main_clock_freq, TRUE); + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_DFLL0, main_clock_freq, param)); +} + + +static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_RCSYS, PCL_MC_OSC0, PCL_MC_DFLL0, PCL_MC_RC120M + + // Supported synchronous clocks frequencies if RCSYS is the main clock source: + // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz. + + // Supported synchronous clocks frequencies if RC120M is the main clock source: + // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz. + + // Supported synchronous clocks frequencies if OSC0 is the main clock source: + // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) + // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz. + + // Supported synchronous clocks frequencies if DFLL is the main clock source: + // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) + // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + + if(PCL_MC_RCSYS == param->main_clk_src) + { + return(pcl_configure_clocks_rcsys(param)); + } + else if(PCL_MC_RC120M == param->main_clk_src) + { + return(pcl_configure_clocks_rc120m(param)); + } + else if(PCL_MC_OSC0 == param->main_clk_src) + { + return(pcl_configure_clocks_osc0(param)); + } + else // PCL_MC_DFLL0 == param->main_clk_src + { + return(pcl_configure_clocks_dfll0(param)); + } +} + +static long int pcl_configure_synchronous_clocks(pm_clk_src_t main_clk_src, unsigned long main_clock_freq_hz, pcl_freq_param_t *param) +{ + //# + //# Set the Synchronous clock division ratio for each clock domain + //# + pm_set_all_cksel(main_clock_freq_hz, param->cpu_f, param->pba_f, param->pbb_f); + + //# + //# Set the Flash wait state and the speed read mode (depending on the target CPU frequency). + //# +#if UC3L + flashcdw_set_flash_waitstate_and_readmode(param->cpu_f); +#elif UC3C + flashc_set_flash_waitstate_and_readmode(param->cpu_f); +#endif + + + //# + //# Switch the main clock source to the selected clock. + //# + pm_set_mclk_source(main_clk_src); + + return PASS; +} + +#endif // UC3L device-specific implementation + +//! UC3C Device-specific implementation +#if UC3C +static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param) +{ + #define PM_MAX_MUL ((1 << AVR32_SCIF_PLLMUL_SIZE) - 1) + #define AVR32_PM_PBA_MAX_FREQ 66000000 + #define AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ 240000000 + #define AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ 160000000 + + // Implementation for UC3C parts. + // Supported frequencies: + // Fosc0 mul div PLL div2_en cpu_f pba_f Comment + // 12 15 1 192 1 12 12 + // 12 9 3 40 1 20 20 PLL out of spec + // 12 15 1 192 1 24 12 + // 12 9 1 120 1 30 15 + // 12 9 3 40 0 40 20 PLL out of spec + // 12 15 1 192 1 48 12 + // 12 15 1 192 1 48 24 + // 12 8 1 108 1 54 27 + // 12 9 1 120 1 60 15 + // 12 9 1 120 1 60 30 + // 12 10 1 132 1 66 16.5 + // + unsigned long in_cpu_f = param->cpu_f; + unsigned long in_osc0_f = param->osc0_f; + unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0; + unsigned long pll_freq, rest; + Bool b_div2_pba, b_div2_cpu; + + // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, in_osc0_f); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, param->osc0_startup, true); + // Set the main clock source as being OSC0. + pm_set_mclk_source(PM_CLK_SRC_OSC0); + + // Start with CPU freq config + if (in_cpu_f == in_osc0_f) + { + param->cpu_f = in_osc0_f; + param->pba_f = in_osc0_f; + return PASS; + } + else if (in_cpu_f < in_osc0_f) + { + // TBD + } + + rest = in_cpu_f % in_osc0_f; + + for (div = 1; div < 32; div++) + { + if ((div * rest) % in_osc0_f == 0) + break; + } + if (div == 32) + return FAIL; + + mul = (in_cpu_f * div) / in_osc0_f; + + if (mul > PM_MAX_MUL) + return FAIL; + + // export 2power from PLL div to div2_cpu + while (!(div % 2)) + { + div /= 2; + div2_cpu++; + } + + // Here we know the mul and div parameter of the PLL config. + // . Check out if the PLL has a valid in_cpu_f. + // . Try to have for the PLL frequency (VCO output) the highest possible value + // to reduce jitter. + while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ) + { + if (2 * mul > PM_MAX_MUL) + break; + mul *= 2; + div2_cpu++; + } + + if (div2_cpu != 0) + { + div2_cpu--; + div2_en = 1; + } + + pll_freq = in_osc0_f * mul / (div * (1 << div2_en)); + + // Update real CPU Frequency + param->cpu_f = pll_freq / (1 << div2_cpu); + mul--; + + scif_pll_opt_t opt; + + opt.osc = SCIF_OSC0, // Sel Osc0 or Osc1 + opt.lockcount = 16, // lockcount in main clock for the PLL wait lock + opt.div = div, // DIV=1 in the formula + opt.mul = mul, // MUL=7 in the formula + opt.pll_div2 = div2_en, // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + opt.pll_wbwdisable = 0, //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + opt.pll_freq = (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0, // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + + + scif_pll_setup(SCIF_PLL0, opt); // lockcount in main clock for the PLL wait lock + + /* Enable PLL0 */ + scif_pll_enable(SCIF_PLL0); + + /* Wait for PLL0 locked */ + scif_wait_for_pll_locked(SCIF_PLL0) ; + + rest = pll_freq; + while (rest > AVR32_PM_PBA_MAX_FREQ || + rest != param->pba_f) + { + div2_pba++; + rest = pll_freq / (1 << div2_pba); + if (rest < param->pba_f) + break; + } + + // Update real PBA Frequency + param->pba_f = pll_freq / (1 << div2_pba); + + + if (div2_cpu) + { + b_div2_cpu = TRUE; + div2_cpu--; + } + else + b_div2_cpu = FALSE; + + if (div2_pba) + { + b_div2_pba = TRUE; + div2_pba--; + } + else + b_div2_pba = FALSE; + + if (b_div2_cpu == TRUE ) + { + pm_set_clk_domain_div(PM_CLK_DOMAIN_0, (pm_divratio_t) div2_cpu); // CPU + pm_set_clk_domain_div(PM_CLK_DOMAIN_1, (pm_divratio_t) div2_cpu); // HSB + pm_set_clk_domain_div(PM_CLK_DOMAIN_3, (pm_divratio_t) div2_cpu); // PBB + } + if (b_div2_pba == TRUE ) + { + pm_set_clk_domain_div(PM_CLK_DOMAIN_2, (pm_divratio_t) div2_pba); // PBA + pm_set_clk_domain_div(PM_CLK_DOMAIN_4, (pm_divratio_t) div2_pba); // PBC + } + + // Set Flashc Wait State + flashc_set_flash_waitstate_and_readmode(param->cpu_f); + + // Set the main clock source as being PLL0. + pm_set_mclk_source(PM_CLK_SRC_PLL0); + + return PASS; +} +#endif // UC3C device-specific implementation + +long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + if(PCL_OSC0 == osc) + { + // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency, + // enable the OSC0, set the main clock source as being OSC0. + pm_switch_to_osc0(&AVR32_PM, fcrystal, startup); + } + else + { + return PCL_NOT_SUPPORTED; + } +#else +// Implementation for UC3C, UC3L parts. + #if AVR32_PM_VERSION_RESETVALUE < 0x400 + return PCL_NOT_SUPPORTED; + #else + if(PCL_OSC0 == osc) + { + // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, fcrystal); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, startup, true); + // Set the Flash wait state and the speed read mode (depending on the target CPU frequency). +#if UC3L + flashcdw_set_flash_waitstate_and_readmode(fcrystal); +#elif UC3C + flashc_set_flash_waitstate_and_readmode(fcrystal); +#endif + // Set the main clock source as being OSC0. + pm_set_mclk_source(PM_CLK_SRC_OSC0); + } + else + { + return PCL_NOT_SUPPORTED; + } + #endif +#endif + return PASS; +} + +long int pcl_configure_usb_clock(void) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + pm_configure_usb_clock(); + return PASS; +#else + #ifdef AVR32_PM_410_H_INCLUDED + const scif_pll_opt_t opt = { + .osc = SCIF_OSC0, // Sel Osc0 or Osc1 + .lockcount = 16, // lockcount in main clock for the PLL wait lock + .div = 1, // DIV=1 in the formula + .mul = 5, // MUL=7 in the formula + .pll_div2 = 1, // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + .pll_wbwdisable = 0, //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + .pll_freq = 1, // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + }; + + /* Setup PLL1 on Osc0, mul=7 ,no divisor, lockcount=16, ie. 16Mhzx6 = 96MHz output */ + scif_pll_setup(SCIF_PLL1, opt); // lockcount in main clock for the PLL wait lock + + /* Enable PLL1 */ + scif_pll_enable(SCIF_PLL1); + + /* Wait for PLL1 locked */ + scif_wait_for_pll_locked(SCIF_PLL1) ; + + // Implementation for UC3C parts. + // Setup the generic clock for USB + scif_gc_setup(AVR32_SCIF_GCLK_USB, + SCIF_GCCTRL_PLL1, + AVR32_SCIF_GC_NO_DIV_CLOCK, + 0); + // Now enable the generic clock + scif_gc_enable(AVR32_SCIF_GCLK_USB); + return PASS; + #else + return PCL_NOT_SUPPORTED; + #endif +#endif +} + + +#if UC3L +#else +void pcl_write_gplp(unsigned long gplp, unsigned long value) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + pm_write_gplp(&AVR32_PM,gplp,value); +#else + scif_write_gplp(gplp,value); +#endif +} + +unsigned long pcl_read_gplp(unsigned long gplp) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + return pm_read_gplp(&AVR32_PM,gplp); +#else + return scif_read_gplp(gplp); +#endif +} +#endif diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.h new file mode 100644 index 0000000..28c5888 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.h @@ -0,0 +1,379 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief High-level library abstracting features such as oscillators/pll/dfll + * configuration, clock configuration, System-sensible parameters + * configuration, buses clocks configuration, sleep mode, reset. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _POWER_CLOCKS_LIB_H_ +#define _POWER_CLOCKS_LIB_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include "compiler.h" + +#ifndef AVR32_PM_VERSION_RESETVALUE +// Support for UC3A, UC3A3, UC3B parts. + #include "pm.h" +#else +//! Device-specific data +#if UC3L + #include "pm_uc3l.h" + #include "scif_uc3l.h" + #include "flashcdw.h" +#elif UC3C + #include "pm_uc3c.h" + #include "scif_uc3c.h" + #include "flashc.h" +#endif +#endif + +/*! \name Clocks Management + */ +//! @{ + +//! The different oscillators +typedef enum +{ + PCL_OSC0 = 0, + PCL_OSC1 = 1 +} pcl_osc_t; + +//! The different DFLLs +typedef enum +{ + PCL_DFLL0 = 0, + PCL_DFLL1 = 1 +} pcl_dfll_t; + +//! Possible Main Clock Sources +typedef enum +{ + PCL_MC_RCSYS, // Default main clock source, supported by all (aka Slow Clock) + PCL_MC_OSC0, // Supported by all + PCL_MC_OSC1, // Supported by UC3C only + PCL_MC_OSC0_PLL0, // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC0 as reference) + PCL_MC_OSC1_PLL0, // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC1 as reference) + PCL_MC_OSC0_PLL1, // Supported by UC3C (the main clock source is PLL1 with OSC0 as reference) + PCL_MC_OSC1_PLL1, // Supported by UC3C (the main clock source is PLL1 with OSC1 as reference) + PCL_MC_DFLL0, // Supported by UC3L + PCL_MC_DFLL1, // Not supported yet + PCL_MC_RC120M, // Supported by UC3L, UC3C + PCL_MC_RC8M, // Supported by UC3C + PCL_MC_CRIPOSC // Supported by UC3C +} pcl_mainclk_t; + +//! Input and output parameters to configure clocks with pcl_configure_clocks(). +// NOTE: regarding the frequency settings, always abide by the datasheet rules and min & max supported frequencies. +#ifndef AVR32_PM_VERSION_RESETVALUE +// Support for UC3A, UC3A3, UC3B parts. +#define pcl_freq_param_t pm_freq_param_t // See pm.h +#else +// Support for UC3C, UC3L parts. +typedef struct +{ + //! Main clock source selection (input argument). + pcl_mainclk_t main_clk_src; + + //! Target CPU frequency (input/output argument). + unsigned long cpu_f; + + //! Target PBA frequency (input/output argument). + unsigned long pba_f; + + //! Target PBB frequency (input/output argument). + unsigned long pbb_f; + + //! Target PBC frequency (input/output argument). + unsigned long pbc_f; + + //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument). + unsigned long osc0_f; + + //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument). + unsigned long osc0_startup; + + //! DFLL target frequency (input/output argument) (NOTE: the bigger, the most stable the frequency) + unsigned long dfll_f; + + //! Other parameters that might be necessary depending on the device (implementation-dependent). + // For the UC3L DFLL setup, this parameter should be pointing to a structure of + // type (scif_gclk_opt_t *). + void *pextra_params; +} pcl_freq_param_t; +#endif + +//! Define "not supported" for the lib. +#define PCL_NOT_SUPPORTED (-10000) + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - main_clk_src is the id of the main clock source to use, + * - cpu_f and pba_f and pbb_f are the wanted frequencies, + * - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0), + * - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP). + * - dfll_f is the target DFLL frequency to set-up if main_clk_src is the dfll. + * + * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks() and modify it to use + * preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RCSYS osc as main source clock. + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies + * + * Supported main clock sources: PCL_MC_RCSYS + * + * Supported synchronous clocks frequencies: + * 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_rcsys() and modify it to use + * preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RC120M osc as main source clock. + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies + * + * Supported main clock sources: PCL_MC_RC120M + * + * Supported synchronous clocks frequencies: + * 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_rc120m() and modify it to + * use preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the OSC0 osc as main source clock + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies, + * - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0), + * - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP). + * + * Supported main clock sources: PCL_MC_OSC0 + * + * Supported synchronous clocks frequencies: + * (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) + * 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_osc0() and modify it to use + * preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_osc0(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the DFLL0 as main source clock + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies, + * - dfll_f is the target DFLL frequency to set-up + * + * \note: when the DFLL0 is to be used as main source clock for the synchronous clocks, + * the target frequency of the DFLL should be chosen to be as high as possible + * within the specification range (for stability reasons); the target cpu and pbx + * frequencies will then be reached by appropriate division ratio. + * + * Supported main clock sources: PCL_MC_DFLL0 + * + * Supported synchronous clocks frequencies: + * (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) + * 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_dfll0() and modify it to + * use preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param); + +/*! \brief Switch the main clock source to Osc0 configured in crystal mode + * + * \param osc The oscillator to enable and switch to. + * \param fcrystal Oscillator external crystal frequency (Hz) + * \param startup Oscillator startup time. + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup); + +/*! \brief Enable the clock of a module. + * + * \param module The module to clock (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks" + * or look in the module section). + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. +#define pcl_enable_module(module) pm_enable_module(&AVR32_PM, module) +#else +// Implementation for UC3C, UC3L parts. +#define pcl_enable_module(module) pm_enable_module(module) +#endif + +/*! \brief Disable the clock of a module. + * + * \param module The module to shut down (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks" + * or look in the module section). + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. +#define pcl_disable_module(module) pm_disable_module(&AVR32_PM, module) +#else +// Implementation for UC3C, UC3L parts. +#define pcl_disable_module(module) pm_disable_module(module) +#endif + +/*! \brief Configure the USB Clock + * + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long int pcl_configure_usb_clock(void); + +//! @} + +/*! \name Power Management + */ +//! @{ +/*! + * \brief Read the content of the GPLP registers + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * + * \return The content of the chosen GPLP register. + */ +extern unsigned long pcl_read_gplp(unsigned long gplp); + + +/*! + * \brief Write into the GPLP registers + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * \param value Value to write + */ +extern void pcl_write_gplp(unsigned long gplp, unsigned long value); + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif // _POWER_CLOCKS_LIB_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/RTC/rtc.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/RTC/rtc.c new file mode 100644 index 0000000..4cbae0f --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/RTC/rtc.c @@ -0,0 +1,213 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief RTC driver for AVR32 UC3. + * + * AVR32 Real Time Counter driver module. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an RTC and a PM module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "compiler.h" +#include "pm.h" +#include "rtc.h" + + +int rtc_is_busy(volatile avr32_rtc_t *rtc) +{ + return (rtc->ctrl & AVR32_RTC_CTRL_BUSY_MASK) != 0; +} + + +int rtc_init(volatile avr32_rtc_t *rtc, unsigned char osc_type, unsigned char psel) +{ + // If exit, it means that the configuration has not been set correctly + if (osc_type > (1 << AVR32_RTC_CTRL_CLK32_SIZE) - 1 || + psel > (1 << AVR32_RTC_CTRL_PSEL_SIZE) - 1) + return 0; + + // If we use the 32-kHz oscillator, we have to enable it first + if (osc_type == RTC_OSC_32KHZ) + { + // Select the 32-kHz oscillator crystal + pm_enable_osc32_crystal(&AVR32_PM); + // Enable the 32-kHz clock + pm_enable_clk32_no_wait(&AVR32_PM, AVR32_PM_OSCCTRL32_STARTUP_0_RCOSC); + } + + // Wait until the rtc CTRL register is up-to-date + while (rtc_is_busy(rtc)); + + // Set the new RTC configuration + rtc->ctrl = osc_type << AVR32_RTC_CTRL_CLK32_OFFSET | + psel << AVR32_RTC_CTRL_PSEL_OFFSET | + AVR32_RTC_CTRL_CLKEN_MASK; + + // Wait until write is done + while (rtc_is_busy(rtc)); + + // Set the counter value to 0 + rtc_set_value(rtc, 0x00000000); + // Set the top value to 0xFFFFFFFF + rtc_set_top_value(rtc, 0xFFFFFFFF); + + return 1; +} + + +void rtc_set_value(volatile avr32_rtc_t *rtc, unsigned long val) +{ + // Wait until we can write into the VAL register + while (rtc_is_busy(rtc)); + // Set the new val value + rtc->val = val; + // Wait until write is done + while (rtc_is_busy(rtc)); +} + + +unsigned long rtc_get_value(volatile avr32_rtc_t *rtc) +{ + return rtc->val; +} + + +void rtc_enable_wake_up(volatile avr32_rtc_t *rtc) +{ + // Wait until the rtc CTRL register is up-to-date + while (rtc_is_busy(rtc)); + // Enable the wake up of the RTC + rtc->ctrl |= AVR32_RTC_CTRL_WAKE_EN_MASK; + // Wait until write is done + while (rtc_is_busy(rtc)); +} + + +void rtc_disable_wake_up(volatile avr32_rtc_t *rtc) +{ + // Wait until the rtc CTRL register is up-to-date + while (rtc_is_busy(rtc)); + // Disable the wake up of the RTC + rtc->ctrl &= ~AVR32_RTC_CTRL_WAKE_EN_MASK; + // Wait until write is done + while (rtc_is_busy(rtc)); +} + + +void rtc_enable(volatile avr32_rtc_t *rtc) +{ + // Wait until the rtc CTRL register is up-to-date + while (rtc_is_busy(rtc)); + // Enable the RTC + rtc->ctrl |= AVR32_RTC_CTRL_EN_MASK; + // Wait until write is done + while (rtc_is_busy(rtc)); +} + + +void rtc_disable(volatile avr32_rtc_t *rtc) +{ + // Wait until the rtc CTRL register is up-to-date + while (rtc_is_busy(rtc)); + // Disable the RTC + rtc->ctrl &= ~AVR32_RTC_CTRL_EN_MASK; + // Wait until write is done + while (rtc_is_busy(rtc)); +} + + +void rtc_enable_interrupt(volatile avr32_rtc_t *rtc) +{ + rtc->ier = AVR32_RTC_IER_TOPI_MASK; +} + + +void rtc_disable_interrupt(volatile avr32_rtc_t *rtc) +{ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + if (global_interrupt_enabled) Disable_global_interrupt(); + rtc->idr = AVR32_RTC_IDR_TOPI_MASK; + rtc->imr; + if (global_interrupt_enabled) Enable_global_interrupt(); +} + + +void rtc_clear_interrupt(volatile avr32_rtc_t *rtc) +{ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + if (global_interrupt_enabled) Disable_global_interrupt(); + rtc->icr = AVR32_RTC_ICR_TOPI_MASK; + rtc->isr; + if (global_interrupt_enabled) Enable_global_interrupt(); +} + + +void rtc_set_top_value(volatile avr32_rtc_t *rtc, unsigned long top) +{ + // Wait until we can write into the VAL register + while (rtc_is_busy(rtc)); + // Set the new val value + rtc->top = top; + // Wait until write is done + while (rtc_is_busy(rtc)); +} + + +unsigned long rtc_get_top_value(volatile avr32_rtc_t *rtc) +{ + return rtc->top; +} + + +int rtc_interrupt_enabled(volatile avr32_rtc_t *rtc) +{ + return (rtc->imr & AVR32_RTC_IMR_TOPI_MASK) != 0; +} + + +int rtc_is_interrupt(volatile avr32_rtc_t *rtc) +{ + return (rtc->isr & AVR32_RTC_ISR_TOPI_MASK) != 0; +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/RTC/rtc.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/RTC/rtc.h new file mode 100644 index 0000000..5702c29 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/RTC/rtc.h @@ -0,0 +1,191 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief RTC driver for AVR32 UC3. + * + * AVR32 Real Time Counter driver module. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an RTC and a PM module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _RTC_H_ +#define _RTC_H_ + +#include "compiler.h" +#include + + +/*! \name Oscillator Types + */ +//! @{ +#define RTC_OSC_32KHZ 1 +#define RTC_OSC_RC 0 +//! @} + +/*! \name Predefined PSEL Values + */ +//! @{ + +//! The PSEL value to set the RTC source clock (after the prescaler) to 1 Hz, +//! when using an external 32-kHz crystal. +#define RTC_PSEL_32KHZ_1HZ 14 + +//! The PSEL value to set the RTC source clock (after the prescaler) to 1.76 Hz, +//! when using the internal RC oscillator (~ 115 kHz). +#define RTC_PSEL_RC_1_76HZ 15 + +//! @} + + +/*! + * \brief This function will initialise the RTC module. + * If you use the 32 KHz oscillator, it will enable this module. + * This function also set the top value of the RTC to 0xFFFFFFFF + * and the value to 0. + * \param rtc Base address of the RTC (i.e. &AVR32_RTC). + * \param osc_type The oscillator you want to use. If you need a better + * accuracy, use the 32 KHz oscillator (i.e. RTC_OSC_32KHZ). + * \param psel The preselector value for the corresponding oscillator (4-bits). + * To obtain this value, you can use this formula: + * psel = log(Fosc/Frtc)/log(2)-1, where Fosc is the frequency of the + * oscillator you are using (32 KHz or 115 KHz) and Frtc the frequency + * desired. + * \return 1 if the initialisation succeds otherwize it will return 0. + */ +extern int rtc_init(volatile avr32_rtc_t *rtc, unsigned char osc_type, unsigned char psel); + +/*! + * \brief Enable the RTC. + * \param rtc Base address of the RTC (i.e. &AVR32_RTC). + */ +extern void rtc_enable(volatile avr32_rtc_t *rtc); + +/*! + * \brief Disable the RTC. + * \param rtc Base address of the RTC (i.e. &AVR32_RTC). + */ +extern void rtc_disable(volatile avr32_rtc_t *rtc); + +/*! + * \brief Enable the wake up feature of the RTC. + * \param rtc Base address of the RTC (i.e. &AVR32_RTC). + */ +extern void rtc_enable_wake_up(volatile avr32_rtc_t *rtc); + +/*! + * \brief Disable the wake up feature of the RTC. + * \param rtc Base address of the RTC (i.e. &AVR32_RTC). + */ +extern void rtc_disable_wake_up(volatile avr32_rtc_t *rtc); + +/*! + * \brief Enable the interrupt feature of the RTC. + * An interrupt is raised when the value of the RTC + * is equal to its top value. + * \param rtc Base address of the RTC (i.e. &AVR32_RTC). + */ +extern void rtc_enable_interrupt(volatile avr32_rtc_t *rtc); + +/*! + * \brief Disable the interrupt feature of the RTC. + * \param rtc Base address of the RTC (i.e. &AVR32_RTC). + */ +extern void rtc_disable_interrupt(volatile avr32_rtc_t *rtc); + +/*! + * \brief Clear the interrupt flag. + * Call this function once you handled the interrupt. + * \param rtc Base address of the RTC (i.e. &AVR32_RTC). + */ +extern void rtc_clear_interrupt(volatile avr32_rtc_t *rtc); + +/*! + * \brief Get the status of interrupts. + * \param rtc Base address of the RTC (i.e. &AVR32_RTC). + * \return 1 if the interrupts are enabled otherwize it returns 0. + */ +extern int rtc_interrupt_enabled(volatile avr32_rtc_t *rtc); + +/*! + * \brief Check if an interrupt is raised. + * \param rtc Base address of the RTC (i.e. &AVR32_RTC). + * \return 1 if an interrupt is currently raised otherwize it returns 0. + */ +extern int rtc_is_interrupt(volatile avr32_rtc_t *rtc); + +/*! + * \brief This function sets the RTC current top value. + * \param rtc Base address of the RTC (i.e. &AVR32_RTC). + * \param top The top value you want to store. + */ +extern void rtc_set_top_value(volatile avr32_rtc_t *rtc, unsigned long top); + +/*! + * \brief This function returns the RTC current top value. + * \param rtc Base address of the RTC (i.e. &AVR32_RTC). + * \return The RTC current top value. + */ +extern unsigned long rtc_get_top_value(volatile avr32_rtc_t *rtc); + +/*! + * \brief This function checks if the RTC is busy or not. + * \param rtc Base address of the RTC (i.e. &AVR32_RTC). + * \return 1 if the RTC is busy otherwize it will return 0. + */ +extern int rtc_is_busy(volatile avr32_rtc_t *rtc); + +/*! + * \brief This function sets the RTC current value. + * \param rtc Base address of the RTC (i.e. &AVR32_RTC). + * \param val The value you want to store. + */ +extern void rtc_set_value(volatile avr32_rtc_t *rtc, unsigned long val); + +/*! + * \brief This function returns the RTC current value. + * \param rtc Base address of the RTC (i.e. &AVR32_RTC). + * \return The RTC current value. + */ +extern unsigned long rtc_get_value(volatile avr32_rtc_t *rtc); + + +#endif // _RTC_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.c new file mode 100644 index 0000000..d2b7ccd --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.c @@ -0,0 +1,443 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief SPI driver for AVR32 UC3. + * + * This file defines a useful set of functions for the SPI interface on AVR32 + * devices. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "spi.h" + +#ifdef FREERTOS_USED + +#include "FreeRTOS.h" +#include "semphr.h" + +#endif + + +/*! \name SPI Writable Bit-Field Registers + */ +//! @{ + +typedef union +{ + unsigned long cr; + avr32_spi_cr_t CR; +} u_avr32_spi_cr_t; + +typedef union +{ + unsigned long mr; + avr32_spi_mr_t MR; +} u_avr32_spi_mr_t; + +typedef union +{ + unsigned long tdr; + avr32_spi_tdr_t TDR; +} u_avr32_spi_tdr_t; + +typedef union +{ + unsigned long ier; + avr32_spi_ier_t IER; +} u_avr32_spi_ier_t; + +typedef union +{ + unsigned long idr; + avr32_spi_idr_t IDR; +} u_avr32_spi_idr_t; + +typedef union +{ + unsigned long csr; + avr32_spi_csr0_t CSR; +} u_avr32_spi_csr_t; + +//! @} + + +#ifdef FREERTOS_USED + +//! The SPI mutex. +static xSemaphoreHandle xSPIMutex; + +#endif + + +/*! \brief Calculates the baudrate divider. + * + * \param options Pointer to a structure containing initialization options for + * an SPI channel. + * \param pba_hz SPI module input clock frequency (PBA clock, Hz). + * + * \return Divider or error code. + * \retval >=0 Success. + * \retval <0 Error. + */ +static int getBaudDiv(const spi_options_t *options, unsigned int pba_hz) +{ + int baudDiv = (pba_hz + options->baudrate / 2) / options->baudrate; + + if (baudDiv <= 0 || baudDiv > 255) { + return -1; + } + + return baudDiv; +} + + +void spi_reset(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SWRST_MASK; +} + + +spi_status_t spi_initSlave(volatile avr32_spi_t *spi, + unsigned char bits, + unsigned char spi_mode) +{ + if (spi_mode > 3 || + bits < 8 || bits > 16) { + return SPI_ERROR_ARGUMENT; + } + + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; + + // Will use CSR0 offsets; these are the same for CSR0 to CSR3. + spi->csr0 = ((spi_mode >> 1) << AVR32_SPI_CSR0_CPOL_OFFSET) | + (((spi_mode & 0x1) ^ 0x1) << AVR32_SPI_CSR0_NCPHA_OFFSET) | + ((bits - 8) << AVR32_SPI_CSR0_BITS_OFFSET); + + return SPI_OK; +} + + +spi_status_t spi_initTest(volatile avr32_spi_t *spi) +{ + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; + spi->mr |= AVR32_SPI_MR_MSTR_MASK | // Master Mode. + AVR32_SPI_MR_LLB_MASK; // Local Loopback. + + return SPI_OK; +} + + +spi_status_t spi_initMaster(volatile avr32_spi_t *spi, const spi_options_t *options) +{ + u_avr32_spi_mr_t u_avr32_spi_mr; + + if (options->modfdis > 1) { + return SPI_ERROR_ARGUMENT; + } + + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; + + // Master Mode. + u_avr32_spi_mr.mr = spi->mr; + u_avr32_spi_mr.MR.mstr = 1; + u_avr32_spi_mr.MR.modfdis = options->modfdis; + u_avr32_spi_mr.MR.llb = 0; + u_avr32_spi_mr.MR.pcs = (1 << AVR32_SPI_MR_PCS_SIZE) - 1; + spi->mr = u_avr32_spi_mr.mr; + + return SPI_OK; +} + + +spi_status_t spi_selectionMode(volatile avr32_spi_t *spi, + unsigned char variable_ps, + unsigned char pcs_decode, + unsigned char delay) +{ + u_avr32_spi_mr_t u_avr32_spi_mr; + + if (variable_ps > 1 || + pcs_decode > 1) { + return SPI_ERROR_ARGUMENT; + } + + u_avr32_spi_mr.mr = spi->mr; + u_avr32_spi_mr.MR.ps = variable_ps; + u_avr32_spi_mr.MR.pcsdec = pcs_decode; + u_avr32_spi_mr.MR.dlybcs = delay; + spi->mr = u_avr32_spi_mr.mr; + + return SPI_OK; +} + + +spi_status_t spi_selectChip(volatile avr32_spi_t *spi, unsigned char chip) +{ +#ifdef FREERTOS_USED + while (pdFALSE == xSemaphoreTake(xSPIMutex, 20)); +#endif + + // Assert all lines; no peripheral is selected. + spi->mr |= AVR32_SPI_MR_PCS_MASK; + + if (spi->mr & AVR32_SPI_MR_PCSDEC_MASK) { + // The signal is decoded; allow up to 15 chips. + if (chip > 14) { + return SPI_ERROR_ARGUMENT; + } + + spi->mr &= ~AVR32_SPI_MR_PCS_MASK | (chip << AVR32_SPI_MR_PCS_OFFSET); + } else { + if (chip > 3) { + return SPI_ERROR_ARGUMENT; + } + + spi->mr &= ~(1 << (AVR32_SPI_MR_PCS_OFFSET + chip)); + } + + return SPI_OK; +} + + +spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip) +{ + unsigned int timeout = SPI_TIMEOUT; + + while (!(spi->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + // Assert all lines; no peripheral is selected. + spi->mr |= AVR32_SPI_MR_PCS_MASK; + + // Last transfer, so deassert the current NPCS if CSAAT is set. + spi->cr = AVR32_SPI_CR_LASTXFER_MASK; + +#ifdef FREERTOS_USED + xSemaphoreGive(xSPIMutex); +#endif + + return SPI_OK; +} + + +spi_status_t spi_setupChipReg(volatile avr32_spi_t *spi, + const spi_options_t *options, + unsigned int pba_hz) +{ + u_avr32_spi_csr_t u_avr32_spi_csr; + + if (options->spi_mode > 3 || + options->stay_act > 1 || + options->bits < 8 || options->bits > 16) { + return SPI_ERROR_ARGUMENT; + } + + int baudDiv = getBaudDiv(options, pba_hz); + + if (baudDiv < 0) { + return SPI_ERROR_ARGUMENT; + } + + // Will use CSR0 offsets; these are the same for CSR0 to CSR3. + u_avr32_spi_csr.csr = 0; + u_avr32_spi_csr.CSR.cpol = options->spi_mode >> 1; + u_avr32_spi_csr.CSR.ncpha = (options->spi_mode & 0x1) ^ 0x1; + u_avr32_spi_csr.CSR.csaat = options->stay_act; + u_avr32_spi_csr.CSR.bits = options->bits - 8; + u_avr32_spi_csr.CSR.scbr = baudDiv; + u_avr32_spi_csr.CSR.dlybs = options->spck_delay; + u_avr32_spi_csr.CSR.dlybct = options->trans_delay; + + switch(options->reg) { + case 0: + spi->csr0 = u_avr32_spi_csr.csr; + break; + case 1: + spi->csr1 = u_avr32_spi_csr.csr; + break; + case 2: + spi->csr2 = u_avr32_spi_csr.csr; + break; + case 3: + spi->csr3 = u_avr32_spi_csr.csr; + break; + default: + return SPI_ERROR_ARGUMENT; + } + +#ifdef FREERTOS_USED + if (!xSPIMutex) + { + // Create the SPI mutex. + vSemaphoreCreateBinary(xSPIMutex); + if (!xSPIMutex) + { + while(1); + } + } +#endif + + return SPI_OK; +} + + +void spi_enable(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SPIEN_MASK; +} + + +void spi_disable(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SPIDIS_MASK; +} + + +int spi_is_enabled(volatile avr32_spi_t *spi) +{ + return (spi->sr & AVR32_SPI_SR_SPIENS_MASK) != 0; +} + + +inline unsigned char spi_writeRegisterEmptyCheck(volatile avr32_spi_t *spi) +{ + return ((spi->sr & AVR32_SPI_SR_TDRE_MASK) != 0); +} + + +inline spi_status_t spi_write(volatile avr32_spi_t *spi, unsigned short data) +{ + unsigned int timeout = SPI_TIMEOUT; + + while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + spi->tdr = data << AVR32_SPI_TDR_TD_OFFSET; + + return SPI_OK; +} + + +spi_status_t spi_variableSlaveWrite(volatile avr32_spi_t *spi, unsigned short data, + unsigned char pcs, unsigned char lastxfer) +{ + unsigned int timeout = SPI_TIMEOUT; + + if (pcs > 14 || lastxfer > 1) { + return SPI_ERROR_ARGUMENT; + } + + while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + spi->tdr = (data << AVR32_SPI_TDR_TD_OFFSET) | + (pcs << AVR32_SPI_TDR_PCS_OFFSET) | + (lastxfer << AVR32_SPI_TDR_LASTXFER_OFFSET); + + return SPI_OK; +} + + +inline unsigned char spi_writeEndCheck(volatile avr32_spi_t *spi) +{ + return ((spi->sr & AVR32_SPI_SR_TXEMPTY_MASK) != 0); +} + + +unsigned char spi_readRegisterFullCheck(volatile avr32_spi_t *spi) +{ + return ((spi->sr & AVR32_SPI_SR_RDRF_MASK) != 0); +} + + +inline spi_status_t spi_read(volatile avr32_spi_t *spi, unsigned short *data) +{ + unsigned int timeout = SPI_TIMEOUT; + + while ((spi->sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) != + (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + *data = spi->rdr >> AVR32_SPI_RDR_RD_OFFSET; + + return SPI_OK; +} + + +unsigned char spi_getStatus(volatile avr32_spi_t *spi) +{ + spi_status_t ret = SPI_OK; + unsigned long sr = spi->sr; + + if (sr & AVR32_SPI_SR_OVRES_MASK) { + ret = SPI_ERROR_OVERRUN; + } + + if (sr & AVR32_SPI_SR_MODF_MASK) { + ret += SPI_ERROR_MODE_FAULT; + } + + if (ret == (SPI_ERROR_OVERRUN + SPI_ERROR_MODE_FAULT)) { + return SPI_ERROR_OVERRUN_AND_MODE_FAULT; + } + else if (ret > 0) { + return ret; + } else { + return SPI_OK; + } +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.h new file mode 100644 index 0000000..6dcc928 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.h @@ -0,0 +1,342 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief SPI driver for AVR32 UC3. + * + * This file defines a useful set of functions for the SPI interface on AVR32 + * devices. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _SPI_H_ +#define _SPI_H_ + +#include + + +//! Time-out value (number of attempts). +#define SPI_TIMEOUT 10000 + + +//! Status codes used by the SPI driver. +typedef enum +{ + SPI_ERROR = -1, + SPI_OK = 0, + SPI_ERROR_TIMEOUT = 1, + SPI_ERROR_ARGUMENT, + SPI_ERROR_OVERRUN, + SPI_ERROR_MODE_FAULT, + SPI_ERROR_OVERRUN_AND_MODE_FAULT +} spi_status_t; + +//! Option structure for SPI channels. +typedef struct +{ + //! The SPI channel to set up. + unsigned char reg; + + //! Preferred baudrate for the SPI. + unsigned int baudrate; + + //! Number of bits in each character (8 to 16). + unsigned char bits; + + //! Delay before first clock pulse after selecting slave (in PBA clock periods). + unsigned char spck_delay; + + //! Delay between each transfer/character (in PBA clock periods). + unsigned char trans_delay; + + //! Sets this chip to stay active after last transfer to it. + unsigned char stay_act; + + //! Which SPI mode to use when transmitting. + unsigned char spi_mode; + + //! Disables the mode fault detection. + //! With this bit cleared, the SPI master mode will disable itself if another + //! master tries to address it. + unsigned char modfdis; +} spi_options_t; + + +/*! \brief Resets the SPI controller. + * + * \param spi Base address of the SPI instance. + */ +extern void spi_reset(volatile avr32_spi_t *spi); + +/*! \brief Initializes the SPI in slave mode. + * + * \param spi Base address of the SPI instance. + * \param bits Number of bits in each transmitted character (8 to 16). + * \param spi_mode Clock polarity and phase. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_initSlave(volatile avr32_spi_t *spi, + unsigned char bits, + unsigned char spi_mode); + +/*! \brief Sets up the SPI in a test mode where the transmitter is connected to + * the receiver (local loopback). + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval SPI_OK Success. + */ +extern spi_status_t spi_initTest(volatile avr32_spi_t *spi); + +/*! \brief Initializes the SPI in master mode. + * + * \param spi Base address of the SPI instance. + * \param options Pointer to a structure containing initialization options. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_initMaster(volatile avr32_spi_t *spi, const spi_options_t *options); + +/*! \brief Sets up how and when the slave chips are selected (master mode only). + * + * \param spi Base address of the SPI instance. + * \param variable_ps Target slave is selected in transfer register for every + * character to transmit. + * \param pcs_decode The four chip select lines are decoded externally. Values + * 0 to 14 can be given to \ref spi_selectChip. + * \param delay Delay in PBA periods between chip selects. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_selectionMode(volatile avr32_spi_t *spi, + unsigned char variable_ps, + unsigned char pcs_decode, + unsigned char delay); + +/*! \brief Selects slave chip. + * + * \param spi Base address of the SPI instance. + * \param chip Slave chip number (normal: 0 to 3, extarnally decoded signal: 0 + * to 14). + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_selectChip(volatile avr32_spi_t *spi, unsigned char chip); + +/*! \brief Unselects slave chip. + * + * \param spi Base address of the SPI instance. + * \param chip Slave chip number (normal: 0 to 3, extarnally decoded signal: 0 + * to 14). + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * + * \note Will block program execution until time-out occurs if last transmission + * is not complete. Invoke \ref spi_writeEndCheck beforehand if needed. + */ +extern spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip); + +/*! \brief Sets options for a specific slave chip. + * + * The baudrate field has to be written before transfer in master mode. Four + * similar registers exist, one for each slave. When using encoded slave + * addressing, reg=0 sets options for slaves 0 to 3, reg=1 for slaves 4 to 7 and + * so on. + * + * \param spi Base address of the SPI instance. + * \param options Pointer to a structure containing initialization options for + * an SPI channel. + * \param pba_hz SPI module input clock frequency (PBA clock, Hz). + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_setupChipReg(volatile avr32_spi_t *spi, + const spi_options_t *options, + unsigned int pba_hz); + +/*! \brief Enables the SPI. + * + * \param spi Base address of the SPI instance. + */ +extern void spi_enable(volatile avr32_spi_t *spi); + +/*! \brief Disables the SPI. + * + * Ensures that nothing is transferred while setting up buffers. + * + * \param spi Base address of the SPI instance. + * + * \warning This may cause data loss if used on a slave SPI. + */ +extern void spi_disable(volatile avr32_spi_t *spi); + +/*! \brief Tests if the SPI is enabled. + * + * \param spi Base address of the SPI instance. + * + * \return \c 1 if the SPI is enabled, otherwise \c 0. + */ +extern int spi_is_enabled(volatile avr32_spi_t *spi); + +/*! \brief Checks if there is no data in the transmit register. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 No data in TDR. + * \retval 0 Some data in TDR. + */ +extern unsigned char spi_writeRegisterEmptyCheck(volatile avr32_spi_t *spi); + +/*! \brief Writes one data word in master fixed peripheral select mode or in + * slave mode. + * + * \param spi Base address of the SPI instance. + * \param data The data word to write. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * + * \note Will block program execution until time-out occurs if transmitter is + * busy and transmit buffer is full. Invoke + * \ref spi_writeRegisterEmptyCheck beforehand if needed. + * + * \note Once the data has been written to the transmit buffer, the end of + * transmission is not waited for. Invoke \ref spi_writeEndCheck if + * needed. + */ +extern spi_status_t spi_write(volatile avr32_spi_t *spi, unsigned short data); + +/*! \brief Selects a slave in master variable peripheral select mode and writes + * one data word to it. + * + * \param spi Base address of the SPI instance. + * \param data The data word to write. + * \param pcs Slave selector (bit 0 -> nCS line 0, bit 1 -> nCS line 1, + * etc.). + * \param lastxfer Boolean indicating whether this is the last data word + * transfer. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + * + * \note Will block program execution until time-out occurs if transmitter is + * busy and transmit buffer is full. Invoke + * \ref spi_writeRegisterEmptyCheck beforehand if needed. + * + * \note Once the data has been written to the transmit buffer, the end of + * transmission is not waited for. Invoke \ref spi_writeEndCheck if + * needed. + */ +extern spi_status_t spi_variableSlaveWrite(volatile avr32_spi_t *spi, + unsigned short data, + unsigned char pcs, + unsigned char lastxfer); + +/*! \brief Checks if all transmissions are complete. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 All transmissions complete. + * \retval 0 Transmissions not complete. + */ +extern unsigned char spi_writeEndCheck(volatile avr32_spi_t *spi); + +/*! \brief Checks if there is data in the receive register. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 Some data in RDR. + * \retval 0 No data in RDR. + */ +extern unsigned char spi_readRegisterFullCheck(volatile avr32_spi_t *spi); + +/*! \brief Reads one data word in master mode or in slave mode. + * + * \param spi Base address of the SPI instance. + * \param data Pointer to the location where to store the received data word. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * + * \note Will block program execution until time-out occurs if no data is + * received or last transmission is not complete. Invoke + * \ref spi_writeEndCheck or \ref spi_readRegisterFullCheck beforehand if + * needed. + */ +extern spi_status_t spi_read(volatile avr32_spi_t *spi, unsigned short *data); + +/*! \brief Gets status information from the SPI. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_OVERRUN Overrun error. + * \retval SPI_ERROR_MODE_FAULT Mode fault (SPI addressed as slave + * while in master mode). + * \retval SPI_ERROR_OVERRUN_AND_MODE_FAULT Overrun error and mode fault. + */ +extern unsigned char spi_getStatus(volatile avr32_spi_t *spi); + + +#endif // _SPI_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/TC/tc.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/TC/tc.c new file mode 100644 index 0000000..225642e --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/TC/tc.c @@ -0,0 +1,314 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief TC driver for AVR32 UC3. + * + * AVR32 Timer/Counter driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a TC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "compiler.h" +#include "tc.h" + + +int tc_get_interrupt_settings(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + return tc->channel[channel].imr; +} + + +int tc_configure_interrupts(volatile avr32_tc_t *tc, unsigned int channel, const tc_interrupt_t *bitfield) +{ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // Enable the appropriate interrupts. + tc->channel[channel].ier = bitfield->etrgs << AVR32_TC_ETRGS_OFFSET | + bitfield->ldrbs << AVR32_TC_LDRBS_OFFSET | + bitfield->ldras << AVR32_TC_LDRAS_OFFSET | + bitfield->cpcs << AVR32_TC_CPCS_OFFSET | + bitfield->cpbs << AVR32_TC_CPBS_OFFSET | + bitfield->cpas << AVR32_TC_CPAS_OFFSET | + bitfield->lovrs << AVR32_TC_LOVRS_OFFSET | + bitfield->covfs << AVR32_TC_COVFS_OFFSET; + + // Disable the appropriate interrupts. + if (global_interrupt_enabled) Disable_global_interrupt(); + tc->channel[channel].idr = (~bitfield->etrgs & 1) << AVR32_TC_ETRGS_OFFSET | + (~bitfield->ldrbs & 1) << AVR32_TC_LDRBS_OFFSET | + (~bitfield->ldras & 1) << AVR32_TC_LDRAS_OFFSET | + (~bitfield->cpcs & 1) << AVR32_TC_CPCS_OFFSET | + (~bitfield->cpbs & 1) << AVR32_TC_CPBS_OFFSET | + (~bitfield->cpas & 1) << AVR32_TC_CPAS_OFFSET | + (~bitfield->lovrs & 1) << AVR32_TC_LOVRS_OFFSET | + (~bitfield->covfs & 1) << AVR32_TC_COVFS_OFFSET; + tc->channel[channel].sr; + if (global_interrupt_enabled) Enable_global_interrupt(); + + return 0; +} + + +int tc_select_external_clock(volatile avr32_tc_t *tc, unsigned int channel, unsigned int ext_clk_sig_src) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS || ext_clk_sig_src >= 1 << AVR32_TC_BMR_TC0XC0S_SIZE) + return TC_INVALID_ARGUMENT; + + // Clear bit-field and set the correct behavior. + tc->bmr = (tc->bmr & ~(AVR32_TC_BMR_TC0XC0S_MASK << (channel * AVR32_TC_BMR_TC0XC0S_SIZE))) | + (ext_clk_sig_src << (channel * AVR32_TC_BMR_TC0XC0S_SIZE)); + + return 0; +} + + +int tc_init_capture(volatile avr32_tc_t *tc, const tc_capture_opt_t *opt) +{ + // Check for valid input. + if (opt->channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // MEASURE SIGNALS: Capture operating mode. + tc->channel[opt->channel].cmr = opt->ldrb << AVR32_TC_LDRB_OFFSET | + opt->ldra << AVR32_TC_LDRA_OFFSET | + 0 << AVR32_TC_WAVE_OFFSET | + opt->cpctrg << AVR32_TC_CPCTRG_OFFSET | + opt->abetrg << AVR32_TC_ABETRG_OFFSET | + opt->etrgedg << AVR32_TC_ETRGEDG_OFFSET| + opt->ldbdis << AVR32_TC_LDBDIS_OFFSET | + opt->ldbstop << AVR32_TC_LDBSTOP_OFFSET | + opt->burst << AVR32_TC_BURST_OFFSET | + opt->clki << AVR32_TC_CLKI_OFFSET | + opt->tcclks << AVR32_TC_TCCLKS_OFFSET; + + return 0; +} + + +int tc_init_waveform(volatile avr32_tc_t *tc, const tc_waveform_opt_t *opt) +{ + // Check for valid input. + if (opt->channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // GENERATE SIGNALS: Waveform operating mode. + tc->channel[opt->channel].cmr = opt->bswtrg << AVR32_TC_BSWTRG_OFFSET | + opt->beevt << AVR32_TC_BEEVT_OFFSET | + opt->bcpc << AVR32_TC_BCPC_OFFSET | + opt->bcpb << AVR32_TC_BCPB_OFFSET | + opt->aswtrg << AVR32_TC_ASWTRG_OFFSET | + opt->aeevt << AVR32_TC_AEEVT_OFFSET | + opt->acpc << AVR32_TC_ACPC_OFFSET | + opt->acpa << AVR32_TC_ACPA_OFFSET | + 1 << AVR32_TC_WAVE_OFFSET | + opt->wavsel << AVR32_TC_WAVSEL_OFFSET | + opt->enetrg << AVR32_TC_ENETRG_OFFSET | + opt->eevt << AVR32_TC_EEVT_OFFSET | + opt->eevtedg << AVR32_TC_EEVTEDG_OFFSET | + opt->cpcdis << AVR32_TC_CPCDIS_OFFSET | + opt->cpcstop << AVR32_TC_CPCSTOP_OFFSET | + opt->burst << AVR32_TC_BURST_OFFSET | + opt->clki << AVR32_TC_CLKI_OFFSET | + opt->tcclks << AVR32_TC_TCCLKS_OFFSET; + + return 0; +} + + +int tc_start(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // Enable, reset and start the selected timer/counter channel. + tc->channel[channel].ccr = AVR32_TC_SWTRG_MASK | AVR32_TC_CLKEN_MASK; + + return 0; +} + + +int tc_stop(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // Disable the selected timer/counter channel. + tc->channel[channel].ccr = AVR32_TC_CLKDIS_MASK; + + return 0; +} + + +int tc_software_trigger(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // Reset the selected timer/counter channel. + tc->channel[channel].ccr = AVR32_TC_SWTRG_MASK; + + return 0; +} + + +void tc_sync_trigger(volatile avr32_tc_t *tc) +{ + // Reset all channels of the selected timer/counter. + tc->bcr = AVR32_TC_BCR_SYNC_MASK; +} + + +void tc_sync_start(volatile avr32_tc_t *tc) +{ + unsigned int i; + // Enable the clock for each channel. + for(i=0; ichannel[i].ccr = AVR32_TC_CLKEN_MASK; + + // Reset all channels of the selected timer/counter. + tc->bcr = AVR32_TC_BCR_SYNC_MASK; +} + + +int tc_read_sr(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + return tc->channel[channel].sr; +} + + +int tc_read_tc(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + return Rd_bitfield(tc->channel[channel].cv, AVR32_TC_CV_MASK); +} + + +int tc_read_ra(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + return Rd_bitfield(tc->channel[channel].ra, AVR32_TC_RA_MASK); +} + + +int tc_read_rb(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + return Rd_bitfield(tc->channel[channel].rb, AVR32_TC_RB_MASK); +} + + +int tc_read_rc(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + return Rd_bitfield(tc->channel[channel].rc, AVR32_TC_RC_MASK); +} + + +int tc_write_ra(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // This function is only available in WAVEFORM mode. + if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK)) + Wr_bitfield(tc->channel[channel].ra, AVR32_TC_RA_MASK, value); + + return value; +} + + +int tc_write_rb(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // This function is only available in WAVEFORM mode. + if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK)) + Wr_bitfield(tc->channel[channel].rb, AVR32_TC_RB_MASK, value); + + return value; +} + + +int tc_write_rc(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // This function is only available in WAVEFORM mode. + if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK)) + Wr_bitfield(tc->channel[channel].rc, AVR32_TC_RC_MASK, value); + + return value; +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/TC/tc.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/TC/tc.h new file mode 100644 index 0000000..45ef4f2 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/TC/tc.h @@ -0,0 +1,591 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Timer/Counter driver for AVR32 UC3. + * + * AVR32 Timer/Counter driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a TC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _TC_H_ +#define _TC_H_ + +#include + + +//! TC driver functions return value in case of invalid argument(s). +#define TC_INVALID_ARGUMENT (-1) + +//! Number of timer/counter channels. +#define TC_NUMBER_OF_CHANNELS (sizeof(((avr32_tc_t *)0)->channel) / sizeof(avr32_tc_channel_t)) + +/*! \name External Clock Signal 0 Selection + */ +//! @{ +#define TC_CH0_EXT_CLK0_SRC_TCLK0 AVR32_TC_TC0XC0S_TCLK0 +#define TC_CH0_EXT_CLK0_SRC_NO_CLK AVR32_TC_TC0XC0S_NO_CLK +#define TC_CH0_EXT_CLK0_SRC_TIOA1 AVR32_TC_TC0XC0S_TIOA1 +#define TC_CH0_EXT_CLK0_SRC_TIOA2 AVR32_TC_TC0XC0S_TIOA2 +//! @} + +/*! \name External Clock Signal 1 Selection + */ +//! @{ +#define TC_CH1_EXT_CLK1_SRC_TCLK1 AVR32_TC_TC1XC1S_TCLK1 +#define TC_CH1_EXT_CLK1_SRC_NO_CLK AVR32_TC_TC1XC1S_NO_CLK +#define TC_CH1_EXT_CLK1_SRC_TIOA0 AVR32_TC_TC1XC1S_TIOA0 +#define TC_CH1_EXT_CLK1_SRC_TIOA2 AVR32_TC_TC1XC1S_TIOA2 +//! @} + +/*! \name External Clock Signal 2 Selection + */ +//! @{ +#define TC_CH2_EXT_CLK2_SRC_TCLK2 AVR32_TC_TC2XC2S_TCLK2 +#define TC_CH2_EXT_CLK2_SRC_NO_CLK AVR32_TC_TC2XC2S_NO_CLK +#define TC_CH2_EXT_CLK2_SRC_TIOA0 AVR32_TC_TC2XC2S_TIOA0 +#define TC_CH2_EXT_CLK2_SRC_TIOA1 AVR32_TC_TC2XC2S_TIOA1 +//! @} + +/*! \name Event/Trigger Actions on Output + */ +//! @{ +#define TC_EVT_EFFECT_NOOP AVR32_TC_NONE +#define TC_EVT_EFFECT_SET AVR32_TC_SET +#define TC_EVT_EFFECT_CLEAR AVR32_TC_CLEAR +#define TC_EVT_EFFECT_TOGGLE AVR32_TC_TOGGLE +//! @} + +/*! \name RC Compare Trigger Enable + */ +//! @{ +#define TC_NO_TRIGGER_COMPARE_RC 0 +#define TC_TRIGGER_COMPARE_RC 1 +//! @} + +/*! \name Waveform Selection + */ +//! @{ +#define TC_WAVEFORM_SEL_UP_MODE AVR32_TC_WAVSEL_UP_NO_AUTO +#define TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER AVR32_TC_WAVSEL_UP_AUTO +#define TC_WAVEFORM_SEL_UPDOWN_MODE AVR32_TC_WAVSEL_UPDOWN_NO_AUTO +#define TC_WAVEFORM_SEL_UPDOWN_MODE_RC_TRIGGER AVR32_TC_WAVSEL_UPDOWN_AUTO +//! @} + +/*! \name TIOA or TIOB External Trigger Selection + */ +//! @{ +#define TC_EXT_TRIG_SEL_TIOA 1 +#define TC_EXT_TRIG_SEL_TIOB 0 +//! @} + +/*! \name External Event Selection + */ +//! @{ +#define TC_EXT_EVENT_SEL_TIOB_INPUT AVR32_TC_EEVT_TIOB_INPUT +#define TC_EXT_EVENT_SEL_XC0_OUTPUT AVR32_TC_EEVT_XC0_OUTPUT +#define TC_EXT_EVENT_SEL_XC1_OUTPUT AVR32_TC_EEVT_XC1_OUTPUT +#define TC_EXT_EVENT_SEL_XC2_OUTPUT AVR32_TC_EEVT_XC2_OUTPUT +//! @} + +/*! \name Edge Selection + */ +//! @{ +#define TC_SEL_NO_EDGE AVR32_TC_EEVTEDG_NO_EDGE +#define TC_SEL_RISING_EDGE AVR32_TC_EEVTEDG_POS_EDGE +#define TC_SEL_FALLING_EDGE AVR32_TC_EEVTEDG_NEG_EDGE +#define TC_SEL_EACH_EDGE AVR32_TC_EEVTEDG_BOTH_EDGES +//! @} + +/*! \name Burst Signal Selection + */ +//! @{ +#define TC_BURST_NOT_GATED AVR32_TC_BURST_NOT_GATED +#define TC_BURST_CLK_AND_XC0 AVR32_TC_BURST_CLK_AND_XC0 +#define TC_BURST_CLK_AND_XC1 AVR32_TC_BURST_CLK_AND_XC1 +#define TC_BURST_CLK_AND_XC2 AVR32_TC_BURST_CLK_AND_XC2 +//! @} + +/*! \name Clock Invert + */ +//! @{ +#define TC_CLOCK_RISING_EDGE 0 +#define TC_CLOCK_FALLING_EDGE 1 +//! @} + +/*! \name Clock Selection + */ +//! @{ +#define TC_CLOCK_SOURCE_TC1 AVR32_TC_TCCLKS_TIMER_CLOCK1 +#define TC_CLOCK_SOURCE_TC2 AVR32_TC_TCCLKS_TIMER_CLOCK2 +#define TC_CLOCK_SOURCE_TC3 AVR32_TC_TCCLKS_TIMER_CLOCK3 +#define TC_CLOCK_SOURCE_TC4 AVR32_TC_TCCLKS_TIMER_CLOCK4 +#define TC_CLOCK_SOURCE_TC5 AVR32_TC_TCCLKS_TIMER_CLOCK5 +#define TC_CLOCK_SOURCE_XC0 AVR32_TC_TCCLKS_XC0 +#define TC_CLOCK_SOURCE_XC1 AVR32_TC_TCCLKS_XC1 +#define TC_CLOCK_SOURCE_XC2 AVR32_TC_TCCLKS_XC2 +//! @} + + +//! Timer/counter interrupts. +typedef struct +{ + unsigned int :24; + + //! External trigger interrupt. + unsigned int etrgs : 1; + + //! RB load interrupt. + unsigned int ldrbs : 1; + + //! RA load interrupt. + unsigned int ldras : 1; + + //! RC compare interrupt. + unsigned int cpcs : 1; + + //! RB compare interrupt. + unsigned int cpbs : 1; + + //! RA compare interrupt. + unsigned int cpas : 1; + + //! Load overrun interrupt. + unsigned int lovrs : 1; + + //! Counter overflow interrupt. + unsigned int covfs : 1; +} tc_interrupt_t; + +//! Parameters when initializing a timer/counter in capture mode. +typedef struct +{ + //! Channel to initialize. + unsigned int channel ; + + unsigned int :12; + + //! RB loading selection:\n + //! - \ref TC_SEL_NO_EDGE;\n + //! - \ref TC_SEL_RISING_EDGE;\n + //! - \ref TC_SEL_FALLING_EDGE;\n + //! - \ref TC_SEL_EACH_EDGE. + unsigned int ldrb : 2; + + //! RA loading selection:\n + //! - \ref TC_SEL_NO_EDGE;\n + //! - \ref TC_SEL_RISING_EDGE;\n + //! - \ref TC_SEL_FALLING_EDGE;\n + //! - \ref TC_SEL_EACH_EDGE. + unsigned int ldra : 2; + + unsigned int : 1; + + //! RC compare trigger enable:\n + //! - \ref TC_NO_TRIGGER_COMPARE_RC;\n + //! - \ref TC_TRIGGER_COMPARE_RC. + unsigned int cpctrg : 1; + + unsigned int : 3; + + //! TIOA or TIOB external trigger selection:\n + //! - \ref TC_EXT_TRIG_SEL_TIOA;\n + //! - \ref TC_EXT_TRIG_SEL_TIOB. + unsigned int abetrg : 1; + + //! External trigger edge selection:\n + //! - \ref TC_SEL_NO_EDGE;\n + //! - \ref TC_SEL_RISING_EDGE;\n + //! - \ref TC_SEL_FALLING_EDGE;\n + //! - \ref TC_SEL_EACH_EDGE. + unsigned int etrgedg : 2; + + //! Counter clock disable with RB loading:\n + //! - \c FALSE;\n + //! - \c TRUE. + unsigned int ldbdis : 1; + + //! Counter clock stopped with RB loading:\n + //! - \c FALSE;\n + //! - \c TRUE. + unsigned int ldbstop : 1; + + //! Burst signal selection:\n + //! - \ref TC_BURST_NOT_GATED;\n + //! - \ref TC_BURST_CLK_AND_XC0;\n + //! - \ref TC_BURST_CLK_AND_XC1;\n + //! - \ref TC_BURST_CLK_AND_XC2. + unsigned int burst : 2; + + //! Clock invert:\n + //! - \ref TC_CLOCK_RISING_EDGE;\n + //! - \ref TC_CLOCK_FALLING_EDGE. + unsigned int clki : 1; + + //! Clock selection:\n + //! - \ref TC_CLOCK_SOURCE_TC1;\n + //! - \ref TC_CLOCK_SOURCE_TC2;\n + //! - \ref TC_CLOCK_SOURCE_TC3;\n + //! - \ref TC_CLOCK_SOURCE_TC4;\n + //! - \ref TC_CLOCK_SOURCE_TC5;\n + //! - \ref TC_CLOCK_SOURCE_XC0;\n + //! - \ref TC_CLOCK_SOURCE_XC1;\n + //! - \ref TC_CLOCK_SOURCE_XC2. + unsigned int tcclks : 3; +} tc_capture_opt_t; + +//! Parameters when initializing a timer/counter in waveform mode. +typedef struct +{ + //! Channel to initialize. + unsigned int channel ; + + //! Software trigger effect on TIOB:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int bswtrg : 2; + + //! External event effect on TIOB:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int beevt : 2; + + //! RC compare effect on TIOB:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int bcpc : 2; + + //! RB compare effect on TIOB:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int bcpb : 2; + + //! Software trigger effect on TIOA:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int aswtrg : 2; + + //! External event effect on TIOA:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int aeevt : 2; + + //! RC compare effect on TIOA:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int acpc : 2; + + //! RA compare effect on TIOA:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int acpa : 2; + + unsigned int : 1; + + //! Waveform selection:\n + //! - \ref TC_WAVEFORM_SEL_UP_MODE;\n + //! - \ref TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER;\n + //! - \ref TC_WAVEFORM_SEL_UPDOWN_MODE;\n + //! - \ref TC_WAVEFORM_SEL_UPDOWN_MODE_RC_TRIGGER. + unsigned int wavsel : 2; + + //! External event trigger enable:\n + //! - \c FALSE;\n + //! - \c TRUE. + unsigned int enetrg : 1; + + //! External event selection:\n + //! - \ref TC_EXT_EVENT_SEL_TIOB_INPUT;\n + //! - \ref TC_EXT_EVENT_SEL_XC0_OUTPUT;\n + //! - \ref TC_EXT_EVENT_SEL_XC1_OUTPUT;\n + //! - \ref TC_EXT_EVENT_SEL_XC2_OUTPUT. + unsigned int eevt : 2; + + //! External event edge selection:\n + //! - \ref TC_SEL_NO_EDGE;\n + //! - \ref TC_SEL_RISING_EDGE;\n + //! - \ref TC_SEL_FALLING_EDGE;\n + //! - \ref TC_SEL_EACH_EDGE. + unsigned int eevtedg : 2; + + //! Counter clock disable with RC compare:\n + //! - \c FALSE;\n + //! - \c TRUE. + unsigned int cpcdis : 1; + + //! Counter clock stopped with RC compare:\n + //! - \c FALSE;\n + //! - \c TRUE. + unsigned int cpcstop : 1; + + //! Burst signal selection:\n + //! - \ref TC_BURST_NOT_GATED;\n + //! - \ref TC_BURST_CLK_AND_XC0;\n + //! - \ref TC_BURST_CLK_AND_XC1;\n + //! - \ref TC_BURST_CLK_AND_XC2. + unsigned int burst : 2; + + //! Clock invert:\n + //! - \ref TC_CLOCK_RISING_EDGE;\n + //! - \ref TC_CLOCK_FALLING_EDGE. + unsigned int clki : 1; + + //! Clock selection:\n + //! - \ref TC_CLOCK_SOURCE_TC1;\n + //! - \ref TC_CLOCK_SOURCE_TC2;\n + //! - \ref TC_CLOCK_SOURCE_TC3;\n + //! - \ref TC_CLOCK_SOURCE_TC4;\n + //! - \ref TC_CLOCK_SOURCE_TC5;\n + //! - \ref TC_CLOCK_SOURCE_XC0;\n + //! - \ref TC_CLOCK_SOURCE_XC1;\n + //! - \ref TC_CLOCK_SOURCE_XC2. + unsigned int tcclks : 3; +} tc_waveform_opt_t; + + +/*! \brief Reads timer/counter interrupt settings. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval >=0 The interrupt enable configuration organized according to \ref tc_interrupt_t. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_get_interrupt_settings(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Enables various timer/counter interrupts. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * \param bitfield The interrupt enable configuration. + * + * \retval 0 Success. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_configure_interrupts(volatile avr32_tc_t *tc, unsigned int channel, const tc_interrupt_t *bitfield); + +/*! \brief Selects which external clock to use and how to configure it. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * \param ext_clk_sig_src External clock signal selection: + * \arg \c TC_CH0_EXT_CLK0_SRC_TCLK0; + * \arg \c TC_CH0_EXT_CLK0_SRC_NO_CLK; + * \arg \c TC_CH0_EXT_CLK0_SRC_TIOA1; + * \arg \c TC_CH0_EXT_CLK0_SRC_TIOA2; + * \arg \c TC_CH1_EXT_CLK1_SRC_TCLK1; + * \arg \c TC_CH1_EXT_CLK1_SRC_NO_CLK; + * \arg \c TC_CH1_EXT_CLK1_SRC_TIOA0; + * \arg \c TC_CH1_EXT_CLK1_SRC_TIOA2; + * \arg \c TC_CH2_EXT_CLK2_SRC_TCLK2; + * \arg \c TC_CH2_EXT_CLK2_SRC_NO_CLK; + * \arg \c TC_CH2_EXT_CLK2_SRC_TIOA0; + * \arg \c TC_CH2_EXT_CLK2_SRC_TIOA1. + * + * \retval 0 Success. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_select_external_clock(volatile avr32_tc_t *tc, unsigned int channel, unsigned int ext_clk_sig_src); + +/*! \brief Sets options for timer/counter capture initialization. + * + * \param tc Pointer to the TC instance to access. + * \param opt Options for capture mode. + * + * \retval 0 Success. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_init_capture(volatile avr32_tc_t *tc, const tc_capture_opt_t *opt); + +/*! \brief Sets options for timer/counter waveform initialization. + * + * \param tc Pointer to the TC instance to access. + * \param opt Options for waveform generation. + * + * \retval 0 Success. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_init_waveform(volatile avr32_tc_t *tc, const tc_waveform_opt_t *opt); + +/*! \brief Starts a timer/counter. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval 0 Success. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_start(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Stops a timer/counter. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval 0 Success. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_stop(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Performs a software trigger: the counter is reset and the clock is started. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval 0 Success. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_software_trigger(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Asserts a SYNC signal to generate a software trigger and reset all channels. + * + * \param tc Pointer to the TC instance to access. + */ +extern void tc_sync_trigger(volatile avr32_tc_t *tc); + +/*! \brief Start all TC channels simultaneously. + * + * \param tc Pointer to the TC instance to access. + */ +extern void tc_sync_start(volatile avr32_tc_t *tc); + +/*! \brief Reads the status register. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval >=0 Status register value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_read_sr(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Reads the channel's TC counter and returns the value. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval >=0 TC counter value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_read_tc(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Reads the channel's RA register and returns the value. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval >=0 RA register value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_read_ra(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Reads the channel's RB register and returns the value. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval >=0 RB register value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_read_rb(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Reads the channel's RC register and returns the value. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval >=0 RC register value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_read_rc(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Writes a value to the channel's RA register. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * \param value Value to write to the RA register. + * + * \retval >=0 Written value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_write_ra(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value); + +/*! \brief Writes a value to the channel's RB register. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * \param value Value to write to the RB register. + * + * \retval >=0 Written value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_write_rb(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value); + +/*! \brief Writes a value to the channel's RC register. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * \param value Value to write to the RC register. + * + * \retval >=0 Written value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_write_rc(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value); + + +#endif // _TC_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.c new file mode 100644 index 0000000..b95882a --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.c @@ -0,0 +1,914 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief USART driver for AVR32 UC3. + * + * This file contains basic functions for the AVR32 USART, with support for all + * modes, settings and clock speeds. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USART module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "compiler.h" +#include "usart.h" + + +//------------------------------------------------------------------------------ +/*! \name Private Functions + */ +//! @{ + + +/*! \brief Checks if the USART is in multidrop mode. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if the USART is in multidrop mode, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static __inline__ int usart_mode_is_multidrop(volatile avr32_usart_t *usart) +{ + return ((usart->mr >> AVR32_USART_MR_PAR_OFFSET) & AVR32_USART_MR_PAR_MULTI) == AVR32_USART_MR_PAR_MULTI; +} + + +/*! \brief Calculates a clock divider (\e CD) and a fractional part (\e FP) for + * the USART asynchronous modes to generate a baud rate as close as + * possible to the baud rate set point. + * + * Baud rate calculation: + * \f$ Baudrate = \frac{SelectedClock}{Over \times (CD + \frac{FP}{8})} \f$, \e Over being 16 or 8. + * The maximal oversampling is selected if it allows to generate a baud rate close to the set point. + * + * \param usart Base address of the USART instance. + * \param baudrate Baud rate set point. + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Baud rate successfully initialized. + * \retval USART_INVALID_INPUT Baud rate set point is out of range for the given input clock frequency. + */ +static int usart_set_async_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz) +{ + unsigned int over = (pba_hz >= 16 * baudrate) ? 16 : 8; + unsigned int cd_fp = ((1 << AVR32_USART_BRGR_FP_SIZE) * pba_hz + (over * baudrate) / 2) / (over * baudrate); + unsigned int cd = cd_fp >> AVR32_USART_BRGR_FP_SIZE; + unsigned int fp = cd_fp & ((1 << AVR32_USART_BRGR_FP_SIZE) - 1); + + if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1) + return USART_INVALID_INPUT; + + usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK | + AVR32_USART_MR_SYNC_MASK | + AVR32_USART_MR_OVER_MASK)) | + AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET | + ((over == 16) ? AVR32_USART_MR_OVER_X16 : AVR32_USART_MR_OVER_X8) << AVR32_USART_MR_OVER_OFFSET; + + usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET | + fp << AVR32_USART_BRGR_FP_OFFSET; + + return USART_SUCCESS; +} + + +/*! \brief Calculates a clock divider (\e CD) for the USART synchronous master + * modes to generate a baud rate as close as possible to the baud rate + * set point. + * + * Baud rate calculation: + * \f$ Baudrate = \frac{SelectedClock}{CD} \f$. + * + * \param usart Base address of the USART instance. + * \param baudrate Baud rate set point. + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Baud rate successfully initialized. + * \retval USART_INVALID_INPUT Baud rate set point is out of range for the given input clock frequency. + */ +static int usart_set_sync_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz) +{ + unsigned int cd = (pba_hz + baudrate / 2) / baudrate; + + if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1) + return USART_INVALID_INPUT; + + usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) | + AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET | + AVR32_USART_MR_SYNC_MASK; + + usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET; + + return USART_SUCCESS; +} + + +/*! \brief Selects the SCK pin as the source of baud rate for the USART + * synchronous slave modes. + * + * \param usart Base address of the USART instance. + * + * \retval USART_SUCCESS Baud rate successfully initialized. + */ +static int usart_set_sync_slave_baudrate(volatile avr32_usart_t *usart) +{ + usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) | + AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET | + AVR32_USART_MR_SYNC_MASK; + + return USART_SUCCESS; +} + + +/*! \brief Calculates a clock divider (\e CD) for the USART ISO7816 mode to + * generate an ISO7816 clock as close as possible to the clock set point. + * + * ISO7816 clock calculation: + * \f$ Clock = \frac{SelectedClock}{CD} \f$. + * + * \param usart Base address of the USART instance. + * \param clock ISO7816 clock set point. + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS ISO7816 clock successfully initialized. + * \retval USART_INVALID_INPUT ISO7816 clock set point is out of range for the given input clock frequency. + */ +static int usart_set_iso7816_clock(volatile avr32_usart_t *usart, unsigned int clock, unsigned long pba_hz) +{ + unsigned int cd = (pba_hz + clock / 2) / clock; + + if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1) + return USART_INVALID_INPUT; + + usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK | + AVR32_USART_MR_SYNC_MASK | + AVR32_USART_MR_OVER_MASK)) | + AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET | + AVR32_USART_MR_OVER_X16 << AVR32_USART_MR_OVER_OFFSET; + + usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET; + + return USART_SUCCESS; +} + + +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + + +/*! \brief Calculates a clock divider (\e CD) for the USART SPI master mode to + * generate a baud rate as close as possible to the baud rate set point. + * + * Baud rate calculation: + * \f$ Baudrate = \frac{SelectedClock}{CD} \f$. + * + * \param usart Base address of the USART instance. + * \param baudrate Baud rate set point. + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Baud rate successfully initialized. + * \retval USART_INVALID_INPUT Baud rate set point is out of range for the given input clock frequency. + */ +static int usart_set_spi_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz) +{ + unsigned int cd = (pba_hz + baudrate / 2) / baudrate; + + if (cd < 4 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1) + return USART_INVALID_INPUT; + + usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) | + AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET; + + usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET; + + return USART_SUCCESS; +} + + +/*! \brief Selects the SCK pin as the source of baud rate for the USART SPI + * slave mode. + * + * \param usart Base address of the USART instance. + * + * \retval USART_SUCCESS Baud rate successfully initialized. + */ +static int usart_set_spi_slave_baudrate(volatile avr32_usart_t *usart) +{ + usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) | + AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET; + + return USART_SUCCESS; +} + + +#endif // USART rev. >= 4.0.0 + + +//! @} + + +//------------------------------------------------------------------------------ +/*! \name Initialization Functions + */ +//! @{ + + +void usart_reset(volatile avr32_usart_t *usart) +{ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + // Disable all USART interrupts. + // Interrupts needed should be set explicitly on every reset. + if (global_interrupt_enabled) Disable_global_interrupt(); + usart->idr = 0xFFFFFFFF; + usart->csr; + if (global_interrupt_enabled) Enable_global_interrupt(); + + // Reset mode and other registers that could cause unpredictable behavior after reset. + usart->mr = 0; + usart->rtor = 0; + usart->ttgr = 0; + + // Shutdown TX and RX (will be re-enabled when setup has successfully completed), + // reset status bits and turn off DTR and RTS. + usart->cr = AVR32_USART_CR_RSTRX_MASK | + AVR32_USART_CR_RSTTX_MASK | + AVR32_USART_CR_RSTSTA_MASK | + AVR32_USART_CR_RSTIT_MASK | + AVR32_USART_CR_RSTNACK_MASK | +#ifndef AVR32_USART_440_H_INCLUDED +// Note: Modem Signal Management DTR-DSR-DCD-RI are not included in USART rev.440. + AVR32_USART_CR_DTRDIS_MASK | +#endif + AVR32_USART_CR_RTSDIS_MASK; +} + + +int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt || // Null pointer. + opt->charlength < 5 || opt->charlength > 9 || + opt->paritytype > 7 || + opt->stopbits > 2 + 255 || + opt->channelmode > 3 || + usart_set_async_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + if (opt->charlength == 9) + { + // Character length set to 9 bits. MODE9 dominates CHRL. + usart->mr |= AVR32_USART_MR_MODE9_MASK; + } + else + { + // CHRL gives the character length (- 5) when MODE9 = 0. + usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET; + } + + usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET | + opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET; + + if (opt->stopbits > USART_2_STOPBITS) + { + // Set two stop bits + usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET; + // and a timeguard period gives the rest. + usart->ttgr = opt->stopbits - USART_2_STOPBITS; + } + else + // Insert 1, 1.5 or 2 stop bits. + usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET; + + // Set normal mode. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET; + + // Setup complete; enable communication. + // Enable input and output. + usart->cr = AVR32_USART_CR_RXEN_MASK | + AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +int usart_init_rs232_tx_only(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt || // Null pointer. + opt->charlength < 5 || opt->charlength > 9 || + opt->paritytype > 7 || + opt->stopbits == 1 || opt->stopbits > 2 + 255 || + opt->channelmode > 3 || + usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + if (opt->charlength == 9) + { + // Character length set to 9 bits. MODE9 dominates CHRL. + usart->mr |= AVR32_USART_MR_MODE9_MASK; + } + else + { + // CHRL gives the character length (- 5) when MODE9 = 0. + usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET; + } + + usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET | + opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET; + + if (opt->stopbits > USART_2_STOPBITS) + { + // Set two stop bits + usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET; + // and a timeguard period gives the rest. + usart->ttgr = opt->stopbits - USART_2_STOPBITS; + } + else + // Insert 1 or 2 stop bits. + usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET; + + // Set normal mode. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET; + + // Setup complete; enable communication. + // Enable only output as input is not possible in synchronous mode without + // transferring clock. + usart->cr = AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // First: Setup standard RS232. + if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + // Set hardware handshaking mode. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MR_MODE_HARDWARE << AVR32_USART_MR_MODE_OFFSET; + + return USART_SUCCESS; +} + + +int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // First: Setup standard RS232. + if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + // Set modem mode. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MR_MODE_MODEM << AVR32_USART_MR_MODE_OFFSET; + + return USART_SUCCESS; +} + + +int usart_init_sync_master(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt || // Null pointer. + opt->charlength < 5 || opt->charlength > 9 || + opt->paritytype > 7 || + opt->stopbits == 1 || opt->stopbits > 2 + 255 || + opt->channelmode > 3 || + usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + if (opt->charlength == 9) + { + // Character length set to 9 bits. MODE9 dominates CHRL. + usart->mr |= AVR32_USART_MR_MODE9_MASK; + } + else + { + // CHRL gives the character length (- 5) when MODE9 = 0. + usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET; + } + + usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET | + opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET; + + if (opt->stopbits > USART_2_STOPBITS) + { + // Set two stop bits + usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET; + // and a timeguard period gives the rest. + usart->ttgr = opt->stopbits - USART_2_STOPBITS; + } + else + // Insert 1 or 2 stop bits. + usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET; + + // Set normal mode. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET | + AVR32_USART_MR_CLKO_MASK; + + // Setup complete; enable communication. + // Enable input and output. + usart->cr = AVR32_USART_CR_RXEN_MASK | + AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +int usart_init_sync_slave(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt || // Null pointer. + opt->charlength < 5 || opt->charlength > 9 || + opt->paritytype > 7 || + opt->stopbits == 1 || opt->stopbits > 2 + 255 || + opt->channelmode > 3 || + usart_set_sync_slave_baudrate(usart) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + if (opt->charlength == 9) + { + // Character length set to 9 bits. MODE9 dominates CHRL. + usart->mr |= AVR32_USART_MR_MODE9_MASK; + } + else + { + // CHRL gives the character length (- 5) when MODE9 = 0. + usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET; + } + + usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET | + opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET; + + if (opt->stopbits > USART_2_STOPBITS) + { + // Set two stop bits + usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET; + // and a timeguard period gives the rest. + usart->ttgr = opt->stopbits - USART_2_STOPBITS; + } + else + // Insert 1 or 2 stop bits. + usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET; + + // Set normal mode. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET; + + // Setup complete; enable communication. + // Enable input and output. + usart->cr = AVR32_USART_CR_RXEN_MASK | + AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // First: Setup standard RS232. + if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + // Set RS485 mode. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MR_MODE_RS485 << AVR32_USART_MR_MODE_OFFSET; + + return USART_SUCCESS; +} + + +int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt, + long pba_hz, unsigned char irda_filter) +{ + // First: Setup standard RS232. + if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + // Set IrDA filter. + usart->ifr = irda_filter; + + // Set IrDA mode and activate filtering of input. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MODE_IRDA << AVR32_USART_MR_MODE_OFFSET | + AVR32_USART_MR_FILTER_MASK; + + return USART_SUCCESS; +} + + +int usart_init_iso7816(volatile avr32_usart_t *usart, const usart_iso7816_options_t *opt, int t, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt || // Null pointer. + opt->paritytype > 1) + return USART_INVALID_INPUT; + + if (t == 0) + { + // Set USART mode to ISO7816, T=0. + // The T=0 protocol always uses 2 stop bits. + usart->mr = AVR32_USART_MR_MODE_ISO7816_T0 << AVR32_USART_MR_MODE_OFFSET | + AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET | + opt->bit_order << AVR32_USART_MR_MSBF_OFFSET; // Allow MSBF in T=0. + } + else if (t == 1) + { + // Only LSB first in the T=1 protocol. + // max_iterations field is only used in T=0 mode. + if (opt->bit_order != 0 || + opt->max_iterations != 0) + return USART_INVALID_INPUT; + + // Set USART mode to ISO7816, T=1. + // The T=1 protocol always uses 1 stop bit. + usart->mr = AVR32_USART_MR_MODE_ISO7816_T1 << AVR32_USART_MR_MODE_OFFSET | + AVR32_USART_MR_NBSTOP_1 << AVR32_USART_MR_NBSTOP_OFFSET; + } + else + return USART_INVALID_INPUT; + + if (usart_set_iso7816_clock(usart, opt->iso7816_hz, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + // Set FIDI register: bit rate = selected clock/FI_DI_ratio/16. + usart->fidi = opt->fidi_ratio; + + // Set ISO7816 spesific options in the MODE register. + usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET | + AVR32_USART_MR_CLKO_MASK | // Enable clock output. + opt->inhibit_nack << AVR32_USART_MR_INACK_OFFSET | + opt->dis_suc_nack << AVR32_USART_MR_DSNACK_OFFSET | + opt->max_iterations << AVR32_USART_MR_MAX_ITERATION_OFFSET; + + // Setup complete; enable the receiver by default. + usart_iso7816_enable_receiver(usart); + + return USART_SUCCESS; +} + + +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + + +int usart_init_lin_master(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + usart->mr |= AVR32_USART_MR_MODE_LIN_MASTER << AVR32_USART_MR_MODE_OFFSET; // LIN master mode. + + // Setup complete; enable communication. + // Enable input and output. + usart->cr = AVR32_USART_CR_RXEN_MASK | + AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +int usart_init_lin_slave(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + usart->mr |= AVR32_USART_MR_MODE_LIN_SLAVE << AVR32_USART_MR_MODE_OFFSET; // LIN slave mode. + + // Setup complete; enable communication. + // Enable input and output. + usart->cr = AVR32_USART_CR_RXEN_MASK | + AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt || // Null pointer. + opt->charlength < 5 || opt->charlength > 9 || + opt->spimode > 3 || + opt->channelmode > 3 || + usart_set_spi_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + if (opt->charlength == 9) + { + // Character length set to 9 bits. MODE9 dominates CHRL. + usart->mr |= AVR32_USART_MR_MODE9_MASK; + } + else + { + // CHRL gives the character length (- 5) when MODE9 = 0. + usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET; + } + + usart->mr |= AVR32_USART_MR_MODE_SPI_MASTER << AVR32_USART_MR_MODE_OFFSET | // SPI master mode. + ((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET | // SPI clock phase. + opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET | // Channel mode. + (opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET | // SPI clock polarity. + AVR32_USART_MR_CLKO_MASK; // Drive SCK pin. + + // Setup complete; enable communication. + // Enable input and output. + usart->cr = AVR32_USART_CR_RXEN_MASK | + AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt || // Null pointer. + opt->charlength < 5 || opt->charlength > 9 || + opt->spimode > 3 || + opt->channelmode > 3 || + usart_set_spi_slave_baudrate(usart) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + if (opt->charlength == 9) + { + // Character length set to 9 bits. MODE9 dominates CHRL. + usart->mr |= AVR32_USART_MR_MODE9_MASK; + } + else + { + // CHRL gives the character length (- 5) when MODE9 = 0. + usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET; + } + + usart->mr |= AVR32_USART_MR_MODE_SPI_SLAVE << AVR32_USART_MR_MODE_OFFSET | // SPI slave mode. + ((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET | // SPI clock phase. + opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET | // Channel mode. + (opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET; // SPI clock polarity. + + // Setup complete; enable communication. + // Enable input and output. + usart->cr = AVR32_USART_CR_RXEN_MASK | + AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +#endif // USART rev. >= 4.0.0 + + +//! @} + + +//------------------------------------------------------------------------------ +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + + +/*! \name SPI Control Functions + */ +//! @{ + + +int usart_spi_selectChip(volatile avr32_usart_t *usart) +{ + // Force the SPI chip select. + usart->cr = AVR32_USART_CR_RTSEN_MASK; + + return USART_SUCCESS; +} + + +int usart_spi_unselectChip(volatile avr32_usart_t *usart) +{ + int timeout = USART_DEFAULT_TIMEOUT; + + do + { + if (!timeout--) return USART_FAILURE; + } while (!usart_tx_empty(usart)); + + // Release the SPI chip select. + usart->cr = AVR32_USART_CR_RTSDIS_MASK; + + return USART_SUCCESS; +} + + +//! @} + + +#endif // USART rev. >= 4.0.0 + + +//------------------------------------------------------------------------------ +/*! \name Transmit/Receive Functions + */ +//! @{ + + +int usart_send_address(volatile avr32_usart_t *usart, int address) +{ + // Check if USART is in multidrop / RS485 mode. + if (!usart_mode_is_multidrop(usart)) return USART_MODE_FAULT; + + // Prepare to send an address. + usart->cr = AVR32_USART_CR_SENDA_MASK; + + // Write the address to TX. + usart_bw_write_char(usart, address); + + return USART_SUCCESS; +} + + +int usart_write_char(volatile avr32_usart_t *usart, int c) +{ + if (usart_tx_ready(usart)) + { + usart->thr = (c << AVR32_USART_THR_TXCHR_OFFSET) & AVR32_USART_THR_TXCHR_MASK; + return USART_SUCCESS; + } + else + return USART_TX_BUSY; +} + + +int usart_putchar(volatile avr32_usart_t *usart, int c) +{ + int timeout = USART_DEFAULT_TIMEOUT; + + if (c == '\n') + { + do + { + if (!timeout--) return USART_FAILURE; + } while (usart_write_char(usart, '\r') != USART_SUCCESS); + + timeout = USART_DEFAULT_TIMEOUT; + } + + do + { + if (!timeout--) return USART_FAILURE; + } while (usart_write_char(usart, c) != USART_SUCCESS); + + return USART_SUCCESS; +} + + +int usart_read_char(volatile avr32_usart_t *usart, int *c) +{ + // Check for errors: frame, parity and overrun. In RS485 mode, a parity error + // would mean that an address char has been received. + if (usart->csr & (AVR32_USART_CSR_OVRE_MASK | + AVR32_USART_CSR_FRAME_MASK | + AVR32_USART_CSR_PARE_MASK)) + return USART_RX_ERROR; + + // No error; if we really did receive a char, read it and return SUCCESS. + if (usart_test_hit(usart)) + { + *c = (usart->rhr & AVR32_USART_RHR_RXCHR_MASK) >> AVR32_USART_RHR_RXCHR_OFFSET; + return USART_SUCCESS; + } + else + return USART_RX_EMPTY; +} + + +int usart_getchar(volatile avr32_usart_t *usart) +{ + int c, ret; + + while ((ret = usart_read_char(usart, &c)) == USART_RX_EMPTY); + + if (ret == USART_RX_ERROR) + return USART_FAILURE; + + return c; +} + + +void usart_write_line(volatile avr32_usart_t *usart, const char *string) +{ + while (*string != '\0') + usart_putchar(usart, *string++); +} + + +int usart_get_echo_line(volatile avr32_usart_t *usart) +{ + int rx_char; + int retval = USART_SUCCESS; + + while (1) + { + rx_char = usart_getchar(usart); + if (rx_char == USART_FAILURE) + { + usart_write_line(usart, "Error!!!\n"); + retval = USART_FAILURE; + break; + } + if (rx_char == '\x03') + { + retval = USART_FAILURE; + break; + } + usart_putchar(usart, rx_char); + if (rx_char == '\r') + { + usart_putchar(usart, '\n'); + break; + } + } + + return retval; +} + + +//! @} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.h new file mode 100644 index 0000000..bc1c100 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.h @@ -0,0 +1,889 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief USART driver for AVR32 UC3. + * + * This file contains basic functions for the AVR32 USART, with support for all + * modes, settings and clock speeds. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USART module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _USART_H_ +#define _USART_H_ + +#include +#include "compiler.h" + + +/*! \name Return Values + */ +//! @{ +#define USART_SUCCESS 0 //!< Successful completion. +#define USART_FAILURE -1 //!< Failure because of some unspecified reason. +#define USART_INVALID_INPUT 1 //!< Input value out of range. +#define USART_INVALID_ARGUMENT -1 //!< Argument value out of range. +#define USART_TX_BUSY 2 //!< Transmitter was busy. +#define USART_RX_EMPTY 3 //!< Nothing was received. +#define USART_RX_ERROR 4 //!< Transmission error occurred. +#define USART_MODE_FAULT 5 //!< USART not in the appropriate mode. +//! @} + +//! Default time-out value (number of attempts). +#define USART_DEFAULT_TIMEOUT 10000 + +/*! \name Parity Settings + */ +//! @{ +#define USART_EVEN_PARITY AVR32_USART_MR_PAR_EVEN //!< Use even parity on character transmission. +#define USART_ODD_PARITY AVR32_USART_MR_PAR_ODD //!< Use odd parity on character transmission. +#define USART_SPACE_PARITY AVR32_USART_MR_PAR_SPACE //!< Use a space as parity bit. +#define USART_MARK_PARITY AVR32_USART_MR_PAR_MARK //!< Use a mark as parity bit. +#define USART_NO_PARITY AVR32_USART_MR_PAR_NONE //!< Don't use a parity bit. +#define USART_MULTIDROP_PARITY AVR32_USART_MR_PAR_MULTI //!< Parity bit is used to flag address characters. +//! @} + +/*! \name Stop Bits Settings + */ +//! @{ +#define USART_1_STOPBIT AVR32_USART_MR_NBSTOP_1 //!< Use 1 stop bit. +#define USART_1_5_STOPBITS AVR32_USART_MR_NBSTOP_1_5 //!< Use 1.5 stop bits. +#define USART_2_STOPBITS AVR32_USART_MR_NBSTOP_2 //!< Use 2 stop bits (for more, just give the number of bits). +//! @} + +/*! \name Channel Modes + */ +//! @{ +#define USART_NORMAL_CHMODE AVR32_USART_MR_CHMODE_NORMAL //!< Normal communication. +#define USART_AUTO_ECHO AVR32_USART_MR_CHMODE_ECHO //!< Echo data. +#define USART_LOCAL_LOOPBACK AVR32_USART_MR_CHMODE_LOCAL_LOOP //!< Local loopback. +#define USART_REMOTE_LOOPBACK AVR32_USART_MR_CHMODE_REMOTE_LOOP //!< Remote loopback. +//! @} + +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + +/*! \name LIN Node Actions + */ +//! @{ +#define USART_LIN_PUBLISH_ACTION AVR32_USART_LINMR_NACT_PUBLISH //!< The USART transmits the response. +#define USART_LIN_SUBSCRIBE_ACTION AVR32_USART_LINMR_NACT_SUBSCRIBE //!< The USART receives the response. +#define USART_LIN_IGNORE_ACTION AVR32_USART_LINMR_NACT_IGNORE //!< The USART does not transmit and does not receive the reponse. +//! @} + +/*! \name LIN Checksum Types + */ +//! @{ +#define USART_LIN_ENHANCED_CHECKSUM 0 //!< LIN 2.0 "enhanced" checksum. +#define USART_LIN_CLASSIC_CHECKSUM 1 //!< LIN 1.3 "classic" checksum. +//! @} + +#endif // USART rev. >= 4.0.0 + + +//! Input parameters when initializing RS232 and similar modes. +typedef struct +{ + //! Set baud rate of the USART (unused in slave modes). + unsigned long baudrate; + + //! Number of bits to transmit as a character (5 to 9). + unsigned char charlength; + + //! How to calculate the parity bit: \ref USART_EVEN_PARITY, \ref USART_ODD_PARITY, + //! \ref USART_SPACE_PARITY, \ref USART_MARK_PARITY, \ref USART_NO_PARITY or + //! \ref USART_MULTIDROP_PARITY. + unsigned char paritytype; + + //! Number of stop bits between two characters: \ref USART_1_STOPBIT, + //! \ref USART_1_5_STOPBITS, \ref USART_2_STOPBITS or any number from 3 to 257 + //! which will result in a time guard period of that length between characters. + //! \note \ref USART_1_5_STOPBITS is supported in asynchronous modes only. + unsigned short stopbits; + + //! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO, + //! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK. + unsigned char channelmode; +} usart_options_t; + +//! Input parameters when initializing ISO7816 mode. +typedef struct +{ + //! Set the frequency of the ISO7816 clock. + unsigned long iso7816_hz; + + //! The number of ISO7816 clock ticks in every bit period (1 to 2047, 0 = disable clock). + //! Bit rate = \ref iso7816_hz / \ref fidi_ratio. + unsigned short fidi_ratio; + + //! How to calculate the parity bit: \ref USART_EVEN_PARITY for normal mode or + //! \ref USART_ODD_PARITY for inverse mode. + unsigned char paritytype; + + //! Inhibit Non Acknowledge:\n + //! - 0: the NACK is generated;\n + //! - 1: the NACK is not generated. + //! + //! \note This bit will be used only in ISO7816 mode, protocol T = 0 receiver. + int inhibit_nack; + + //! Disable successive NACKs. + //! Successive parity errors are counted up to the value in the \ref max_iterations field. + //! These parity errors generate a NACK on the ISO line. As soon as this value is reached, + //! no addititional NACK is sent on the ISO line. The ITERATION flag is asserted. + int dis_suc_nack; + + //! Max number of repetitions (0 to 7). + unsigned char max_iterations; + + //! Bit order in transmitted characters:\n + //! - 0: LSB first;\n + //! - 1: MSB first. + int bit_order; +} usart_iso7816_options_t; + +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + +//! Input parameters when initializing SPI mode. +typedef struct +{ + //! Set the frequency of the SPI clock (unused in slave mode). + unsigned long baudrate; + + //! Number of bits to transmit as a character (5 to 9). + unsigned char charlength; + + //! Which SPI mode to use. + unsigned char spimode; + + //! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO, + //! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK. + unsigned char channelmode; +} usart_spi_options_t; + +#endif // USART rev. >= 4.0.0 + + +//------------------------------------------------------------------------------ +/*! \name Initialization Functions + */ +//! @{ + +/*! \brief Resets the USART and disables TX and RX. + * + * \param usart Base address of the USART instance. + */ +extern void usart_reset(volatile avr32_usart_t *usart); + +/*! \brief Sets up the USART to use the standard RS232 protocol. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use the standard RS232 protocol in TX-only mode. + * + * Compared to \ref usart_init_rs232, this function allows very high baud rates + * (up to \a pba_hz instead of \a pba_hz / \c 8) at the expense of full duplex. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + * + * \note The \c 1.5 stop bit is not supported in this mode. + */ +extern int usart_init_rs232_tx_only(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use hardware handshaking. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + * + * \note \ref usart_init_rs232 does not need to be invoked before this function. + */ +extern int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use the modem protocol, activating dedicated inputs/outputs. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use a synchronous RS232-like protocol in master mode. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_sync_master(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use a synchronous RS232-like protocol in slave mode. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_sync_slave(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use the RS485 protocol. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use the IrDA protocol. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * \param irda_filter Counter used to distinguish received ones from zeros. + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt, + long pba_hz, unsigned char irda_filter); + +/*! \brief Sets up the USART to use the ISO7816 T=0 or T=1 smartcard protocols. + * + * The receiver is enabled by default. \ref usart_iso7816_enable_receiver and + * \ref usart_iso7816_enable_transmitter can be called to change the half-duplex + * communication direction. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up ISO7816 communication (see \ref usart_iso7816_options_t). + * \param t ISO7816 mode to use (T=0 or T=1). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_iso7816(volatile avr32_usart_t *usart, const usart_iso7816_options_t *opt, int t, long pba_hz); + +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + +/*! \brief Sets up the USART to use the LIN master mode. + * + * \param usart Base address of the USART instance. + * \param baudrate Baud rate. + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + */ +extern int usart_init_lin_master(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz); + +/*! \brief Sets up the USART to use the LIN slave mode. + * + * \param usart Base address of the USART instance. + * \param baudrate Baud rate. + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + */ +extern int usart_init_lin_slave(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz); + +/*! \brief Sets up the USART to use the SPI master mode. + * + * \ref usart_spi_selectChip and \ref usart_spi_unselectChip can be called to + * select or unselect the SPI slave chip. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up SPI mode (see \ref usart_spi_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use the SPI slave mode. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up SPI mode (see \ref usart_spi_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz); + +#endif // USART rev. >= 4.0.0 + +//! @} + + +//------------------------------------------------------------------------------ +/*! \name Read and Reset Error Status Bits + */ +//! @{ + +/*! \brief Resets the error status. + * + * This function resets the status bits indicating that a parity error, + * framing error or overrun has occurred. The RXBRK bit, indicating + * a start/end of break condition on the RX line, is also reset. + * + * \param usart Base address of the USART instance. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_reset_status(volatile avr32_usart_t *usart) +{ + usart->cr = AVR32_USART_CR_RSTSTA_MASK; +} + +/*! \brief Checks if a parity error has occurred since last status reset. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if a parity error has been detected, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_parity_error(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_PARE_MASK) != 0; +} + +/*! \brief Checks if a framing error has occurred since last status reset. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if a framing error has been detected, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_framing_error(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_FRAME_MASK) != 0; +} + +/*! \brief Checks if an overrun error has occurred since last status reset. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if a overrun error has been detected, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_overrun_error(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_OVRE_MASK) != 0; +} + +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + +/*! \brief Get LIN Error Status + * + * \param usart Base address of the USART instance. + * + * \retval The binary value of the error field. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_lin_get_error(volatile avr32_usart_t *usart) +{ + return (usart->csr & (AVR32_USART_CSR_LINSNRE_MASK | + AVR32_USART_CSR_LINCE_MASK | + AVR32_USART_CSR_LINIPE_MASK | + AVR32_USART_CSR_LINISFE_MASK | + AVR32_USART_CSR_LINBE_MASK)) >> AVR32_USART_CSR_LINBE_OFFSET; +} + +#endif // USART rev. >= 4.0.0 + +//! @} + + +//------------------------------------------------------------------------------ +/*! \name ISO7816 Control Functions + */ +//! @{ + +/*! \brief Enables the ISO7816 receiver. + * + * The ISO7816 transmitter is disabled. + * + * \param usart Base address of the USART instance. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_iso7816_enable_receiver(volatile avr32_usart_t *usart) +{ + usart->cr = AVR32_USART_CR_TXDIS_MASK | AVR32_USART_CR_RXEN_MASK; +} + +/*! \brief Enables the ISO7816 transmitter. + * + * The ISO7816 receiver is disabled. + * + * \param usart Base address of the USART instance. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_iso7816_enable_transmitter(volatile avr32_usart_t *usart) +{ + usart->cr = AVR32_USART_CR_RXDIS_MASK | AVR32_USART_CR_TXEN_MASK; +} + +//! @} + + +//------------------------------------------------------------------------------ +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + +/*! \name LIN Control Functions + */ +//! @{ + +/*! \brief Sets the node action. + * + * \param usart Base address of the USART instance. + * \param action The node action: \ref USART_LIN_PUBLISH_ACTION, + * \ref USART_LIN_SUBSCRIBE_ACTION or + * \ref USART_LIN_IGNORE_ACTION. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_set_node_action(volatile avr32_usart_t *usart, unsigned char action) +{ + usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_NACT_MASK) | + action << AVR32_USART_LINMR_NACT_OFFSET; +} + +/*! \brief Enables or disables the Identifier parity. + * + * \param usart Base address of the USART instance. + * \param parity Whether to enable the Identifier parity: \c TRUE or \c FALSE. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_enable_parity(volatile avr32_usart_t *usart, unsigned char parity) +{ + usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_PARDIS_MASK) | + !parity << AVR32_USART_LINMR_PARDIS_OFFSET; +} + +/*! \brief Enables or disables the checksum. + * + * \param usart Base address of the USART instance. + * \param parity Whether to enable the checksum: \c TRUE or \c FALSE. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_enable_checksum(volatile avr32_usart_t *usart, unsigned char checksum) +{ + usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_CHKDIS_MASK) | + !checksum << AVR32_USART_LINMR_CHKDIS_OFFSET; +} + +/*! \brief Sets the checksum type. + * + * \param usart Base address of the USART instance. + * \param chktyp The checksum type: \ref USART_LIN_ENHANCED_CHEKSUM or + * \ref USART_LIN_CLASSIC_CHECKSUM. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_set_checksum(volatile avr32_usart_t *usart, unsigned char chktyp) +{ + usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_CHKTYP_MASK) | + chktyp << AVR32_USART_LINMR_CHKTYP_OFFSET; +} + +/*! \brief Gets the response data length. + * + * \param usart Base address of the USART instance. + * + * \return The response data length. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ unsigned char usart_lin_get_data_length(volatile avr32_usart_t *usart) +{ + if (usart->linmr & AVR32_USART_LINMR_DLM_MASK) + { + unsigned char data_length = 1 << ((usart->linir >> (AVR32_USART_LINIR_IDCHR_OFFSET + 4)) & 0x03); + if (data_length == 1) + data_length = 2; + return data_length; + } + else + return ((usart->linmr & AVR32_USART_LINMR_DLC_MASK) >> AVR32_USART_LINMR_DLC_OFFSET) + 1; +} + +/*! \brief Sets the response data length for LIN 1.x. + * + * \param usart Base address of the USART instance. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_set_data_length_lin1x(volatile avr32_usart_t *usart) +{ + usart->linmr |= AVR32_USART_LINMR_DLM_MASK; +} + +/*! \brief Sets the response data length for LIN 2.x. + * + * \param usart Base address of the USART instance. + * \param data_length The response data length. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_set_data_length_lin2x(volatile avr32_usart_t *usart, unsigned char data_length) +{ + usart->linmr = (usart->linmr & ~(AVR32_USART_LINMR_DLC_MASK | + AVR32_USART_LINMR_DLM_MASK)) | + (data_length - 1) << AVR32_USART_LINMR_DLC_OFFSET; +} + +/*! \brief Enables or disables the frame slot mode. + * + * \param usart Base address of the USART instance. + * \param frameslot Whether to enable the frame slot mode: \c TRUE or + * \c FALSE. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_enable_frameslot(volatile avr32_usart_t *usart, unsigned char frameslot) +{ + usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_FSDIS_MASK) | + !frameslot << AVR32_USART_LINMR_FSDIS_OFFSET; +} + +/*! \brief Gets the Identifier character. + * + * \param usart Base address of the USART instance. + * + * \return The Identifier character. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ unsigned char usart_lin_get_id_char(volatile avr32_usart_t *usart) +{ + return (usart->linir & AVR32_USART_LINIR_IDCHR_MASK) >> AVR32_USART_LINIR_IDCHR_OFFSET; +} + +/*! \brief Sets the Identifier character. + * + * \param usart Base address of the USART instance. + * \param id_char The Identifier character. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_set_id_char(volatile avr32_usart_t *usart, unsigned char id_char) +{ + usart->linir = (usart->linir & ~AVR32_USART_LINIR_IDCHR_MASK) | + id_char << AVR32_USART_LINIR_IDCHR_OFFSET; +} + +//! @} + +#endif // USART rev. >= 4.0.0 + + +//------------------------------------------------------------------------------ +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + +/*! \name SPI Control Functions + */ +//! @{ + +/*! \brief Selects SPI slave chip. + * + * \param usart Base address of the USART instance. + * + * \retval USART_SUCCESS Success. + */ +extern int usart_spi_selectChip(volatile avr32_usart_t *usart); + +/*! \brief Unselects SPI slave chip. + * + * \param usart Base address of the USART instance. + * + * \retval USART_SUCCESS Success. + * \retval USART_FAILURE Time-out. + */ +extern int usart_spi_unselectChip(volatile avr32_usart_t *usart); + +//! @} + +#endif // USART rev. >= 4.0.0 + + +//------------------------------------------------------------------------------ +/*! \name Transmit/Receive Functions + */ +//! @{ + +/*! \brief Addresses a receiver. + * + * While in RS485 mode, receivers only accept data addressed to them. + * A packet/char with the address tag set has to precede any data. + * This function is used to address a receiver. This receiver should read + * all the following data, until an address packet addresses another receiver. + * + * \param usart Base address of the USART instance. + * \param address Address of the target device. + * + * \retval USART_SUCCESS Address successfully sent (if current mode is RS485). + * \retval USART_MODE_FAULT Wrong operating mode. + */ +extern int usart_send_address(volatile avr32_usart_t *usart, int address); + +/*! \brief Tests if the USART is ready to transmit a character. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if the USART Transmit Holding Register is free, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_tx_ready(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_TXRDY_MASK) != 0; +} + +/*! \brief Writes the given character to the TX buffer if the transmitter is ready. + * + * \param usart Base address of the USART instance. + * \param c The character (up to 9 bits) to transmit. + * + * \retval USART_SUCCESS The transmitter was ready. + * \retval USART_TX_BUSY The transmitter was busy. + */ +extern int usart_write_char(volatile avr32_usart_t *usart, int c); + +/*! \brief An active wait writing a character to the USART. + * + * \param usart Base address of the USART instance. + * \param c The character (up to 9 bits) to transmit. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_bw_write_char(volatile avr32_usart_t *usart, int c) +{ + while (usart_write_char(usart, c) != USART_SUCCESS); +} + +/*! \brief Sends a character with the USART. + * + * \param usart Base address of the USART instance. + * \param c Character to write. + * + * \retval USART_SUCCESS The character was written. + * \retval USART_FAILURE The function timed out before the USART transmitter became ready to send. + */ +extern int usart_putchar(volatile avr32_usart_t *usart, int c); + +/*! \brief Tests if all requested USART transmissions are over. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if the USART Transmit Shift Register and the USART Transmit + * Holding Register are free, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_tx_empty(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_TXEMPTY_MASK) != 0; +} + +/*! \brief Tests if the USART contains a received character. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if the USART Receive Holding Register is full, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_test_hit(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_RXRDY_MASK) != 0; +} + +/*! \brief Checks the RX buffer for a received character, and stores it at the + * given memory location. + * + * \param usart Base address of the USART instance. + * \param c Pointer to the where the read character should be stored + * (must be at least short in order to accept 9-bit characters). + * + * \retval USART_SUCCESS The character was read successfully. + * \retval USART_RX_EMPTY The RX buffer was empty. + * \retval USART_RX_ERROR An error was deteceted. + */ +extern int usart_read_char(volatile avr32_usart_t *usart, int *c); + +/*! \brief Waits until a character is received, and returns it. + * + * \param usart Base address of the USART instance. + * + * \return The received character, or \ref USART_FAILURE upon error. + */ +extern int usart_getchar(volatile avr32_usart_t *usart); + +/*! \brief Writes one character string to the USART. + * + * \param usart Base address of the USART instance. + * \param string String to be written. + */ +extern void usart_write_line(volatile avr32_usart_t *usart, const char *string); + +/*! \brief Gets and echoes characters until end of line. + * + * \param usart Base address of the USART instance. + * + * \retval USART_SUCCESS Success. + * \retval USART_FAILURE Low-level error detected or ETX character received. + */ +extern int usart_get_echo_line(volatile avr32_usart_t *usart); + +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + +/*! \brief Abort LIN transmission. + * + * \param usart Base address of the USART instance. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_abort(volatile avr32_usart_t *usart) +{ + usart->cr = AVR32_USART_LINABT_MASK; +} + +/*! \brief Tests if a LIN transfer has been completed. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if a LIN transfer has been completed, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_lin_transfer_completed(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_LINTC_MASK) != 0; +} + +#endif // USART rev. >= 4.0.0 + +//! @} + + +#endif // _USART_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/DELAY/delay.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/DELAY/delay.c new file mode 100644 index 0000000..ad5ecca --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/DELAY/delay.c @@ -0,0 +1,87 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ****************************************************************** + * + * \brief Management of the delays. + * + * This file manages the "delays", with or without an OS. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ***************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +//_____ I N C L U D E S ___________________________________________________ + +#include "delay.h" + + +//_____ M A C R O S ________________________________________________________ + + +//_____ D E F I N I T I O N S ______________________________________________ + +//! CPU frequency +#ifndef FREERTOS_USED +static unsigned long s_fcpu_hz; +#endif +#if (defined NUTOS_USED) +extern void NutSleep(unsigned long ms); +#endif + +//_____ D E C L A R A T I O N S ____________________________________________ + +void delay_init(unsigned long fcpu_hz) +{ +#ifndef FREERTOS_USED + s_fcpu_hz = fcpu_hz; +#endif +} + + +void delay_ms(unsigned long delay) +{ +#if (defined FREERTOS_USED) + vTaskDelay( (portTickType)TASK_DELAY_MS(delay) ); +#elif (defined NUTOS_USED) + NutSleep(delay); +#else + cpu_delay_ms(delay, s_fcpu_hz); +#endif +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/DELAY/delay.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/DELAY/delay.h new file mode 100644 index 0000000..2811326 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/DELAY/delay.h @@ -0,0 +1,80 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3 delay management header file. + * + * This file contains definitions and services to handle "delays". + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _DELAY_H_ +#define _DELAY_H_ + +#include "compiler.h" +#ifdef FREERTOS_USED +# include "FreeRTOS.h" +# include "task.h" +#else +# include "cycle_counter.h" +#endif + + +/*! + * \brief Initialize the delay driver. + * + * \param fcpu_hz: CPU frequency in Hz. + */ +extern void delay_init(unsigned long fcpu_hz); + + +/*! + * \brief Waits during at least the specified delay (in millisecond) before returning. + * + * Note that in the case of FreeRTOS, the function will delay the current task for a given number of ms. + * + * \param delay: Number of millisecond to wait. + */ +extern void delay_ms(unsigned long delay); + + +#endif // _DELAY_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/dhcp.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/dhcp.c new file mode 100644 index 0000000..8ef6c84 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/dhcp.c @@ -0,0 +1,1724 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Dynamic Host Configuration Protocol client + * + */ + +/* + * + * Copyright (c) 2001-2004 Leon Woestenberg + * Copyright (c) 2001-2004 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is a contribution to the lwIP TCP/IP stack. + * The Swedish Institute of Computer Science and Adam Dunkels + * are specifically granted permission to redistribute this + * source code. + * + * Author: Leon Woestenberg + * + * This is a DHCP client for the lwIP TCP/IP stack. It aims to conform + * with RFC 2131 and RFC 2132. + * + * TODO: + * - Proper parsing of DHCP messages exploiting file/sname field overloading. + * - Add JavaDoc style documentation (API, internals). + * - Support for interfaces other than Ethernet (SLIP, PPP, ...) + * + * Please coordinate changes and requests with Leon Woestenberg + * + * + * Integration with your code: + * + * In lwip/dhcp.h + * #define DHCP_COARSE_TIMER_SECS (recommended 60 which is a minute) + * #define DHCP_FINE_TIMER_MSECS (recommended 500 which equals TCP coarse timer) + * + * Then have your application call dhcp_coarse_tmr() and + * dhcp_fine_tmr() on the defined intervals. + * + * dhcp_start(struct netif *netif); + * starts a DHCP client instance which configures the interface by + * obtaining an IP address lease and maintaining it. + * + * Use dhcp_release(netif) to end the lease and use dhcp_stop(netif) + * to remove the DHCP client. + * + */ + +#include "lwip/opt.h" + +#if LWIP_DHCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/stats.h" +#include "lwip/mem.h" +#include "lwip/udp.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/inet.h" +#include "lwip/sys.h" +#include "lwip/dhcp.h" +#include "lwip/autoip.h" +#include "lwip/dns.h" +#include "netif/etharp.h" + +#include + +/** Default for DHCP_GLOBAL_XID is 0xABCD0000 + * This can be changed by defining DHCP_GLOBAL_XID and DHCP_GLOBAL_XID_HEADER, e.g. + * #define DHCP_GLOBAL_XID_HEADER "stdlib.h" + * #define DHCP_GLOBAL_XID rand() + */ +#ifdef DHCP_GLOBAL_XID_HEADER +#include DHCP_GLOBAL_XID_HEADER /* include optional starting XID generation prototypes */ +#endif + +/** DHCP_OPTION_MAX_MSG_SIZE is set to the MTU + * MTU is checked to be big enough in dhcp_start */ +#define DHCP_MAX_MSG_LEN(netif) (netif->mtu) +#define DHCP_MAX_MSG_LEN_MIN_REQUIRED 576 +/** Minimum length for reply before packet is parsed */ +#define DHCP_MIN_REPLY_LEN 44 + +#define REBOOT_TRIES 2 + +/* DHCP client state machine functions */ +static void dhcp_handle_ack(struct netif *netif); +static void dhcp_handle_nak(struct netif *netif); +static void dhcp_handle_offer(struct netif *netif); + +static err_t dhcp_discover(struct netif *netif); +static err_t dhcp_select(struct netif *netif); +static void dhcp_bind(struct netif *netif); +#if DHCP_DOES_ARP_CHECK +static void dhcp_check(struct netif *netif); +static err_t dhcp_decline(struct netif *netif); +#endif /* DHCP_DOES_ARP_CHECK */ +static err_t dhcp_rebind(struct netif *netif); +static err_t dhcp_reboot(struct netif *netif); +static void dhcp_set_state(struct dhcp *dhcp, u8_t new_state); + +/* receive, unfold, parse and free incoming messages */ +static void dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port); +static err_t dhcp_unfold_reply(struct dhcp *dhcp, struct pbuf *p); +static u8_t *dhcp_get_option_ptr(struct dhcp *dhcp, u8_t option_type); +static u8_t dhcp_get_option_byte(u8_t *ptr); +#if 0 +static u16_t dhcp_get_option_short(u8_t *ptr); +#endif +static u32_t dhcp_get_option_long(u8_t *ptr); +static void dhcp_free_reply(struct dhcp *dhcp); + +/* set the DHCP timers */ +static void dhcp_timeout(struct netif *netif); +static void dhcp_t1_timeout(struct netif *netif); +static void dhcp_t2_timeout(struct netif *netif); + +/* build outgoing messages */ +/* create a DHCP request, fill in common headers */ +static err_t dhcp_create_request(struct netif *netif); +/* free a DHCP request */ +static void dhcp_delete_request(struct netif *netif); +/* add a DHCP option (type, then length in bytes) */ +static void dhcp_option(struct dhcp *dhcp, u8_t option_type, u8_t option_len); +/* add option values */ +static void dhcp_option_byte(struct dhcp *dhcp, u8_t value); +static void dhcp_option_short(struct dhcp *dhcp, u16_t value); +static void dhcp_option_long(struct dhcp *dhcp, u32_t value); +/* always add the DHCP options trailer to end and pad */ +static void dhcp_option_trailer(struct dhcp *dhcp); + +/** + * Back-off the DHCP client (because of a received NAK response). + * + * Back-off the DHCP client because of a received NAK. Receiving a + * NAK means the client asked for something non-sensible, for + * example when it tries to renew a lease obtained on another network. + * + * We clear any existing set IP address and restart DHCP negotiation + * afresh (as per RFC2131 3.2.3). + * + * @param netif the netif under DHCP control + */ +static void +dhcp_handle_nak(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_nak(netif=%p) %c%c%"U16_F"\n", + (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); + /* Set the interface down since the address must no longer be used, as per RFC2131 */ + netif_set_down(netif); + /* remove IP address from interface */ + netif_set_ipaddr(netif, IP_ADDR_ANY); + netif_set_gw(netif, IP_ADDR_ANY); + netif_set_netmask(netif, IP_ADDR_ANY); + /* Change to a defined state */ + dhcp_set_state(dhcp, DHCP_BACKING_OFF); + /* We can immediately restart discovery */ + dhcp_discover(netif); +} + +#if DHCP_DOES_ARP_CHECK +/** + * Checks if the offered IP address is already in use. + * + * It does so by sending an ARP request for the offered address and + * entering CHECKING state. If no ARP reply is received within a small + * interval, the address is assumed to be free for use by us. + * + * @param netif the netif under DHCP control + */ +static void +dhcp_check(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_check(netif=%p) %c%c\n", (void *)netif, (s16_t)netif->name[0], + (s16_t)netif->name[1])); + dhcp_set_state(dhcp, DHCP_CHECKING); + /* create an ARP query for the offered IP address, expecting that no host + responds, as the IP address should not be in use. */ + result = etharp_query(netif, &dhcp->offered_ip_addr, NULL); + if (result != ERR_OK) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_check: could not perform ARP query\n")); + } + dhcp->tries++; + msecs = 500; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_check(): set request timeout %"U16_F" msecs\n", msecs)); +} +#endif /* DHCP_DOES_ARP_CHECK */ + +/** + * Remember the configuration offered by a DHCP server. + * + * @param netif the netif under DHCP control + */ +static void +dhcp_handle_offer(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + /* obtain the server address */ + u8_t *option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_SERVER_ID); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_offer(netif=%p) %c%c%"U16_F"\n", + (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); + if (option_ptr != NULL) { + dhcp->server_ip_addr.addr = htonl(dhcp_get_option_long(&option_ptr[2])); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): server 0x%08"X32_F"\n", dhcp->server_ip_addr.addr)); + /* remember offered address */ + ip_addr_set(&dhcp->offered_ip_addr, (struct ip_addr *)&dhcp->msg_in->yiaddr); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): offer for 0x%08"X32_F"\n", dhcp->offered_ip_addr.addr)); + + dhcp_select(netif); + } +} + +/** + * Select a DHCP server offer out of all offers. + * + * Simply select the first offer received. + * + * @param netif the netif under DHCP control + * @return lwIP specific error (see error.h) + */ +static err_t +dhcp_select(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; +#if LWIP_NETIF_HOSTNAME + const char *p; +#endif /* LWIP_NETIF_HOSTNAME */ + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_select(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); + dhcp_set_state(dhcp, DHCP_REQUESTING); + + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_REQUEST); + + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, DHCP_MAX_MSG_LEN(netif)); + + /* MUST request the offered IP address */ + dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); + dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); + + dhcp_option(dhcp, DHCP_OPTION_SERVER_ID, 4); + dhcp_option_long(dhcp, ntohl(dhcp->server_ip_addr.addr)); + + dhcp_option(dhcp, DHCP_OPTION_PARAMETER_REQUEST_LIST, 4/*num options*/); + dhcp_option_byte(dhcp, DHCP_OPTION_SUBNET_MASK); + dhcp_option_byte(dhcp, DHCP_OPTION_ROUTER); + dhcp_option_byte(dhcp, DHCP_OPTION_BROADCAST); + dhcp_option_byte(dhcp, DHCP_OPTION_DNS_SERVER); + +#if LWIP_NETIF_HOSTNAME + p = (const char*)netif->hostname; + if (p != NULL) { + dhcp_option(dhcp, DHCP_OPTION_HOSTNAME, strlen(p)); + while (*p) { + dhcp_option_byte(dhcp, *p++); + } + } +#endif /* LWIP_NETIF_HOSTNAME */ + + dhcp_option_trailer(dhcp); + /* shrink the pbuf to the actual content length */ + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + /* send broadcast to any DHCP server */ + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + dhcp_delete_request(netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_select: REQUESTING\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_select: could not allocate DHCP request\n")); + } + dhcp->tries++; + msecs = (dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_select(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} + +/** + * The DHCP timer that checks for lease renewal/rebind timeouts. + * + */ +void +dhcp_coarse_tmr() +{ + struct netif *netif = netif_list; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_coarse_tmr()\n")); + /* iterate through all network interfaces */ + while (netif != NULL) { + /* only act on DHCP configured interfaces */ + if (netif->dhcp != NULL) { + /* timer is active (non zero), and triggers (zeroes) now? */ + if (netif->dhcp->t2_timeout-- == 1) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t2 timeout\n")); + /* this clients' rebind timeout triggered */ + dhcp_t2_timeout(netif); + /* timer is active (non zero), and triggers (zeroes) now */ + } else if (netif->dhcp->t1_timeout-- == 1) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t1 timeout\n")); + /* this clients' renewal timeout triggered */ + dhcp_t1_timeout(netif); + } + } + /* proceed to next netif */ + netif = netif->next; + } +} + +/** + * DHCP transaction timeout handling + * + * A DHCP server is expected to respond within a short period of time. + * This timer checks whether an outstanding DHCP request is timed out. + * + */ +void +dhcp_fine_tmr() +{ + struct netif *netif = netif_list; + /* loop through netif's */ + while (netif != NULL) { + /* only act on DHCP configured interfaces */ + if (netif->dhcp != NULL) { + /* timer is active (non zero), and is about to trigger now */ + if (netif->dhcp->request_timeout > 1) { + netif->dhcp->request_timeout--; + } + else if (netif->dhcp->request_timeout == 1) { + netif->dhcp->request_timeout--; + /* { netif->dhcp->request_timeout == 0 } */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_fine_tmr(): request timeout\n")); + /* this clients' request timeout triggered */ + dhcp_timeout(netif); + } + } + /* proceed to next network interface */ + netif = netif->next; + } +} + +/** + * A DHCP negotiation transaction, or ARP request, has timed out. + * + * The timer that was started with the DHCP or ARP request has + * timed out, indicating no response was received in time. + * + * @param netif the netif under DHCP control + */ +static void +dhcp_timeout(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout()\n")); + /* back-off period has passed, or server selection timed out */ + if ((dhcp->state == DHCP_BACKING_OFF) || (dhcp->state == DHCP_SELECTING)) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout(): restarting discovery\n")); + dhcp_discover(netif); + /* receiving the requested lease timed out */ + } else if (dhcp->state == DHCP_REQUESTING) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_timeout(): REQUESTING, DHCP request timed out\n")); + if (dhcp->tries <= 5) { + dhcp_select(netif); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_timeout(): REQUESTING, releasing, restarting\n")); + dhcp_release(netif); + dhcp_discover(netif); + } +#if DHCP_DOES_ARP_CHECK + /* received no ARP reply for the offered address (which is good) */ + } else if (dhcp->state == DHCP_CHECKING) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_timeout(): CHECKING, ARP request timed out\n")); + if (dhcp->tries <= 1) { + dhcp_check(netif); + /* no ARP replies on the offered address, + looks like the IP address is indeed free */ + } else { + /* bind the interface to the offered address */ + dhcp_bind(netif); + } +#endif /* DHCP_DOES_ARP_CHECK */ + } + /* did not get response to renew request? */ + else if (dhcp->state == DHCP_RENEWING) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_timeout(): RENEWING, DHCP request timed out\n")); + /* just retry renewal */ + /* note that the rebind timer will eventually time-out if renew does not work */ + dhcp_renew(netif); + /* did not get response to rebind request? */ + } else if (dhcp->state == DHCP_REBINDING) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_timeout(): REBINDING, DHCP request timed out\n")); + if (dhcp->tries <= 8) { + dhcp_rebind(netif); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_timeout(): RELEASING, DISCOVERING\n")); + dhcp_release(netif); + dhcp_discover(netif); + } + } else if (dhcp->state == DHCP_REBOOTING) { + if (dhcp->tries < REBOOT_TRIES) { + dhcp_reboot(netif); + } else { + dhcp_discover(netif); + } + } +} + +/** + * The renewal period has timed out. + * + * @param netif the netif under DHCP control + */ +static void +dhcp_t1_timeout(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_t1_timeout()\n")); + if ((dhcp->state == DHCP_REQUESTING) || (dhcp->state == DHCP_BOUND) || (dhcp->state == DHCP_RENEWING)) { + /* just retry to renew - note that the rebind timer (t2) will + * eventually time-out if renew tries fail. */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_t1_timeout(): must renew\n")); + dhcp_renew(netif); + } +} + +/** + * The rebind period has timed out. + * + * @param netif the netif under DHCP control + */ +static void +dhcp_t2_timeout(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_t2_timeout()\n")); + if ((dhcp->state == DHCP_REQUESTING) || (dhcp->state == DHCP_BOUND) || (dhcp->state == DHCP_RENEWING)) { + /* just retry to rebind */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_t2_timeout(): must rebind\n")); + dhcp_rebind(netif); + } +} + +/** + * Handle a DHCP ACK packet + * + * @param netif the netif under DHCP control + */ +static void +dhcp_handle_ack(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + u8_t *option_ptr; + /* clear options we might not get from the ACK */ + dhcp->offered_sn_mask.addr = 0; + dhcp->offered_gw_addr.addr = 0; + dhcp->offered_bc_addr.addr = 0; + + /* lease time given? */ + option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_LEASE_TIME); + if (option_ptr != NULL) { + /* remember offered lease time */ + dhcp->offered_t0_lease = dhcp_get_option_long(option_ptr + 2); + } + /* renewal period given? */ + option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_T1); + if (option_ptr != NULL) { + /* remember given renewal period */ + dhcp->offered_t1_renew = dhcp_get_option_long(option_ptr + 2); + } else { + /* calculate safe periods for renewal */ + dhcp->offered_t1_renew = dhcp->offered_t0_lease / 2; + } + + /* renewal period given? */ + option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_T2); + if (option_ptr != NULL) { + /* remember given rebind period */ + dhcp->offered_t2_rebind = dhcp_get_option_long(option_ptr + 2); + } else { + /* calculate safe periods for rebinding */ + dhcp->offered_t2_rebind = dhcp->offered_t0_lease; + } + + /* (y)our internet address */ + ip_addr_set(&dhcp->offered_ip_addr, &dhcp->msg_in->yiaddr); + +/** + * Patch #1308 + * TODO: we must check if the file field is not overloaded by DHCP options! + */ +#if 0 + /* boot server address */ + ip_addr_set(&dhcp->offered_si_addr, &dhcp->msg_in->siaddr); + /* boot file name */ + if (dhcp->msg_in->file[0]) { + dhcp->boot_file_name = mem_malloc(strlen(dhcp->msg_in->file) + 1); + strcpy(dhcp->boot_file_name, dhcp->msg_in->file); + } +#endif + + /* subnet mask */ + option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_SUBNET_MASK); + /* subnet mask given? */ + if (option_ptr != NULL) { + dhcp->offered_sn_mask.addr = htonl(dhcp_get_option_long(&option_ptr[2])); + } + + /* gateway router */ + option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_ROUTER); + if (option_ptr != NULL) { + dhcp->offered_gw_addr.addr = htonl(dhcp_get_option_long(&option_ptr[2])); + } + + /* broadcast address */ + option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_BROADCAST); + if (option_ptr != NULL) { + dhcp->offered_bc_addr.addr = htonl(dhcp_get_option_long(&option_ptr[2])); + } + + /* DNS servers */ + option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_DNS_SERVER); + if (option_ptr != NULL) { + u8_t n; + dhcp->dns_count = dhcp_get_option_byte(&option_ptr[1]) / (u32_t)sizeof(struct ip_addr); + /* limit to at most DHCP_MAX_DNS DNS servers */ + if (dhcp->dns_count > DHCP_MAX_DNS) + dhcp->dns_count = DHCP_MAX_DNS; + for (n = 0; n < dhcp->dns_count; n++) { + dhcp->offered_dns_addr[n].addr = htonl(dhcp_get_option_long(&option_ptr[2 + n * 4])); +#if LWIP_DNS + dns_setserver( n, (struct ip_addr *)(&(dhcp->offered_dns_addr[n].addr))); +#endif /* LWIP_DNS */ + } +#if LWIP_DNS + dns_setserver( n, (struct ip_addr *)(&ip_addr_any)); +#endif /* LWIP_DNS */ + } +} + +/** + * Start DHCP negotiation for a network interface. + * + * If no DHCP client instance was attached to this interface, + * a new client is created first. If a DHCP client instance + * was already present, it restarts negotiation. + * + * @param netif The lwIP network interface + * @return lwIP error code + * - ERR_OK - No error + * - ERR_MEM - Out of memory + */ +err_t +dhcp_start(struct netif *netif) +{ + struct dhcp *dhcp; + err_t result = ERR_OK; + + LWIP_ERROR("netif != NULL", (netif != NULL), return ERR_ARG;); + dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); + /* Remove the flag that says this netif is handled by DHCP, + it is set when we succeeded starting. */ + netif->flags &= ~NETIF_FLAG_DHCP; + + /* check MTU of the netif */ + if (netif->mtu < DHCP_MAX_MSG_LEN_MIN_REQUIRED) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): Cannot use this netif with DHCP: MTU is too small\n")); + return ERR_MEM; + } + + /* no DHCP client attached yet? */ + if (dhcp == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): starting new DHCP client\n")); + dhcp = mem_malloc(sizeof(struct dhcp)); + if (dhcp == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): could not allocate dhcp\n")); + return ERR_MEM; + } + /* store this dhcp client in the netif */ + netif->dhcp = dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): allocated dhcp")); + /* already has DHCP client attached */ + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(): restarting DHCP configuration\n")); + if (dhcp->pcb != NULL) { + udp_remove(dhcp->pcb); + } + LWIP_ASSERT("pbuf p_out wasn't freed", dhcp->p_out == NULL); + LWIP_ASSERT("reply wasn't freed", dhcp->msg_in == NULL && + dhcp->options_in == NULL && dhcp->options_in_len == 0); + } + + /* clear data structure */ + memset(dhcp, 0, sizeof(struct dhcp)); + /* allocate UDP PCB */ + dhcp->pcb = udp_new(); + if (dhcp->pcb == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): could not obtain pcb\n")); + mem_free((void *)dhcp); + netif->dhcp = dhcp = NULL; + return ERR_MEM; + } +#if IP_SOF_BROADCAST + dhcp->pcb->so_options|=SOF_BROADCAST; +#endif /* IP_SOF_BROADCAST */ + /* set up local and remote port for the pcb */ + udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); + udp_connect(dhcp->pcb, IP_ADDR_ANY, DHCP_SERVER_PORT); + /* set up the recv callback and argument */ + udp_recv(dhcp->pcb, dhcp_recv, netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): starting DHCP configuration\n")); + /* (re)start the DHCP negotiation */ + result = dhcp_discover(netif); + if (result != ERR_OK) { + /* free resources allocated above */ + dhcp_stop(netif); + return ERR_MEM; + } + /* Set the flag that says this netif is handled by DHCP. */ + netif->flags |= NETIF_FLAG_DHCP; + return result; +} + +/** + * Inform a DHCP server of our manual configuration. + * + * This informs DHCP servers of our fixed IP address configuration + * by sending an INFORM message. It does not involve DHCP address + * configuration, it is just here to be nice to the network. + * + * @param netif The lwIP network interface + */ +void +dhcp_inform(struct netif *netif) +{ + struct dhcp *dhcp, *old_dhcp; + err_t result = ERR_OK; + dhcp = mem_malloc(sizeof(struct dhcp)); + if (dhcp == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_inform(): could not allocate dhcp\n")); + return; + } + memset(dhcp, 0, sizeof(struct dhcp)); + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_inform(): allocated dhcp\n")); + dhcp->pcb = udp_new(); + if (dhcp->pcb == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_inform(): could not obtain pcb")); + goto free_dhcp_and_return; + } + old_dhcp = netif->dhcp; + netif->dhcp = dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_inform(): created new udp pcb\n")); + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_INFORM); + + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, DHCP_MAX_MSG_LEN(netif)); + + dhcp_option_trailer(dhcp); + + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + +#if IP_SOF_BROADCAST + dhcp->pcb->so_options|=SOF_BROADCAST; +#endif /* IP_SOF_BROADCAST */ + udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_inform: INFORMING\n")); + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + dhcp_delete_request(netif); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_inform: could not allocate DHCP request\n")); + } + + udp_remove(dhcp->pcb); + dhcp->pcb = NULL; + netif->dhcp = old_dhcp; +free_dhcp_and_return: + mem_free((void *)dhcp); +} + +/** Handle a possible change in the network configuration. + * + * This enters the REBOOTING state to verify that the currently bound + * address is still valid. + */ +void +dhcp_network_changed(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + if (!dhcp) + return; + switch (dhcp->state) { + case DHCP_REBINDING: + case DHCP_RENEWING: + case DHCP_BOUND: + case DHCP_REBOOTING: + netif_set_down(netif); + dhcp->tries = 0; + dhcp_reboot(netif); + break; + case DHCP_OFF: + /* stay off */ + break; + default: + dhcp->tries = 0; + dhcp_discover(netif); + break; + } +} + +#if DHCP_DOES_ARP_CHECK +/** + * Match an ARP reply with the offered IP address. + * + * @param netif the network interface on which the reply was received + * @param addr The IP address we received a reply from + */ +void dhcp_arp_reply(struct netif *netif, struct ip_addr *addr) +{ + LWIP_ERROR("netif != NULL", (netif != NULL), return;); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_arp_reply()\n")); + /* is a DHCP client doing an ARP check? */ + if ((netif->dhcp != NULL) && (netif->dhcp->state == DHCP_CHECKING)) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_arp_reply(): CHECKING, arp reply for 0x%08"X32_F"\n", addr->addr)); + /* did a host respond with the address we + were offered by the DHCP server? */ + if (ip_addr_cmp(addr, &netif->dhcp->offered_ip_addr)) { + /* we will not accept the offered address */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING, + ("dhcp_arp_reply(): arp reply matched with offered address, declining\n")); + dhcp_decline(netif); + } + } +} + +/** + * Decline an offered lease. + * + * Tell the DHCP server we do not accept the offered address. + * One reason to decline the lease is when we find out the address + * is already in use by another host (through ARP). + * + * @param netif the netif under DHCP control + */ +static err_t +dhcp_decline(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result = ERR_OK; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline()\n")); + dhcp_set_state(dhcp, DHCP_BACKING_OFF); + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_DECLINE); + + dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); + dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); + + dhcp_option_trailer(dhcp); + /* resize pbuf to reflect true size of options */ + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + /* per section 4.4.4, broadcast DECLINE messages */ + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + dhcp_delete_request(netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_decline: BACKING OFF\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("dhcp_decline: could not allocate DHCP request\n")); + } + dhcp->tries++; + msecs = 10*1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} +#endif + + +/** + * Start the DHCP process, discover a DHCP server. + * + * @param netif the netif under DHCP control + */ +static err_t +dhcp_discover(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result = ERR_OK; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover()\n")); + ip_addr_set(&dhcp->offered_ip_addr, IP_ADDR_ANY); + dhcp_set_state(dhcp, DHCP_SELECTING); + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: making request\n")); + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_DISCOVER); + + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, DHCP_MAX_MSG_LEN(netif)); + + dhcp_option(dhcp, DHCP_OPTION_PARAMETER_REQUEST_LIST, 4/*num options*/); + dhcp_option_byte(dhcp, DHCP_OPTION_SUBNET_MASK); + dhcp_option_byte(dhcp, DHCP_OPTION_ROUTER); + dhcp_option_byte(dhcp, DHCP_OPTION_BROADCAST); + dhcp_option_byte(dhcp, DHCP_OPTION_DNS_SERVER); + + dhcp_option_trailer(dhcp); + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: realloc()ing\n")); + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: sendto(DISCOVER, IP_ADDR_BROADCAST, DHCP_SERVER_PORT)\n")); + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: deleting()ing\n")); + dhcp_delete_request(netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover: SELECTING\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_discover: could not allocate DHCP request\n")); + } + dhcp->tries++; +#if LWIP_DHCP_AUTOIP_COOP + if(dhcp->tries >= LWIP_DHCP_AUTOIP_COOP_TRIES && dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_OFF) { + dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_ON; + autoip_start(netif); + } +#endif /* LWIP_DHCP_AUTOIP_COOP */ + msecs = (dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} + + +/** + * Bind the interface to the offered IP address. + * + * @param netif network interface to bind to the offered address + */ +static void +dhcp_bind(struct netif *netif) +{ + u32_t timeout; + struct dhcp *dhcp; + struct ip_addr sn_mask, gw_addr; + LWIP_ERROR("dhcp_bind: netif != NULL", (netif != NULL), return;); + dhcp = netif->dhcp; + LWIP_ERROR("dhcp_bind: dhcp != NULL", (dhcp != NULL), return;); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); + + /* temporary DHCP lease? */ + if (dhcp->offered_t1_renew != 0xffffffffUL) { + /* set renewal period timer */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t1 renewal timer %"U32_F" secs\n", dhcp->offered_t1_renew)); + timeout = (dhcp->offered_t1_renew + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS; + if(timeout > 0xffff) { + timeout = 0xffff; + } + dhcp->t1_timeout = (u16_t)timeout; + if (dhcp->t1_timeout == 0) { + dhcp->t1_timeout = 1; + } + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t1_renew*1000)); + } + /* set renewal period timer */ + if (dhcp->offered_t2_rebind != 0xffffffffUL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t2 rebind timer %"U32_F" secs\n", dhcp->offered_t2_rebind)); + timeout = (dhcp->offered_t2_rebind + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS; + if(timeout > 0xffff) { + timeout = 0xffff; + } + dhcp->t2_timeout = (u16_t)timeout; + if (dhcp->t2_timeout == 0) { + dhcp->t2_timeout = 1; + } + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t2_rebind*1000)); + } + /* copy offered network mask */ + ip_addr_set(&sn_mask, &dhcp->offered_sn_mask); + + /* subnet mask not given? */ + /* TODO: this is not a valid check. what if the network mask is 0? */ + if (sn_mask.addr == 0) { + /* choose a safe subnet mask given the network class */ + u8_t first_octet = ip4_addr1(&sn_mask); + if (first_octet <= 127) { + sn_mask.addr = htonl(0xff000000); + } else if (first_octet >= 192) { + sn_mask.addr = htonl(0xffffff00); + } else { + sn_mask.addr = htonl(0xffff0000); + } + } + + ip_addr_set(&gw_addr, &dhcp->offered_gw_addr); + /* gateway address not given? */ + if (gw_addr.addr == 0) { + /* copy network address */ + gw_addr.addr = (dhcp->offered_ip_addr.addr & sn_mask.addr); + /* use first host address on network as gateway */ + gw_addr.addr |= htonl(0x00000001); + } + +#if LWIP_DHCP_AUTOIP_COOP + if(dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_ON) { + autoip_stop(netif); + dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF; + } +#endif /* LWIP_DHCP_AUTOIP_COOP */ + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): IP: 0x%08"X32_F"\n", dhcp->offered_ip_addr.addr)); + netif_set_ipaddr(netif, &dhcp->offered_ip_addr); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): SN: 0x%08"X32_F"\n", sn_mask.addr)); + netif_set_netmask(netif, &sn_mask); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): GW: 0x%08"X32_F"\n", gw_addr.addr)); + netif_set_gw(netif, &gw_addr); + /* bring the interface up */ + netif_set_up(netif); + /* netif is now bound to DHCP leased address */ + dhcp_set_state(dhcp, DHCP_BOUND); +} + +/** + * Renew an existing DHCP lease at the involved DHCP server. + * + * @param netif network interface which must renew its lease + */ +err_t +dhcp_renew(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; +#if LWIP_NETIF_HOSTNAME + const char *p; +#endif /* LWIP_NETIF_HOSTNAME */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_renew()\n")); + dhcp_set_state(dhcp, DHCP_RENEWING); + + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_REQUEST); + + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, DHCP_MAX_MSG_LEN(netif)); + +#if LWIP_NETIF_HOSTNAME + p = (const char*)netif->hostname; + if (p != NULL) { + dhcp_option(dhcp, DHCP_OPTION_HOSTNAME, strlen(p)); + while (*p) { + dhcp_option_byte(dhcp, *p++); + } + } +#endif /* LWIP_NETIF_HOSTNAME */ + +#if 0 + dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); + dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); +#endif + +#if 0 + dhcp_option(dhcp, DHCP_OPTION_SERVER_ID, 4); + dhcp_option_long(dhcp, ntohl(dhcp->server_ip_addr.addr)); +#endif + /* append DHCP message trailer */ + dhcp_option_trailer(dhcp); + + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + udp_sendto_if(dhcp->pcb, dhcp->p_out, &dhcp->server_ip_addr, DHCP_SERVER_PORT, netif); + dhcp_delete_request(netif); + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew: RENEWING\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_renew: could not allocate DHCP request\n")); + } + dhcp->tries++; + /* back-off on retries, but to a maximum of 20 seconds */ + msecs = dhcp->tries < 10 ? dhcp->tries * 2000 : 20 * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} + +/** + * Rebind with a DHCP server for an existing DHCP lease. + * + * @param netif network interface which must rebind with a DHCP server + */ +static err_t +dhcp_rebind(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; +#if LWIP_NETIF_HOSTNAME + const char *p; +#endif /* LWIP_NETIF_HOSTNAME */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind()\n")); + dhcp_set_state(dhcp, DHCP_REBINDING); + + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_REQUEST); + + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, DHCP_MAX_MSG_LEN(netif)); + +#if LWIP_NETIF_HOSTNAME + p = (const char*)netif->hostname; + if (p != NULL) { + dhcp_option(dhcp, DHCP_OPTION_HOSTNAME, strlen(p)); + while (*p) { + dhcp_option_byte(dhcp, *p++); + } + } +#endif /* LWIP_NETIF_HOSTNAME */ + +#if 0 + dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); + dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); + + dhcp_option(dhcp, DHCP_OPTION_SERVER_ID, 4); + dhcp_option_long(dhcp, ntohl(dhcp->server_ip_addr.addr)); +#endif + + dhcp_option_trailer(dhcp); + + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + /* broadcast to server */ + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + dhcp_delete_request(netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind: REBINDING\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_rebind: could not allocate DHCP request\n")); + } + dhcp->tries++; + msecs = dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} + +/** + * Enter REBOOTING state to verify an existing lease + * + * @param netif network interface which must reboot + */ +static err_t +dhcp_reboot(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot()\n")); + dhcp_set_state(dhcp, DHCP_REBOOTING); + + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_REQUEST); + + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, 576); + + dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); + dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); + + dhcp_option_trailer(dhcp); + + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + /* broadcast to server */ + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + dhcp_delete_request(netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot: REBOOTING\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_reboot: could not allocate DHCP request\n")); + } + dhcp->tries++; + msecs = dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} + + +/** + * Release a DHCP lease. + * + * @param netif network interface which must release its lease + */ +err_t +dhcp_release(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_release()\n")); + + /* idle DHCP client */ + dhcp_set_state(dhcp, DHCP_OFF); + /* clean old DHCP offer */ + dhcp->server_ip_addr.addr = 0; + dhcp->offered_ip_addr.addr = dhcp->offered_sn_mask.addr = 0; + dhcp->offered_gw_addr.addr = dhcp->offered_bc_addr.addr = 0; + dhcp->offered_t0_lease = dhcp->offered_t1_renew = dhcp->offered_t2_rebind = 0; + dhcp->dns_count = 0; + + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_RELEASE); + + dhcp_option_trailer(dhcp); + + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + udp_sendto_if(dhcp->pcb, dhcp->p_out, &dhcp->server_ip_addr, DHCP_SERVER_PORT, netif); + dhcp_delete_request(netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_release: RELEASED, DHCP_OFF\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_release: could not allocate DHCP request\n")); + } + dhcp->tries++; + msecs = dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_release(): set request timeout %"U16_F" msecs\n", msecs)); + /* bring the interface down */ + netif_set_down(netif); + /* remove IP address from interface */ + netif_set_ipaddr(netif, IP_ADDR_ANY); + netif_set_gw(netif, IP_ADDR_ANY); + netif_set_netmask(netif, IP_ADDR_ANY); + + /* TODO: netif_down(netif); */ + return result; +} + +/** + * Remove the DHCP client from the interface. + * + * @param netif The network interface to stop DHCP on + */ +void +dhcp_stop(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + LWIP_ERROR("dhcp_stop: netif != NULL", (netif != NULL), return;); + /* Remove the flag that says this netif is handled by DHCP. */ + netif->flags &= ~NETIF_FLAG_DHCP; + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_stop()\n")); + /* netif is DHCP configured? */ + if (dhcp != NULL) { +#if LWIP_DHCP_AUTOIP_COOP + if(dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_ON) { + autoip_stop(netif); + dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF; + } +#endif /* LWIP_DHCP_AUTOIP_COOP */ + + if (dhcp->pcb != NULL) { + udp_remove(dhcp->pcb); + dhcp->pcb = NULL; + } + LWIP_ASSERT("reply wasn't freed", dhcp->msg_in == NULL && + dhcp->options_in == NULL && dhcp->options_in_len == 0); + mem_free((void *)dhcp); + netif->dhcp = NULL; + } +} + +/* + * Set the DHCP state of a DHCP client. + * + * If the state changed, reset the number of tries. + * + * TODO: we might also want to reset the timeout here? + */ +static void +dhcp_set_state(struct dhcp *dhcp, u8_t new_state) +{ + if (new_state != dhcp->state) { + dhcp->state = new_state; + dhcp->tries = 0; + } +} + +/* + * Concatenate an option type and length field to the outgoing + * DHCP message. + * + */ +static void +dhcp_option(struct dhcp *dhcp, u8_t option_type, u8_t option_len) +{ + LWIP_ASSERT("dhcp_option: dhcp->options_out_len + 2 + option_len <= DHCP_OPTIONS_LEN", dhcp->options_out_len + 2U + option_len <= DHCP_OPTIONS_LEN); + dhcp->msg_out->options[dhcp->options_out_len++] = option_type; + dhcp->msg_out->options[dhcp->options_out_len++] = option_len; +} +/* + * Concatenate a single byte to the outgoing DHCP message. + * + */ +static void +dhcp_option_byte(struct dhcp *dhcp, u8_t value) +{ + LWIP_ASSERT("dhcp_option_byte: dhcp->options_out_len < DHCP_OPTIONS_LEN", dhcp->options_out_len < DHCP_OPTIONS_LEN); + dhcp->msg_out->options[dhcp->options_out_len++] = value; +} + +static void +dhcp_option_short(struct dhcp *dhcp, u16_t value) +{ + LWIP_ASSERT("dhcp_option_short: dhcp->options_out_len + 2 <= DHCP_OPTIONS_LEN", dhcp->options_out_len + 2U <= DHCP_OPTIONS_LEN); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t)((value & 0xff00U) >> 8); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t) (value & 0x00ffU); +} + +static void +dhcp_option_long(struct dhcp *dhcp, u32_t value) +{ + LWIP_ASSERT("dhcp_option_long: dhcp->options_out_len + 4 <= DHCP_OPTIONS_LEN", dhcp->options_out_len + 4U <= DHCP_OPTIONS_LEN); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t)((value & 0xff000000UL) >> 24); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t)((value & 0x00ff0000UL) >> 16); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t)((value & 0x0000ff00UL) >> 8); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t)((value & 0x000000ffUL)); +} + +/** + * Extract the DHCP message and the DHCP options. + * + * Extract the DHCP message and the DHCP options, each into a contiguous + * piece of memory. As a DHCP message is variable sized by its options, + * and also allows overriding some fields for options, the easy approach + * is to first unfold the options into a conitguous piece of memory, and + * use that further on. + * + */ +static err_t +dhcp_unfold_reply(struct dhcp *dhcp, struct pbuf *p) +{ + u16_t ret; + LWIP_ERROR("dhcp != NULL", (dhcp != NULL), return ERR_ARG;); + /* free any left-overs from previous unfolds */ + dhcp_free_reply(dhcp); + /* options present? */ + if (p->tot_len > (sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN)) { + dhcp->options_in_len = p->tot_len - (sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN); + dhcp->options_in = mem_malloc(dhcp->options_in_len); + if (dhcp->options_in == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("dhcp_unfold_reply(): could not allocate dhcp->options\n")); + dhcp->options_in_len = 0; + return ERR_MEM; + } + } + dhcp->msg_in = mem_malloc(sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN); + if (dhcp->msg_in == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("dhcp_unfold_reply(): could not allocate dhcp->msg_in\n")); + if (dhcp->options_in != NULL) { + mem_free(dhcp->options_in); + dhcp->options_in = NULL; + dhcp->options_in_len = 0; + } + return ERR_MEM; + } + + /** copy the DHCP message without options */ + ret = pbuf_copy_partial(p, dhcp->msg_in, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN, 0); + LWIP_ASSERT("ret == sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN", ret == sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_unfold_reply(): copied %"U16_F" bytes into dhcp->msg_in[]\n", + sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN)); + + if (dhcp->options_in != NULL) { + /** copy the DHCP options */ + ret = pbuf_copy_partial(p, dhcp->options_in, dhcp->options_in_len, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN); + LWIP_ASSERT("ret == dhcp->options_in_len", ret == dhcp->options_in_len); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_unfold_reply(): copied %"U16_F" bytes to dhcp->options_in[]\n", + dhcp->options_in_len)); + } + LWIP_UNUSED_ARG(ret); + return ERR_OK; +} + +/** + * Free the incoming DHCP message including contiguous copy of + * its DHCP options. + */ +static void dhcp_free_reply(struct dhcp *dhcp) +{ + if (dhcp->msg_in != NULL) { + mem_free((void *)dhcp->msg_in); + dhcp->msg_in = NULL; + } + if (dhcp->options_in) { + mem_free(dhcp->options_in); + dhcp->options_in = NULL; + dhcp->options_in_len = 0; + } + LWIP_DEBUGF(DHCP_DEBUG, ("dhcp_free_reply(): free'd\n")); +} + +/** + * If an incoming DHCP message is in response to us, then trigger the state machine + */ +static void dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port) +{ + struct netif *netif = (struct netif *)arg; + struct dhcp *dhcp = netif->dhcp; + struct dhcp_msg *reply_msg = (struct dhcp_msg *)p->payload; + u8_t *options_ptr; + u8_t msg_type; + u8_t i; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_recv(pbuf = %p) from DHCP server %"U16_F".%"U16_F".%"U16_F".%"U16_F" port %"U16_F"\n", (void*)p, + (u16_t)(ntohl(addr->addr) >> 24 & 0xff), (u16_t)(ntohl(addr->addr) >> 16 & 0xff), + (u16_t)(ntohl(addr->addr) >> 8 & 0xff), (u16_t)(ntohl(addr->addr) & 0xff), port)); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("pbuf->len = %"U16_F"\n", p->len)); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("pbuf->tot_len = %"U16_F"\n", p->tot_len)); + /* prevent warnings about unused arguments */ + LWIP_UNUSED_ARG(pcb); + LWIP_UNUSED_ARG(addr); + LWIP_UNUSED_ARG(port); + + LWIP_ASSERT("reply wasn't freed", dhcp->msg_in == NULL && + dhcp->options_in == NULL && dhcp->options_in_len == 0); + + if (p->len < DHCP_MIN_REPLY_LEN) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP reply message too short\n")); + goto free_pbuf_and_return; + } + + if (reply_msg->op != DHCP_BOOTREPLY) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("not a DHCP reply message, but type %"U16_F"\n", (u16_t)reply_msg->op)); + goto free_pbuf_and_return; + } + /* iterate through hardware address and match against DHCP message */ + for (i = 0; i < netif->hwaddr_len; i++) { + if (netif->hwaddr[i] != reply_msg->chaddr[i]) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, + ("netif->hwaddr[%"U16_F"]==%02"X16_F" != reply_msg->chaddr[%"U16_F"]==%02"X16_F"\n", + (u16_t)i, (u16_t)netif->hwaddr[i], (u16_t)i, (u16_t)reply_msg->chaddr[i])); + goto free_pbuf_and_return; + } + } + /* match transaction ID against what we expected */ + if (ntohl(reply_msg->xid) != dhcp->xid) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, + ("transaction id mismatch reply_msg->xid(%"X32_F")!=dhcp->xid(%"X32_F")\n",ntohl(reply_msg->xid),dhcp->xid)); + goto free_pbuf_and_return; + } + /* option fields could be unfold? */ + if (dhcp_unfold_reply(dhcp, p) != ERR_OK) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("problem unfolding DHCP message - too short on memory?\n")); + goto free_pbuf_and_return; + } + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("searching DHCP_OPTION_MESSAGE_TYPE\n")); + /* obtain pointer to DHCP message type */ + options_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_MESSAGE_TYPE); + if (options_ptr == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP_OPTION_MESSAGE_TYPE option not found\n")); + goto free_pbuf_and_return; + } + + /* read DHCP message type */ + msg_type = dhcp_get_option_byte(options_ptr + 2); + /* message type is DHCP ACK? */ + if (msg_type == DHCP_ACK) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_ACK received\n")); + /* in requesting state? */ + if (dhcp->state == DHCP_REQUESTING) { + dhcp_handle_ack(netif); + dhcp->request_timeout = 0; +#if DHCP_DOES_ARP_CHECK + /* check if the acknowledged lease address is already in use */ + dhcp_check(netif); +#else + /* bind interface to the acknowledged lease address */ + dhcp_bind(netif); +#endif + } + /* already bound to the given lease address? */ + else if ((dhcp->state == DHCP_REBOOTING) || (dhcp->state == DHCP_REBINDING) || (dhcp->state == DHCP_RENEWING)) { + dhcp->request_timeout = 0; + dhcp_bind(netif); + } + } + /* received a DHCP_NAK in appropriate state? */ + else if ((msg_type == DHCP_NAK) && + ((dhcp->state == DHCP_REBOOTING) || (dhcp->state == DHCP_REQUESTING) || + (dhcp->state == DHCP_REBINDING) || (dhcp->state == DHCP_RENEWING ))) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_NAK received\n")); + dhcp->request_timeout = 0; + dhcp_handle_nak(netif); + } + /* received a DHCP_OFFER in DHCP_SELECTING state? */ + else if ((msg_type == DHCP_OFFER) && (dhcp->state == DHCP_SELECTING)) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_OFFER received in DHCP_SELECTING state\n")); + dhcp->request_timeout = 0; + /* remember offered lease */ + dhcp_handle_offer(netif); + } +free_pbuf_and_return: + dhcp_free_reply(dhcp); + pbuf_free(p); +} + +/** + * Create a DHCP request, fill in common headers + * + * @param netif the netif under DHCP control + */ +static err_t +dhcp_create_request(struct netif *netif) +{ + struct dhcp *dhcp; + u16_t i; +#ifndef DHCP_GLOBAL_XID + /** default global transaction identifier starting value (easy to match + * with a packet analyser). We simply increment for each new request. + * Predefine DHCP_GLOBAL_XID to a better value or a function call to generate one + * at runtime, any supporting function prototypes can be defined in DHCP_GLOBAL_XID_HEADER */ + static u32_t xid = 0xABCD0000; +#else + static u32_t xid; + static u8_t xid_initialised = 0; + if (!xid_initialised) { + xid = DHCP_GLOBAL_XID; + xid_initialised = !xid_initialised; + } +#endif + LWIP_ERROR("dhcp_create_request: netif != NULL", (netif != NULL), return ERR_ARG;); + dhcp = netif->dhcp; + LWIP_ERROR("dhcp_create_request: dhcp != NULL", (dhcp != NULL), return ERR_VAL;); + LWIP_ASSERT("dhcp_create_request: dhcp->p_out == NULL", dhcp->p_out == NULL); + LWIP_ASSERT("dhcp_create_request: dhcp->msg_out == NULL", dhcp->msg_out == NULL); + dhcp->p_out = pbuf_alloc(PBUF_TRANSPORT, sizeof(struct dhcp_msg), PBUF_RAM); + if (dhcp->p_out == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("dhcp_create_request(): could not allocate pbuf\n")); + return ERR_MEM; + } + LWIP_ASSERT("dhcp_create_request: check that first pbuf can hold struct dhcp_msg", + (dhcp->p_out->len >= sizeof(struct dhcp_msg))); + + /* reuse transaction identifier in retransmissions */ + if (dhcp->tries==0) + xid++; + dhcp->xid = xid; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, + ("transaction id xid(%"X32_F")\n", xid)); + + dhcp->msg_out = (struct dhcp_msg *)dhcp->p_out->payload; + + dhcp->msg_out->op = DHCP_BOOTREQUEST; + /* TODO: make link layer independent */ + dhcp->msg_out->htype = DHCP_HTYPE_ETH; + /* TODO: make link layer independent */ + dhcp->msg_out->hlen = DHCP_HLEN_ETH; + dhcp->msg_out->hops = 0; + dhcp->msg_out->xid = htonl(dhcp->xid); + dhcp->msg_out->secs = 0; + dhcp->msg_out->flags = 0; + dhcp->msg_out->ciaddr.addr = 0; + if (dhcp->state==DHCP_BOUND || dhcp->state==DHCP_RENEWING || dhcp->state==DHCP_REBINDING) { + dhcp->msg_out->ciaddr.addr = netif->ip_addr.addr; + } + dhcp->msg_out->yiaddr.addr = 0; + dhcp->msg_out->siaddr.addr = 0; + dhcp->msg_out->giaddr.addr = 0; + for (i = 0; i < DHCP_CHADDR_LEN; i++) { + /* copy netif hardware address, pad with zeroes */ + dhcp->msg_out->chaddr[i] = (i < netif->hwaddr_len) ? netif->hwaddr[i] : 0/* pad byte*/; + } + for (i = 0; i < DHCP_SNAME_LEN; i++) { + dhcp->msg_out->sname[i] = 0; + } + for (i = 0; i < DHCP_FILE_LEN; i++) { + dhcp->msg_out->file[i] = 0; + } + dhcp->msg_out->cookie = htonl(0x63825363UL); + dhcp->options_out_len = 0; + /* fill options field with an incrementing array (for debugging purposes) */ + for (i = 0; i < DHCP_OPTIONS_LEN; i++) { + dhcp->msg_out->options[i] = (u8_t)i; /* for debugging only, no matter if truncated */ + } + return ERR_OK; +} + +/** + * Free previously allocated memory used to send a DHCP request. + * + * @param netif the netif under DHCP control + */ +static void +dhcp_delete_request(struct netif *netif) +{ + struct dhcp *dhcp; + LWIP_ERROR("dhcp_delete_request: netif != NULL", (netif != NULL), return;); + dhcp = netif->dhcp; + LWIP_ERROR("dhcp_delete_request: dhcp != NULL", (dhcp != NULL), return;); + LWIP_ASSERT("dhcp_delete_request: dhcp->p_out != NULL", dhcp->p_out != NULL); + LWIP_ASSERT("dhcp_delete_request: dhcp->msg_out != NULL", dhcp->msg_out != NULL); + if (dhcp->p_out != NULL) { + pbuf_free(dhcp->p_out); + } + dhcp->p_out = NULL; + dhcp->msg_out = NULL; +} + +/** + * Add a DHCP message trailer + * + * Adds the END option to the DHCP message, and if + * necessary, up to three padding bytes. + * + * @param dhcp DHCP state structure + */ +static void +dhcp_option_trailer(struct dhcp *dhcp) +{ + LWIP_ERROR("dhcp_option_trailer: dhcp != NULL", (dhcp != NULL), return;); + LWIP_ASSERT("dhcp_option_trailer: dhcp->msg_out != NULL\n", dhcp->msg_out != NULL); + LWIP_ASSERT("dhcp_option_trailer: dhcp->options_out_len < DHCP_OPTIONS_LEN\n", dhcp->options_out_len < DHCP_OPTIONS_LEN); + dhcp->msg_out->options[dhcp->options_out_len++] = DHCP_OPTION_END; + /* packet is too small, or not 4 byte aligned? */ + while ((dhcp->options_out_len < DHCP_MIN_OPTIONS_LEN) || (dhcp->options_out_len & 3)) { + /* LWIP_DEBUGF(DHCP_DEBUG,("dhcp_option_trailer:dhcp->options_out_len=%"U16_F", DHCP_OPTIONS_LEN=%"U16_F, dhcp->options_out_len, DHCP_OPTIONS_LEN)); */ + LWIP_ASSERT("dhcp_option_trailer: dhcp->options_out_len < DHCP_OPTIONS_LEN\n", dhcp->options_out_len < DHCP_OPTIONS_LEN); + /* add a fill/padding byte */ + dhcp->msg_out->options[dhcp->options_out_len++] = 0; + } +} + +/** + * Find the offset of a DHCP option inside the DHCP message. + * + * @param dhcp DHCP client + * @param option_type + * + * @return a byte offset into the UDP message where the option was found, or + * zero if the given option was not found. + */ +static u8_t *dhcp_get_option_ptr(struct dhcp *dhcp, u8_t option_type) +{ + u8_t overload = DHCP_OVERLOAD_NONE; + + /* options available? */ + if ((dhcp->options_in != NULL) && (dhcp->options_in_len > 0)) { + /* start with options field */ + u8_t *options = (u8_t *)dhcp->options_in; + u16_t offset = 0; + /* at least 1 byte to read and no end marker, then at least 3 bytes to read? */ + while ((offset < dhcp->options_in_len) && (options[offset] != DHCP_OPTION_END)) { + /* LWIP_DEBUGF(DHCP_DEBUG, ("msg_offset=%"U16_F", q->len=%"U16_F, msg_offset, q->len)); */ + /* are the sname and/or file field overloaded with options? */ + if (options[offset] == DHCP_OPTION_OVERLOAD) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded message detected\n")); + /* skip option type and length */ + offset += 2; + overload = options[offset++]; + } + /* requested option found */ + else if (options[offset] == option_type) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("option found at offset %"U16_F" in options\n", offset)); + return &options[offset]; + /* skip option */ + } else { + LWIP_DEBUGF(DHCP_DEBUG, ("skipping option %"U16_F" in options\n", options[offset])); + /* skip option type */ + offset++; + /* skip option length, and then length bytes */ + offset += 1 + options[offset]; + } + } + /* is this an overloaded message? */ + if (overload != DHCP_OVERLOAD_NONE) { + u16_t field_len; + if (overload == DHCP_OVERLOAD_FILE) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded file field\n")); + options = (u8_t *)&dhcp->msg_in->file; + field_len = DHCP_FILE_LEN; + } else if (overload == DHCP_OVERLOAD_SNAME) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname field\n")); + options = (u8_t *)&dhcp->msg_in->sname; + field_len = DHCP_SNAME_LEN; + /* TODO: check if else if () is necessary */ + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname and file field\n")); + options = (u8_t *)&dhcp->msg_in->sname; + field_len = DHCP_FILE_LEN + DHCP_SNAME_LEN; + } + offset = 0; + + /* at least 1 byte to read and no end marker */ + while ((offset < field_len) && (options[offset] != DHCP_OPTION_END)) { + if (options[offset] == option_type) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("option found at offset=%"U16_F"\n", offset)); + return &options[offset]; + /* skip option */ + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("skipping option %"U16_F"\n", options[offset])); + /* skip option type */ + offset++; + offset += 1 + options[offset]; + } + } + } + } + return NULL; +} + +/** + * Return the byte of DHCP option data. + * + * @param client DHCP client. + * @param ptr pointer obtained by dhcp_get_option_ptr(). + * + * @return byte value at the given address. + */ +static u8_t +dhcp_get_option_byte(u8_t *ptr) +{ + LWIP_DEBUGF(DHCP_DEBUG, ("option byte value=%"U16_F"\n", (u16_t)(*ptr))); + return *ptr; +} + +#if 0 /* currently unused */ +/** + * Return the 16-bit value of DHCP option data. + * + * @param client DHCP client. + * @param ptr pointer obtained by dhcp_get_option_ptr(). + * + * @return byte value at the given address. + */ +static u16_t +dhcp_get_option_short(u8_t *ptr) +{ + u16_t value; + value = *ptr++ << 8; + value |= *ptr; + LWIP_DEBUGF(DHCP_DEBUG, ("option short value=%"U16_F"\n", value)); + return value; +} +#endif + +/** + * Return the 32-bit value of DHCP option data. + * + * @param client DHCP client. + * @param ptr pointer obtained by dhcp_get_option_ptr(). + * + * @return byte value at the given address. + */ +static u32_t dhcp_get_option_long(u8_t *ptr) +{ + u32_t value; + value = (u32_t)(*ptr++) << 24; + value |= (u32_t)(*ptr++) << 16; + value |= (u32_t)(*ptr++) << 8; + value |= (u32_t)(*ptr++); + LWIP_DEBUGF(DHCP_DEBUG, ("option long value=%"U32_F"\n", value)); + return value; +} + +#endif /* LWIP_DHCP */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/dns.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/dns.c new file mode 100644 index 0000000..62ccf63 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/dns.c @@ -0,0 +1,982 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * DNS - host name to IP address resolver. + * + */ + +/** + + * This file implements a DNS host name to IP address resolver. + + * Port to lwIP from uIP + * by Jim Pettinato April 2007 + + * uIP version Copyright (c) 2002-2003, Adam Dunkels. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote + * products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * DNS.C + * + * The lwIP DNS resolver functions are used to lookup a host name and + * map it to a numerical IP address. It maintains a list of resolved + * hostnames that can be queried with the dns_lookup() function. + * New hostnames can be resolved using the dns_query() function. + * + * The lwIP version of the resolver also adds a non-blocking version of + * gethostbyname() that will work with a raw API application. This function + * checks for an IP address string first and converts it if it is valid. + * gethostbyname() then does a dns_lookup() to see if the name is + * already in the table. If so, the IP is returned. If not, a query is + * issued and the function returns with a ERR_INPROGRESS status. The app + * using the dns client must then go into a waiting state. + * + * Once a hostname has been resolved (or found to be non-existent), + * the resolver code calls a specified callback function (which + * must be implemented by the module that uses the resolver). + */ + +/*----------------------------------------------------------------------------- + * RFC 1035 - Domain names - implementation and specification + * RFC 2181 - Clarifications to the DNS Specification + *----------------------------------------------------------------------------*/ + +/** @todo: define good default values (rfc compliance) */ +/** @todo: improve answer parsing, more checkings... */ +/** @todo: check RFC1035 - 7.3. Processing responses */ + +/*----------------------------------------------------------------------------- + * Includes + *----------------------------------------------------------------------------*/ + +#include "lwip/opt.h" + +#if LWIP_DNS /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/udp.h" +#include "lwip/mem.h" +#include "lwip/dns.h" + +#include + +/** DNS server IP address */ +#ifndef DNS_SERVER_ADDRESS +#define DNS_SERVER_ADDRESS inet_addr("208.67.222.222") /* resolver1.opendns.com */ +#endif + +/** DNS server port address */ +#ifndef DNS_SERVER_PORT +#define DNS_SERVER_PORT 53 +#endif + +/** DNS maximum number of retries when asking for a name, before "timeout". */ +#ifndef DNS_MAX_RETRIES +#define DNS_MAX_RETRIES 4 +#endif + +/** DNS resource record max. TTL (one week as default) */ +#ifndef DNS_MAX_TTL +#define DNS_MAX_TTL 604800 +#endif + +/* DNS protocol flags */ +#define DNS_FLAG1_RESPONSE 0x80 +#define DNS_FLAG1_OPCODE_STATUS 0x10 +#define DNS_FLAG1_OPCODE_INVERSE 0x08 +#define DNS_FLAG1_OPCODE_STANDARD 0x00 +#define DNS_FLAG1_AUTHORATIVE 0x04 +#define DNS_FLAG1_TRUNC 0x02 +#define DNS_FLAG1_RD 0x01 +#define DNS_FLAG2_RA 0x80 +#define DNS_FLAG2_ERR_MASK 0x0f +#define DNS_FLAG2_ERR_NONE 0x00 +#define DNS_FLAG2_ERR_NAME 0x03 + +/* DNS protocol states */ +#define DNS_STATE_UNUSED 0 +#define DNS_STATE_NEW 1 +#define DNS_STATE_ASKING 2 +#define DNS_STATE_DONE 3 + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +/** DNS message header */ +struct dns_hdr { + PACK_STRUCT_FIELD(u16_t id); + PACK_STRUCT_FIELD(u8_t flags1); + PACK_STRUCT_FIELD(u8_t flags2); + PACK_STRUCT_FIELD(u16_t numquestions); + PACK_STRUCT_FIELD(u16_t numanswers); + PACK_STRUCT_FIELD(u16_t numauthrr); + PACK_STRUCT_FIELD(u16_t numextrarr); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif +#define SIZEOF_DNS_HDR 12 + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +/** DNS query message structure */ +struct dns_query { + /* DNS query record starts with either a domain name or a pointer + to a name already present somewhere in the packet. */ + PACK_STRUCT_FIELD(u16_t type); + PACK_STRUCT_FIELD(u16_t class); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif +#define SIZEOF_DNS_QUERY 4 + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +/** DNS answer message structure */ +struct dns_answer { + /* DNS answer record starts with either a domain name or a pointer + to a name already present somewhere in the packet. */ + PACK_STRUCT_FIELD(u16_t type); + PACK_STRUCT_FIELD(u16_t class); + PACK_STRUCT_FIELD(u32_t ttl); + PACK_STRUCT_FIELD(u16_t len); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif +#define SIZEOF_DNS_ANSWER 10 + +/** DNS table entry */ +struct dns_table_entry { + u8_t state; + u8_t numdns; + u8_t tmr; + u8_t retries; + u8_t seqno; + u8_t err; + u32_t ttl; + char name[DNS_MAX_NAME_LENGTH]; + struct ip_addr ipaddr; + /* pointer to callback on DNS query done */ + dns_found_callback found; + void *arg; +}; + +#if DNS_LOCAL_HOSTLIST +/** struct used for local host-list */ +struct local_hostlist_entry { + /** static hostname */ + const char *name; + /** static host address in network byteorder */ + u32_t addr; + struct local_hostlist_entry *next; +}; + +#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC +/** Local host-list. For hostnames in this list, no + * external name resolution is performed */ +static struct local_hostlist_entry *local_hostlist_dynamic; +#else /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + +/** Defining this allows the local_hostlist_static to be placed in a different + * linker section (e.g. FLASH) */ +#ifndef DNS_LOCAL_HOSTLIST_STORAGE_PRE +#define DNS_LOCAL_HOSTLIST_STORAGE_PRE static +#endif /* DNS_LOCAL_HOSTLIST_STORAGE_PRE */ +/** Defining this allows the local_hostlist_static to be placed in a different + * linker section (e.g. FLASH) */ +#ifndef DNS_LOCAL_HOSTLIST_STORAGE_POST +#define DNS_LOCAL_HOSTLIST_STORAGE_POST +#endif /* DNS_LOCAL_HOSTLIST_STORAGE_POST */ +DNS_LOCAL_HOSTLIST_STORAGE_PRE struct local_hostlist_entry local_hostlist_static[] + DNS_LOCAL_HOSTLIST_STORAGE_POST = DNS_LOCAL_HOSTLIST_INIT; + +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + +static void dns_init_local(); +#endif /* DNS_LOCAL_HOSTLIST */ + + +/* forward declarations */ +static void dns_recv(void *s, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port); +static void dns_check_entries(void); + +/*----------------------------------------------------------------------------- + * Globales + *----------------------------------------------------------------------------*/ + +/* DNS variables */ +static struct udp_pcb *dns_pcb; +static u8_t dns_seqno; +static struct dns_table_entry dns_table[DNS_TABLE_SIZE]; +static struct ip_addr dns_servers[DNS_MAX_SERVERS]; + +#if (DNS_USES_STATIC_BUF == 1) +static u8_t dns_payload[DNS_MSG_SIZE]; +#endif /* (DNS_USES_STATIC_BUF == 1) */ + +/** + * Initialize the resolver: set up the UDP pcb and configure the default server + * (DNS_SERVER_ADDRESS). + */ +void +dns_init() +{ + struct ip_addr dnsserver; + + /* initialize default DNS server address */ + dnsserver.addr = DNS_SERVER_ADDRESS; + + LWIP_DEBUGF(DNS_DEBUG, ("dns_init: initializing\n")); + + /* if dns client not yet initialized... */ + if (dns_pcb == NULL) { + dns_pcb = udp_new(); + + if (dns_pcb != NULL) { + /* initialize DNS table not needed (initialized to zero since it is a + * global variable) */ + LWIP_ASSERT("For implicit initialization to work, DNS_STATE_UNUSED needs to be 0", + DNS_STATE_UNUSED == 0); + + /* initialize DNS client */ + udp_bind(dns_pcb, IP_ADDR_ANY, 0); + udp_recv(dns_pcb, dns_recv, NULL); + + /* initialize default DNS primary server */ + dns_setserver(0, &dnsserver); + } + } +#if DNS_LOCAL_HOSTLIST + dns_init_local(); +#endif +} + +/** + * Initialize one of the DNS servers. + * + * @param numdns the index of the DNS server to set must be < DNS_MAX_SERVERS + * @param dnsserver IP address of the DNS server to set + */ +void +dns_setserver(u8_t numdns, struct ip_addr *dnsserver) +{ + if ((numdns < DNS_MAX_SERVERS) && (dns_pcb != NULL) && + (dnsserver != NULL) && (dnsserver->addr !=0 )) { + dns_servers[numdns] = (*dnsserver); + } +} + +/** + * Obtain one of the currently configured DNS server. + * + * @param numdns the index of the DNS server + * @return IP address of the indexed DNS server or "ip_addr_any" if the DNS + * server has not been configured. + */ +struct ip_addr +dns_getserver(u8_t numdns) +{ + if (numdns < DNS_MAX_SERVERS) { + return dns_servers[numdns]; + } else { + return *IP_ADDR_ANY; + } +} + +/** + * The DNS resolver client timer - handle retries and timeouts and should + * be called every DNS_TMR_INTERVAL milliseconds (every second by default). + */ +void +dns_tmr(void) +{ + if (dns_pcb != NULL) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_tmr: dns_check_entries\n")); + dns_check_entries(); + } +} + +#if DNS_LOCAL_HOSTLIST +static void +dns_init_local() +{ +#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC && defined(DNS_LOCAL_HOSTLIST_INIT) + int i; + struct local_hostlist_entry *entry; + /* Dynamic: copy entries from DNS_LOCAL_HOSTLIST_INIT to list */ + struct local_hostlist_entry local_hostlist_init[] = DNS_LOCAL_HOSTLIST_INIT; + for (i = 0; i < sizeof(local_hostlist_init) / sizeof(struct local_hostlist_entry); i++) { + entry = mem_malloc(sizeof(struct local_hostlist_entry)); + LWIP_ASSERT("mem-error in dns_init_local", entry != NULL); + if (entry != NULL) { + struct local_hostlist_entry *init_entry = &local_hostlist_init[i]; + entry->name = init_entry->name; + entry->addr = init_entry->addr; + entry->next = local_hostlist_dynamic; + local_hostlist_dynamic = entry; + } + } +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC && defined(DNS_LOCAL_HOSTLIST_INIT) */ +} + +/** + * Scans the local host-list for a hostname. + * + * @param hostname Hostname to look for in the local host-list + * @return The first IP address for the hostname in the local host-list or + * INADDR_NONE if not found. + */ +static u32_t +dns_lookup_local(const char *hostname) +{ +#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC + struct local_hostlist_entry *entry = local_hostlist_dynamic; + while(entry != NULL) { + if(strcmp(entry->name, hostname) == 0) { + return entry->addr; + } + entry = entry->next; + } +#else /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + int i; + for (i = 0; i < sizeof(local_hostlist_static) / sizeof(struct local_hostlist_entry); i++) { + if(strcmp(local_hostlist_static[i].name, hostname) == 0) { + return local_hostlist_static[i].addr; + } + } +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + return INADDR_NONE; +} + +#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC +/** Remove all entries from the local host-list for a specific hostname + * and/or IP addess + * + * @param hostname hostname for which entries shall be removed from the local + * host-list + * @param addr address for which entries shall be removed from the local host-list + * @return the number of removed entries + */ +int +dns_local_removehost(const char *hostname, const struct ip_addr *addr) +{ + int removed = 0; + struct local_hostlist_entry *entry = local_hostlist_dynamic; + struct local_hostlist_entry *last_entry = NULL; + while (entry != NULL) { + if (((hostname == NULL) || !strcmp(entry->name, hostname)) && + ((addr == NULL) || (entry->addr == addr->addr))) { + struct local_hostlist_entry *free_entry; + if (last_entry != NULL) { + last_entry->next = entry->next; + } else { + local_hostlist_dynamic = entry->next; + } + free_entry = entry; + entry = entry->next; + mem_free(free_entry); + removed++; + } else { + last_entry = entry; + entry = entry->next; + } + } + return removed; +} + +/** + * Add a hostname/IP address pair to the local host-list. + * Duplicates are not checked. + * + * @param hostname hostname of the new entry + * @param addr IP address of the new entry + * @return ERR_OK if succeeded or ERR_MEM on memory error + */ +err_t +dns_local_addhost(const char *hostname, const struct ip_addr *addr) +{ + struct local_hostlist_entry *entry; + entry = mem_malloc(sizeof(struct local_hostlist_entry)); + if (entry == NULL) { + return ERR_MEM; + } + entry->name = hostname; + entry->addr = addr->addr; + entry->next = local_hostlist_dynamic; + local_hostlist_dynamic = entry; + return ERR_OK; +} +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC*/ +#endif /* DNS_LOCAL_HOSTLIST */ + +/** + * Look up a hostname in the array of known hostnames. + * + * @note This function only looks in the internal array of known + * hostnames, it does not send out a query for the hostname if none + * was found. The function dns_enqueue() can be used to send a query + * for a hostname. + * + * @param name the hostname to look up + * @return the hostname's IP address, as u32_t (instead of struct ip_addr to + * better check for failure: != INADDR_NONE) or INADDR_NONE if the hostname + * was not found in the cached dns_table. + */ +static u32_t +dns_lookup(const char *name) +{ + u8_t i; +#if DNS_LOCAL_HOSTLIST || defined(DNS_LOOKUP_LOCAL_EXTERN) + u32_t addr; +#endif /* DNS_LOCAL_HOSTLIST || defined(DNS_LOOKUP_LOCAL_EXTERN) */ +#if DNS_LOCAL_HOSTLIST + if ((addr = dns_lookup_local(name)) != INADDR_NONE) { + return addr; + } +#endif /* DNS_LOCAL_HOSTLIST */ +#ifdef DNS_LOOKUP_LOCAL_EXTERN + if((addr = DNS_LOOKUP_LOCAL_EXTERN(name)) != INADDR_NONE) { + return addr; + } +#endif /* DNS_LOOKUP_LOCAL_EXTERN */ + + /* Walk through name list, return entry if found. If not, return NULL. */ + for (i = 0; i < DNS_TABLE_SIZE; ++i) { + if ((dns_table[i].state == DNS_STATE_DONE) && + (strcmp(name, dns_table[i].name) == 0)) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_lookup: \"%s\": found = ", name)); + ip_addr_debug_print(DNS_DEBUG, &(dns_table[i].ipaddr)); + LWIP_DEBUGF(DNS_DEBUG, ("\n")); + return dns_table[i].ipaddr.addr; + } + } + + return INADDR_NONE; +} + +#if DNS_DOES_NAME_CHECK +/** + * Compare the "dotted" name "query" with the encoded name "response" + * to make sure an answer from the DNS server matches the current dns_table + * entry (otherwise, answers might arrive late for hostname not on the list + * any more). + * + * @param query hostname (not encoded) from the dns_table + * @param response encoded hostname in the DNS response + * @return 0: names equal; 1: names differ + */ +static u8_t +dns_compare_name(unsigned char *query, unsigned char *response) +{ + unsigned char n; + + do { + n = *response++; + /** @see RFC 1035 - 4.1.4. Message compression */ + if ((n & 0xc0) == 0xc0) { + /* Compressed name */ + break; + } else { + /* Not compressed name */ + while (n > 0) { + if ((*query) != (*response)) { + return 1; + } + ++response; + ++query; + --n; + }; + ++query; + } + } while (*response != 0); + + return 0; +} +#endif /* DNS_DOES_NAME_CHECK */ + +/** + * Walk through a compact encoded DNS name and return the end of the name. + * + * @param query encoded DNS name in the DNS server response + * @return end of the name + */ +static unsigned char * +dns_parse_name(unsigned char *query) +{ + unsigned char n; + + do { + n = *query++; + /** @see RFC 1035 - 4.1.4. Message compression */ + if ((n & 0xc0) == 0xc0) { + /* Compressed name */ + break; + } else { + /* Not compressed name */ + while (n > 0) { + ++query; + --n; + }; + } + } while (*query != 0); + + return query + 1; +} + +/** + * Send a DNS query packet. + * + * @param numdns index of the DNS server in the dns_servers table + * @param name hostname to query + * @param id index of the hostname in dns_table, used as transaction ID in the + * DNS query packet + * @return ERR_OK if packet is sent; an err_t indicating the problem otherwise + */ +static err_t +dns_send(u8_t numdns, const char* name, u8_t id) +{ + err_t err; + struct dns_hdr *hdr; + struct dns_query qry; + struct pbuf *p; + char *query, *nptr; + const char *pHostname; + u8_t n; + + LWIP_DEBUGF(DNS_DEBUG, ("dns_send: dns_servers[%"U16_F"] \"%s\": request\n", + (u16_t)(numdns), name)); + LWIP_ASSERT("dns server out of array", numdns < DNS_MAX_SERVERS); + LWIP_ASSERT("dns server has no IP address set", dns_servers[numdns].addr != 0); + + /* if here, we have either a new query or a retry on a previous query to process */ + p = pbuf_alloc(PBUF_TRANSPORT, SIZEOF_DNS_HDR + DNS_MAX_NAME_LENGTH + + SIZEOF_DNS_QUERY, PBUF_RAM); + if (p != NULL) { + LWIP_ASSERT("pbuf must be in one piece", p->next == NULL); + /* fill dns header */ + hdr = (struct dns_hdr*)p->payload; + memset(hdr, 0, SIZEOF_DNS_HDR); + hdr->id = htons(id); + hdr->flags1 = DNS_FLAG1_RD; + hdr->numquestions = htons(1); + query = (char*)hdr + SIZEOF_DNS_HDR; + pHostname = name; + --pHostname; + + /* convert hostname into suitable query format. */ + do { + ++pHostname; + nptr = query; + ++query; + for(n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while(*pHostname != 0); + *query++='\0'; + + /* fill dns query */ + qry.type = htons(DNS_RRTYPE_A); + qry.class = htons(DNS_RRCLASS_IN); + MEMCPY( query, &qry, SIZEOF_DNS_QUERY); + + /* resize pbuf to the exact dns query */ + pbuf_realloc(p, (query + SIZEOF_DNS_QUERY) - ((char*)(p->payload))); + + /* connect to the server for faster receiving */ + udp_connect(dns_pcb, &dns_servers[numdns], DNS_SERVER_PORT); + /* send dns packet */ + err = udp_sendto(dns_pcb, p, &dns_servers[numdns], DNS_SERVER_PORT); + + /* free pbuf */ + pbuf_free(p); + } else { + err = ERR_MEM; + } + + return err; +} + +/** + * dns_check_entry() - see if pEntry has not yet been queried and, if so, sends out a query. + * Check an entry in the dns_table: + * - send out query for new entries + * - retry old pending entries on timeout (also with different servers) + * - remove completed entries from the table if their TTL has expired + * + * @param i index of the dns_table entry to check + */ +static void +dns_check_entry(u8_t i) +{ + struct dns_table_entry *pEntry = &dns_table[i]; + + LWIP_ASSERT("array index out of bounds", i < DNS_TABLE_SIZE); + + switch(pEntry->state) { + + case DNS_STATE_NEW: { + /* initialize new entry */ + pEntry->state = DNS_STATE_ASKING; + pEntry->numdns = 0; + pEntry->tmr = 1; + pEntry->retries = 0; + + /* send DNS packet for this entry */ + dns_send(pEntry->numdns, pEntry->name, i); + break; + } + + case DNS_STATE_ASKING: { + if (--pEntry->tmr == 0) { + if (++pEntry->retries == DNS_MAX_RETRIES) { + if ((pEntry->numdns+1numdns+1].addr!=0)) { + /* change of server */ + pEntry->numdns++; + pEntry->tmr = 1; + pEntry->retries = 0; + break; + } else { + LWIP_DEBUGF(DNS_DEBUG, ("dns_check_entry: \"%s\": timeout\n", pEntry->name)); + /* call specified callback function if provided */ + if (pEntry->found) + (*pEntry->found)(pEntry->name, NULL, pEntry->arg); + /* flush this entry */ + pEntry->state = DNS_STATE_UNUSED; + pEntry->found = NULL; + break; + } + } + + /* wait longer for the next retry */ + pEntry->tmr = pEntry->retries; + + /* send DNS packet for this entry */ + dns_send(pEntry->numdns, pEntry->name, i); + } + break; + } + + case DNS_STATE_DONE: { + /* if the time to live is nul */ + if (--pEntry->ttl == 0) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_check_entry: \"%s\": flush\n", pEntry->name)); + /* flush this entry */ + pEntry->state = DNS_STATE_UNUSED; + pEntry->found = NULL; + } + break; + } + case DNS_STATE_UNUSED: + /* nothing to do */ + break; + default: + LWIP_ASSERT("unknown dns_table entry state:", 0); + break; + } +} + +/** + * Call dns_check_entry for each entry in dns_table - check all entries. + */ +static void +dns_check_entries(void) +{ + u8_t i; + + for (i = 0; i < DNS_TABLE_SIZE; ++i) { + dns_check_entry(i); + } +} + +/** + * Receive input function for DNS response packets arriving for the dns UDP pcb. + * + * @params see udp.h + */ +static void +dns_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port) +{ + u8_t i; + char *pHostname; + struct dns_hdr *hdr; + struct dns_answer ans; + struct dns_table_entry *pEntry; + u8_t nquestions, nanswers; +#if (DNS_USES_STATIC_BUF == 0) + u8_t dns_payload[DNS_MSG_SIZE]; +#endif /* (DNS_USES_STATIC_BUF == 0) */ +#if (DNS_USES_STATIC_BUF == 2) + u8_t* dns_payload; +#endif /* (DNS_USES_STATIC_BUF == 2) */ + + LWIP_UNUSED_ARG(arg); + LWIP_UNUSED_ARG(pcb); + LWIP_UNUSED_ARG(addr); + LWIP_UNUSED_ARG(port); + + /* is the dns message too big ? */ + if (p->tot_len > DNS_MSG_SIZE) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: pbuf too big\n")); + /* free pbuf and return */ + goto memerr1; + } + + /* is the dns message big enough ? */ + if (p->tot_len < (SIZEOF_DNS_HDR + SIZEOF_DNS_QUERY + SIZEOF_DNS_ANSWER)) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: pbuf too small\n")); + /* free pbuf and return */ + goto memerr1; + } + +#if (DNS_USES_STATIC_BUF == 2) + dns_payload = mem_malloc(p->tot_len); + if (dns_payload == NULL) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: mem_malloc error\n")); + /* free pbuf and return */ + goto memerr1; + } +#endif /* (DNS_USES_STATIC_BUF == 2) */ + + /* copy dns payload inside static buffer for processing */ + if (pbuf_copy_partial(p, dns_payload, p->tot_len, 0) == p->tot_len) { + /* The ID in the DNS header should be our entry into the name table. */ + hdr = (struct dns_hdr*)dns_payload; + i = htons(hdr->id); + if (i < DNS_TABLE_SIZE) { + pEntry = &dns_table[i]; + if(pEntry->state == DNS_STATE_ASKING) { + /* This entry is now completed. */ + pEntry->state = DNS_STATE_DONE; + pEntry->err = hdr->flags2 & DNS_FLAG2_ERR_MASK; + + /* We only care about the question(s) and the answers. The authrr + and the extrarr are simply discarded. */ + nquestions = htons(hdr->numquestions); + nanswers = htons(hdr->numanswers); + + /* Check for error. If so, call callback to inform. */ + if (((hdr->flags1 & DNS_FLAG1_RESPONSE) == 0) || (pEntry->err != 0) || (nquestions != 1)) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": error in flags\n", pEntry->name)); + /* call callback to indicate error, clean up memory and return */ + goto responseerr; + } + +#if DNS_DOES_NAME_CHECK + /* Check if the name in the "question" part match with the name in the entry. */ + if (dns_compare_name((unsigned char *)(pEntry->name), (unsigned char *)dns_payload + SIZEOF_DNS_HDR) != 0) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": response not match to query\n", pEntry->name)); + /* call callback to indicate error, clean up memory and return */ + goto responseerr; + } +#endif /* DNS_DOES_NAME_CHECK */ + + /* Skip the name in the "question" part */ + pHostname = (char *) dns_parse_name((unsigned char *)dns_payload + SIZEOF_DNS_HDR) + SIZEOF_DNS_QUERY; + + while(nanswers > 0) { + /* skip answer resource record's host name */ + pHostname = (char *) dns_parse_name((unsigned char *)pHostname); + + /* Check for IP address type and Internet class. Others are discarded. */ + MEMCPY(&ans, pHostname, SIZEOF_DNS_ANSWER); + if((ntohs(ans.type) == DNS_RRTYPE_A) && (ntohs(ans.class) == DNS_RRCLASS_IN) && (ntohs(ans.len) == sizeof(struct ip_addr)) ) { + /* read the answer resource record's TTL, and maximize it if needed */ + pEntry->ttl = ntohl(ans.ttl); + if (pEntry->ttl > DNS_MAX_TTL) { + pEntry->ttl = DNS_MAX_TTL; + } + /* read the IP address after answer resource record's header */ + MEMCPY( &(pEntry->ipaddr), (pHostname+SIZEOF_DNS_ANSWER), sizeof(struct ip_addr)); + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": response = ", pEntry->name)); + ip_addr_debug_print(DNS_DEBUG, (&(pEntry->ipaddr))); + LWIP_DEBUGF(DNS_DEBUG, ("\n")); + /* call specified callback function if provided */ + if (pEntry->found) { + (*pEntry->found)(pEntry->name, &pEntry->ipaddr, pEntry->arg); + } + /* deallocate memory and return */ + goto memerr2; + } else { + pHostname = pHostname + SIZEOF_DNS_ANSWER + htons(ans.len); + } + --nanswers; + } + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": error in response\n", pEntry->name)); + /* call callback to indicate error, clean up memory and return */ + goto responseerr; + } + } + } + + /* deallocate memory and return */ + goto memerr2; + +responseerr: + /* ERROR: call specified callback function with NULL as name to indicate an error */ + if (pEntry->found) { + (*pEntry->found)(pEntry->name, NULL, pEntry->arg); + } + /* flush this entry */ + pEntry->state = DNS_STATE_UNUSED; + pEntry->found = NULL; + +memerr2: +#if (DNS_USES_STATIC_BUF == 2) + /* free dns buffer */ + mem_free(dns_payload); +#endif /* (DNS_USES_STATIC_BUF == 2) */ + +memerr1: + /* free pbuf */ + pbuf_free(p); + return; +} + +/** + * Queues a new hostname to resolve and sends out a DNS query for that hostname + * + * @param name the hostname that is to be queried + * @param found a callback founction to be called on success, failure or timeout + * @param callback_arg argument to pass to the callback function + * @return @return a err_t return code. + */ +static err_t +dns_enqueue(const char *name, dns_found_callback found, void *callback_arg) +{ + u8_t i; + u8_t lseq, lseqi; + struct dns_table_entry *pEntry = NULL; + + /* search an unused entry, or the oldest one */ + lseq = lseqi = 0; + for (i = 0; i < DNS_TABLE_SIZE; ++i) { + pEntry = &dns_table[i]; + /* is it an unused entry ? */ + if (pEntry->state == DNS_STATE_UNUSED) + break; + + /* check if this is the oldest completed entry */ + if (pEntry->state == DNS_STATE_DONE) { + if ((dns_seqno - pEntry->seqno) > lseq) { + lseq = dns_seqno - pEntry->seqno; + lseqi = i; + } + } + } + + /* if we don't have found an unused entry, use the oldest completed one */ + if (i == DNS_TABLE_SIZE) { + if ((lseqi >= DNS_TABLE_SIZE) || (dns_table[lseqi].state != DNS_STATE_DONE)) { + /* no entry can't be used now, table is full */ + LWIP_DEBUGF(DNS_DEBUG, ("dns_enqueue: \"%s\": DNS entries table is full\n", name)); + return ERR_MEM; + } else { + /* use the oldest completed one */ + i = lseqi; + pEntry = &dns_table[i]; + } + } + + /* use this entry */ + LWIP_DEBUGF(DNS_DEBUG, ("dns_enqueue: \"%s\": use DNS entry %"U16_F"\n", name, (u16_t)(i))); + + /* fill the entry */ + pEntry->state = DNS_STATE_NEW; + pEntry->seqno = dns_seqno++; + pEntry->found = found; + pEntry->arg = callback_arg; + strcpy(pEntry->name, name); + + /* force to send query without waiting timer */ + dns_check_entry(i); + + /* dns query is enqueued */ + return ERR_INPROGRESS; +} + +/** + * Resolve a hostname (string) into an IP address. + * NON-BLOCKING callback version for use with raw API!!! + * + * Returns immediately with one of err_t return codes: + * - ERR_OK if hostname is a valid IP address string or the host + * name is already in the local names table. + * - ERR_INPROGRESS enqueue a request to be sent to the DNS server + * for resolution if no errors are present. + * + * @param hostname the hostname that is to be queried + * @param addr pointer to a struct ip_addr where to store the address if it is already + * cached in the dns_table (only valid if ERR_OK is returned!) + * @param found a callback function to be called on success, failure or timeout (only if + * ERR_INPROGRESS is returned!) + * @param callback_arg argument to pass to the callback function + * @return a err_t return code. + */ +err_t +dns_gethostbyname(const char *hostname, struct ip_addr *addr, dns_found_callback found, + void *callback_arg) +{ + /* not initialized or no valid server yet, or invalid addr pointer + * or invalid hostname or invalid hostname length */ + if ((dns_pcb == NULL) || (addr == NULL) || + (!hostname) || (!hostname[0]) || + (strlen(hostname) >= DNS_MAX_NAME_LENGTH)) { + return ERR_VAL; + } + +#if LWIP_HAVE_LOOPIF + if (strcmp(hostname,"localhost")==0) { + addr->addr = htonl(INADDR_LOOPBACK); + return ERR_OK; + } +#endif /* LWIP_HAVE_LOOPIF */ + + /* host name already in octet notation? set ip addr and return ERR_OK + * already have this address cached? */ + if (((addr->addr = inet_addr(hostname)) != INADDR_NONE) || + ((addr->addr = dns_lookup(hostname)) != INADDR_NONE)) { + return ERR_OK; + } + + /* queue query with specified callback */ + return dns_enqueue(hostname, found, callback_arg); +} + +#endif /* LWIP_DNS */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/init.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/init.c new file mode 100644 index 0000000..b799527 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/init.c @@ -0,0 +1,276 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Modules initialization + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/init.h" +#include "lwip/stats.h" +#include "lwip/sys.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/pbuf.h" +#include "lwip/netif.h" +#include "lwip/sockets.h" +#include "lwip/ip.h" +#include "lwip/raw.h" +#include "lwip/udp.h" +#include "lwip/tcp.h" +#include "lwip/snmp_msg.h" +#include "lwip/autoip.h" +#include "lwip/igmp.h" +#include "lwip/dns.h" +#include "netif/etharp.h" + +/* Compile-time sanity checks for configuration errors. + * These can be done independently of LWIP_DEBUG, without penalty. + */ +#ifndef BYTE_ORDER + #error "BYTE_ORDER is not defined, you have to define it in your cc.h" +#endif +#if (!IP_SOF_BROADCAST && IP_SOF_BROADCAST_RECV) + #error "If you want to use broadcast filter per pcb on recv operations, you have to define IP_SOF_BROADCAST=1 in your lwipopts.h" +#endif +#if (!LWIP_ARP && ARP_QUEUEING) + #error "If you want to use ARP Queueing, you have to define LWIP_ARP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_UDPLITE) + #error "If you want to use UDP Lite, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_SNMP) + #error "If you want to use SNMP, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_DHCP) + #error "If you want to use DHCP, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_IGMP) + #error "If you want to use IGMP, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_DNS) + #error "If you want to use DNS, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (LWIP_ARP && (ARP_TABLE_SIZE > 0x7f)) + #error "If you want to use ARP, ARP_TABLE_SIZE must fit in an s8_t, so, you have to reduce it in your lwipopts.h" +#endif +#if (LWIP_ARP && ARP_QUEUEING && (MEMP_NUM_ARP_QUEUE<=0)) + #error "If you want to use ARP Queueing, you have to define MEMP_NUM_ARP_QUEUE>=1 in your lwipopts.h" +#endif +#if (LWIP_RAW && (MEMP_NUM_RAW_PCB<=0)) + #error "If you want to use RAW, you have to define MEMP_NUM_RAW_PCB>=1 in your lwipopts.h" +#endif +#if (LWIP_UDP && (MEMP_NUM_UDP_PCB<=0)) + #error "If you want to use UDP, you have to define MEMP_NUM_UDP_PCB>=1 in your lwipopts.h" +#endif +#if (LWIP_TCP && (MEMP_NUM_TCP_PCB<=0)) + #error "If you want to use TCP, you have to define MEMP_NUM_TCP_PCB>=1 in your lwipopts.h" +#endif +#if (LWIP_TCP && (TCP_WND > 0xffff)) + #error "If you want to use TCP, TCP_WND must fit in an u16_t, so, you have to reduce it in your lwipopts.h" +#endif +#if (LWIP_TCP && (TCP_SND_QUEUELEN > 0xffff)) + #error "If you want to use TCP, TCP_SND_QUEUELEN must fit in an u16_t, so, you have to reduce it in your lwipopts.h" +#endif +#if (LWIP_TCP && ((TCP_MAXRTX > 12) || (TCP_SYNMAXRTX > 12))) + #error "If you want to use TCP, TCP_MAXRTX and TCP_SYNMAXRTX must less or equal to 12 (due to tcp_backoff table), so, you have to reduce them in your lwipopts.h" +#endif +#if (LWIP_TCP && TCP_LISTEN_BACKLOG && (TCP_DEFAULT_LISTEN_BACKLOG < 0) || (TCP_DEFAULT_LISTEN_BACKLOG > 0xff)) + #error "If you want to use TCP backlog, TCP_DEFAULT_LISTEN_BACKLOG must fit into an u8_t" +#endif +#if (LWIP_IGMP && (MEMP_NUM_IGMP_GROUP<=1)) + #error "If you want to use IGMP, you have to define MEMP_NUM_IGMP_GROUP>1 in your lwipopts.h" +#endif +#if (PPP_SUPPORT && (NO_SYS==1)) + #error "If you want to use PPP, you have to define NO_SYS=0 in your lwipopts.h" +#endif +#if (LWIP_NETIF_API && (NO_SYS==1)) + #error "If you want to use NETIF API, you have to define NO_SYS=0 in your lwipopts.h" +#endif +#if ((LWIP_SOCKET || LWIP_NETCONN) && (NO_SYS==1)) + #error "If you want to use Sequential API, you have to define NO_SYS=0 in your lwipopts.h" +#endif +#if ((LWIP_NETCONN || LWIP_SOCKET) && (MEMP_NUM_TCPIP_MSG_API<=0)) + #error "If you want to use Sequential API, you have to define MEMP_NUM_TCPIP_MSG_API>=1 in your lwipopts.h" +#endif +#if (!LWIP_NETCONN && LWIP_SOCKET) + #error "If you want to use Socket API, you have to define LWIP_NETCONN=1 in your lwipopts.h" +#endif +#if (((!LWIP_DHCP) || (!LWIP_AUTOIP)) && LWIP_DHCP_AUTOIP_COOP) + #error "If you want to use DHCP/AUTOIP cooperation mode, you have to define LWIP_DHCP=1 and LWIP_AUTOIP=1 in your lwipopts.h" +#endif +#if (((!LWIP_DHCP) || (!LWIP_ARP)) && DHCP_DOES_ARP_CHECK) + #error "If you want to use DHCP ARP checking, you have to define LWIP_DHCP=1 and LWIP_ARP=1 in your lwipopts.h" +#endif +#if (!LWIP_ARP && LWIP_AUTOIP) + #error "If you want to use AUTOIP, you have to define LWIP_ARP=1 in your lwipopts.h" +#endif +#if (LWIP_SNMP && (SNMP_CONCURRENT_REQUESTS<=0)) + #error "If you want to use SNMP, you have to define SNMP_CONCURRENT_REQUESTS>=1 in your lwipopts.h" +#endif +#if (LWIP_SNMP && (SNMP_TRAP_DESTINATIONS<=0)) + #error "If you want to use SNMP, you have to define SNMP_TRAP_DESTINATIONS>=1 in your lwipopts.h" +#endif +#if (LWIP_TCP && ((LWIP_EVENT_API && LWIP_CALLBACK_API) || (!LWIP_EVENT_API && !LWIP_CALLBACK_API))) + #error "One and exactly one of LWIP_EVENT_API and LWIP_CALLBACK_API has to be enabled in your lwipopts.h" +#endif +/* There must be sufficient timeouts, taking into account requirements of the subsystems. */ +#if ((NO_SYS==0) && (MEMP_NUM_SYS_TIMEOUT < (LWIP_TCP + IP_REASSEMBLY + LWIP_ARP + (2*LWIP_DHCP) + LWIP_AUTOIP + LWIP_IGMP + LWIP_DNS + PPP_SUPPORT))) + #error "MEMP_NUM_SYS_TIMEOUT is too low to accomodate all required timeouts" +#endif +#if (IP_REASSEMBLY && (MEMP_NUM_REASSDATA > IP_REASS_MAX_PBUFS)) + #error "MEMP_NUM_REASSDATA > IP_REASS_MAX_PBUFS doesn't make sense since each struct ip_reassdata must hold 2 pbufs at least!" +#endif +#if (MEM_LIBC_MALLOC && MEM_USE_POOLS) + #error "MEM_LIBC_MALLOC and MEM_USE_POOLS may not both be simultaneously enabled in your lwipopts.h" +#endif +#if (MEM_USE_POOLS && !MEMP_USE_CUSTOM_POOLS) + #error "MEM_USE_POOLS requires custom pools (MEMP_USE_CUSTOM_POOLS) to be enabled in your lwipopts.h" +#endif +#if (PBUF_POOL_BUFSIZE <= MEM_ALIGNMENT) + #error "PBUF_POOL_BUFSIZE must be greater than MEM_ALIGNMENT or the offset may take the full first pbuf" +#endif +#if (TCP_QUEUE_OOSEQ && !LWIP_TCP) + #error "TCP_QUEUE_OOSEQ requires LWIP_TCP" +#endif +#if (DNS_LOCAL_HOSTLIST && !DNS_LOCAL_HOSTLIST_IS_DYNAMIC && !(defined(DNS_LOCAL_HOSTLIST_INIT))) + #error "you have to define define DNS_LOCAL_HOSTLIST_INIT {{'host1', 0x123}, {'host2', 0x234}} to initialize DNS_LOCAL_HOSTLIST" +#endif +#if PPP_SUPPORT && !PPPOS_SUPPORT & !PPPOE_SUPPORT + #error "PPP_SUPPORT needs either PPPOS_SUPPORT or PPPOE_SUPPORT turned on" +#endif + + +/* Compile-time checks for deprecated options. + */ +#ifdef MEMP_NUM_TCPIP_MSG + #error "MEMP_NUM_TCPIP_MSG option is deprecated. Remove it from your lwipopts.h." +#endif +#ifdef MEMP_NUM_API_MSG + #error "MEMP_NUM_API_MSG option is deprecated. Remove it from your lwipopts.h." +#endif +#ifdef TCP_REXMIT_DEBUG + #error "TCP_REXMIT_DEBUG option is deprecated. Remove it from your lwipopts.h." +#endif +#ifdef RAW_STATS + #error "RAW_STATS option is deprecated. Remove it from your lwipopts.h." +#endif +#ifdef ETHARP_QUEUE_FIRST + #error "ETHARP_QUEUE_FIRST option is deprecated. Remove it from your lwipopts.h." +#endif +#ifdef ETHARP_ALWAYS_INSERT + #error "ETHARP_ALWAYS_INSERT option is deprecated. Remove it from your lwipopts.h." +#endif +#if SO_REUSE +/* I removed the lot since this was an ugly hack. It broke the raw-API. + It also came with many ugly goto's, Christiaan Simons. */ + #error "SO_REUSE currently unavailable, this was a hack" +#endif + +#ifdef LWIP_DEBUG +static void +lwip_sanity_check(void) +{ + /* Warnings */ +#if LWIP_NETCONN + if (MEMP_NUM_NETCONN > (MEMP_NUM_TCP_PCB+MEMP_NUM_TCP_PCB_LISTEN+MEMP_NUM_UDP_PCB+MEMP_NUM_RAW_PCB)) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: MEMP_NUM_NETCONN should be less than the sum of MEMP_NUM_{TCP,RAW,UDP}_PCB+MEMP_NUM_TCP_PCB_LISTEN\n")); +#endif /* LWIP_NETCONN */ +#if LWIP_TCP + if (MEMP_NUM_TCP_SEG < TCP_SND_QUEUELEN) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: MEMP_NUM_TCP_SEG should be at least as big as TCP_SND_QUEUELEN\n")); + if (TCP_SND_BUF < 2 * TCP_MSS) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_SND_BUF must be at least as much as (2 * TCP_MSS) for things to work smoothly\n")); + if (TCP_SND_QUEUELEN < (2 * (TCP_SND_BUF/TCP_MSS))) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_SND_QUEUELEN must be at least as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work\n")); + if (TCP_SNDLOWAT > TCP_SND_BUF) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_SNDLOWAT must be less than or equal to TCP_SND_BUF.\n")); + if (TCP_WND > (PBUF_POOL_SIZE*PBUF_POOL_BUFSIZE)) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_WND is larger than space provided by PBUF_POOL_SIZE*PBUF_POOL_BUFSIZE\n")); + if (TCP_WND < TCP_MSS) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_WND is smaller than MSS\n")); +#endif /* LWIP_TCP */ +} +#else /* LWIP_DEBUG */ +#define lwip_sanity_check() +#endif /* LWIP_DEBUG */ + +/** + * Perform Sanity check of user-configurable values, and initialize all modules. + */ +void +lwip_init(void) +{ + /* Sanity check user-configurable values */ + lwip_sanity_check(); + + /* Modules initialization */ + stats_init(); + sys_init(); + mem_init(); + memp_init(); + pbuf_init(); + netif_init(); +#if LWIP_SOCKET + lwip_socket_init(); +#endif /* LWIP_SOCKET */ + ip_init(); +#if LWIP_ARP + etharp_init(); +#endif /* LWIP_ARP */ +#if LWIP_RAW + raw_init(); +#endif /* LWIP_RAW */ +#if LWIP_UDP + udp_init(); +#endif /* LWIP_UDP */ +#if LWIP_TCP + tcp_init(); +#endif /* LWIP_TCP */ +#if LWIP_SNMP + snmp_init(); +#endif /* LWIP_SNMP */ +#if LWIP_AUTOIP + autoip_init(); +#endif /* LWIP_AUTOIP */ +#if LWIP_IGMP + igmp_init(); +#endif /* LWIP_IGMP */ +#if LWIP_DNS + dns_init(); +#endif /* LWIP_DNS */ +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/autoip.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/autoip.c new file mode 100644 index 0000000..dde6b6d --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/autoip.c @@ -0,0 +1,499 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * AutoIP Automatic LinkLocal IP Configuration + * + */ + +/* + * + * Copyright (c) 2007 Dominik Spies + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Dominik Spies + * + * This is a AutoIP implementation for the lwIP TCP/IP stack. It aims to conform + * with RFC 3927. + * + * + * Please coordinate changes and requests with Dominik Spies + * + */ + +/******************************************************************************* + * USAGE: + * + * define LWIP_AUTOIP 1 in your lwipopts.h + * + * If you don't use tcpip.c (so, don't call, you don't call tcpip_init): + * - First, call autoip_init(). + * - call autoip_tmr() all AUTOIP_TMR_INTERVAL msces, + * that should be defined in autoip.h. + * I recommend a value of 100. The value must divide 1000 with a remainder almost 0. + * Possible values are 1000, 500, 333, 250, 200, 166, 142, 125, 111, 100 .... + * + * Without DHCP: + * - Call autoip_start() after netif_add(). + * + * With DHCP: + * - define LWIP_DHCP_AUTOIP_COOP 1 in your lwipopts.h. + * - Configure your DHCP Client. + * + */ + +#include "lwip/opt.h" + +#if LWIP_AUTOIP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/mem.h" +#include "lwip/udp.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/autoip.h" +#include "netif/etharp.h" + +#include +#include + +/* 169.254.0.0 */ +#define AUTOIP_NET 0xA9FE0000 +/* 169.254.1.0 */ +#define AUTOIP_RANGE_START (AUTOIP_NET | 0x0100) +/* 169.254.254.255 */ +#define AUTOIP_RANGE_END (AUTOIP_NET | 0xFEFF) + + +/** Pseudo random macro based on netif informations. + * You could use "rand()" from the C Library if you define LWIP_AUTOIP_RAND in lwipopts.h */ +#ifndef LWIP_AUTOIP_RAND +#define LWIP_AUTOIP_RAND(netif) ( (((u32_t)((netif->hwaddr[5]) & 0xff) << 24) | \ + ((u32_t)((netif->hwaddr[3]) & 0xff) << 16) | \ + ((u32_t)((netif->hwaddr[2]) & 0xff) << 8) | \ + ((u32_t)((netif->hwaddr[4]) & 0xff))) + \ + (netif->autoip?netif->autoip->tried_llipaddr:0)) +#endif /* LWIP_AUTOIP_RAND */ + +/** + * Macro that generates the initial IP address to be tried by AUTOIP. + * If you want to override this, define it to something else in lwipopts.h. + */ +#ifndef LWIP_AUTOIP_CREATE_SEED_ADDR +#define LWIP_AUTOIP_CREATE_SEED_ADDR(netif) \ + htonl(AUTOIP_RANGE_START + ((u32_t)(((u8_t)(netif->hwaddr[4])) | \ + ((u32_t)((u8_t)(netif->hwaddr[5]))) << 8))) +#endif /* LWIP_AUTOIP_CREATE_SEED_ADDR */ + +/* static functions */ +static void autoip_handle_arp_conflict(struct netif *netif); + +/* creates a pseudo random LL IP-Address for a network interface */ +static void autoip_create_addr(struct netif *netif, struct ip_addr *ipaddr); + +/* sends an ARP probe */ +static err_t autoip_arp_probe(struct netif *netif); + +/* sends an ARP announce */ +static err_t autoip_arp_announce(struct netif *netif); + +/* configure interface for use with current LL IP-Address */ +static err_t autoip_bind(struct netif *netif); + +/* start sending probes for llipaddr */ +static void autoip_start_probing(struct netif *netif); + +/** + * Initialize this module + */ +void +autoip_init(void) +{ + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, ("autoip_init()\n")); +} + +/** + * Handle a IP address conflict after an ARP conflict detection + */ +static void +autoip_handle_arp_conflict(struct netif *netif) +{ + /* Somehow detect if we are defending or retreating */ + unsigned char defend = 1; /* tbd */ + + if(defend) { + if(netif->autoip->lastconflict > 0) { + /* retreat, there was a conflicting ARP in the last + * DEFEND_INTERVAL seconds + */ + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_handle_arp_conflict(): we are defending, but in DEFEND_INTERVAL, retreating\n")); + + /* TODO: close all TCP sessions */ + autoip_start(netif); + } else { + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_handle_arp_conflict(): we are defend, send ARP Announce\n")); + autoip_arp_announce(netif); + netif->autoip->lastconflict = DEFEND_INTERVAL * AUTOIP_TICKS_PER_SECOND; + } + } else { + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_handle_arp_conflict(): we do not defend, retreating\n")); + /* TODO: close all TCP sessions */ + autoip_start(netif); + } +} + +/** + * Create an IP-Address out of range 169.254.1.0 to 169.254.254.255 + * + * @param netif network interface on which create the IP-Address + * @param ipaddr ip address to initialize + */ +static void +autoip_create_addr(struct netif *netif, struct ip_addr *ipaddr) +{ + /* Here we create an IP-Address out of range 169.254.1.0 to 169.254.254.255 + * compliant to RFC 3927 Section 2.1 + * We have 254 * 256 possibilities */ + + u32_t addr = ntohl(LWIP_AUTOIP_CREATE_SEED_ADDR(netif)); + addr += netif->autoip->tried_llipaddr; + addr = AUTOIP_NET | (addr & 0xffff); + /* Now, 169.254.0.0 <= addr <= 169.254.255.255 */ + + if (addr < AUTOIP_RANGE_START) { + addr += AUTOIP_RANGE_END - AUTOIP_RANGE_START + 1; + } + if (addr > AUTOIP_RANGE_END) { + addr -= AUTOIP_RANGE_END - AUTOIP_RANGE_START + 1; + } + LWIP_ASSERT("AUTOIP address not in range", (addr >= AUTOIP_RANGE_START) && + (addr <= AUTOIP_RANGE_END)); + ipaddr->addr = htonl(addr); + + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_create_addr(): tried_llipaddr=%"U16_F", 0x%08"X32_F"\n", + (u16_t)(netif->autoip->tried_llipaddr), (u32_t)(ipaddr->addr))); +} + +/** + * Sends an ARP probe from a network interface + * + * @param netif network interface used to send the probe + */ +static err_t +autoip_arp_probe(struct netif *netif) +{ + return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, ðbroadcast, + (struct eth_addr *)netif->hwaddr, IP_ADDR_ANY, ðzero, + &netif->autoip->llipaddr, ARP_REQUEST); +} + +/** + * Sends an ARP announce from a network interface + * + * @param netif network interface used to send the announce + */ +static err_t +autoip_arp_announce(struct netif *netif) +{ + return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, ðbroadcast, + (struct eth_addr *)netif->hwaddr, &netif->autoip->llipaddr, ðzero, + &netif->autoip->llipaddr, ARP_REQUEST); +} + +/** + * Configure interface for use with current LL IP-Address + * + * @param netif network interface to configure with current LL IP-Address + */ +static err_t +autoip_bind(struct netif *netif) +{ + struct autoip *autoip = netif->autoip; + struct ip_addr sn_mask, gw_addr; + + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_bind(netif=%p) %c%c%"U16_F" 0x%08"X32_F"\n", + (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num, autoip->llipaddr.addr)); + + IP4_ADDR(&sn_mask, 255, 255, 0, 0); + IP4_ADDR(&gw_addr, 0, 0, 0, 0); + + netif_set_ipaddr(netif, &autoip->llipaddr); + netif_set_netmask(netif, &sn_mask); + netif_set_gw(netif, &gw_addr); + + /* bring the interface up */ + netif_set_up(netif); + + return ERR_OK; +} + +/** + * Start AutoIP client + * + * @param netif network interface on which start the AutoIP client + */ +err_t +autoip_start(struct netif *netif) +{ + struct autoip *autoip = netif->autoip; + err_t result = ERR_OK; + + if(netif_is_up(netif)) { + netif_set_down(netif); + } + + /* Set IP-Address, Netmask and Gateway to 0 to make sure that + * ARP Packets are formed correctly + */ + netif->ip_addr.addr = 0; + netif->netmask.addr = 0; + netif->gw.addr = 0; + + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_start(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], + netif->name[1], (u16_t)netif->num)); + if(autoip == NULL) { + /* no AutoIP client attached yet? */ + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_start(): starting new AUTOIP client\n")); + autoip = mem_malloc(sizeof(struct autoip)); + if(autoip == NULL) { + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_start(): could not allocate autoip\n")); + return ERR_MEM; + } + memset( autoip, 0, sizeof(struct autoip)); + /* store this AutoIP client in the netif */ + netif->autoip = autoip; + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, ("autoip_start(): allocated autoip")); + } else { + autoip->state = AUTOIP_STATE_OFF; + autoip->ttw = 0; + autoip->sent_num = 0; + memset(&autoip->llipaddr, 0, sizeof(struct ip_addr)); + autoip->lastconflict = 0; + } + + autoip_create_addr(netif, &(autoip->llipaddr)); + autoip->tried_llipaddr++; + autoip_start_probing(netif); + + return result; +} + +static void +autoip_start_probing(struct netif *netif) +{ + struct autoip *autoip = netif->autoip; + + autoip->state = AUTOIP_STATE_PROBING; + autoip->sent_num = 0; + + /* time to wait to first probe, this is randomly + * choosen out of 0 to PROBE_WAIT seconds. + * compliant to RFC 3927 Section 2.2.1 + */ + autoip->ttw = (u16_t)(LWIP_AUTOIP_RAND(netif) % (PROBE_WAIT * AUTOIP_TICKS_PER_SECOND)); + + /* + * if we tried more then MAX_CONFLICTS we must limit our rate for + * accquiring and probing address + * compliant to RFC 3927 Section 2.2.1 + */ + if(autoip->tried_llipaddr > MAX_CONFLICTS) { + autoip->ttw = RATE_LIMIT_INTERVAL * AUTOIP_TICKS_PER_SECOND; + } +} + +/** + * Handle a possible change in the network configuration. + * + * If there is an AutoIP address configured, take the interface down + * and begin probing with the same address. + */ +void +autoip_network_changed(struct netif *netif) +{ + if (netif->autoip && netif->autoip->state != AUTOIP_STATE_OFF) { + netif_set_down(netif); + autoip_start_probing(netif); + } +} + +/** + * Stop AutoIP client + * + * @param netif network interface on which stop the AutoIP client + */ +err_t +autoip_stop(struct netif *netif) +{ + netif->autoip->state = AUTOIP_STATE_OFF; + netif_set_down(netif); + return ERR_OK; +} + +/** + * Has to be called in loop every AUTOIP_TMR_INTERVAL milliseconds + */ +void +autoip_tmr() +{ + struct netif *netif = netif_list; + /* loop through netif's */ + while (netif != NULL) { + /* only act on AutoIP configured interfaces */ + if (netif->autoip != NULL) { + if(netif->autoip->lastconflict > 0) { + netif->autoip->lastconflict--; + } + + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_tmr() AutoIP-State: %"U16_F", ttw=%"U16_F"\n", + (u16_t)(netif->autoip->state), netif->autoip->ttw)); + + switch(netif->autoip->state) { + case AUTOIP_STATE_PROBING: + if(netif->autoip->ttw > 0) { + netif->autoip->ttw--; + } else { + if(netif->autoip->sent_num >= PROBE_NUM) { + netif->autoip->state = AUTOIP_STATE_ANNOUNCING; + netif->autoip->sent_num = 0; + netif->autoip->ttw = ANNOUNCE_WAIT * AUTOIP_TICKS_PER_SECOND; + } else { + autoip_arp_probe(netif); + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_tmr() PROBING Sent Probe\n")); + netif->autoip->sent_num++; + /* calculate time to wait to next probe */ + netif->autoip->ttw = (u16_t)((LWIP_AUTOIP_RAND(netif) % + ((PROBE_MAX - PROBE_MIN) * AUTOIP_TICKS_PER_SECOND) ) + + PROBE_MIN * AUTOIP_TICKS_PER_SECOND); + } + } + break; + + case AUTOIP_STATE_ANNOUNCING: + if(netif->autoip->ttw > 0) { + netif->autoip->ttw--; + } else { + if(netif->autoip->sent_num == 0) { + /* We are here the first time, so we waited ANNOUNCE_WAIT seconds + * Now we can bind to an IP address and use it. + * + * autoip_bind calls netif_set_up. This triggers a gratuitous ARP + * which counts as an announcement. + */ + autoip_bind(netif); + } else { + autoip_arp_announce(netif); + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_tmr() ANNOUNCING Sent Announce\n")); + } + netif->autoip->ttw = ANNOUNCE_INTERVAL * AUTOIP_TICKS_PER_SECOND; + netif->autoip->sent_num++; + + if(netif->autoip->sent_num >= ANNOUNCE_NUM) { + netif->autoip->state = AUTOIP_STATE_BOUND; + netif->autoip->sent_num = 0; + netif->autoip->ttw = 0; + } + } + break; + } + } + /* proceed to next network interface */ + netif = netif->next; + } +} + +/** + * Handles every incoming ARP Packet, called by etharp_arp_input. + * + * @param netif network interface to use for autoip processing + * @param hdr Incoming ARP packet + */ +void +autoip_arp_reply(struct netif *netif, struct etharp_hdr *hdr) +{ + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, ("autoip_arp_reply()\n")); + if ((netif->autoip != NULL) && (netif->autoip->state != AUTOIP_STATE_OFF)) { + /* when ip.src == llipaddr && hw.src != netif->hwaddr + * + * when probing ip.dst == llipaddr && hw.src != netif->hwaddr + * we have a conflict and must solve it + */ + struct ip_addr sipaddr, dipaddr; + struct eth_addr netifaddr; + netifaddr.addr[0] = netif->hwaddr[0]; + netifaddr.addr[1] = netif->hwaddr[1]; + netifaddr.addr[2] = netif->hwaddr[2]; + netifaddr.addr[3] = netif->hwaddr[3]; + netifaddr.addr[4] = netif->hwaddr[4]; + netifaddr.addr[5] = netif->hwaddr[5]; + + /* Copy struct ip_addr2 to aligned ip_addr, to support compilers without + * structure packing (not using structure copy which breaks strict-aliasing rules). + */ + SMEMCPY(&sipaddr, &hdr->sipaddr, sizeof(sipaddr)); + SMEMCPY(&dipaddr, &hdr->dipaddr, sizeof(dipaddr)); + + if ((netif->autoip->state == AUTOIP_STATE_PROBING) || + ((netif->autoip->state == AUTOIP_STATE_ANNOUNCING) && + (netif->autoip->sent_num == 0))) { + /* RFC 3927 Section 2.2.1: + * from beginning to after ANNOUNCE_WAIT + * seconds we have a conflict if + * ip.src == llipaddr OR + * ip.dst == llipaddr && hw.src != own hwaddr + */ + if ((ip_addr_cmp(&sipaddr, &netif->autoip->llipaddr)) || + (ip_addr_cmp(&dipaddr, &netif->autoip->llipaddr) && + !eth_addr_cmp(&netifaddr, &hdr->shwaddr))) { + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING, + ("autoip_arp_reply(): Probe Conflict detected\n")); + autoip_start(netif); + } + } else { + /* RFC 3927 Section 2.5: + * in any state we have a conflict if + * ip.src == llipaddr && hw.src != own hwaddr + */ + if (ip_addr_cmp(&sipaddr, &netif->autoip->llipaddr) && + !eth_addr_cmp(&netifaddr, &hdr->shwaddr)) { + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING, + ("autoip_arp_reply(): Conflicting ARP-Packet detected\n")); + autoip_handle_arp_conflict(netif); + } + } + } +} + +#endif /* LWIP_AUTOIP */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/icmp.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/icmp.c new file mode 100644 index 0000000..3ee17ae --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/icmp.c @@ -0,0 +1,333 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * ICMP - Internet Control Message Protocol + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +/* Some ICMP messages should be passed to the transport protocols. This + is not implemented. */ + +#include "lwip/opt.h" + +#if LWIP_ICMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/icmp.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" +#include "lwip/ip.h" +#include "lwip/def.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" + +#include + +/** Small optimization: set to 0 if incoming PBUF_POOL pbuf always can be + * used to modify and send a response packet (and to 1 if this is not the case, + * e.g. when link header is stripped of when receiving) */ +#ifndef LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN +#define LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN 1 +#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */ + +/* The amount of data from the original packet to return in a dest-unreachable */ +#define ICMP_DEST_UNREACH_DATASIZE 8 + +static void icmp_send_response(struct pbuf *p, u8_t type, u8_t code); + +/** + * Processes ICMP input packets, called from ip_input(). + * + * Currently only processes icmp echo requests and sends + * out the echo response. + * + * @param p the icmp echo request packet, p->payload pointing to the ip header + * @param inp the netif on which this packet was received + */ +void +icmp_input(struct pbuf *p, struct netif *inp) +{ + u8_t type; +#ifdef LWIP_DEBUG + u8_t code; +#endif /* LWIP_DEBUG */ + struct icmp_echo_hdr *iecho; + struct ip_hdr *iphdr; + struct ip_addr tmpaddr; + s16_t hlen; + + ICMP_STATS_INC(icmp.recv); + snmp_inc_icmpinmsgs(); + + + iphdr = p->payload; + hlen = IPH_HL(iphdr) * 4; + if (pbuf_header(p, -hlen) || (p->tot_len < sizeof(u16_t)*2)) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short ICMP (%"U16_F" bytes) received\n", p->tot_len)); + goto lenerr; + } + + type = *((u8_t *)p->payload); +#ifdef LWIP_DEBUG + code = *(((u8_t *)p->payload)+1); +#endif /* LWIP_DEBUG */ + switch (type) { + case ICMP_ECHO: +#if !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING + { + int accepted = 1; +#if !LWIP_MULTICAST_PING + /* multicast destination address? */ + if (ip_addr_ismulticast(&iphdr->dest)) { + accepted = 0; + } +#endif /* LWIP_MULTICAST_PING */ +#if !LWIP_BROADCAST_PING + /* broadcast destination address? */ + if (ip_addr_isbroadcast(&iphdr->dest, inp)) { + accepted = 0; + } +#endif /* LWIP_BROADCAST_PING */ + /* broadcast or multicast destination address not acceptd? */ + if (!accepted) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to multicast or broadcast pings\n")); + ICMP_STATS_INC(icmp.err); + pbuf_free(p); + return; + } + } +#endif /* !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING */ + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n")); + if (p->tot_len < sizeof(struct icmp_echo_hdr)) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n")); + goto lenerr; + } + if (inet_chksum_pbuf(p) != 0) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo\n")); + pbuf_free(p); + ICMP_STATS_INC(icmp.chkerr); + snmp_inc_icmpinerrors(); + return; + } +#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN + if (pbuf_header(p, (PBUF_IP_HLEN + PBUF_LINK_HLEN))) { + /* p is not big enough to contain link headers + * allocate a new one and copy p into it + */ + struct pbuf *r; + /* switch p->payload to ip header */ + if (pbuf_header(p, hlen)) { + LWIP_ASSERT("icmp_input: moving p->payload to ip header failed\n", 0); + goto memerr; + } + /* allocate new packet buffer with space for link headers */ + r = pbuf_alloc(PBUF_LINK, p->tot_len, PBUF_RAM); + if (r == NULL) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed\n")); + goto memerr; + } + LWIP_ASSERT("check that first pbuf can hold struct the ICMP header", + (r->len >= hlen + sizeof(struct icmp_echo_hdr))); + /* copy the whole packet including ip header */ + if (pbuf_copy(r, p) != ERR_OK) { + LWIP_ASSERT("icmp_input: copying to new pbuf failed\n", 0); + goto memerr; + } + iphdr = r->payload; + /* switch r->payload back to icmp header */ + if (pbuf_header(r, -hlen)) { + LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0); + goto memerr; + } + /* free the original p */ + pbuf_free(p); + /* we now have an identical copy of p that has room for link headers */ + p = r; + } else { + /* restore p->payload to point to icmp header */ + if (pbuf_header(p, -(s16_t)(PBUF_IP_HLEN + PBUF_LINK_HLEN))) { + LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0); + goto memerr; + } + } +#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */ + /* At this point, all checks are OK. */ + /* We generate an answer by switching the dest and src ip addresses, + * setting the icmp type to ECHO_RESPONSE and updating the checksum. */ + iecho = p->payload; + tmpaddr.addr = iphdr->src.addr; + iphdr->src.addr = iphdr->dest.addr; + iphdr->dest.addr = tmpaddr.addr; + ICMPH_TYPE_SET(iecho, ICMP_ER); + /* adjust the checksum */ + if (iecho->chksum >= htons(0xffff - (ICMP_ECHO << 8))) { + iecho->chksum += htons(ICMP_ECHO << 8) + 1; + } else { + iecho->chksum += htons(ICMP_ECHO << 8); + } + + /* Set the correct TTL and recalculate the header checksum. */ + IPH_TTL_SET(iphdr, ICMP_TTL); + IPH_CHKSUM_SET(iphdr, 0); +#if CHECKSUM_GEN_IP + IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, IP_HLEN)); +#endif /* CHECKSUM_GEN_IP */ + + ICMP_STATS_INC(icmp.xmit); + /* increase number of messages attempted to send */ + snmp_inc_icmpoutmsgs(); + /* increase number of echo replies attempted to send */ + snmp_inc_icmpoutechoreps(); + + if(pbuf_header(p, hlen)) { + LWIP_ASSERT("Can't move over header in packet", 0); + } else { + err_t ret; + ret = ip_output_if(p, &(iphdr->src), IP_HDRINCL, + ICMP_TTL, 0, IP_PROTO_ICMP, inp); + if (ret != ERR_OK) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ip_output_if returned an error: %c.\n", ret)); + } + } + break; + default: + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" code %"S16_F" not supported.\n", + (s16_t)type, (s16_t)code)); + ICMP_STATS_INC(icmp.proterr); + ICMP_STATS_INC(icmp.drop); + } + pbuf_free(p); + return; +lenerr: + pbuf_free(p); + ICMP_STATS_INC(icmp.lenerr); + snmp_inc_icmpinerrors(); + return; +#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN +memerr: + pbuf_free(p); + ICMP_STATS_INC(icmp.err); + snmp_inc_icmpinerrors(); + return; +#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */ +} + +/** + * Send an icmp 'destination unreachable' packet, called from ip_input() if + * the transport layer protocol is unknown and from udp_input() if the local + * port is not bound. + * + * @param p the input packet for which the 'unreachable' should be sent, + * p->payload pointing to the IP header + * @param t type of the 'unreachable' packet + */ +void +icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t) +{ + icmp_send_response(p, ICMP_DUR, t); +} + +#if IP_FORWARD || IP_REASSEMBLY +/** + * Send a 'time exceeded' packet, called from ip_forward() if TTL is 0. + * + * @param p the input packet for which the 'time exceeded' should be sent, + * p->payload pointing to the IP header + * @param t type of the 'time exceeded' packet + */ +void +icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t) +{ + icmp_send_response(p, ICMP_TE, t); +} + +#endif /* IP_FORWARD || IP_REASSEMBLY */ + +/** + * Send an icmp packet in response to an incoming packet. + * + * @param p the input packet for which the 'unreachable' should be sent, + * p->payload pointing to the IP header + * @param type Type of the ICMP header + * @param code Code of the ICMP header + */ +static void +icmp_send_response(struct pbuf *p, u8_t type, u8_t code) +{ + struct pbuf *q; + struct ip_hdr *iphdr; + /* we can use the echo header here */ + struct icmp_echo_hdr *icmphdr; + + /* ICMP header + IP header + 8 bytes of data */ + q = pbuf_alloc(PBUF_IP, sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE, + PBUF_RAM); + if (q == NULL) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded: failed to allocate pbuf for ICMP packet.\n")); + return; + } + LWIP_ASSERT("check that first pbuf can hold icmp message", + (q->len >= (sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE))); + + iphdr = p->payload; + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded from ")); + ip_addr_debug_print(ICMP_DEBUG, &(iphdr->src)); + LWIP_DEBUGF(ICMP_DEBUG, (" to ")); + ip_addr_debug_print(ICMP_DEBUG, &(iphdr->dest)); + LWIP_DEBUGF(ICMP_DEBUG, ("\n")); + + icmphdr = q->payload; + icmphdr->type = type; + icmphdr->code = code; + icmphdr->id = 0; + icmphdr->seqno = 0; + + /* copy fields from original packet */ + SMEMCPY((u8_t *)q->payload + sizeof(struct icmp_echo_hdr), (u8_t *)p->payload, + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE); + + /* calculate checksum */ + icmphdr->chksum = 0; + icmphdr->chksum = inet_chksum(icmphdr, q->len); + ICMP_STATS_INC(icmp.xmit); + /* increase number of messages attempted to send */ + snmp_inc_icmpoutmsgs(); + /* increase number of destination unreachable messages attempted to send */ + snmp_inc_icmpouttimeexcds(); + ip_output(q, NULL, &(iphdr->src), ICMP_TTL, 0, IP_PROTO_ICMP); + pbuf_free(q); +} + +#endif /* LWIP_ICMP */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/igmp.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/igmp.c new file mode 100644 index 0000000..b302ef4 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/igmp.c @@ -0,0 +1,759 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * IGMP - Internet Group Management Protocol + * + */ + +/* + * Copyright (c) 2002 CITEL Technologies Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of CITEL Technologies Ltd nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY CITEL TECHNOLOGIES AND CONTRIBUTORS ``AS IS'' + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL CITEL TECHNOLOGIES OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is a contribution to the lwIP TCP/IP stack. + * The Swedish Institute of Computer Science and Adam Dunkels + * are specifically granted permission to redistribute this + * source code. +*/ + +/*------------------------------------------------------------- +Note 1) +Although the rfc requires V1 AND V2 capability +we will only support v2 since now V1 is very old (August 1989) +V1 can be added if required + +a debug print and statistic have been implemented to +show this up. +------------------------------------------------------------- +------------------------------------------------------------- +Note 2) +A query for a specific group address (as opposed to ALLHOSTS) +has now been implemented as I am unsure if it is required + +a debug print and statistic have been implemented to +show this up. +------------------------------------------------------------- +------------------------------------------------------------- +Note 3) +The router alert rfc 2113 is implemented in outgoing packets +but not checked rigorously incoming +------------------------------------------------------------- +Steve Reynolds +------------------------------------------------------------*/ + +/*----------------------------------------------------------------------------- + * RFC 988 - Host extensions for IP multicasting - V0 + * RFC 1054 - Host extensions for IP multicasting - + * RFC 1112 - Host extensions for IP multicasting - V1 + * RFC 2236 - Internet Group Management Protocol, Version 2 - V2 <- this code is based on this RFC (it's the "de facto" standard) + * RFC 3376 - Internet Group Management Protocol, Version 3 - V3 + * RFC 4604 - Using Internet Group Management Protocol Version 3... - V3+ + * RFC 2113 - IP Router Alert Option - + *----------------------------------------------------------------------------*/ + +/*----------------------------------------------------------------------------- + * Includes + *----------------------------------------------------------------------------*/ + +#include "lwip/opt.h" + +#if LWIP_IGMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/igmp.h" +#include "lwip/debug.h" +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/ip.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" +#include "lwip/netif.h" +#include "lwip/icmp.h" +#include "lwip/udp.h" +#include "lwip/tcp.h" +#include "lwip/stats.h" + +#include "string.h" + +/*----------------------------------------------------------------------------- + * Globales + *----------------------------------------------------------------------------*/ + +static struct igmp_group* igmp_group_list; +static struct ip_addr allsystems; +static struct ip_addr allrouters; + +/** + * Initialize the IGMP module + */ +void +igmp_init(void) +{ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_init: initializing\n")); + + IP4_ADDR(&allsystems, 224, 0, 0, 1); + IP4_ADDR(&allrouters, 224, 0, 0, 2); +} + +#ifdef LWIP_DEBUG +/** + * Dump global IGMP groups list + */ +void +igmp_dump_group_list() +{ + struct igmp_group *group = igmp_group_list; + + while (group != NULL) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_dump_group_list: [%"U32_F"] ", (u32_t)(group->group_state))); + ip_addr_debug_print(IGMP_DEBUG, &group->group_address); + LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", group->interface)); + group = group->next; + } + LWIP_DEBUGF(IGMP_DEBUG, ("\n")); +} +#else +#define igmp_dump_group_list() +#endif /* LWIP_DEBUG */ + +/** + * Start IGMP processing on interface + * + * @param netif network interface on which start IGMP processing + */ +err_t +igmp_start(struct netif *netif) +{ + struct igmp_group* group; + + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_start: starting IGMP processing on if %p\n", netif)); + + group = igmp_lookup_group(netif, &allsystems); + + if (group != NULL) { + group->group_state = IGMP_GROUP_IDLE_MEMBER; + group->use++; + + /* Allow the igmp messages at the MAC level */ + if (netif->igmp_mac_filter != NULL) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_start: igmp_mac_filter(ADD ")); + ip_addr_debug_print(IGMP_DEBUG, &allsystems); + LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif)); + netif->igmp_mac_filter( netif, &allsystems, IGMP_ADD_MAC_FILTER); + } + + return ERR_OK; + } + + return ERR_MEM; +} + +/** + * Stop IGMP processing on interface + * + * @param netif network interface on which stop IGMP processing + */ +err_t +igmp_stop(struct netif *netif) +{ + struct igmp_group *group = igmp_group_list; + struct igmp_group *prev = NULL; + struct igmp_group *next; + + /* look for groups joined on this interface further down the list */ + while (group != NULL) { + next = group->next; + /* is it a group joined on this interface? */ + if (group->interface == netif) { + /* is it the first group of the list? */ + if (group == igmp_group_list) { + igmp_group_list = next; + } + /* is there a "previous" group defined? */ + if (prev != NULL) { + prev->next = next; + } + /* disable the group at the MAC level */ + if (netif->igmp_mac_filter != NULL) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_stop: igmp_mac_filter(DEL ")); + ip_addr_debug_print(IGMP_DEBUG, &group->group_address); + LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif)); + netif->igmp_mac_filter(netif, &(group->group_address), IGMP_DEL_MAC_FILTER); + } + /* free group */ + memp_free(MEMP_IGMP_GROUP, group); + } else { + /* change the "previous" */ + prev = group; + } + /* move to "next" */ + group = next; + } + return ERR_OK; +} + +/** + * Report IGMP memberships for this interface + * + * @param netif network interface on which report IGMP memberships + */ +void +igmp_report_groups( struct netif *netif) +{ + struct igmp_group *group = igmp_group_list; + + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_report_groups: sending IGMP reports on if %p\n", netif)); + + while (group != NULL) { + if (group->interface == netif) { + igmp_delaying_member( group, IGMP_JOIN_DELAYING_MEMBER_TMR); + } + group = group->next; + } +} + +/** + * Search for a group in the global igmp_group_list + * + * @param ifp the network interface for which to look + * @param addr the group ip address to search for + * @return a struct igmp_group* if the group has been found, + * NULL if the group wasn't found. + */ +struct igmp_group * +igmp_lookfor_group(struct netif *ifp, struct ip_addr *addr) +{ + struct igmp_group *group = igmp_group_list; + + while (group != NULL) { + if ((group->interface == ifp) && (ip_addr_cmp(&(group->group_address), addr))) { + return group; + } + group = group->next; + } + + /* to be clearer, we return NULL here instead of + * 'group' (which is also NULL at this point). + */ + return NULL; +} + +/** + * Search for a specific igmp group and create a new one if not found- + * + * @param ifp the network interface for which to look + * @param addr the group ip address to search + * @return a struct igmp_group*, + * NULL on memory error. + */ +struct igmp_group * +igmp_lookup_group(struct netif *ifp, struct ip_addr *addr) +{ + struct igmp_group *group = igmp_group_list; + + /* Search if the group already exists */ + group = igmp_lookfor_group(ifp, addr); + if (group != NULL) { + /* Group already exists. */ + return group; + } + + /* Group doesn't exist yet, create a new one */ + group = memp_malloc(MEMP_IGMP_GROUP); + if (group != NULL) { + group->interface = ifp; + ip_addr_set(&(group->group_address), addr); + group->timer = 0; /* Not running */ + group->group_state = IGMP_GROUP_NON_MEMBER; + group->last_reporter_flag = 0; + group->use = 0; + group->next = igmp_group_list; + + igmp_group_list = group; + } + + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_lookup_group: %sallocated a new group with address ", (group?"":"impossible to "))); + ip_addr_debug_print(IGMP_DEBUG, addr); + LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", ifp)); + + return group; +} + +/** + * Remove a group in the global igmp_group_list + * + * @param group the group to remove from the global igmp_group_list + * @return ERR_OK if group was removed from the list, an err_t otherwise + */ +err_t +igmp_remove_group(struct igmp_group *group) +{ + err_t err = ERR_OK; + + /* Is it the first group? */ + if (igmp_group_list == group) { + igmp_group_list = group->next; + } else { + /* look for group further down the list */ + struct igmp_group *tmpGroup; + for (tmpGroup = igmp_group_list; tmpGroup != NULL; tmpGroup = tmpGroup->next) { + if (tmpGroup->next == group) { + tmpGroup->next = group->next; + break; + } + } + /* Group not found in the global igmp_group_list */ + if (tmpGroup == NULL) + err = ERR_ARG; + } + /* free group */ + memp_free(MEMP_IGMP_GROUP, group); + + return err; +} + +/** + * Called from ip_input() if a new IGMP packet is received. + * + * @param p received igmp packet, p->payload pointing to the ip header + * @param inp network interface on which the packet was received + * @param dest destination ip address of the igmp packet + */ +void +igmp_input(struct pbuf *p, struct netif *inp, struct ip_addr *dest) +{ + struct ip_hdr * iphdr; + struct igmp_msg* igmp; + struct igmp_group* group; + struct igmp_group* groupref; + + /* Note that the length CAN be greater than 8 but only 8 are used - All are included in the checksum */ + iphdr = p->payload; + if (pbuf_header(p, -(s16_t)(IPH_HL(iphdr) * 4)) || (p->len < IGMP_MINLEN)) { + pbuf_free(p); + IGMP_STATS_INC(igmp.lenerr); + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: length error\n")); + return; + } + + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: message from ")); + ip_addr_debug_print(IGMP_DEBUG, &(iphdr->src)); + LWIP_DEBUGF(IGMP_DEBUG, (" to address ")); + ip_addr_debug_print(IGMP_DEBUG, &(iphdr->dest)); + LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", inp)); + + /* Now calculate and check the checksum */ + igmp = (struct igmp_msg *)p->payload; + if (inet_chksum(igmp, p->len)) { + pbuf_free(p); + IGMP_STATS_INC(igmp.chkerr); + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: checksum error\n")); + return; + } + + /* Packet is ok so find an existing group */ + group = igmp_lookfor_group(inp, dest); /* use the incoming IP address! */ + + /* If group can be found or create... */ + if (!group) { + pbuf_free(p); + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: IGMP frame not for us\n")); + return; + } + + /* NOW ACT ON THE INCOMING MESSAGE TYPE... */ + switch (igmp->igmp_msgtype) { + case IGMP_MEMB_QUERY: { + /* IGMP_MEMB_QUERY to the "all systems" address ? */ + if ((ip_addr_cmp(dest, &allsystems)) && (igmp->igmp_group_address.addr == 0)) { + /* THIS IS THE GENERAL QUERY */ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: General IGMP_MEMB_QUERY on \"ALL SYSTEMS\" address (224.0.0.1) [igmp_maxresp=%i]\n", (int)(igmp->igmp_maxresp))); + + if (igmp->igmp_maxresp == 0) { + IGMP_STATS_INC(igmp.v1_rxed); + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: got an all hosts query with time== 0 - this is V1 and not implemented - treat as v2\n")); + igmp->igmp_maxresp = IGMP_V1_DELAYING_MEMBER_TMR; + } + + IGMP_STATS_INC(igmp.group_query_rxed); + groupref = igmp_group_list; + while (groupref) { + /* Do not send messages on the all systems group address! */ + if ((groupref->interface == inp) && (!(ip_addr_cmp(&(groupref->group_address), &allsystems)))) { + igmp_delaying_member( groupref, igmp->igmp_maxresp); + } + groupref = groupref->next; + } + } else { + /* IGMP_MEMB_QUERY to a specific group ? */ + if (group->group_address.addr != 0) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: IGMP_MEMB_QUERY to a specific group ")); + ip_addr_debug_print(IGMP_DEBUG, &group->group_address); + if (ip_addr_cmp (dest, &allsystems)) { + LWIP_DEBUGF(IGMP_DEBUG, (" using \"ALL SYSTEMS\" address (224.0.0.1) [igmp_maxresp=%i]\n", (int)(igmp->igmp_maxresp))); + /* we first need to re-lookfor the group since we used dest last time */ + group = igmp_lookfor_group(inp, &igmp->igmp_group_address); + } else { + LWIP_DEBUGF(IGMP_DEBUG, (" with the group address as destination [igmp_maxresp=%i]\n", (int)(igmp->igmp_maxresp))); + } + + if (group != NULL) { + IGMP_STATS_INC(igmp.unicast_query); + igmp_delaying_member( group, igmp->igmp_maxresp); + } + } + } + break; + } + case IGMP_V2_MEMB_REPORT: { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: IGMP_V2_MEMB_REPORT\n")); + + IGMP_STATS_INC(igmp.report_rxed); + if (group->group_state == IGMP_GROUP_DELAYING_MEMBER) { + /* This is on a specific group we have already looked up */ + group->timer = 0; /* stopped */ + group->group_state = IGMP_GROUP_IDLE_MEMBER; + group->last_reporter_flag = 0; + } + break; + } + default: { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: unexpected msg %d in state %d on group %p on if %p\n", + igmp->igmp_msgtype, group->group_state, &group, group->interface)); + break; + } + } + + pbuf_free(p); + return; +} + +/** + * Join a group on one network interface. + * + * @param ifaddr ip address of the network interface which should join a new group + * @param groupaddr the ip address of the group which to join + * @return ERR_OK if group was joined on the netif(s), an err_t otherwise + */ +err_t +igmp_joingroup(struct ip_addr *ifaddr, struct ip_addr *groupaddr) +{ + err_t err = ERR_VAL; /* no matching interface */ + struct igmp_group *group; + struct netif *netif; + + /* make sure it is multicast address */ + LWIP_ERROR("igmp_joingroup: attempt to join non-multicast address", ip_addr_ismulticast(groupaddr), return ERR_VAL;); + LWIP_ERROR("igmp_joingroup: attempt to join allsystems address", (!ip_addr_cmp(groupaddr, &allsystems)), return ERR_VAL;); + + /* loop through netif's */ + netif = netif_list; + while (netif != NULL) { + /* Should we join this interface ? */ + if ((netif->flags & NETIF_FLAG_IGMP) && ((ip_addr_isany(ifaddr) || ip_addr_cmp(&(netif->ip_addr), ifaddr)))) { + /* find group or create a new one if not found */ + group = igmp_lookup_group(netif, groupaddr); + + if (group != NULL) { + /* This should create a new group, check the state to make sure */ + if (group->group_state != IGMP_GROUP_NON_MEMBER) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: join to group not in state IGMP_GROUP_NON_MEMBER\n")); + } else { + /* OK - it was new group */ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: join to new group: ")); + ip_addr_debug_print(IGMP_DEBUG, groupaddr); + LWIP_DEBUGF(IGMP_DEBUG, ("\n")); + + /* If first use of the group, allow the group at the MAC level */ + if ((group->use==0) && (netif->igmp_mac_filter != NULL)) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: igmp_mac_filter(ADD ")); + ip_addr_debug_print(IGMP_DEBUG, groupaddr); + LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif)); + netif->igmp_mac_filter(netif, groupaddr, IGMP_ADD_MAC_FILTER); + } + + IGMP_STATS_INC(igmp.join_sent); + igmp_send(group, IGMP_V2_MEMB_REPORT); + + igmp_start_timer(group, IGMP_JOIN_DELAYING_MEMBER_TMR); + + /* Need to work out where this timer comes from */ + group->group_state = IGMP_GROUP_DELAYING_MEMBER; + } + /* Increment group use */ + group->use++; + /* Join on this interface */ + err = ERR_OK; + } else { + /* Return an error even if some network interfaces are joined */ + /** @todo undo any other netif already joined */ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: Not enought memory to join to group\n")); + return ERR_MEM; + } + } + /* proceed to next network interface */ + netif = netif->next; + } + + return err; +} + +/** + * Leave a group on one network interface. + * + * @param ifaddr ip address of the network interface which should leave a group + * @param groupaddr the ip address of the group which to leave + * @return ERR_OK if group was left on the netif(s), an err_t otherwise + */ +err_t +igmp_leavegroup(struct ip_addr *ifaddr, struct ip_addr *groupaddr) +{ + err_t err = ERR_VAL; /* no matching interface */ + struct igmp_group *group; + struct netif *netif; + + /* make sure it is multicast address */ + LWIP_ERROR("igmp_leavegroup: attempt to leave non-multicast address", ip_addr_ismulticast(groupaddr), return ERR_VAL;); + LWIP_ERROR("igmp_leavegroup: attempt to leave allsystems address", (!ip_addr_cmp(groupaddr, &allsystems)), return ERR_VAL;); + + /* loop through netif's */ + netif = netif_list; + while (netif != NULL) { + /* Should we leave this interface ? */ + if ((netif->flags & NETIF_FLAG_IGMP) && ((ip_addr_isany(ifaddr) || ip_addr_cmp(&(netif->ip_addr), ifaddr)))) { + /* find group */ + group = igmp_lookfor_group(netif, groupaddr); + + if (group != NULL) { + /* Only send a leave if the flag is set according to the state diagram */ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: Leaving group: ")); + ip_addr_debug_print(IGMP_DEBUG, groupaddr); + LWIP_DEBUGF(IGMP_DEBUG, ("\n")); + + /* If there is no other use of the group */ + if (group->use <= 1) { + /* If we are the last reporter for this group */ + if (group->last_reporter_flag) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: sending leaving group\n")); + IGMP_STATS_INC(igmp.leave_sent); + igmp_send(group, IGMP_LEAVE_GROUP); + } + + /* Disable the group at the MAC level */ + if (netif->igmp_mac_filter != NULL) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: igmp_mac_filter(DEL ")); + ip_addr_debug_print(IGMP_DEBUG, groupaddr); + LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif)); + netif->igmp_mac_filter(netif, groupaddr, IGMP_DEL_MAC_FILTER); + } + + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: remove group: ")); + ip_addr_debug_print(IGMP_DEBUG, groupaddr); + LWIP_DEBUGF(IGMP_DEBUG, ("\n")); + + /* Free the group */ + igmp_remove_group(group); + } else { + /* Decrement group use */ + group->use--; + } + /* Leave on this interface */ + err = ERR_OK; + } else { + /* It's not a fatal error on "leavegroup" */ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: not member of group\n")); + } + } + /* proceed to next network interface */ + netif = netif->next; + } + + return err; +} + +/** + * The igmp timer function (both for NO_SYS=1 and =0) + * Should be called every IGMP_TMR_INTERVAL milliseconds (100 ms is default). + */ +void +igmp_tmr(void) +{ + struct igmp_group *group = igmp_group_list; + + while (group != NULL) { + if (group->timer != 0) { + group->timer -= 1; + if (group->timer == 0) { + igmp_timeout(group); + } + } + group = group->next; + } +} + +/** + * Called if a timeout for one group is reached. + * Sends a report for this group. + * + * @param group an igmp_group for which a timeout is reached + */ +void +igmp_timeout(struct igmp_group *group) +{ + /* If the state is IGMP_GROUP_DELAYING_MEMBER then we send a report for this group */ + if (group->group_state == IGMP_GROUP_DELAYING_MEMBER) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_timeout: report membership for group with address ")); + ip_addr_debug_print(IGMP_DEBUG, &(group->group_address)); + LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", group->interface)); + + igmp_send(group, IGMP_V2_MEMB_REPORT); + } +} + +/** + * Start a timer for an igmp group + * + * @param group the igmp_group for which to start a timer + * @param max_time the time in multiples of IGMP_TMR_INTERVAL (decrease with + * every call to igmp_tmr()) + */ +void +igmp_start_timer(struct igmp_group *group, u8_t max_time) +{ + /** + * @todo Important !! this should be random 0 -> max_time. Find out how to do this + */ + group->timer = max_time; +} + +/** + * Stop a timer for an igmp_group + * + * @param group the igmp_group for which to stop the timer + */ +void +igmp_stop_timer(struct igmp_group *group) +{ + group->timer = 0; +} + +/** + * Delaying membership report for a group if necessary + * + * @param group the igmp_group for which "delaying" membership report + * @param maxresp query delay + */ +void +igmp_delaying_member( struct igmp_group *group, u8_t maxresp) +{ + if ((group->group_state == IGMP_GROUP_IDLE_MEMBER) || + ((group->group_state == IGMP_GROUP_DELAYING_MEMBER) && (maxresp > group->timer))) { + igmp_start_timer(group, (maxresp)/2); + group->group_state = IGMP_GROUP_DELAYING_MEMBER; + } +} + + +/** + * Sends an IP packet on a network interface. This function constructs the IP header + * and calculates the IP header checksum. If the source IP address is NULL, + * the IP address of the outgoing network interface is filled in as source address. + * + * @param p the packet to send (p->payload points to the data, e.g. next + protocol header; if dest == IP_HDRINCL, p already includes an IP + header and p->payload points to that IP header) + * @param src the source IP address to send from (if src == IP_ADDR_ANY, the + * IP address of the netif used to send is used as source address) + * @param dest the destination IP address to send the packet to + * @param ttl the TTL value to be set in the IP header + * @param proto the PROTOCOL to be set in the IP header + * @param netif the netif on which to send this packet + * @return ERR_OK if the packet was sent OK + * ERR_BUF if p doesn't have enough space for IP/LINK headers + * returns errors returned by netif->output + */ +err_t +igmp_ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t proto, struct netif *netif) +{ + /* This is the "router alert" option */ + u16_t ra[2]; + ra[0] = htons (ROUTER_ALERT); + ra[1] = 0x0000; /* Router shall examine packet */ + return ip_output_if_opt(p, src, dest, ttl, 0, proto, netif, ra, ROUTER_ALERTLEN); +} + +/** + * Send an igmp packet to a specific group. + * + * @param group the group to which to send the packet + * @param type the type of igmp packet to send + */ +void +igmp_send(struct igmp_group *group, u8_t type) +{ + struct pbuf* p = NULL; + struct igmp_msg* igmp = NULL; + struct ip_addr src = {0}; + struct ip_addr* dest = NULL; + + /* IP header + "router alert" option + IGMP header */ + p = pbuf_alloc(PBUF_TRANSPORT, IGMP_MINLEN, PBUF_RAM); + + if (p) { + igmp = p->payload; + LWIP_ASSERT("igmp_send: check that first pbuf can hold struct igmp_msg", + (p->len >= sizeof(struct igmp_msg))); + ip_addr_set(&src, &((group->interface)->ip_addr)); + + if (type == IGMP_V2_MEMB_REPORT) { + dest = &(group->group_address); + IGMP_STATS_INC(igmp.report_sent); + ip_addr_set(&(igmp->igmp_group_address), &(group->group_address)); + group->last_reporter_flag = 1; /* Remember we were the last to report */ + } else { + if (type == IGMP_LEAVE_GROUP) { + dest = &allrouters; + ip_addr_set(&(igmp->igmp_group_address), &(group->group_address)); + } + } + + if ((type == IGMP_V2_MEMB_REPORT) || (type == IGMP_LEAVE_GROUP)) { + igmp->igmp_msgtype = type; + igmp->igmp_maxresp = 0; + igmp->igmp_checksum = 0; + igmp->igmp_checksum = inet_chksum( igmp, IGMP_MINLEN); + + igmp_ip_output_if(p, &src, dest, IGMP_TTL, IP_PROTO_IGMP, group->interface); + } + + pbuf_free(p); + } else { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_send: not enough memory for igmp_send\n")); + } +} + +#endif /* LWIP_IGMP */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/inet.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/inet.c new file mode 100644 index 0000000..0d4f922 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/inet.c @@ -0,0 +1,280 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Functions common to all TCP/IPv4 modules, such as the byte order functions. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/inet.h" + +/* Here for now until needed in other places in lwIP */ +#ifndef isprint +#define in_range(c, lo, up) ((u8_t)c >= lo && (u8_t)c <= up) +#define isprint(c) in_range(c, 0x20, 0x7f) +#define isdigit(c) in_range(c, '0', '9') +#define isxdigit(c) (isdigit(c) || in_range(c, 'a', 'f') || in_range(c, 'A', 'F')) +#define islower(c) in_range(c, 'a', 'z') +#define isspace(c) (c == ' ' || c == '\f' || c == '\n' || c == '\r' || c == '\t' || c == '\v') +#endif + +/** + * Ascii internet address interpretation routine. + * The value returned is in network order. + * + * @param cp IP address in ascii represenation (e.g. "127.0.0.1") + * @return ip address in network order + */ +u32_t +inet_addr(const char *cp) +{ + struct in_addr val; + + if (inet_aton(cp, &val)) { + return (val.s_addr); + } + return (INADDR_NONE); +} + +/** + * Check whether "cp" is a valid ascii representation + * of an Internet address and convert to a binary address. + * Returns 1 if the address is valid, 0 if not. + * This replaces inet_addr, the return value from which + * cannot distinguish between failure and a local broadcast address. + * + * @param cp IP address in ascii represenation (e.g. "127.0.0.1") + * @param addr pointer to which to save the ip address in network order + * @return 1 if cp could be converted to addr, 0 on failure + */ +int +inet_aton(const char *cp, struct in_addr *addr) +{ + u32_t val; + u8_t base; + char c; + u32_t parts[4]; + u32_t *pp = parts; + + c = *cp; + for (;;) { + /* + * Collect number up to ``.''. + * Values are specified as for C: + * 0x=hex, 0=octal, 1-9=decimal. + */ + if (!isdigit(c)) + return (0); + val = 0; + base = 10; + if (c == '0') { + c = *++cp; + if (c == 'x' || c == 'X') { + base = 16; + c = *++cp; + } else + base = 8; + } + for (;;) { + if (isdigit(c)) { + val = (val * base) + (int)(c - '0'); + c = *++cp; + } else if (base == 16 && isxdigit(c)) { + val = (val << 4) | (int)(c + 10 - (islower(c) ? 'a' : 'A')); + c = *++cp; + } else + break; + } + if (c == '.') { + /* + * Internet format: + * a.b.c.d + * a.b.c (with c treated as 16 bits) + * a.b (with b treated as 24 bits) + */ + if (pp >= parts + 3) + return (0); + *pp++ = val; + c = *++cp; + } else + break; + } + /* + * Check for trailing characters. + */ + if (c != '\0' && !isspace(c)) + return (0); + /* + * Concoct the address according to + * the number of parts specified. + */ + switch (pp - parts + 1) { + + case 0: + return (0); /* initial nondigit */ + + case 1: /* a -- 32 bits */ + break; + + case 2: /* a.b -- 8.24 bits */ + if (val > 0xffffffUL) + return (0); + val |= parts[0] << 24; + break; + + case 3: /* a.b.c -- 8.8.16 bits */ + if (val > 0xffff) + return (0); + val |= (parts[0] << 24) | (parts[1] << 16); + break; + + case 4: /* a.b.c.d -- 8.8.8.8 bits */ + if (val > 0xff) + return (0); + val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8); + break; + } + if (addr) + addr->s_addr = htonl(val); + return (1); +} + +/** + * Convert numeric IP address into decimal dotted ASCII representation. + * returns ptr to static buffer; not reentrant! + * + * @param addr ip address in network order to convert + * @return pointer to a global static (!) buffer that holds the ASCII + * represenation of addr + */ +char * +inet_ntoa(struct in_addr addr) +{ + static char str[16]; + u32_t s_addr = addr.s_addr; + char inv[3]; + char *rp; + u8_t *ap; + u8_t rem; + u8_t n; + u8_t i; + + rp = str; + ap = (u8_t *)&s_addr; + for(n = 0; n < 4; n++) { + i = 0; + do { + rem = *ap % (u8_t)10; + *ap /= (u8_t)10; + inv[i++] = '0' + rem; + } while(*ap); + while(i--) + *rp++ = inv[i]; + *rp++ = '.'; + ap++; + } + *--rp = 0; + return str; +} + +/** + * These are reference implementations of the byte swapping functions. + * Again with the aim of being simple, correct and fully portable. + * Byte swapping is the second thing you would want to optimize. You will + * need to port it to your architecture and in your cc.h: + * + * #define LWIP_PLATFORM_BYTESWAP 1 + * #define LWIP_PLATFORM_HTONS(x) + * #define LWIP_PLATFORM_HTONL(x) + * + * Note ntohs() and ntohl() are merely references to the htonx counterparts. + */ + +#if (LWIP_PLATFORM_BYTESWAP == 0) && (BYTE_ORDER == LITTLE_ENDIAN) + +/** + * Convert an u16_t from host- to network byte order. + * + * @param n u16_t in host byte order + * @return n in network byte order + */ +u16_t +htons(u16_t n) +{ + return ((n & 0xff) << 8) | ((n & 0xff00) >> 8); +} + +/** + * Convert an u16_t from network- to host byte order. + * + * @param n u16_t in network byte order + * @return n in host byte order + */ +u16_t +ntohs(u16_t n) +{ + return htons(n); +} + +/** + * Convert an u32_t from host- to network byte order. + * + * @param n u32_t in host byte order + * @return n in network byte order + */ +u32_t +htonl(u32_t n) +{ + return ((n & 0xff) << 24) | + ((n & 0xff00) << 8) | + ((n & 0xff0000UL) >> 8) | + ((n & 0xff000000UL) >> 24); +} + +/** + * Convert an u32_t from network- to host byte order. + * + * @param n u32_t in network byte order + * @return n in host byte order + */ +u32_t +ntohl(u32_t n) +{ + return htonl(n); +} + +#endif /* (LWIP_PLATFORM_BYTESWAP == 0) && (BYTE_ORDER == LITTLE_ENDIAN) */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/inet_chksum.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/inet_chksum.c new file mode 100644 index 0000000..47a11d4 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/inet_chksum.c @@ -0,0 +1,440 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Incluse internet checksum functions. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/inet_chksum.h" +#include "lwip/inet.h" + +#include + +/* These are some reference implementations of the checksum algorithm, with the + * aim of being simple, correct and fully portable. Checksumming is the + * first thing you would want to optimize for your platform. If you create + * your own version, link it in and in your cc.h put: + * + * #define LWIP_CHKSUM + * + * Or you can select from the implementations below by defining + * LWIP_CHKSUM_ALGORITHM to 1, 2 or 3. + */ + +#ifndef LWIP_CHKSUM +# define LWIP_CHKSUM lwip_standard_chksum +# ifndef LWIP_CHKSUM_ALGORITHM +# define LWIP_CHKSUM_ALGORITHM 1 +# endif +#endif +/* If none set: */ +#ifndef LWIP_CHKSUM_ALGORITHM +# define LWIP_CHKSUM_ALGORITHM 0 +#endif + +/** Like the name says... */ +#if LWIP_PLATFORM_BYTESWAP && (BYTE_ORDER == LITTLE_ENDIAN) +/* little endian and PLATFORM_BYTESWAP defined */ +#define SWAP_BYTES_IN_WORD(w) LWIP_PLATFORM_HTONS(w) +#else +/* can't use htons on big endian (or PLATFORM_BYTESWAP not defined)... */ +#define SWAP_BYTES_IN_WORD(w) ((w & 0xff) << 8) | ((w & 0xff00) >> 8) +#endif + +/** Split an u32_t in two u16_ts and add them up */ +#define FOLD_U32T(u) ((u >> 16) + (u & 0x0000ffffUL)) + +#if (LWIP_CHKSUM_ALGORITHM == 1) /* Version #1 */ +/** + * lwip checksum + * + * @param dataptr points to start of data to be summed at any boundary + * @param len length of data to be summed + * @return host order (!) lwip checksum (non-inverted Internet sum) + * + * @note accumulator size limits summable length to 64k + * @note host endianess is irrelevant (p3 RFC1071) + */ +static u16_t +lwip_standard_chksum(void *dataptr, u16_t len) +{ + u32_t acc; + u16_t src; + u8_t *octetptr; + + acc = 0; + /* dataptr may be at odd or even addresses */ + octetptr = (u8_t*)dataptr; + while (len > 1) { + /* declare first octet as most significant + thus assume network order, ignoring host order */ + src = (*octetptr) << 8; + octetptr++; + /* declare second octet as least significant */ + src |= (*octetptr); + octetptr++; + acc += src; + len -= 2; + } + if (len > 0) { + /* accumulate remaining octet */ + src = (*octetptr) << 8; + acc += src; + } + /* add deferred carry bits */ + acc = (acc >> 16) + (acc & 0x0000ffffUL); + if ((acc & 0xffff0000UL) != 0) { + acc = (acc >> 16) + (acc & 0x0000ffffUL); + } + /* This maybe a little confusing: reorder sum using htons() + instead of ntohs() since it has a little less call overhead. + The caller must invert bits for Internet sum ! */ + return htons((u16_t)acc); +} +#endif + +#if (LWIP_CHKSUM_ALGORITHM == 2) /* Alternative version #2 */ +/* + * Curt McDowell + * Broadcom Corp. + * csm@broadcom.com + * + * IP checksum two bytes at a time with support for + * unaligned buffer. + * Works for len up to and including 0x20000. + * by Curt McDowell, Broadcom Corp. 12/08/2005 + * + * @param dataptr points to start of data to be summed at any boundary + * @param len length of data to be summed + * @return host order (!) lwip checksum (non-inverted Internet sum) + */ + +static u16_t +lwip_standard_chksum(void *dataptr, int len) +{ + u8_t *pb = dataptr; + u16_t *ps, t = 0; + u32_t sum = 0; + int odd = ((u32_t)pb & 1); + + /* Get aligned to u16_t */ + if (odd && len > 0) { + ((u8_t *)&t)[1] = *pb++; + len--; + } + + /* Add the bulk of the data */ + ps = (u16_t *)pb; + while (len > 1) { + sum += *ps++; + len -= 2; + } + + /* Consume left-over byte, if any */ + if (len > 0) { + ((u8_t *)&t)[0] = *(u8_t *)ps;; + } + + /* Add end bytes */ + sum += t; + + /* Fold 32-bit sum to 16 bits + calling this twice is propably faster than if statements... */ + sum = FOLD_U32T(sum); + sum = FOLD_U32T(sum); + + /* Swap if alignment was odd */ + if (odd) { + sum = SWAP_BYTES_IN_WORD(sum); + } + + return sum; +} +#endif + +#if (LWIP_CHKSUM_ALGORITHM == 3) /* Alternative version #3 */ +/** + * An optimized checksum routine. Basically, it uses loop-unrolling on + * the checksum loop, treating the head and tail bytes specially, whereas + * the inner loop acts on 8 bytes at a time. + * + * @arg start of buffer to be checksummed. May be an odd byte address. + * @len number of bytes in the buffer to be checksummed. + * @return host order (!) lwip checksum (non-inverted Internet sum) + * + * by Curt McDowell, Broadcom Corp. December 8th, 2005 + */ + +static u16_t +lwip_standard_chksum(void *dataptr, int len) +{ + u8_t *pb = dataptr; + u16_t *ps, t = 0; + u32_t *pl; + u32_t sum = 0, tmp; + /* starts at odd byte address? */ + int odd = ((u32_t)pb & 1); + + if (odd && len > 0) { + ((u8_t *)&t)[1] = *pb++; + len--; + } + + ps = (u16_t *)pb; + + if (((u32_t)ps & 3) && len > 1) { + sum += *ps++; + len -= 2; + } + + pl = (u32_t *)ps; + + while (len > 7) { + tmp = sum + *pl++; /* ping */ + if (tmp < sum) { + tmp++; /* add back carry */ + } + + sum = tmp + *pl++; /* pong */ + if (sum < tmp) { + sum++; /* add back carry */ + } + + len -= 8; + } + + /* make room in upper bits */ + sum = FOLD_U32T(sum); + + ps = (u16_t *)pl; + + /* 16-bit aligned word remaining? */ + while (len > 1) { + sum += *ps++; + len -= 2; + } + + /* dangling tail byte remaining? */ + if (len > 0) { /* include odd byte */ + ((u8_t *)&t)[0] = *(u8_t *)ps; + } + + sum += t; /* add end bytes */ + + /* Fold 32-bit sum to 16 bits + calling this twice is propably faster than if statements... */ + sum = FOLD_U32T(sum); + sum = FOLD_U32T(sum); + + if (odd) { + sum = SWAP_BYTES_IN_WORD(sum); + } + + return sum; +} +#endif + +/* inet_chksum_pseudo: + * + * Calculates the pseudo Internet checksum used by TCP and UDP for a pbuf chain. + * IP addresses are expected to be in network byte order. + * + * @param p chain of pbufs over that a checksum should be calculated (ip data part) + * @param src source ip address (used for checksum of pseudo header) + * @param dst destination ip address (used for checksum of pseudo header) + * @param proto ip protocol (used for checksum of pseudo header) + * @param proto_len length of the ip data part (used for checksum of pseudo header) + * @return checksum (as u16_t) to be saved directly in the protocol header + */ +u16_t +inet_chksum_pseudo(struct pbuf *p, + struct ip_addr *src, struct ip_addr *dest, + u8_t proto, u16_t proto_len) +{ + u32_t acc; + struct pbuf *q; + u8_t swapped; + + acc = 0; + swapped = 0; + /* iterate through all pbuf in chain */ + for(q = p; q != NULL; q = q->next) { + LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): checksumming pbuf %p (has next %p) \n", + (void *)q, (void *)q->next)); + acc += LWIP_CHKSUM(q->payload, q->len); + /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): unwrapped lwip_chksum()=%"X32_F" \n", acc));*/ + /* just executing this next line is probably faster that the if statement needed + to check whether we really need to execute it, and does no harm */ + acc = FOLD_U32T(acc); + if (q->len % 2 != 0) { + swapped = 1 - swapped; + acc = SWAP_BYTES_IN_WORD(acc); + } + /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): wrapped lwip_chksum()=%"X32_F" \n", acc));*/ + } + + if (swapped) { + acc = SWAP_BYTES_IN_WORD(acc); + } + acc += (src->addr & 0xffffUL); + acc += ((src->addr >> 16) & 0xffffUL); + acc += (dest->addr & 0xffffUL); + acc += ((dest->addr >> 16) & 0xffffUL); + acc += (u32_t)htons((u16_t)proto); + acc += (u32_t)htons(proto_len); + + /* Fold 32-bit sum to 16 bits + calling this twice is propably faster than if statements... */ + acc = FOLD_U32T(acc); + acc = FOLD_U32T(acc); + LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): pbuf chain lwip_chksum()=%"X32_F"\n", acc)); + return (u16_t)~(acc & 0xffffUL); +} + +/* inet_chksum_pseudo: + * + * Calculates the pseudo Internet checksum used by TCP and UDP for a pbuf chain. + * IP addresses are expected to be in network byte order. + * + * @param p chain of pbufs over that a checksum should be calculated (ip data part) + * @param src source ip address (used for checksum of pseudo header) + * @param dst destination ip address (used for checksum of pseudo header) + * @param proto ip protocol (used for checksum of pseudo header) + * @param proto_len length of the ip data part (used for checksum of pseudo header) + * @return checksum (as u16_t) to be saved directly in the protocol header + */ +/* Currently only used by UDPLITE, although this could change in the future. */ +#if LWIP_UDPLITE +u16_t +inet_chksum_pseudo_partial(struct pbuf *p, + struct ip_addr *src, struct ip_addr *dest, + u8_t proto, u16_t proto_len, u16_t chksum_len) +{ + u32_t acc; + struct pbuf *q; + u8_t swapped; + u16_t chklen; + + acc = 0; + swapped = 0; + /* iterate through all pbuf in chain */ + for(q = p; (q != NULL) && (chksum_len > 0); q = q->next) { + LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): checksumming pbuf %p (has next %p) \n", + (void *)q, (void *)q->next)); + chklen = q->len; + if (chklen > chksum_len) { + chklen = chksum_len; + } + acc += LWIP_CHKSUM(q->payload, chklen); + chksum_len -= chklen; + LWIP_ASSERT("delete me", chksum_len < 0x7fff); + /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): unwrapped lwip_chksum()=%"X32_F" \n", acc));*/ + /* fold the upper bit down */ + acc = FOLD_U32T(acc); + if (q->len % 2 != 0) { + swapped = 1 - swapped; + acc = SWAP_BYTES_IN_WORD(acc); + } + /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): wrapped lwip_chksum()=%"X32_F" \n", acc));*/ + } + + if (swapped) { + acc = SWAP_BYTES_IN_WORD(acc); + } + acc += (src->addr & 0xffffUL); + acc += ((src->addr >> 16) & 0xffffUL); + acc += (dest->addr & 0xffffUL); + acc += ((dest->addr >> 16) & 0xffffUL); + acc += (u32_t)htons((u16_t)proto); + acc += (u32_t)htons(proto_len); + + /* Fold 32-bit sum to 16 bits + calling this twice is propably faster than if statements... */ + acc = FOLD_U32T(acc); + acc = FOLD_U32T(acc); + LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): pbuf chain lwip_chksum()=%"X32_F"\n", acc)); + return (u16_t)~(acc & 0xffffUL); +} +#endif /* LWIP_UDPLITE */ + +/* inet_chksum: + * + * Calculates the Internet checksum over a portion of memory. Used primarily for IP + * and ICMP. + * + * @param dataptr start of the buffer to calculate the checksum (no alignment needed) + * @param len length of the buffer to calculate the checksum + * @return checksum (as u16_t) to be saved directly in the protocol header + */ + +u16_t +inet_chksum(void *dataptr, u16_t len) +{ + return ~LWIP_CHKSUM(dataptr, len); +} + +/** + * Calculate a checksum over a chain of pbufs (without pseudo-header, much like + * inet_chksum only pbufs are used). + * + * @param p pbuf chain over that the checksum should be calculated + * @return checksum (as u16_t) to be saved directly in the protocol header + */ +u16_t +inet_chksum_pbuf(struct pbuf *p) +{ + u32_t acc; + struct pbuf *q; + u8_t swapped; + + acc = 0; + swapped = 0; + for(q = p; q != NULL; q = q->next) { + acc += LWIP_CHKSUM(q->payload, q->len); + acc = FOLD_U32T(acc); + if (q->len % 2 != 0) { + swapped = 1 - swapped; + acc = SWAP_BYTES_IN_WORD(acc); + } + } + + if (swapped) { + acc = SWAP_BYTES_IN_WORD(acc); + } + return (u16_t)~(acc & 0xffffUL); +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/ip.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/ip.c new file mode 100644 index 0000000..a958242 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/ip.c @@ -0,0 +1,725 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * This is the IPv4 layer implementation for incoming and outgoing IP traffic. + * + * @see ip_frag.c + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" +#include "lwip/ip.h" +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/ip_frag.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" +#include "lwip/netif.h" +#include "lwip/icmp.h" +#include "lwip/igmp.h" +#include "lwip/raw.h" +#include "lwip/udp.h" +#include "lwip/tcp.h" +#include "lwip/snmp.h" +#include "lwip/dhcp.h" +#include "lwip/stats.h" +#include "arch/perf.h" + +#include + +/** + * The interface that provided the packet for the current callback + * invocation. + */ +struct netif *current_netif; + +/** + * Header of the input packet currently being processed. + */ +const struct ip_hdr *current_header; + +/** + * Finds the appropriate network interface for a given IP address. It + * searches the list of network interfaces linearly. A match is found + * if the masked IP address of the network interface equals the masked + * IP address given to the function. + * + * @param dest the destination IP address for which to find the route + * @return the netif on which to send to reach dest + */ +struct netif * +ip_route(struct ip_addr *dest) +{ + struct netif *netif; + + /* iterate through netifs */ + for(netif = netif_list; netif != NULL; netif = netif->next) { + /* network mask matches? */ + if (netif_is_up(netif)) { + if (ip_addr_netcmp(dest, &(netif->ip_addr), &(netif->netmask))) { + /* return netif on which to forward IP packet */ + return netif; + } + } + } + if ((netif_default == NULL) || (!netif_is_up(netif_default))) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip_route: No route to 0x%"X32_F"\n", dest->addr)); + IP_STATS_INC(ip.rterr); + snmp_inc_ipoutnoroutes(); + return NULL; + } + /* no matching netif found, use default netif */ + return netif_default; +} + +#if IP_FORWARD +/** + * Forwards an IP packet. It finds an appropriate route for the + * packet, decrements the TTL value of the packet, adjusts the + * checksum and outputs the packet on the appropriate interface. + * + * @param p the packet to forward (p->payload points to IP header) + * @param iphdr the IP header of the input packet + * @param inp the netif on which this packet was received + * @return the netif on which the packet was sent (NULL if it wasn't sent) + */ +static struct netif * +ip_forward(struct pbuf *p, struct ip_hdr *iphdr, struct netif *inp) +{ + struct netif *netif; + + PERF_START; + /* Find network interface where to forward this IP packet to. */ + netif = ip_route((struct ip_addr *)&(iphdr->dest)); + if (netif == NULL) { + LWIP_DEBUGF(IP_DEBUG, ("ip_forward: no forwarding route for 0x%"X32_F" found\n", + iphdr->dest.addr)); + snmp_inc_ipoutnoroutes(); + return (struct netif *)NULL; + } + /* Do not forward packets onto the same network interface on which + * they arrived. */ + if (netif == inp) { + LWIP_DEBUGF(IP_DEBUG, ("ip_forward: not bouncing packets back on incoming interface.\n")); + snmp_inc_ipoutnoroutes(); + return (struct netif *)NULL; + } + + /* decrement TTL */ + IPH_TTL_SET(iphdr, IPH_TTL(iphdr) - 1); + /* send ICMP if TTL == 0 */ + if (IPH_TTL(iphdr) == 0) { + snmp_inc_ipinhdrerrors(); +#if LWIP_ICMP + /* Don't send ICMP messages in response to ICMP messages */ + if (IPH_PROTO(iphdr) != IP_PROTO_ICMP) { + icmp_time_exceeded(p, ICMP_TE_TTL); + } +#endif /* LWIP_ICMP */ + return (struct netif *)NULL; + } + + /* Incrementally update the IP checksum. */ + if (IPH_CHKSUM(iphdr) >= htons(0xffff - 0x100)) { + IPH_CHKSUM_SET(iphdr, IPH_CHKSUM(iphdr) + htons(0x100) + 1); + } else { + IPH_CHKSUM_SET(iphdr, IPH_CHKSUM(iphdr) + htons(0x100)); + } + + LWIP_DEBUGF(IP_DEBUG, ("ip_forward: forwarding packet to 0x%"X32_F"\n", + iphdr->dest.addr)); + + IP_STATS_INC(ip.fw); + IP_STATS_INC(ip.xmit); + snmp_inc_ipforwdatagrams(); + + PERF_STOP("ip_forward"); + /* transmit pbuf on chosen interface */ + netif->output(netif, p, (struct ip_addr *)&(iphdr->dest)); + return netif; +} +#endif /* IP_FORWARD */ + +/** + * This function is called by the network interface device driver when + * an IP packet is received. The function does the basic checks of the + * IP header such as packet size being at least larger than the header + * size etc. If the packet was not destined for us, the packet is + * forwarded (using ip_forward). The IP checksum is always checked. + * + * Finally, the packet is sent to the upper layer protocol input function. + * + * @param p the received IP packet (p->payload points to IP header) + * @param inp the netif on which this packet was received + * @return ERR_OK if the packet was processed (could return ERR_* if it wasn't + * processed, but currently always returns ERR_OK) + */ +err_t +ip_input(struct pbuf *p, struct netif *inp) +{ + struct ip_hdr *iphdr; + struct netif *netif; + u16_t iphdr_hlen; + u16_t iphdr_len; +#if LWIP_DHCP + int check_ip_src=1; +#endif /* LWIP_DHCP */ + + IP_STATS_INC(ip.recv); + snmp_inc_ipinreceives(); + + /* identify the IP header */ + iphdr = p->payload; + if (IPH_V(iphdr) != 4) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_WARNING, ("IP packet dropped due to bad version number %"U16_F"\n", IPH_V(iphdr))); + ip_debug_print(p); + pbuf_free(p); + IP_STATS_INC(ip.err); + IP_STATS_INC(ip.drop); + snmp_inc_ipinhdrerrors(); + return ERR_OK; + } + + /* obtain IP header length in number of 32-bit words */ + iphdr_hlen = IPH_HL(iphdr); + /* calculate IP header length in bytes */ + iphdr_hlen *= 4; + /* obtain ip length in bytes */ + iphdr_len = ntohs(IPH_LEN(iphdr)); + + /* header length exceeds first pbuf length, or ip length exceeds total pbuf length? */ + if ((iphdr_hlen > p->len) || (iphdr_len > p->tot_len)) { + if (iphdr_hlen > p->len) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("IP header (len %"U16_F") does not fit in first pbuf (len %"U16_F"), IP packet dropped.\n", + iphdr_hlen, p->len)); + } + if (iphdr_len > p->tot_len) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("IP (len %"U16_F") is longer than pbuf (len %"U16_F"), IP packet dropped.\n", + iphdr_len, p->tot_len)); + } + /* free (drop) packet pbufs */ + pbuf_free(p); + IP_STATS_INC(ip.lenerr); + IP_STATS_INC(ip.drop); + snmp_inc_ipindiscards(); + return ERR_OK; + } + + /* verify checksum */ +#if CHECKSUM_CHECK_IP + if (inet_chksum(iphdr, iphdr_hlen) != 0) { + + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("Checksum (0x%"X16_F") failed, IP packet dropped.\n", inet_chksum(iphdr, iphdr_hlen))); + ip_debug_print(p); + pbuf_free(p); + IP_STATS_INC(ip.chkerr); + IP_STATS_INC(ip.drop); + snmp_inc_ipinhdrerrors(); + return ERR_OK; + } +#endif + + /* Trim pbuf. This should have been done at the netif layer, + * but we'll do it anyway just to be sure that its done. */ + pbuf_realloc(p, iphdr_len); + + /* match packet against an interface, i.e. is this packet for us? */ +#if LWIP_IGMP + if (ip_addr_ismulticast(&(iphdr->dest))) { + if ((inp->flags & NETIF_FLAG_IGMP) && (igmp_lookfor_group(inp, &(iphdr->dest)))) { + netif = inp; + } else { + netif = NULL; + } + } else +#endif /* LWIP_IGMP */ + { + /* start trying with inp. if that's not acceptable, start walking the + list of configured netifs. + 'first' is used as a boolean to mark whether we started walking the list */ + int first = 1; + netif = inp; + do { + LWIP_DEBUGF(IP_DEBUG, ("ip_input: iphdr->dest 0x%"X32_F" netif->ip_addr 0x%"X32_F" (0x%"X32_F", 0x%"X32_F", 0x%"X32_F")\n", + iphdr->dest.addr, netif->ip_addr.addr, + iphdr->dest.addr & netif->netmask.addr, + netif->ip_addr.addr & netif->netmask.addr, + iphdr->dest.addr & ~(netif->netmask.addr))); + + /* interface is up and configured? */ + if ((netif_is_up(netif)) && (!ip_addr_isany(&(netif->ip_addr)))) { + /* unicast to this interface address? */ + if (ip_addr_cmp(&(iphdr->dest), &(netif->ip_addr)) || + /* or broadcast on this interface network address? */ + ip_addr_isbroadcast(&(iphdr->dest), netif)) { + LWIP_DEBUGF(IP_DEBUG, ("ip_input: packet accepted on interface %c%c\n", + netif->name[0], netif->name[1])); + /* break out of for loop */ + break; + } + } + if (first) { + first = 0; + netif = netif_list; + } else { + netif = netif->next; + } + if (netif == inp) { + netif = netif->next; + } + } while(netif != NULL); + } + +#if LWIP_DHCP + /* Pass DHCP messages regardless of destination address. DHCP traffic is addressed + * using link layer addressing (such as Ethernet MAC) so we must not filter on IP. + * According to RFC 1542 section 3.1.1, referred by RFC 2131). + */ + if (netif == NULL) { + /* remote port is DHCP server? */ + if (IPH_PROTO(iphdr) == IP_PROTO_UDP) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip_input: UDP packet to DHCP client port %"U16_F"\n", + ntohs(((struct udp_hdr *)((u8_t *)iphdr + iphdr_hlen))->dest))); + if (ntohs(((struct udp_hdr *)((u8_t *)iphdr + iphdr_hlen))->dest) == DHCP_CLIENT_PORT) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip_input: DHCP packet accepted.\n")); + netif = inp; + check_ip_src = 0; + } + } + } +#endif /* LWIP_DHCP */ + + /* broadcast or multicast packet source address? Compliant with RFC 1122: 3.2.1.3 */ +#if LWIP_DHCP + /* DHCP servers need 0.0.0.0 to be allowed as source address (RFC 1.1.2.2: 3.2.1.3/a) */ + if (check_ip_src && (iphdr->src.addr != 0)) +#endif /* LWIP_DHCP */ + { if ((ip_addr_isbroadcast(&(iphdr->src), inp)) || + (ip_addr_ismulticast(&(iphdr->src)))) { + /* packet source is not valid */ + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("ip_input: packet source is not valid.\n")); + /* free (drop) packet pbufs */ + pbuf_free(p); + IP_STATS_INC(ip.drop); + snmp_inc_ipinaddrerrors(); + snmp_inc_ipindiscards(); + return ERR_OK; + } + } + + /* packet not for us? */ + if (netif == NULL) { + /* packet not for us, route or discard */ + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip_input: packet not for us.\n")); +#if IP_FORWARD + /* non-broadcast packet? */ + if (!ip_addr_isbroadcast(&(iphdr->dest), inp)) { + /* try to forward IP packet on (other) interfaces */ + ip_forward(p, iphdr, inp); + } else +#endif /* IP_FORWARD */ + { + snmp_inc_ipinaddrerrors(); + snmp_inc_ipindiscards(); + } + pbuf_free(p); + return ERR_OK; + } + /* packet consists of multiple fragments? */ + if ((IPH_OFFSET(iphdr) & htons(IP_OFFMASK | IP_MF)) != 0) { +#if IP_REASSEMBLY /* packet fragment reassembly code present? */ + LWIP_DEBUGF(IP_DEBUG, ("IP packet is a fragment (id=0x%04"X16_F" tot_len=%"U16_F" len=%"U16_F" MF=%"U16_F" offset=%"U16_F"), calling ip_reass()\n", + ntohs(IPH_ID(iphdr)), p->tot_len, ntohs(IPH_LEN(iphdr)), !!(IPH_OFFSET(iphdr) & htons(IP_MF)), (ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK)*8)); + /* reassemble the packet*/ + p = ip_reass(p); + /* packet not fully reassembled yet? */ + if (p == NULL) { + return ERR_OK; + } + iphdr = p->payload; +#else /* IP_REASSEMBLY == 0, no packet fragment reassembly code present */ + pbuf_free(p); + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("IP packet dropped since it was fragmented (0x%"X16_F") (while IP_REASSEMBLY == 0).\n", + ntohs(IPH_OFFSET(iphdr)))); + IP_STATS_INC(ip.opterr); + IP_STATS_INC(ip.drop); + /* unsupported protocol feature */ + snmp_inc_ipinunknownprotos(); + return ERR_OK; +#endif /* IP_REASSEMBLY */ + } + +#if IP_OPTIONS_ALLOWED == 0 /* no support for IP options in the IP header? */ + +#if LWIP_IGMP + /* there is an extra "router alert" option in IGMP messages which we allow for but do not police */ + if((iphdr_hlen > IP_HLEN && (IPH_PROTO(iphdr) != IP_PROTO_IGMP)) { +#else + if (iphdr_hlen > IP_HLEN) { +#endif /* LWIP_IGMP */ + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("IP packet dropped since there were IP options (while IP_OPTIONS_ALLOWED == 0).\n")); + pbuf_free(p); + IP_STATS_INC(ip.opterr); + IP_STATS_INC(ip.drop); + /* unsupported protocol feature */ + snmp_inc_ipinunknownprotos(); + return ERR_OK; + } +#endif /* IP_OPTIONS_ALLOWED == 0 */ + + /* send to upper layers */ + LWIP_DEBUGF(IP_DEBUG, ("ip_input: \n")); + ip_debug_print(p); + LWIP_DEBUGF(IP_DEBUG, ("ip_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len)); + + current_netif = inp; + current_header = iphdr; + +#if LWIP_RAW + /* raw input did not eat the packet? */ + if (raw_input(p, inp) == 0) +#endif /* LWIP_RAW */ + { + + switch (IPH_PROTO(iphdr)) { +#if LWIP_UDP + case IP_PROTO_UDP: +#if LWIP_UDPLITE + case IP_PROTO_UDPLITE: +#endif /* LWIP_UDPLITE */ + snmp_inc_ipindelivers(); + udp_input(p, inp); + break; +#endif /* LWIP_UDP */ +#if LWIP_TCP + case IP_PROTO_TCP: + snmp_inc_ipindelivers(); + tcp_input(p, inp); + break; +#endif /* LWIP_TCP */ +#if LWIP_ICMP + case IP_PROTO_ICMP: + snmp_inc_ipindelivers(); + icmp_input(p, inp); + break; +#endif /* LWIP_ICMP */ +#if LWIP_IGMP + case IP_PROTO_IGMP: + igmp_input(p,inp,&(iphdr->dest)); + break; +#endif /* LWIP_IGMP */ + default: +#if LWIP_ICMP + /* send ICMP destination protocol unreachable unless is was a broadcast */ + if (!ip_addr_isbroadcast(&(iphdr->dest), inp) && + !ip_addr_ismulticast(&(iphdr->dest))) { + p->payload = iphdr; + icmp_dest_unreach(p, ICMP_DUR_PROTO); + } +#endif /* LWIP_ICMP */ + pbuf_free(p); + + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("Unsupported transport protocol %"U16_F"\n", IPH_PROTO(iphdr))); + + IP_STATS_INC(ip.proterr); + IP_STATS_INC(ip.drop); + snmp_inc_ipinunknownprotos(); + } + } + + current_netif = NULL; + current_header = NULL; + + return ERR_OK; +} + +/** + * Sends an IP packet on a network interface. This function constructs + * the IP header and calculates the IP header checksum. If the source + * IP address is NULL, the IP address of the outgoing network + * interface is filled in as source address. + * If the destination IP address is IP_HDRINCL, p is assumed to already + * include an IP header and p->payload points to it instead of the data. + * + * @param p the packet to send (p->payload points to the data, e.g. next + protocol header; if dest == IP_HDRINCL, p already includes an IP + header and p->payload points to that IP header) + * @param src the source IP address to send from (if src == IP_ADDR_ANY, the + * IP address of the netif used to send is used as source address) + * @param dest the destination IP address to send the packet to + * @param ttl the TTL value to be set in the IP header + * @param tos the TOS value to be set in the IP header + * @param proto the PROTOCOL to be set in the IP header + * @param netif the netif on which to send this packet + * @return ERR_OK if the packet was sent OK + * ERR_BUF if p doesn't have enough space for IP/LINK headers + * returns errors returned by netif->output + * + * @note ip_id: RFC791 "some host may be able to simply use + * unique identifiers independent of destination" + */ +err_t +ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, + u8_t proto, struct netif *netif) +{ +#if IP_OPTIONS_SEND + return ip_output_if_opt(p, src, dest, ttl, tos, proto, netif, NULL, 0); +} + +/** + * Same as ip_output_if() but with the possibility to include IP options: + * + * @ param ip_options pointer to the IP options, copied into the IP header + * @ param optlen length of ip_options + */ +err_t ip_output_if_opt(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options, + u16_t optlen) +{ +#endif /* IP_OPTIONS_SEND */ + struct ip_hdr *iphdr; + static u16_t ip_id = 0; + + snmp_inc_ipoutrequests(); + + /* Should the IP header be generated or is it already included in p? */ + if (dest != IP_HDRINCL) { + u16_t ip_hlen = IP_HLEN; +#if IP_OPTIONS_SEND + u16_t optlen_aligned = 0; + if (optlen != 0) { + /* round up to a multiple of 4 */ + optlen_aligned = ((optlen + 3) & ~3); + ip_hlen += optlen_aligned; + /* First write in the IP options */ + if (pbuf_header(p, optlen_aligned)) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip_output_if_opt: not enough room for IP options in pbuf\n")); + IP_STATS_INC(ip.err); + snmp_inc_ipoutdiscards(); + return ERR_BUF; + } + MEMCPY(p->payload, ip_options, optlen); + if (optlen < optlen_aligned) { + /* zero the remaining bytes */ + memset(((char*)p->payload) + optlen, 0, optlen_aligned - optlen); + } + } +#endif /* IP_OPTIONS_SEND */ + /* generate IP header */ + if (pbuf_header(p, IP_HLEN)) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip_output: not enough room for IP header in pbuf\n")); + + IP_STATS_INC(ip.err); + snmp_inc_ipoutdiscards(); + return ERR_BUF; + } + + iphdr = p->payload; + LWIP_ASSERT("check that first pbuf can hold struct ip_hdr", + (p->len >= sizeof(struct ip_hdr))); + + IPH_TTL_SET(iphdr, ttl); + IPH_PROTO_SET(iphdr, proto); + + ip_addr_set(&(iphdr->dest), dest); + + IPH_VHLTOS_SET(iphdr, 4, ip_hlen / 4, tos); + IPH_LEN_SET(iphdr, htons(p->tot_len)); + IPH_OFFSET_SET(iphdr, 0); + IPH_ID_SET(iphdr, htons(ip_id)); + ++ip_id; + + if (ip_addr_isany(src)) { + ip_addr_set(&(iphdr->src), &(netif->ip_addr)); + } else { + ip_addr_set(&(iphdr->src), src); + } + + IPH_CHKSUM_SET(iphdr, 0); +#if CHECKSUM_GEN_IP + IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, ip_hlen)); +#endif + } else { + /* IP header already included in p */ + iphdr = p->payload; + dest = &(iphdr->dest); + } + + IP_STATS_INC(ip.xmit); + + LWIP_DEBUGF(IP_DEBUG, ("ip_output_if: %c%c%"U16_F"\n", netif->name[0], netif->name[1], netif->num)); + ip_debug_print(p); + +#if ENABLE_LOOPBACK + if (ip_addr_cmp(dest, &netif->ip_addr)) { + /* Packet to self, enqueue it for loopback */ + LWIP_DEBUGF(IP_DEBUG, ("netif_loop_output()")); + return netif_loop_output(netif, p, dest); + } +#endif /* ENABLE_LOOPBACK */ +#if IP_FRAG + /* don't fragment if interface has mtu set to 0 [loopif] */ + if (netif->mtu && (p->tot_len > netif->mtu)) { + return ip_frag(p,netif,dest); + } +#endif + + LWIP_DEBUGF(IP_DEBUG, ("netif->output()")); + return netif->output(netif, p, dest); +} + +/** + * Simple interface to ip_output_if. It finds the outgoing network + * interface and calls upon ip_output_if to do the actual work. + * + * @param p the packet to send (p->payload points to the data, e.g. next + protocol header; if dest == IP_HDRINCL, p already includes an IP + header and p->payload points to that IP header) + * @param src the source IP address to send from (if src == IP_ADDR_ANY, the + * IP address of the netif used to send is used as source address) + * @param dest the destination IP address to send the packet to + * @param ttl the TTL value to be set in the IP header + * @param tos the TOS value to be set in the IP header + * @param proto the PROTOCOL to be set in the IP header + * + * @return ERR_RTE if no route is found + * see ip_output_if() for more return values + */ +err_t +ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, u8_t proto) +{ + struct netif *netif; + + if ((netif = ip_route(dest)) == NULL) { + LWIP_DEBUGF(IP_DEBUG, ("ip_output: No route to 0x%"X32_F"\n", dest->addr)); + IP_STATS_INC(ip.rterr); + return ERR_RTE; + } + + return ip_output_if(p, src, dest, ttl, tos, proto, netif); +} + +#if LWIP_NETIF_HWADDRHINT +/** Like ip_output, but takes and addr_hint pointer that is passed on to netif->addr_hint + * before calling ip_output_if. + * + * @param p the packet to send (p->payload points to the data, e.g. next + protocol header; if dest == IP_HDRINCL, p already includes an IP + header and p->payload points to that IP header) + * @param src the source IP address to send from (if src == IP_ADDR_ANY, the + * IP address of the netif used to send is used as source address) + * @param dest the destination IP address to send the packet to + * @param ttl the TTL value to be set in the IP header + * @param tos the TOS value to be set in the IP header + * @param proto the PROTOCOL to be set in the IP header + * @param addr_hint address hint pointer set to netif->addr_hint before + * calling ip_output_if() + * + * @return ERR_RTE if no route is found + * see ip_output_if() for more return values + */ +err_t +ip_output_hinted(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, u8_t proto, u8_t *addr_hint) +{ + struct netif *netif; + err_t err; + + if ((netif = ip_route(dest)) == NULL) { + LWIP_DEBUGF(IP_DEBUG, ("ip_output: No route to 0x%"X32_F"\n", dest->addr)); + IP_STATS_INC(ip.rterr); + return ERR_RTE; + } + + netif->addr_hint = addr_hint; + err = ip_output_if(p, src, dest, ttl, tos, proto, netif); + netif->addr_hint = NULL; + + return err; +} +#endif /* LWIP_NETIF_HWADDRHINT*/ + +#if IP_DEBUG +/* Print an IP header by using LWIP_DEBUGF + * @param p an IP packet, p->payload pointing to the IP header + */ +void +ip_debug_print(struct pbuf *p) +{ + struct ip_hdr *iphdr = p->payload; + u8_t *payload; + + payload = (u8_t *)iphdr + IP_HLEN; + + LWIP_DEBUGF(IP_DEBUG, ("IP header:\n")); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("|%2"S16_F" |%2"S16_F" | 0x%02"X16_F" | %5"U16_F" | (v, hl, tos, len)\n", + IPH_V(iphdr), + IPH_HL(iphdr), + IPH_TOS(iphdr), + ntohs(IPH_LEN(iphdr)))); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("| %5"U16_F" |%"U16_F"%"U16_F"%"U16_F"| %4"U16_F" | (id, flags, offset)\n", + ntohs(IPH_ID(iphdr)), + ntohs(IPH_OFFSET(iphdr)) >> 15 & 1, + ntohs(IPH_OFFSET(iphdr)) >> 14 & 1, + ntohs(IPH_OFFSET(iphdr)) >> 13 & 1, + ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK)); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | 0x%04"X16_F" | (ttl, proto, chksum)\n", + IPH_TTL(iphdr), + IPH_PROTO(iphdr), + ntohs(IPH_CHKSUM(iphdr)))); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | %3"U16_F" | %3"U16_F" | (src)\n", + ip4_addr1(&iphdr->src), + ip4_addr2(&iphdr->src), + ip4_addr3(&iphdr->src), + ip4_addr4(&iphdr->src))); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | %3"U16_F" | %3"U16_F" | (dest)\n", + ip4_addr1(&iphdr->dest), + ip4_addr2(&iphdr->dest), + ip4_addr3(&iphdr->dest), + ip4_addr4(&iphdr->dest))); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); +} +#endif /* IP_DEBUG */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/ip_addr.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/ip_addr.c new file mode 100644 index 0000000..33e0aad --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/ip_addr.c @@ -0,0 +1,86 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * This is the IPv4 address tools implementation. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" +#include "lwip/ip_addr.h" +#include "lwip/inet.h" +#include "lwip/netif.h" + +#define IP_ADDR_ANY_VALUE 0x00000000UL +#define IP_ADDR_BROADCAST_VALUE 0xffffffffUL + +/* used by IP_ADDR_ANY and IP_ADDR_BROADCAST in ip_addr.h */ +const struct ip_addr ip_addr_any = { IP_ADDR_ANY_VALUE }; +const struct ip_addr ip_addr_broadcast = { IP_ADDR_BROADCAST_VALUE }; + +/** + * Determine if an address is a broadcast address on a network interface + * + * @param addr address to be checked + * @param netif the network interface against which the address is checked + * @return returns non-zero if the address is a broadcast address + */ +u8_t ip_addr_isbroadcast(struct ip_addr *addr, struct netif *netif) +{ + u32_t addr2test; + + addr2test = addr->addr; + /* all ones (broadcast) or all zeroes (old skool broadcast) */ + if ((~addr2test == IP_ADDR_ANY_VALUE) || + (addr2test == IP_ADDR_ANY_VALUE)) + return 1; + /* no broadcast support on this network interface? */ + else if ((netif->flags & NETIF_FLAG_BROADCAST) == 0) + /* the given address cannot be a broadcast address + * nor can we check against any broadcast addresses */ + return 0; + /* address matches network interface address exactly? => no broadcast */ + else if (addr2test == netif->ip_addr.addr) + return 0; + /* on the same (sub) network... */ + else if (ip_addr_netcmp(addr, &(netif->ip_addr), &(netif->netmask)) + /* ...and host identifier bits are all ones? =>... */ + && ((addr2test & ~netif->netmask.addr) == + (IP_ADDR_BROADCAST_VALUE & ~netif->netmask.addr))) + /* => network broadcast address */ + return 1; + else + return 0; +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/ip_frag.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/ip_frag.c new file mode 100644 index 0000000..ab35572 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/ip_frag.c @@ -0,0 +1,794 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * This is the IPv4 packet segmentation and reassembly implementation. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Jani Monoses + * Simon Goldschmidt + * original reassembly code by Adam Dunkels + * + */ + +#include "lwip/opt.h" +#include "lwip/ip_frag.h" +#include "lwip/ip.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" +#include "lwip/netif.h" +#include "lwip/snmp.h" +#include "lwip/stats.h" +#include "lwip/icmp.h" + +#include + +#if IP_REASSEMBLY +/** + * The IP reassembly code currently has the following limitations: + * - IP header options are not supported + * - fragments must not overlap (e.g. due to different routes), + * currently, overlapping or duplicate fragments are thrown away + * if IP_REASS_CHECK_OVERLAP=1 (the default)! + * + * @todo: work with IP header options + */ + +/** Setting this to 0, you can turn off checking the fragments for overlapping + * regions. The code gets a little smaller. Only use this if you know that + * overlapping won't occur on your network! */ +#ifndef IP_REASS_CHECK_OVERLAP +#define IP_REASS_CHECK_OVERLAP 1 +#endif /* IP_REASS_CHECK_OVERLAP */ + +/** Set to 0 to prevent freeing the oldest datagram when the reassembly buffer is + * full (IP_REASS_MAX_PBUFS pbufs are enqueued). The code gets a little smaller. + * Datagrams will be freed by timeout only. Especially useful when MEMP_NUM_REASSDATA + * is set to 1, so one datagram can be reassembled at a time, only. */ +#ifndef IP_REASS_FREE_OLDEST +#define IP_REASS_FREE_OLDEST 1 +#endif /* IP_REASS_FREE_OLDEST */ + +#define IP_REASS_FLAG_LASTFRAG 0x01 + +/** This is a helper struct which holds the starting + * offset and the ending offset of this fragment to + * easily chain the fragments. + * It has to be packed since it has to fit inside the IP header. + */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct ip_reass_helper { + PACK_STRUCT_FIELD(struct pbuf *next_pbuf); + PACK_STRUCT_FIELD(u16_t start); + PACK_STRUCT_FIELD(u16_t end); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define IP_ADDRESSES_AND_ID_MATCH(iphdrA, iphdrB) \ + (ip_addr_cmp(&(iphdrA)->src, &(iphdrB)->src) && \ + ip_addr_cmp(&(iphdrA)->dest, &(iphdrB)->dest) && \ + IPH_ID(iphdrA) == IPH_ID(iphdrB)) ? 1 : 0 + +/* global variables */ +static struct ip_reassdata *reassdatagrams; +static u16_t ip_reass_pbufcount; + +/* function prototypes */ +static void ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev); +static int ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev); + +/** + * Reassembly timer base function + * for both NO_SYS == 0 and 1 (!). + * + * Should be called every 1000 msec (defined by IP_TMR_INTERVAL). + */ +void +ip_reass_tmr(void) +{ + struct ip_reassdata *r, *prev = NULL; + + r = reassdatagrams; + while (r != NULL) { + /* Decrement the timer. Once it reaches 0, + * clean up the incomplete fragment assembly */ + if (r->timer > 0) { + r->timer--; + LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer dec %"U16_F"\n",(u16_t)r->timer)); + prev = r; + r = r->next; + } else { + /* reassembly timed out */ + struct ip_reassdata *tmp; + LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer timed out\n")); + tmp = r; + /* get the next pointer before freeing */ + r = r->next; + /* free the helper struct and all enqueued pbufs */ + ip_reass_free_complete_datagram(tmp, prev); + } + } +} + +/** + * Free a datagram (struct ip_reassdata) and all its pbufs. + * Updates the total count of enqueued pbufs (ip_reass_pbufcount), + * SNMP counters and sends an ICMP time exceeded packet. + * + * @param ipr datagram to free + * @param prev the previous datagram in the linked list + * @return the number of pbufs freed + */ +static int +ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev) +{ + int pbufs_freed = 0; + struct pbuf *p; + struct ip_reass_helper *iprh; + + LWIP_ASSERT("prev != ipr", prev != ipr); + if (prev != NULL) { + LWIP_ASSERT("prev->next == ipr", prev->next == ipr); + } + + snmp_inc_ipreasmfails(); +#if LWIP_ICMP + iprh = (struct ip_reass_helper *)ipr->p->payload; + if (iprh->start == 0) { + /* The first fragment was received, send ICMP time exceeded. */ + /* First, de-queue the first pbuf from r->p. */ + p = ipr->p; + ipr->p = iprh->next_pbuf; + /* Then, copy the original header into it. */ + SMEMCPY(p->payload, &ipr->iphdr, IP_HLEN); + icmp_time_exceeded(p, ICMP_TE_FRAG); + pbufs_freed += pbuf_clen(p); + pbuf_free(p); + } +#endif /* LWIP_ICMP */ + + /* First, free all received pbufs. The individual pbufs need to be released + separately as they have not yet been chained */ + p = ipr->p; + while (p != NULL) { + struct pbuf *pcur; + iprh = (struct ip_reass_helper *)p->payload; + pcur = p; + /* get the next pointer before freeing */ + p = iprh->next_pbuf; + pbufs_freed += pbuf_clen(pcur); + pbuf_free(pcur); + } + /* Then, unchain the struct ip_reassdata from the list and free it. */ + ip_reass_dequeue_datagram(ipr, prev); + LWIP_ASSERT("ip_reass_pbufcount >= clen", ip_reass_pbufcount >= pbufs_freed); + ip_reass_pbufcount -= pbufs_freed; + + return pbufs_freed; +} + +#if IP_REASS_FREE_OLDEST +/** + * Free the oldest datagram to make room for enqueueing new fragments. + * The datagram 'fraghdr' belongs to is not freed! + * + * @param fraghdr IP header of the current fragment + * @param pbufs_needed number of pbufs needed to enqueue + * (used for freeing other datagrams if not enough space) + * @return the number of pbufs freed + */ +static int +ip_reass_remove_oldest_datagram(struct ip_hdr *fraghdr, int pbufs_needed) +{ + /* @todo Can't we simply remove the last datagram in the + * linked list behind reassdatagrams? + */ + struct ip_reassdata *r, *oldest, *prev; + int pbufs_freed = 0, pbufs_freed_current; + int other_datagrams; + + /* Free datagrams until being allowed to enqueue 'pbufs_needed' pbufs, + * but don't free the datagram that 'fraghdr' belongs to! */ + do { + oldest = NULL; + prev = NULL; + other_datagrams = 0; + r = reassdatagrams; + while (r != NULL) { + if (!IP_ADDRESSES_AND_ID_MATCH(&r->iphdr, fraghdr)) { + /* Not the same datagram as fraghdr */ + other_datagrams++; + if (oldest == NULL) { + oldest = r; + } else if (r->timer <= oldest->timer) { + /* older than the previous oldest */ + oldest = r; + } + } + if (r->next != NULL) { + prev = r; + } + r = r->next; + } + if (oldest != NULL) { + pbufs_freed_current = ip_reass_free_complete_datagram(oldest, prev); + pbufs_freed += pbufs_freed_current; + } + } while ((pbufs_freed < pbufs_needed) && (other_datagrams > 1)); + return pbufs_freed; +} +#endif /* IP_REASS_FREE_OLDEST */ + +/** + * Enqueues a new fragment into the fragment queue + * @param fraghdr points to the new fragments IP hdr + * @param clen number of pbufs needed to enqueue (used for freeing other datagrams if not enough space) + * @return A pointer to the queue location into which the fragment was enqueued + */ +static struct ip_reassdata* +ip_reass_enqueue_new_datagram(struct ip_hdr *fraghdr, int clen) +{ + struct ip_reassdata* ipr; + /* No matching previous fragment found, allocate a new reassdata struct */ + ipr = memp_malloc(MEMP_REASSDATA); + if (ipr == NULL) { +#if IP_REASS_FREE_OLDEST + if (ip_reass_remove_oldest_datagram(fraghdr, clen) >= clen) { + ipr = memp_malloc(MEMP_REASSDATA); + } + if (ipr == NULL) +#endif /* IP_REASS_FREE_OLDEST */ + { + IPFRAG_STATS_INC(ip_frag.memerr); + LWIP_DEBUGF(IP_REASS_DEBUG,("Failed to alloc reassdata struct\n")); + return NULL; + } + } + memset(ipr, 0, sizeof(struct ip_reassdata)); + ipr->timer = IP_REASS_MAXAGE; + + /* enqueue the new structure to the front of the list */ + ipr->next = reassdatagrams; + reassdatagrams = ipr; + /* copy the ip header for later tests and input */ + /* @todo: no ip options supported? */ + SMEMCPY(&(ipr->iphdr), fraghdr, IP_HLEN); + return ipr; +} + +/** + * Dequeues a datagram from the datagram queue. Doesn't deallocate the pbufs. + * @param ipr points to the queue entry to dequeue + */ +static void +ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev) +{ + + /* dequeue the reass struct */ + if (reassdatagrams == ipr) { + /* it was the first in the list */ + reassdatagrams = ipr->next; + } else { + /* it wasn't the first, so it must have a valid 'prev' */ + LWIP_ASSERT("sanity check linked list", prev != NULL); + prev->next = ipr->next; + } + + /* now we can free the ip_reass struct */ + memp_free(MEMP_REASSDATA, ipr); +} + +/** + * Chain a new pbuf into the pbuf list that composes the datagram. The pbuf list + * will grow over time as new pbufs are rx. + * Also checks that the datagram passes basic continuity checks (if the last + * fragment was received at least once). + * @param root_p points to the 'root' pbuf for the current datagram being assembled. + * @param new_p points to the pbuf for the current fragment + * @return 0 if invalid, >0 otherwise + */ +static int +ip_reass_chain_frag_into_datagram_and_validate(struct ip_reassdata *ipr, struct pbuf *new_p) +{ + struct ip_reass_helper *iprh, *iprh_tmp, *iprh_prev=NULL; + struct pbuf *q; + u16_t offset,len; + struct ip_hdr *fraghdr; + int valid = 1; + + /* Extract length and fragment offset from current fragment */ + fraghdr = (struct ip_hdr*)new_p->payload; + len = ntohs(IPH_LEN(fraghdr)) - IPH_HL(fraghdr) * 4; + offset = (ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) * 8; + + /* overwrite the fragment's ip header from the pbuf with our helper struct, + * and setup the embedded helper structure. */ + /* make sure the struct ip_reass_helper fits into the IP header */ + LWIP_ASSERT("sizeof(struct ip_reass_helper) <= IP_HLEN", + sizeof(struct ip_reass_helper) <= IP_HLEN); + iprh = (struct ip_reass_helper*)new_p->payload; + iprh->next_pbuf = NULL; + iprh->start = offset; + iprh->end = offset + len; + + /* Iterate through until we either get to the end of the list (append), + * or we find on with a larger offset (insert). */ + for (q = ipr->p; q != NULL;) { + iprh_tmp = (struct ip_reass_helper*)q->payload; + if (iprh->start < iprh_tmp->start) { + /* the new pbuf should be inserted before this */ + iprh->next_pbuf = q; + if (iprh_prev != NULL) { + /* not the fragment with the lowest offset */ +#if IP_REASS_CHECK_OVERLAP + if ((iprh->start < iprh_prev->end) || (iprh->end > iprh_tmp->start)) { + /* fragment overlaps with previous or following, throw away */ + goto freepbuf; + } +#endif /* IP_REASS_CHECK_OVERLAP */ + iprh_prev->next_pbuf = new_p; + } else { + /* fragment with the lowest offset */ + ipr->p = new_p; + } + break; + } else if(iprh->start == iprh_tmp->start) { + /* received the same datagram twice: no need to keep the datagram */ + goto freepbuf; +#if IP_REASS_CHECK_OVERLAP + } else if(iprh->start < iprh_tmp->end) { + /* overlap: no need to keep the new datagram */ + goto freepbuf; +#endif /* IP_REASS_CHECK_OVERLAP */ + } else { + /* Check if the fragments received so far have no wholes. */ + if (iprh_prev != NULL) { + if (iprh_prev->end != iprh_tmp->start) { + /* There is a fragment missing between the current + * and the previous fragment */ + valid = 0; + } + } + } + q = iprh_tmp->next_pbuf; + iprh_prev = iprh_tmp; + } + + /* If q is NULL, then we made it to the end of the list. Determine what to do now */ + if (q == NULL) { + if (iprh_prev != NULL) { + /* this is (for now), the fragment with the highest offset: + * chain it to the last fragment */ +#if IP_REASS_CHECK_OVERLAP + LWIP_ASSERT("check fragments don't overlap", iprh_prev->end <= iprh->start); +#endif /* IP_REASS_CHECK_OVERLAP */ + iprh_prev->next_pbuf = new_p; + if (iprh_prev->end != iprh->start) { + valid = 0; + } + } else { +#if IP_REASS_CHECK_OVERLAP + LWIP_ASSERT("no previous fragment, this must be the first fragment!", + ipr->p == NULL); +#endif /* IP_REASS_CHECK_OVERLAP */ + /* this is the first fragment we ever received for this ip datagram */ + ipr->p = new_p; + } + } + + /* At this point, the validation part begins: */ + /* If we already received the last fragment */ + if ((ipr->flags & IP_REASS_FLAG_LASTFRAG) != 0) { + /* and had no wholes so far */ + if (valid) { + /* then check if the rest of the fragments is here */ + /* Check if the queue starts with the first datagram */ + if (((struct ip_reass_helper*)ipr->p->payload)->start != 0) { + valid = 0; + } else { + /* and check that there are no wholes after this datagram */ + iprh_prev = iprh; + q = iprh->next_pbuf; + while (q != NULL) { + iprh = (struct ip_reass_helper*)q->payload; + if (iprh_prev->end != iprh->start) { + valid = 0; + break; + } + iprh_prev = iprh; + q = iprh->next_pbuf; + } + /* if still valid, all fragments are received + * (because to the MF==0 already arrived */ + if (valid) { + LWIP_ASSERT("sanity check", ipr->p != NULL); + LWIP_ASSERT("sanity check", + ((struct ip_reass_helper*)ipr->p->payload) != iprh); + LWIP_ASSERT("validate_datagram:next_pbuf!=NULL", + iprh->next_pbuf == NULL); + LWIP_ASSERT("validate_datagram:datagram end!=datagram len", + iprh->end == ipr->datagram_len); + } + } + } + /* If valid is 0 here, there are some fragments missing in the middle + * (since MF == 0 has already arrived). Such datagrams simply time out if + * no more fragments are received... */ + return valid; + } + /* If we come here, not all fragments were received, yet! */ + return 0; /* not yet valid! */ +#if IP_REASS_CHECK_OVERLAP +freepbuf: + ip_reass_pbufcount -= pbuf_clen(new_p); + pbuf_free(new_p); + return 0; +#endif /* IP_REASS_CHECK_OVERLAP */ +} + +/** + * Reassembles incoming IP fragments into an IP datagram. + * + * @param p points to a pbuf chain of the fragment + * @return NULL if reassembly is incomplete, ? otherwise + */ +struct pbuf * +ip_reass(struct pbuf *p) +{ + struct pbuf *r; + struct ip_hdr *fraghdr; + struct ip_reassdata *ipr; + struct ip_reass_helper *iprh; + u16_t offset, len; + u8_t clen; + struct ip_reassdata *ipr_prev = NULL; + + IPFRAG_STATS_INC(ip_frag.recv); + snmp_inc_ipreasmreqds(); + + fraghdr = (struct ip_hdr*)p->payload; + + if ((IPH_HL(fraghdr) * 4) != IP_HLEN) { + LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass: IP options currently not supported!\n")); + IPFRAG_STATS_INC(ip_frag.err); + goto nullreturn; + } + + offset = (ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) * 8; + len = ntohs(IPH_LEN(fraghdr)) - IPH_HL(fraghdr) * 4; + + /* Check if we are allowed to enqueue more datagrams. */ + clen = pbuf_clen(p); + if ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS) { +#if IP_REASS_FREE_OLDEST + if (!ip_reass_remove_oldest_datagram(fraghdr, clen) || + ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS)) +#endif /* IP_REASS_FREE_OLDEST */ + { + /* No datagram could be freed and still too many pbufs enqueued */ + LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass: Overflow condition: pbufct=%d, clen=%d, MAX=%d\n", + ip_reass_pbufcount, clen, IP_REASS_MAX_PBUFS)); + IPFRAG_STATS_INC(ip_frag.memerr); + /* @todo: send ICMP time exceeded here? */ + /* drop this pbuf */ + goto nullreturn; + } + } + + /* Look for the datagram the fragment belongs to in the current datagram queue, + * remembering the previous in the queue for later dequeueing. */ + for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) { + /* Check if the incoming fragment matches the one currently present + in the reassembly buffer. If so, we proceed with copying the + fragment into the buffer. */ + if (IP_ADDRESSES_AND_ID_MATCH(&ipr->iphdr, fraghdr)) { + LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass: matching previous fragment ID=%"X16_F"\n", + ntohs(IPH_ID(fraghdr)))); + IPFRAG_STATS_INC(ip_frag.cachehit); + break; + } + ipr_prev = ipr; + } + + if (ipr == NULL) { + /* Enqueue a new datagram into the datagram queue */ + ipr = ip_reass_enqueue_new_datagram(fraghdr, clen); + /* Bail if unable to enqueue */ + if(ipr == NULL) { + goto nullreturn; + } + } else { + if (((ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) && + ((ntohs(IPH_OFFSET(&ipr->iphdr)) & IP_OFFMASK) != 0)) { + /* ipr->iphdr is not the header from the first fragment, but fraghdr is + * -> copy fraghdr into ipr->iphdr since we want to have the header + * of the first fragment (for ICMP time exceeded and later, for copying + * all options, if supported)*/ + SMEMCPY(&ipr->iphdr, fraghdr, IP_HLEN); + } + } + /* Track the current number of pbufs current 'in-flight', in order to limit + the number of fragments that may be enqueued at any one time */ + ip_reass_pbufcount += clen; + + /* At this point, we have either created a new entry or pointing + * to an existing one */ + + /* check for 'no more fragments', and update queue entry*/ + if ((ntohs(IPH_OFFSET(fraghdr)) & IP_MF) == 0) { + ipr->flags |= IP_REASS_FLAG_LASTFRAG; + ipr->datagram_len = offset + len; + LWIP_DEBUGF(IP_REASS_DEBUG, + ("ip_reass: last fragment seen, total len %"S16_F"\n", + ipr->datagram_len)); + } + /* find the right place to insert this pbuf */ + /* @todo: trim pbufs if fragments are overlapping */ + if (ip_reass_chain_frag_into_datagram_and_validate(ipr, p)) { + /* the totally last fragment (flag more fragments = 0) was received at least + * once AND all fragments are received */ + ipr->datagram_len += IP_HLEN; + + /* save the second pbuf before copying the header over the pointer */ + r = ((struct ip_reass_helper*)ipr->p->payload)->next_pbuf; + + /* copy the original ip header back to the first pbuf */ + fraghdr = (struct ip_hdr*)(ipr->p->payload); + SMEMCPY(fraghdr, &ipr->iphdr, IP_HLEN); + IPH_LEN_SET(fraghdr, htons(ipr->datagram_len)); + IPH_OFFSET_SET(fraghdr, 0); + IPH_CHKSUM_SET(fraghdr, 0); + /* @todo: do we need to set calculate the correct checksum? */ + IPH_CHKSUM_SET(fraghdr, inet_chksum(fraghdr, IP_HLEN)); + + p = ipr->p; + + /* chain together the pbufs contained within the reass_data list. */ + while(r != NULL) { + iprh = (struct ip_reass_helper*)r->payload; + + /* hide the ip header for every succeding fragment */ + pbuf_header(r, -IP_HLEN); + pbuf_cat(p, r); + r = iprh->next_pbuf; + } + /* release the sources allocate for the fragment queue entry */ + ip_reass_dequeue_datagram(ipr, ipr_prev); + + /* and adjust the number of pbufs currently queued for reassembly. */ + ip_reass_pbufcount -= pbuf_clen(p); + + /* Return the pbuf chain */ + return p; + } + /* the datagram is not (yet?) reassembled completely */ + LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass_pbufcount: %d out\n", ip_reass_pbufcount)); + return NULL; + +nullreturn: + LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass: nullreturn\n")); + IPFRAG_STATS_INC(ip_frag.drop); + pbuf_free(p); + return NULL; +} +#endif /* IP_REASSEMBLY */ + +#if IP_FRAG +#if IP_FRAG_USES_STATIC_BUF +static u8_t buf[LWIP_MEM_ALIGN_SIZE(IP_FRAG_MAX_MTU + MEM_ALIGNMENT - 1)]; +#endif /* IP_FRAG_USES_STATIC_BUF */ + +/** + * Fragment an IP datagram if too large for the netif. + * + * Chop the datagram in MTU sized chunks and send them in order + * by using a fixed size static memory buffer (PBUF_REF) or + * point PBUF_REFs into p (depending on IP_FRAG_USES_STATIC_BUF). + * + * @param p ip packet to send + * @param netif the netif on which to send + * @param dest destination ip address to which to send + * + * @return ERR_OK if sent successfully, err_t otherwise + */ +err_t +ip_frag(struct pbuf *p, struct netif *netif, struct ip_addr *dest) +{ + struct pbuf *rambuf; +#if IP_FRAG_USES_STATIC_BUF + struct pbuf *header; +#else + struct pbuf *newpbuf; + struct ip_hdr *original_iphdr; +#endif + struct ip_hdr *iphdr; + u16_t nfb; + u16_t left, cop; + u16_t mtu = netif->mtu; + u16_t ofo, omf; + u16_t last; + u16_t poff = IP_HLEN; + u16_t tmp; +#if !IP_FRAG_USES_STATIC_BUF + u16_t newpbuflen = 0; + u16_t left_to_copy; +#endif + + /* Get a RAM based MTU sized pbuf */ +#if IP_FRAG_USES_STATIC_BUF + /* When using a static buffer, we use a PBUF_REF, which we will + * use to reference the packet (without link header). + * Layer and length is irrelevant. + */ + rambuf = pbuf_alloc(PBUF_LINK, 0, PBUF_REF); + if (rambuf == NULL) { + LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_frag: pbuf_alloc(PBUF_LINK, 0, PBUF_REF) failed\n")); + return ERR_MEM; + } + rambuf->tot_len = rambuf->len = mtu; + rambuf->payload = LWIP_MEM_ALIGN((void *)buf); + + /* Copy the IP header in it */ + iphdr = rambuf->payload; + SMEMCPY(iphdr, p->payload, IP_HLEN); +#else /* IP_FRAG_USES_STATIC_BUF */ + original_iphdr = p->payload; + iphdr = original_iphdr; +#endif /* IP_FRAG_USES_STATIC_BUF */ + + /* Save original offset */ + tmp = ntohs(IPH_OFFSET(iphdr)); + ofo = tmp & IP_OFFMASK; + omf = tmp & IP_MF; + + left = p->tot_len - IP_HLEN; + + nfb = (mtu - IP_HLEN) / 8; + + while (left) { + last = (left <= mtu - IP_HLEN); + + /* Set new offset and MF flag */ + tmp = omf | (IP_OFFMASK & (ofo)); + if (!last) + tmp = tmp | IP_MF; + + /* Fill this fragment */ + cop = last ? left : nfb * 8; + +#if IP_FRAG_USES_STATIC_BUF + poff += pbuf_copy_partial(p, (u8_t*)iphdr + IP_HLEN, cop, poff); +#else /* IP_FRAG_USES_STATIC_BUF */ + /* When not using a static buffer, create a chain of pbufs. + * The first will be a PBUF_RAM holding the link and IP header. + * The rest will be PBUF_REFs mirroring the pbuf chain to be fragged, + * but limited to the size of an mtu. + */ + rambuf = pbuf_alloc(PBUF_LINK, IP_HLEN, PBUF_RAM); + if (rambuf == NULL) { + return ERR_MEM; + } + LWIP_ASSERT("this needs a pbuf in one piece!", + (p->len >= (IP_HLEN))); + SMEMCPY(rambuf->payload, original_iphdr, IP_HLEN); + iphdr = rambuf->payload; + + /* Can just adjust p directly for needed offset. */ + p->payload = (u8_t *)p->payload + poff; + p->len -= poff; + + left_to_copy = cop; + while (left_to_copy) { + newpbuflen = (left_to_copy < p->len) ? left_to_copy : p->len; + /* Is this pbuf already empty? */ + if (!newpbuflen) { + p = p->next; + continue; + } + newpbuf = pbuf_alloc(PBUF_RAW, 0, PBUF_REF); + if (newpbuf == NULL) { + pbuf_free(rambuf); + return ERR_MEM; + } + /* Mirror this pbuf, although we might not need all of it. */ + newpbuf->payload = p->payload; + newpbuf->len = newpbuf->tot_len = newpbuflen; + /* Add it to end of rambuf's chain, but using pbuf_cat, not pbuf_chain + * so that it is removed when pbuf_dechain is later called on rambuf. + */ + pbuf_cat(rambuf, newpbuf); + left_to_copy -= newpbuflen; + if (left_to_copy) + p = p->next; + } + poff = newpbuflen; +#endif /* IP_FRAG_USES_STATIC_BUF */ + + /* Correct header */ + IPH_OFFSET_SET(iphdr, htons(tmp)); + IPH_LEN_SET(iphdr, htons(cop + IP_HLEN)); + IPH_CHKSUM_SET(iphdr, 0); + IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, IP_HLEN)); + +#if IP_FRAG_USES_STATIC_BUF + if (last) + pbuf_realloc(rambuf, left + IP_HLEN); + + /* This part is ugly: we alloc a RAM based pbuf for + * the link level header for each chunk and then + * free it.A PBUF_ROM style pbuf for which pbuf_header + * worked would make things simpler. + */ + header = pbuf_alloc(PBUF_LINK, 0, PBUF_RAM); + if (header != NULL) { + pbuf_chain(header, rambuf); + netif->output(netif, header, dest); + IPFRAG_STATS_INC(ip_frag.xmit); + snmp_inc_ipfragcreates(); + pbuf_free(header); + } else { + LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_frag: pbuf_alloc() for header failed\n")); + pbuf_free(rambuf); + return ERR_MEM; + } +#else /* IP_FRAG_USES_STATIC_BUF */ + /* No need for separate header pbuf - we allowed room for it in rambuf + * when allocated. + */ + netif->output(netif, rambuf, dest); + IPFRAG_STATS_INC(ip_frag.xmit); + + /* Unfortunately we can't reuse rambuf - the hardware may still be + * using the buffer. Instead we free it (and the ensuing chain) and + * recreate it next time round the loop. If we're lucky the hardware + * will have already sent the packet, the free will really free, and + * there will be zero memory penalty. + */ + + pbuf_free(rambuf); +#endif /* IP_FRAG_USES_STATIC_BUF */ + left -= cop; + ofo += nfb; + } +#if IP_FRAG_USES_STATIC_BUF + pbuf_free(rambuf); +#endif /* IP_FRAG_USES_STATIC_BUF */ + snmp_inc_ipfragoks(); + return ERR_OK; +} +#endif /* IP_FRAG */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/mem.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/mem.c new file mode 100644 index 0000000..ea3f4a6 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/mem.c @@ -0,0 +1,635 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Dynamic memory manager + * + * This is a lightweight replacement for the standard C library malloc(). + * + * If you want to use the standard C library malloc() instead, define + * MEM_LIBC_MALLOC to 1 in your lwipopts.h + * + * To let mem_malloc() use pools (prevents fragmentation and is much faster than + * a heap but might waste some memory), define MEM_USE_POOLS to 1, define + * MEM_USE_CUSTOM_POOLS to 1 and create a file "lwippools.h" that includes a list + * of pools like this (more pools can be added between _START and _END): + * + * Define three pools with sizes 256, 512, and 1512 bytes + * LWIP_MALLOC_MEMPOOL_START + * LWIP_MALLOC_MEMPOOL(20, 256) + * LWIP_MALLOC_MEMPOOL(10, 512) + * LWIP_MALLOC_MEMPOOL(5, 1512) + * LWIP_MALLOC_MEMPOOL_END + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * Simon Goldschmidt + * + */ + +#include "lwip/opt.h" + +#if !MEM_LIBC_MALLOC /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/sys.h" +#include "lwip/stats.h" + +#include + +#if MEM_USE_POOLS +/* lwIP head implemented with different sized pools */ + +/** + * Allocate memory: determine the smallest pool that is big enough + * to contain an element of 'size' and get an element from that pool. + * + * @param size the size in bytes of the memory needed + * @return a pointer to the allocated memory or NULL if the pool is empty + */ +void * +mem_malloc(mem_size_t size) +{ + struct memp_malloc_helper *element; + memp_t poolnr; + mem_size_t required_size = size + sizeof(struct memp_malloc_helper); + + for (poolnr = MEMP_POOL_FIRST; poolnr <= MEMP_POOL_LAST; poolnr++) { +#if MEM_USE_POOLS_TRY_BIGGER_POOL +again: +#endif /* MEM_USE_POOLS_TRY_BIGGER_POOL */ + /* is this pool big enough to hold an element of the required size + plus a struct memp_malloc_helper that saves the pool this element came from? */ + if (required_size <= memp_sizes[poolnr]) { + break; + } + } + if (poolnr > MEMP_POOL_LAST) { + LWIP_ASSERT("mem_malloc(): no pool is that big!", 0); + return NULL; + } + element = (struct memp_malloc_helper*)memp_malloc(poolnr); + if (element == NULL) { + /* No need to DEBUGF or ASSERT: This error is already + taken care of in memp.c */ +#if MEM_USE_POOLS_TRY_BIGGER_POOL + /** Try a bigger pool if this one is empty! */ + if (poolnr < MEMP_POOL_LAST) { + poolnr++; + goto again; + } +#endif /* MEM_USE_POOLS_TRY_BIGGER_POOL */ + return NULL; + } + + /* save the pool number this element came from */ + element->poolnr = poolnr; + /* and return a pointer to the memory directly after the struct memp_malloc_helper */ + element++; + + return element; +} + +/** + * Free memory previously allocated by mem_malloc. Loads the pool number + * and calls memp_free with that pool number to put the element back into + * its pool + * + * @param rmem the memory element to free + */ +void +mem_free(void *rmem) +{ + struct memp_malloc_helper *hmem = (struct memp_malloc_helper*)rmem; + + LWIP_ASSERT("rmem != NULL", (rmem != NULL)); + LWIP_ASSERT("rmem == MEM_ALIGN(rmem)", (rmem == LWIP_MEM_ALIGN(rmem))); + + /* get the original struct memp_malloc_helper */ + hmem--; + + LWIP_ASSERT("hmem != NULL", (hmem != NULL)); + LWIP_ASSERT("hmem == MEM_ALIGN(hmem)", (hmem == LWIP_MEM_ALIGN(hmem))); + LWIP_ASSERT("hmem->poolnr < MEMP_MAX", (hmem->poolnr < MEMP_MAX)); + + /* and put it in the pool we saved earlier */ + memp_free(hmem->poolnr, hmem); +} + +#else /* MEM_USE_POOLS */ +/* lwIP replacement for your libc malloc() */ + +/** + * The heap is made up as a list of structs of this type. + * This does not have to be aligned since for getting its size, + * we only use the macro SIZEOF_STRUCT_MEM, which automatically alignes. + */ +struct mem { + /** index (-> ram[next]) of the next struct */ + mem_size_t next; + /** index (-> ram[next]) of the next struct */ + mem_size_t prev; + /** 1: this area is used; 0: this area is unused */ + u8_t used; +}; + +/** All allocated blocks will be MIN_SIZE bytes big, at least! + * MIN_SIZE can be overridden to suit your needs. Smaller values save space, + * larger values could prevent too small blocks to fragment the RAM too much. */ +#ifndef MIN_SIZE +#define MIN_SIZE 12 +#endif /* MIN_SIZE */ +/* some alignment macros: we define them here for better source code layout */ +#define MIN_SIZE_ALIGNED LWIP_MEM_ALIGN_SIZE(MIN_SIZE) +#define SIZEOF_STRUCT_MEM LWIP_MEM_ALIGN_SIZE(sizeof(struct mem)) +#define MEM_SIZE_ALIGNED LWIP_MEM_ALIGN_SIZE(MEM_SIZE) + +/** the heap. we need one struct mem at the end and some room for alignment */ +static u8_t ram_heap[MEM_SIZE_ALIGNED + (2*SIZEOF_STRUCT_MEM) + MEM_ALIGNMENT]; +/** pointer to the heap (ram_heap): for alignment, ram is now a pointer instead of an array */ +static u8_t *ram; +/** the last entry, always unused! */ +static struct mem *ram_end; +/** pointer to the lowest free block, this is used for faster search */ +static struct mem *lfree; + +/** concurrent access protection */ +static sys_sem_t mem_sem; + +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + +static volatile u8_t mem_free_count; + +/* Allow mem_free from other (e.g. interrupt) context */ +#define LWIP_MEM_FREE_DECL_PROTECT() SYS_ARCH_DECL_PROTECT(lev_free) +#define LWIP_MEM_FREE_PROTECT() SYS_ARCH_PROTECT(lev_free) +#define LWIP_MEM_FREE_UNPROTECT() SYS_ARCH_UNPROTECT(lev_free) +#define LWIP_MEM_ALLOC_DECL_PROTECT() SYS_ARCH_DECL_PROTECT(lev_alloc) +#define LWIP_MEM_ALLOC_PROTECT() SYS_ARCH_PROTECT(lev_alloc) +#define LWIP_MEM_ALLOC_UNPROTECT() SYS_ARCH_UNPROTECT(lev_alloc) + +#else /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + +/* Protect the heap only by using a semaphore */ +#define LWIP_MEM_FREE_DECL_PROTECT() +#define LWIP_MEM_FREE_PROTECT() sys_arch_sem_wait(mem_sem, 0) +#define LWIP_MEM_FREE_UNPROTECT() sys_sem_signal(mem_sem) +/* mem_malloc is protected using semaphore AND LWIP_MEM_ALLOC_PROTECT */ +#define LWIP_MEM_ALLOC_DECL_PROTECT() +#define LWIP_MEM_ALLOC_PROTECT() +#define LWIP_MEM_ALLOC_UNPROTECT() + +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + + +/** + * "Plug holes" by combining adjacent empty struct mems. + * After this function is through, there should not exist + * one empty struct mem pointing to another empty struct mem. + * + * @param mem this points to a struct mem which just has been freed + * @internal this function is only called by mem_free() and mem_realloc() + * + * This assumes access to the heap is protected by the calling function + * already. + */ +static void +plug_holes(struct mem *mem) +{ + struct mem *nmem; + struct mem *pmem; + + LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram); + LWIP_ASSERT("plug_holes: mem < ram_end", (u8_t *)mem < (u8_t *)ram_end); + LWIP_ASSERT("plug_holes: mem->used == 0", mem->used == 0); + + /* plug hole forward */ + LWIP_ASSERT("plug_holes: mem->next <= MEM_SIZE_ALIGNED", mem->next <= MEM_SIZE_ALIGNED); + + nmem = (struct mem *)&ram[mem->next]; + if (mem != nmem && nmem->used == 0 && (u8_t *)nmem != (u8_t *)ram_end) { + /* if mem->next is unused and not end of ram, combine mem and mem->next */ + if (lfree == nmem) { + lfree = mem; + } + mem->next = nmem->next; + ((struct mem *)&ram[nmem->next])->prev = (u8_t *)mem - ram; + } + + /* plug hole backward */ + pmem = (struct mem *)&ram[mem->prev]; + if (pmem != mem && pmem->used == 0) { + /* if mem->prev is unused, combine mem and mem->prev */ + if (lfree == mem) { + lfree = pmem; + } + pmem->next = mem->next; + ((struct mem *)&ram[mem->next])->prev = (u8_t *)pmem - ram; + } +} + +/** + * Zero the heap and initialize start, end and lowest-free + */ +void +mem_init(void) +{ + struct mem *mem; + + LWIP_ASSERT("Sanity check alignment", + (SIZEOF_STRUCT_MEM & (MEM_ALIGNMENT-1)) == 0); + + /* align the heap */ + ram = LWIP_MEM_ALIGN(ram_heap); + /* initialize the start of the heap */ + mem = (struct mem *)ram; + mem->next = MEM_SIZE_ALIGNED; + mem->prev = 0; + mem->used = 0; + /* initialize the end of the heap */ + ram_end = (struct mem *)&ram[MEM_SIZE_ALIGNED]; + ram_end->used = 1; + ram_end->next = MEM_SIZE_ALIGNED; + ram_end->prev = MEM_SIZE_ALIGNED; + + mem_sem = sys_sem_new(1); + + /* initialize the lowest-free pointer to the start of the heap */ + lfree = (struct mem *)ram; + + MEM_STATS_AVAIL(avail, MEM_SIZE_ALIGNED); +} + +/** + * Put a struct mem back on the heap + * + * @param rmem is the data portion of a struct mem as returned by a previous + * call to mem_malloc() + */ +void +mem_free(void *rmem) +{ + struct mem *mem; + LWIP_MEM_FREE_DECL_PROTECT(); + + if (rmem == NULL) { + LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("mem_free(p == NULL) was called.\n")); + return; + } + LWIP_ASSERT("mem_free: sanity check alignment", (((mem_ptr_t)rmem) & (MEM_ALIGNMENT-1)) == 0); + + LWIP_ASSERT("mem_free: legal memory", (u8_t *)rmem >= (u8_t *)ram && + (u8_t *)rmem < (u8_t *)ram_end); + + if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) { + SYS_ARCH_DECL_PROTECT(lev); + LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory\n")); + /* protect mem stats from concurrent access */ + SYS_ARCH_PROTECT(lev); + MEM_STATS_INC(illegal); + SYS_ARCH_UNPROTECT(lev); + return; + } + /* protect the heap from concurrent access */ + LWIP_MEM_FREE_PROTECT(); + /* Get the corresponding struct mem ... */ + mem = (struct mem *)((u8_t *)rmem - SIZEOF_STRUCT_MEM); + /* ... which has to be in a used state ... */ + LWIP_ASSERT("mem_free: mem->used", mem->used); + /* ... and is now unused. */ + mem->used = 0; + + if (mem < lfree) { + /* the newly freed struct is now the lowest */ + lfree = mem; + } + + MEM_STATS_DEC_USED(used, mem->next - ((u8_t *)mem - ram)); + + /* finally, see if prev or next are free also */ + plug_holes(mem); +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + mem_free_count = 1; +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + LWIP_MEM_FREE_UNPROTECT(); +} + +/** + * In contrast to its name, mem_realloc can only shrink memory, not expand it. + * Since the only use (for now) is in pbuf_realloc (which also can only shrink), + * this shouldn't be a problem! + * + * @param rmem pointer to memory allocated by mem_malloc the is to be shrinked + * @param newsize required size after shrinking (needs to be smaller than or + * equal to the previous size) + * @return for compatibility reasons: is always == rmem, at the moment + * or NULL if newsize is > old size, in which case rmem is NOT touched + * or freed! + */ +void * +mem_realloc(void *rmem, mem_size_t newsize) +{ + mem_size_t size; + mem_size_t ptr, ptr2; + struct mem *mem, *mem2; + /* use the FREE_PROTECT here: it protects with sem OR SYS_ARCH_PROTECT */ + LWIP_MEM_FREE_DECL_PROTECT(); + + /* Expand the size of the allocated memory region so that we can + adjust for alignment. */ + newsize = LWIP_MEM_ALIGN_SIZE(newsize); + + if(newsize < MIN_SIZE_ALIGNED) { + /* every data block must be at least MIN_SIZE_ALIGNED long */ + newsize = MIN_SIZE_ALIGNED; + } + + if (newsize > MEM_SIZE_ALIGNED) { + return NULL; + } + + LWIP_ASSERT("mem_realloc: legal memory", (u8_t *)rmem >= (u8_t *)ram && + (u8_t *)rmem < (u8_t *)ram_end); + + if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) { + SYS_ARCH_DECL_PROTECT(lev); + LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_realloc: illegal memory\n")); + /* protect mem stats from concurrent access */ + SYS_ARCH_PROTECT(lev); + MEM_STATS_INC(illegal); + SYS_ARCH_UNPROTECT(lev); + return rmem; + } + /* Get the corresponding struct mem ... */ + mem = (struct mem *)((u8_t *)rmem - SIZEOF_STRUCT_MEM); + /* ... and its offset pointer */ + ptr = (u8_t *)mem - ram; + + size = mem->next - ptr - SIZEOF_STRUCT_MEM; + LWIP_ASSERT("mem_realloc can only shrink memory", newsize <= size); + if (newsize > size) { + /* not supported */ + return NULL; + } + if (newsize == size) { + /* No change in size, simply return */ + return rmem; + } + + /* protect the heap from concurrent access */ + LWIP_MEM_FREE_PROTECT(); + + MEM_STATS_DEC_USED(used, (size - newsize)); + + mem2 = (struct mem *)&ram[mem->next]; + if(mem2->used == 0) { + /* The next struct is unused, we can simply move it at little */ + mem_size_t next; + /* remember the old next pointer */ + next = mem2->next; + /* create new struct mem which is moved directly after the shrinked mem */ + ptr2 = ptr + SIZEOF_STRUCT_MEM + newsize; + if (lfree == mem2) { + lfree = (struct mem *)&ram[ptr2]; + } + mem2 = (struct mem *)&ram[ptr2]; + mem2->used = 0; + /* restore the next pointer */ + mem2->next = next; + /* link it back to mem */ + mem2->prev = ptr; + /* link mem to it */ + mem->next = ptr2; + /* last thing to restore linked list: as we have moved mem2, + * let 'mem2->next->prev' point to mem2 again. but only if mem2->next is not + * the end of the heap */ + if (mem2->next != MEM_SIZE_ALIGNED) { + ((struct mem *)&ram[mem2->next])->prev = ptr2; + } + /* no need to plug holes, we've already done that */ + } else if (newsize + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED <= size) { + /* Next struct is used but there's room for another struct mem with + * at least MIN_SIZE_ALIGNED of data. + * Old size ('size') must be big enough to contain at least 'newsize' plus a struct mem + * ('SIZEOF_STRUCT_MEM') with some data ('MIN_SIZE_ALIGNED'). + * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty + * region that couldn't hold data, but when mem->next gets freed, + * the 2 regions would be combined, resulting in more free memory */ + ptr2 = ptr + SIZEOF_STRUCT_MEM + newsize; + mem2 = (struct mem *)&ram[ptr2]; + if (mem2 < lfree) { + lfree = mem2; + } + mem2->used = 0; + mem2->next = mem->next; + mem2->prev = ptr; + mem->next = ptr2; + if (mem2->next != MEM_SIZE_ALIGNED) { + ((struct mem *)&ram[mem2->next])->prev = ptr2; + } + /* the original mem->next is used, so no need to plug holes! */ + } + /* else { + next struct mem is used but size between mem and mem2 is not big enough + to create another struct mem + -> don't do anyhting. + -> the remaining space stays unused since it is too small + } */ +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + mem_free_count = 1; +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + LWIP_MEM_FREE_UNPROTECT(); + return rmem; +} + +/** + * Adam's mem_malloc() plus solution for bug #17922 + * Allocate a block of memory with a minimum of 'size' bytes. + * + * @param size is the minimum size of the requested block in bytes. + * @return pointer to allocated memory or NULL if no free memory was found. + * + * Note that the returned value will always be aligned (as defined by MEM_ALIGNMENT). + */ +void * +mem_malloc(mem_size_t size) +{ + mem_size_t ptr, ptr2; + struct mem *mem, *mem2; +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + u8_t local_mem_free_count = 0; +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + LWIP_MEM_ALLOC_DECL_PROTECT(); + + if (size == 0) { + return NULL; + } + + /* Expand the size of the allocated memory region so that we can + adjust for alignment. */ + size = LWIP_MEM_ALIGN_SIZE(size); + + if(size < MIN_SIZE_ALIGNED) { + /* every data block must be at least MIN_SIZE_ALIGNED long */ + size = MIN_SIZE_ALIGNED; + } + + if (size > MEM_SIZE_ALIGNED) { + return NULL; + } + + /* protect the heap from concurrent access */ + sys_arch_sem_wait(mem_sem, 0); + LWIP_MEM_ALLOC_PROTECT(); +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + /* run as long as a mem_free disturbed mem_malloc */ + do { + local_mem_free_count = 0; +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + + /* Scan through the heap searching for a free block that is big enough, + * beginning with the lowest free block. + */ + for (ptr = (u8_t *)lfree - ram; ptr < MEM_SIZE_ALIGNED - size; + ptr = ((struct mem *)&ram[ptr])->next) { + mem = (struct mem *)&ram[ptr]; +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + mem_free_count = 0; + LWIP_MEM_ALLOC_UNPROTECT(); + /* allow mem_free to run */ + LWIP_MEM_ALLOC_PROTECT(); + if (mem_free_count != 0) { + local_mem_free_count = mem_free_count; + } + mem_free_count = 0; +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + + if ((!mem->used) && + (mem->next - (ptr + SIZEOF_STRUCT_MEM)) >= size) { + /* mem is not used and at least perfect fit is possible: + * mem->next - (ptr + SIZEOF_STRUCT_MEM) gives us the 'user data size' of mem */ + + if (mem->next - (ptr + SIZEOF_STRUCT_MEM) >= (size + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED)) { + /* (in addition to the above, we test if another struct mem (SIZEOF_STRUCT_MEM) containing + * at least MIN_SIZE_ALIGNED of data also fits in the 'user data space' of 'mem') + * -> split large block, create empty remainder, + * remainder must be large enough to contain MIN_SIZE_ALIGNED data: if + * mem->next - (ptr + (2*SIZEOF_STRUCT_MEM)) == size, + * struct mem would fit in but no data between mem2 and mem2->next + * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty + * region that couldn't hold data, but when mem->next gets freed, + * the 2 regions would be combined, resulting in more free memory + */ + ptr2 = ptr + SIZEOF_STRUCT_MEM + size; + /* create mem2 struct */ + mem2 = (struct mem *)&ram[ptr2]; + mem2->used = 0; + mem2->next = mem->next; + mem2->prev = ptr; + /* and insert it between mem and mem->next */ + mem->next = ptr2; + mem->used = 1; + + if (mem2->next != MEM_SIZE_ALIGNED) { + ((struct mem *)&ram[mem2->next])->prev = ptr2; + } + MEM_STATS_INC_USED(used, (size + SIZEOF_STRUCT_MEM)); + } else { + /* (a mem2 struct does no fit into the user data space of mem and mem->next will always + * be used at this point: if not we have 2 unused structs in a row, plug_holes should have + * take care of this). + * -> near fit or excact fit: do not split, no mem2 creation + * also can't move mem->next directly behind mem, since mem->next + * will always be used at this point! + */ + mem->used = 1; + MEM_STATS_INC_USED(used, mem->next - ((u8_t *)mem - ram)); + } + + if (mem == lfree) { + /* Find next free block after mem and update lowest free pointer */ + while (lfree->used && lfree != ram_end) { + LWIP_MEM_ALLOC_UNPROTECT(); + /* prevent high interrupt latency... */ + LWIP_MEM_ALLOC_PROTECT(); + lfree = (struct mem *)&ram[lfree->next]; + } + LWIP_ASSERT("mem_malloc: !lfree->used", ((lfree == ram_end) || (!lfree->used))); + } + LWIP_MEM_ALLOC_UNPROTECT(); + sys_sem_signal(mem_sem); + LWIP_ASSERT("mem_malloc: allocated memory not above ram_end.", + (mem_ptr_t)mem + SIZEOF_STRUCT_MEM + size <= (mem_ptr_t)ram_end); + LWIP_ASSERT("mem_malloc: allocated memory properly aligned.", + ((mem_ptr_t)mem + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT == 0); + LWIP_ASSERT("mem_malloc: sanity check alignment", + (((mem_ptr_t)mem) & (MEM_ALIGNMENT-1)) == 0); + + return (u8_t *)mem + SIZEOF_STRUCT_MEM; + } + } +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + /* if we got interrupted by a mem_free, try again */ + } while(local_mem_free_count != 0); +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("mem_malloc: could not allocate %"S16_F" bytes\n", (s16_t)size)); + MEM_STATS_INC(err); + LWIP_MEM_ALLOC_UNPROTECT(); + sys_sem_signal(mem_sem); + return NULL; +} + +#endif /* MEM_USE_POOLS */ +/** + * Contiguously allocates enough space for count objects that are size bytes + * of memory each and returns a pointer to the allocated memory. + * + * The allocated memory is filled with bytes of value zero. + * + * @param count number of objects to allocate + * @param size size of the objects to allocate + * @return pointer to allocated memory / NULL pointer if there is an error + */ +void *mem_calloc(mem_size_t count, mem_size_t size) +{ + void *p; + + /* allocate 'count' objects of size 'size' */ + p = mem_malloc(count * size); + if (p) { + /* zero the memory */ + memset(p, 0, count * size); + } + return p; +} + +#endif /* !MEM_LIBC_MALLOC */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/memp.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/memp.c new file mode 100644 index 0000000..bd2fd26 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/memp.c @@ -0,0 +1,388 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Dynamic pool memory manager + * + * lwIP has dedicated pools for many structures (netconn, protocol control blocks, + * packet buffers, ...). All these pools are managed here. + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/memp.h" +#include "lwip/pbuf.h" +#include "lwip/udp.h" +#include "lwip/raw.h" +#include "lwip/tcp.h" +#include "lwip/igmp.h" +#include "lwip/api.h" +#include "lwip/api_msg.h" +#include "lwip/tcpip.h" +#include "lwip/sys.h" +#include "lwip/stats.h" +#include "netif/etharp.h" +#include "lwip/ip_frag.h" + +#include + +#if !MEMP_MEM_MALLOC /* don't build if not configured for use in lwipopts.h */ + +struct memp { + struct memp *next; +#if MEMP_OVERFLOW_CHECK + const char *file; + int line; +#endif /* MEMP_OVERFLOW_CHECK */ +}; + +#if MEMP_OVERFLOW_CHECK +/* if MEMP_OVERFLOW_CHECK is turned on, we reserve some bytes at the beginning + * and at the end of each element, initialize them as 0xcd and check + * them later. */ +/* If MEMP_OVERFLOW_CHECK is >= 2, on every call to memp_malloc or memp_free, + * every single element in each pool is checked! + * This is VERY SLOW but also very helpful. */ +/* MEMP_SANITY_REGION_BEFORE and MEMP_SANITY_REGION_AFTER can be overridden in + * lwipopts.h to change the amount reserved for checking. */ +#ifndef MEMP_SANITY_REGION_BEFORE +#define MEMP_SANITY_REGION_BEFORE 16 +#endif /* MEMP_SANITY_REGION_BEFORE*/ +#if MEMP_SANITY_REGION_BEFORE > 0 +#define MEMP_SANITY_REGION_BEFORE_ALIGNED LWIP_MEM_ALIGN_SIZE(MEMP_SANITY_REGION_BEFORE) +#else +#define MEMP_SANITY_REGION_BEFORE_ALIGNED 0 +#endif /* MEMP_SANITY_REGION_BEFORE*/ +#ifndef MEMP_SANITY_REGION_AFTER +#define MEMP_SANITY_REGION_AFTER 16 +#endif /* MEMP_SANITY_REGION_AFTER*/ +#if MEMP_SANITY_REGION_AFTER > 0 +#define MEMP_SANITY_REGION_AFTER_ALIGNED LWIP_MEM_ALIGN_SIZE(MEMP_SANITY_REGION_AFTER) +#else +#define MEMP_SANITY_REGION_AFTER_ALIGNED 0 +#endif /* MEMP_SANITY_REGION_AFTER*/ + +/* MEMP_SIZE: save space for struct memp and for sanity check */ +#define MEMP_SIZE (LWIP_MEM_ALIGN_SIZE(sizeof(struct memp)) + MEMP_SANITY_REGION_BEFORE_ALIGNED) +#define MEMP_ALIGN_SIZE(x) (LWIP_MEM_ALIGN_SIZE(x) + MEMP_SANITY_REGION_AFTER_ALIGNED) + +#else /* MEMP_OVERFLOW_CHECK */ + +/* No sanity checks + * We don't need to preserve the struct memp while not allocated, so we + * can save a little space and set MEMP_SIZE to 0. + */ +#define MEMP_SIZE 0 +#define MEMP_ALIGN_SIZE(x) (LWIP_MEM_ALIGN_SIZE(x)) + +#endif /* MEMP_OVERFLOW_CHECK */ + +/** This array holds the first free element of each pool. + * Elements form a linked list. */ +static struct memp *memp_tab[MEMP_MAX]; + +#else /* MEMP_MEM_MALLOC */ + +#define MEMP_ALIGN_SIZE(x) (LWIP_MEM_ALIGN_SIZE(x)) + +#endif /* MEMP_MEM_MALLOC */ + +/** This array holds the element sizes of each pool. */ +#if !MEM_USE_POOLS && !MEMP_MEM_MALLOC +static +#endif +const u16_t memp_sizes[MEMP_MAX] = { +#define LWIP_MEMPOOL(name,num,size,desc) LWIP_MEM_ALIGN_SIZE(size), +#include "lwip/memp_std.h" +}; + +#if !MEMP_MEM_MALLOC /* don't build if not configured for use in lwipopts.h */ + +/** This array holds the number of elements in each pool. */ +static const u16_t memp_num[MEMP_MAX] = { +#define LWIP_MEMPOOL(name,num,size,desc) (num), +#include "lwip/memp_std.h" +}; + +/** This array holds a textual description of each pool. */ +#ifdef LWIP_DEBUG +static const char *memp_desc[MEMP_MAX] = { +#define LWIP_MEMPOOL(name,num,size,desc) (desc), +#include "lwip/memp_std.h" +}; +#endif /* LWIP_DEBUG */ + +/** This is the actual memory used by the pools. */ +static u8_t memp_memory[MEM_ALIGNMENT - 1 +#define LWIP_MEMPOOL(name,num,size,desc) + ( (num) * (MEMP_SIZE + MEMP_ALIGN_SIZE(size) ) ) +#include "lwip/memp_std.h" +]; + +#if MEMP_SANITY_CHECK +/** + * Check that memp-lists don't form a circle + */ +static int +memp_sanity(void) +{ + s16_t i, c; + struct memp *m, *n; + + for (i = 0; i < MEMP_MAX; i++) { + for (m = memp_tab[i]; m != NULL; m = m->next) { + c = 1; + for (n = memp_tab[i]; n != NULL; n = n->next) { + if (n == m && --c < 0) { + return 0; + } + } + } + } + return 1; +} +#endif /* MEMP_SANITY_CHECK*/ +#if MEMP_OVERFLOW_CHECK +/** + * Check if a memp element was victim of an overflow + * (e.g. the restricted area after it has been altered) + * + * @param p the memp element to check + * @param memp_size the element size of the pool p comes from + */ +static void +memp_overflow_check_element(struct memp *p, u16_t memp_size) +{ + u16_t k; + u8_t *m; +#if MEMP_SANITY_REGION_BEFORE_ALIGNED > 0 + m = (u8_t*)p + MEMP_SIZE - MEMP_SANITY_REGION_BEFORE_ALIGNED; + for (k = 0; k < MEMP_SANITY_REGION_BEFORE_ALIGNED; k++) { + if (m[k] != 0xcd) { + LWIP_ASSERT("detected memp underflow!", 0); + } + } +#endif +#if MEMP_SANITY_REGION_AFTER_ALIGNED > 0 + m = (u8_t*)p + MEMP_SIZE + memp_size; + for (k = 0; k < MEMP_SANITY_REGION_AFTER_ALIGNED; k++) { + if (m[k] != 0xcd) { + LWIP_ASSERT("detected memp overflow!", 0); + } + } +#endif +} + +/** + * Do an overflow check for all elements in every pool. + * + * @see memp_overflow_check_element for a description of the check + */ +static void +memp_overflow_check_all(void) +{ + u16_t i, j; + struct memp *p; + + p = LWIP_MEM_ALIGN(memp_memory); + for (i = 0; i < MEMP_MAX; ++i) { + p = p; + for (j = 0; j < memp_num[i]; ++j) { + memp_overflow_check_element(p, memp_sizes[i]); + p = (struct memp*)((u8_t*)p + MEMP_SIZE + memp_sizes[i] + MEMP_SANITY_REGION_AFTER_ALIGNED); + } + } +} + +/** + * Initialize the restricted areas of all memp elements in every pool. + */ +static void +memp_overflow_init(void) +{ + u16_t i, j; + struct memp *p; + u8_t *m; + + p = LWIP_MEM_ALIGN(memp_memory); + for (i = 0; i < MEMP_MAX; ++i) { + p = p; + for (j = 0; j < memp_num[i]; ++j) { +#if MEMP_SANITY_REGION_BEFORE_ALIGNED > 0 + m = (u8_t*)p + MEMP_SIZE - MEMP_SANITY_REGION_BEFORE_ALIGNED; + memset(m, 0xcd, MEMP_SANITY_REGION_BEFORE_ALIGNED); +#endif +#if MEMP_SANITY_REGION_AFTER_ALIGNED > 0 + m = (u8_t*)p + MEMP_SIZE + memp_sizes[i]; + memset(m, 0xcd, MEMP_SANITY_REGION_AFTER_ALIGNED); +#endif + p = (struct memp*)((u8_t*)p + MEMP_SIZE + memp_sizes[i] + MEMP_SANITY_REGION_AFTER_ALIGNED); + } + } +} +#endif /* MEMP_OVERFLOW_CHECK */ + +/** + * Initialize this module. + * + * Carves out memp_memory into linked lists for each pool-type. + */ +void +memp_init(void) +{ + struct memp *memp; + u16_t i, j; + + for (i = 0; i < MEMP_MAX; ++i) { + MEMP_STATS_AVAIL(used, i, 0); + MEMP_STATS_AVAIL(max, i, 0); + MEMP_STATS_AVAIL(err, i, 0); + MEMP_STATS_AVAIL(avail, i, memp_num[i]); + } + + memp = LWIP_MEM_ALIGN(memp_memory); + /* for every pool: */ + for (i = 0; i < MEMP_MAX; ++i) { + memp_tab[i] = NULL; + /* create a linked list of memp elements */ + for (j = 0; j < memp_num[i]; ++j) { + memp->next = memp_tab[i]; + memp_tab[i] = memp; + memp = (struct memp *)((u8_t *)memp + MEMP_SIZE + memp_sizes[i] +#if MEMP_OVERFLOW_CHECK + + MEMP_SANITY_REGION_AFTER_ALIGNED +#endif + ); + } + } +#if MEMP_OVERFLOW_CHECK + memp_overflow_init(); + /* check everything a first time to see if it worked */ + memp_overflow_check_all(); +#endif /* MEMP_OVERFLOW_CHECK */ +} + +/** + * Get an element from a specific pool. + * + * @param type the pool to get an element from + * + * the debug version has two more parameters: + * @param file file name calling this function + * @param line number of line where this function is called + * + * @return a pointer to the allocated memory or a NULL pointer on error + */ +void * +#if !MEMP_OVERFLOW_CHECK +memp_malloc(memp_t type) +#else +memp_malloc_fn(memp_t type, const char* file, const int line) +#endif +{ + struct memp *memp; + SYS_ARCH_DECL_PROTECT(old_level); + + LWIP_ERROR("memp_malloc: type < MEMP_MAX", (type < MEMP_MAX), return NULL;); + + SYS_ARCH_PROTECT(old_level); +#if MEMP_OVERFLOW_CHECK >= 2 + memp_overflow_check_all(); +#endif /* MEMP_OVERFLOW_CHECK >= 2 */ + + memp = memp_tab[type]; + + if (memp != NULL) { + memp_tab[type] = memp->next; +#if MEMP_OVERFLOW_CHECK + memp->next = NULL; + memp->file = file; + memp->line = line; +#endif /* MEMP_OVERFLOW_CHECK */ + MEMP_STATS_INC_USED(used, type); + LWIP_ASSERT("memp_malloc: memp properly aligned", + ((mem_ptr_t)memp % MEM_ALIGNMENT) == 0); + memp = (struct memp*)((u8_t*)memp + MEMP_SIZE); + } else { + LWIP_DEBUGF(MEMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("memp_malloc: out of memory in pool %s\n", memp_desc[type])); + MEMP_STATS_INC(err, type); + } + + SYS_ARCH_UNPROTECT(old_level); + + return memp; +} + +/** + * Put an element back into its pool. + * + * @param type the pool where to put mem + * @param mem the memp element to free + */ +void +memp_free(memp_t type, void *mem) +{ + struct memp *memp; + SYS_ARCH_DECL_PROTECT(old_level); + + if (mem == NULL) { + return; + } + LWIP_ASSERT("memp_free: mem properly aligned", + ((mem_ptr_t)mem % MEM_ALIGNMENT) == 0); + + memp = (struct memp *)((u8_t*)mem - MEMP_SIZE); + + SYS_ARCH_PROTECT(old_level); +#if MEMP_OVERFLOW_CHECK +#if MEMP_OVERFLOW_CHECK >= 2 + memp_overflow_check_all(); +#else + memp_overflow_check_element(memp, memp_sizes[type]); +#endif /* MEMP_OVERFLOW_CHECK >= 2 */ +#endif /* MEMP_OVERFLOW_CHECK */ + + MEMP_STATS_DEC(used, type); + + memp->next = memp_tab[type]; + memp_tab[type] = memp; + +#if MEMP_SANITY_CHECK + LWIP_ASSERT("memp sanity", memp_sanity()); +#endif /* MEMP_SANITY_CHECK */ + + SYS_ARCH_UNPROTECT(old_level); +} + +#endif /* MEMP_MEM_MALLOC */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/netif.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/netif.c new file mode 100644 index 0000000..cf3815c --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/netif.c @@ -0,0 +1,683 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * lwIP network interface abstraction + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/def.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/tcp.h" +#include "lwip/snmp.h" +#include "lwip/igmp.h" +#include "netif/etharp.h" +#if ENABLE_LOOPBACK +#include "lwip/sys.h" +#if LWIP_NETIF_LOOPBACK_MULTITHREADING +#include "lwip/tcpip.h" +#endif /* LWIP_NETIF_LOOPBACK_MULTITHREADING */ +#endif /* ENABLE_LOOPBACK */ + +#if LWIP_AUTOIP +#include "lwip/autoip.h" +#endif /* LWIP_AUTOIP */ +#if LWIP_DHCP +#include "lwip/dhcp.h" +#endif /* LWIP_DHCP */ + +#if LWIP_NETIF_STATUS_CALLBACK +#define NETIF_STATUS_CALLBACK(n) { if (n->status_callback) (n->status_callback)(n); } +#else +#define NETIF_STATUS_CALLBACK(n) { /* NOP */ } +#endif /* LWIP_NETIF_STATUS_CALLBACK */ + +#if LWIP_NETIF_LINK_CALLBACK +#define NETIF_LINK_CALLBACK(n) { if (n->link_callback) (n->link_callback)(n); } +#else +#define NETIF_LINK_CALLBACK(n) { /* NOP */ } +#endif /* LWIP_NETIF_LINK_CALLBACK */ + +struct netif *netif_list; +struct netif *netif_default; + +/** + * Add a network interface to the list of lwIP netifs. + * + * @param netif a pre-allocated netif structure + * @param ipaddr IP address for the new netif + * @param netmask network mask for the new netif + * @param gw default gateway IP address for the new netif + * @param state opaque data passed to the new netif + * @param init callback function that initializes the interface + * @param input callback function that is called to pass + * ingress packets up in the protocol layer stack. + * + * @return netif, or NULL if failed. + */ +struct netif * +netif_add(struct netif *netif, struct ip_addr *ipaddr, struct ip_addr *netmask, + struct ip_addr *gw, + void *state, + err_t (* init)(struct netif *netif), + err_t (* input)(struct pbuf *p, struct netif *netif)) +{ + static u8_t netifnum = 0; + + /* reset new interface configuration state */ + netif->ip_addr.addr = 0; + netif->netmask.addr = 0; + netif->gw.addr = 0; + netif->flags = 0; +#if LWIP_DHCP + /* netif not under DHCP control by default */ + netif->dhcp = NULL; +#endif /* LWIP_DHCP */ +#if LWIP_AUTOIP + /* netif not under AutoIP control by default */ + netif->autoip = NULL; +#endif /* LWIP_AUTOIP */ +#if LWIP_NETIF_STATUS_CALLBACK + netif->status_callback = NULL; +#endif /* LWIP_NETIF_STATUS_CALLBACK */ +#if LWIP_NETIF_LINK_CALLBACK + netif->link_callback = NULL; +#endif /* LWIP_NETIF_LINK_CALLBACK */ +#if LWIP_IGMP + netif->igmp_mac_filter = NULL; +#endif /* LWIP_IGMP */ +#if ENABLE_LOOPBACK + netif->loop_first = NULL; + netif->loop_last = NULL; +#endif /* ENABLE_LOOPBACK */ + + /* remember netif specific state information data */ + netif->state = state; + netif->num = netifnum++; + netif->input = input; +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = NULL; +#endif /* LWIP_NETIF_HWADDRHINT*/ +#if ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS + netif->loop_cnt_current = 0; +#endif /* ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS */ + + netif_set_addr(netif, ipaddr, netmask, gw); + + /* call user specified initialization function for netif */ + if (init(netif) != ERR_OK) { + return NULL; + } + + /* add this netif to the list */ + netif->next = netif_list; + netif_list = netif; + snmp_inc_iflist(); + +#if LWIP_IGMP + /* start IGMP processing */ + if (netif->flags & NETIF_FLAG_IGMP) { + igmp_start( netif); + } +#endif /* LWIP_IGMP */ + + LWIP_DEBUGF(NETIF_DEBUG, ("netif: added interface %c%c IP addr ", + netif->name[0], netif->name[1])); + ip_addr_debug_print(NETIF_DEBUG, ipaddr); + LWIP_DEBUGF(NETIF_DEBUG, (" netmask ")); + ip_addr_debug_print(NETIF_DEBUG, netmask); + LWIP_DEBUGF(NETIF_DEBUG, (" gw ")); + ip_addr_debug_print(NETIF_DEBUG, gw); + LWIP_DEBUGF(NETIF_DEBUG, ("\n")); + return netif; +} + +/** + * Change IP address configuration for a network interface (including netmask + * and default gateway). + * + * @param netif the network interface to change + * @param ipaddr the new IP address + * @param netmask the new netmask + * @param gw the new default gateway + */ +void +netif_set_addr(struct netif *netif, struct ip_addr *ipaddr, struct ip_addr *netmask, + struct ip_addr *gw) +{ + netif_set_ipaddr(netif, ipaddr); + netif_set_netmask(netif, netmask); + netif_set_gw(netif, gw); +} + +/** + * Remove a network interface from the list of lwIP netifs. + * + * @param netif the network interface to remove + */ +void netif_remove(struct netif * netif) +{ + if ( netif == NULL ) return; + +#if LWIP_IGMP + /* stop IGMP processing */ + if (netif->flags & NETIF_FLAG_IGMP) { + igmp_stop( netif); + } +#endif /* LWIP_IGMP */ + + snmp_delete_ipaddridx_tree(netif); + + /* is it the first netif? */ + if (netif_list == netif) { + netif_list = netif->next; + snmp_dec_iflist(); + } + else { + /* look for netif further down the list */ + struct netif * tmpNetif; + for (tmpNetif = netif_list; tmpNetif != NULL; tmpNetif = tmpNetif->next) { + if (tmpNetif->next == netif) { + tmpNetif->next = netif->next; + snmp_dec_iflist(); + break; + } + } + if (tmpNetif == NULL) + return; /* we didn't find any netif today */ + } + /* this netif is default? */ + if (netif_default == netif) + /* reset default netif */ + netif_set_default(NULL); + LWIP_DEBUGF( NETIF_DEBUG, ("netif_remove: removed netif\n") ); +} + +/** + * Find a network interface by searching for its name + * + * @param name the name of the netif (like netif->name) plus concatenated number + * in ascii representation (e.g. 'en0') + */ +struct netif * +netif_find(char *name) +{ + struct netif *netif; + u8_t num; + + if (name == NULL) { + return NULL; + } + + num = name[2] - '0'; + + for(netif = netif_list; netif != NULL; netif = netif->next) { + if (num == netif->num && + name[0] == netif->name[0] && + name[1] == netif->name[1]) { + LWIP_DEBUGF(NETIF_DEBUG, ("netif_find: found %c%c\n", name[0], name[1])); + return netif; + } + } + LWIP_DEBUGF(NETIF_DEBUG, ("netif_find: didn't find %c%c\n", name[0], name[1])); + return NULL; +} + +/** + * Change the IP address of a network interface + * + * @param netif the network interface to change + * @param ipaddr the new IP address + * + * @note call netif_set_addr() if you also want to change netmask and + * default gateway + */ +void +netif_set_ipaddr(struct netif *netif, struct ip_addr *ipaddr) +{ + /* TODO: Handling of obsolete pcbs */ + /* See: http://mail.gnu.org/archive/html/lwip-users/2003-03/msg00118.html */ +#if LWIP_TCP + struct tcp_pcb *pcb; + struct tcp_pcb_listen *lpcb; + + /* address is actually being changed? */ + if ((ip_addr_cmp(ipaddr, &(netif->ip_addr))) == 0) + { + /* extern struct tcp_pcb *tcp_active_pcbs; defined by tcp.h */ + LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: netif address being changed\n")); + pcb = tcp_active_pcbs; + while (pcb != NULL) { + /* PCB bound to current local interface address? */ + if (ip_addr_cmp(&(pcb->local_ip), &(netif->ip_addr))) { + /* this connection must be aborted */ + struct tcp_pcb *next = pcb->next; + LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: aborting TCP pcb %p\n", (void *)pcb)); + tcp_abort(pcb); + pcb = next; + } else { + pcb = pcb->next; + } + } + for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { + /* PCB bound to current local interface address? */ + if ((!(ip_addr_isany(&(lpcb->local_ip)))) && + (ip_addr_cmp(&(lpcb->local_ip), &(netif->ip_addr)))) { + /* The PCB is listening to the old ipaddr and + * is set to listen to the new one instead */ + ip_addr_set(&(lpcb->local_ip), ipaddr); + } + } + } +#endif + snmp_delete_ipaddridx_tree(netif); + snmp_delete_iprteidx_tree(0,netif); + /* set new IP address to netif */ + ip_addr_set(&(netif->ip_addr), ipaddr); + snmp_insert_ipaddridx_tree(netif); + snmp_insert_iprteidx_tree(0,netif); + + LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("netif: IP address of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + netif->name[0], netif->name[1], + ip4_addr1(&netif->ip_addr), + ip4_addr2(&netif->ip_addr), + ip4_addr3(&netif->ip_addr), + ip4_addr4(&netif->ip_addr))); +} + +/** + * Change the default gateway for a network interface + * + * @param netif the network interface to change + * @param gw the new default gateway + * + * @note call netif_set_addr() if you also want to change ip address and netmask + */ +void +netif_set_gw(struct netif *netif, struct ip_addr *gw) +{ + ip_addr_set(&(netif->gw), gw); + LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("netif: GW address of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + netif->name[0], netif->name[1], + ip4_addr1(&netif->gw), + ip4_addr2(&netif->gw), + ip4_addr3(&netif->gw), + ip4_addr4(&netif->gw))); +} + +/** + * Change the netmask of a network interface + * + * @param netif the network interface to change + * @param netmask the new netmask + * + * @note call netif_set_addr() if you also want to change ip address and + * default gateway + */ +void +netif_set_netmask(struct netif *netif, struct ip_addr *netmask) +{ + snmp_delete_iprteidx_tree(0, netif); + /* set new netmask to netif */ + ip_addr_set(&(netif->netmask), netmask); + snmp_insert_iprteidx_tree(0, netif); + LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("netif: netmask of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + netif->name[0], netif->name[1], + ip4_addr1(&netif->netmask), + ip4_addr2(&netif->netmask), + ip4_addr3(&netif->netmask), + ip4_addr4(&netif->netmask))); +} + +/** + * Set a network interface as the default network interface + * (used to output all packets for which no specific route is found) + * + * @param netif the default network interface + */ +void +netif_set_default(struct netif *netif) +{ + if (netif == NULL) + { + /* remove default route */ + snmp_delete_iprteidx_tree(1, netif); + } + else + { + /* install default route */ + snmp_insert_iprteidx_tree(1, netif); + } + netif_default = netif; + LWIP_DEBUGF(NETIF_DEBUG, ("netif: setting default interface %c%c\n", + netif ? netif->name[0] : '\'', netif ? netif->name[1] : '\'')); +} + +/** + * Bring an interface up, available for processing + * traffic. + * + * @note: Enabling DHCP on a down interface will make it come + * up once configured. + * + * @see dhcp_start() + */ +void netif_set_up(struct netif *netif) +{ + if ( !(netif->flags & NETIF_FLAG_UP )) { + netif->flags |= NETIF_FLAG_UP; + +#if LWIP_SNMP + snmp_get_sysuptime(&netif->ts); +#endif /* LWIP_SNMP */ + + NETIF_LINK_CALLBACK(netif); + NETIF_STATUS_CALLBACK(netif); + +#if LWIP_ARP + /* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */ + if (netif->flags & NETIF_FLAG_ETHARP) { + etharp_gratuitous(netif); + } +#endif /* LWIP_ARP */ + +#if LWIP_IGMP + /* resend IGMP memberships */ + if (netif->flags & NETIF_FLAG_IGMP) { + igmp_report_groups( netif); + } +#endif /* LWIP_IGMP */ + } +} + +/** + * Bring an interface down, disabling any traffic processing. + * + * @note: Enabling DHCP on a down interface will make it come + * up once configured. + * + * @see dhcp_start() + */ +void netif_set_down(struct netif *netif) +{ + if ( netif->flags & NETIF_FLAG_UP ) + { + netif->flags &= ~NETIF_FLAG_UP; +#if LWIP_SNMP + snmp_get_sysuptime(&netif->ts); +#endif + + NETIF_LINK_CALLBACK(netif); + NETIF_STATUS_CALLBACK(netif); + } +} + +/** + * Ask if an interface is up + */ +u8_t netif_is_up(struct netif *netif) +{ + return (netif->flags & NETIF_FLAG_UP)?1:0; +} + +#if LWIP_NETIF_STATUS_CALLBACK +/** + * Set callback to be called when interface is brought up/down + */ +void netif_set_status_callback(struct netif *netif, void (* status_callback)(struct netif *netif )) +{ + if ( netif ) + netif->status_callback = status_callback; +} +#endif /* LWIP_NETIF_STATUS_CALLBACK */ + +#if LWIP_NETIF_LINK_CALLBACK +/** + * Called by a driver when its link goes up + */ +void netif_set_link_up(struct netif *netif ) +{ + netif->flags |= NETIF_FLAG_LINK_UP; + +#if LWIP_DHCP + if (netif->dhcp) { + dhcp_network_changed(netif); + } +#endif /* LWIP_DHCP */ + +#if LWIP_AUTOIP + if (netif->autoip) { + autoip_network_changed(netif); + } +#endif /* LWIP_AUTOIP */ + + if (netif->flags & NETIF_FLAG_UP) { +#if LWIP_ARP + /* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */ + if (netif->flags & NETIF_FLAG_ETHARP) { + etharp_gratuitous(netif); + } +#endif /* LWIP_ARP */ + +#if LWIP_IGMP + /* resend IGMP memberships */ + if (netif->flags & NETIF_FLAG_IGMP) { + igmp_report_groups( netif); + } +#endif /* LWIP_IGMP */ + } + NETIF_LINK_CALLBACK(netif); +} + +/** + * Called by a driver when its link goes down + */ +void netif_set_link_down(struct netif *netif ) +{ + netif->flags &= ~NETIF_FLAG_LINK_UP; + NETIF_LINK_CALLBACK(netif); +} + +/** + * Ask if a link is up + */ +u8_t netif_is_link_up(struct netif *netif) +{ + return (netif->flags & NETIF_FLAG_LINK_UP) ? 1 : 0; +} + +/** + * Set callback to be called when link is brought up/down + */ +void netif_set_link_callback(struct netif *netif, void (* link_callback)(struct netif *netif )) +{ + if (netif) { + netif->link_callback = link_callback; + } +} +#endif /* LWIP_NETIF_LINK_CALLBACK */ + +#if ENABLE_LOOPBACK +/** + * Send an IP packet to be received on the same netif (loopif-like). + * The pbuf is simply copied and handed back to netif->input. + * In multithreaded mode, this is done directly since netif->input must put + * the packet on a queue. + * In callback mode, the packet is put on an internal queue and is fed to + * netif->input by netif_poll(). + * + * @param netif the lwip network interface structure + * @param p the (IP) packet to 'send' + * @param ipaddr the ip address to send the packet to (not used) + * @return ERR_OK if the packet has been sent + * ERR_MEM if the pbuf used to copy the packet couldn't be allocated + */ +err_t +netif_loop_output(struct netif *netif, struct pbuf *p, + struct ip_addr *ipaddr) +{ + struct pbuf *r; + err_t err; + struct pbuf *last; +#if LWIP_LOOPBACK_MAX_PBUFS + u8_t clen = 0; +#endif /* LWIP_LOOPBACK_MAX_PBUFS */ + SYS_ARCH_DECL_PROTECT(lev); + LWIP_UNUSED_ARG(ipaddr); + + /* Allocate a new pbuf */ + r = pbuf_alloc(PBUF_LINK, p->tot_len, PBUF_RAM); + if (r == NULL) { + return ERR_MEM; + } +#if LWIP_LOOPBACK_MAX_PBUFS + clen = pbuf_clen(r); + /* check for overflow or too many pbuf on queue */ + if(((netif->loop_cnt_current + clen) < netif->loop_cnt_current) || + ((netif->loop_cnt_current + clen) > LWIP_LOOPBACK_MAX_PBUFS)) { + pbuf_free(r); + r = NULL; + return ERR_MEM; + } + netif->loop_cnt_current += clen; +#endif /* LWIP_LOOPBACK_MAX_PBUFS */ + + /* Copy the whole pbuf queue p into the single pbuf r */ + if ((err = pbuf_copy(r, p)) != ERR_OK) { + pbuf_free(r); + r = NULL; + return err; + } + + /* Put the packet on a linked list which gets emptied through calling + netif_poll(). */ + + /* let last point to the last pbuf in chain r */ + for (last = r; last->next != NULL; last = last->next); + + SYS_ARCH_PROTECT(lev); + if(netif->loop_first != NULL) { + LWIP_ASSERT("if first != NULL, last must also be != NULL", netif->loop_last != NULL); + netif->loop_last->next = r; + netif->loop_last = last; + } else { + netif->loop_first = r; + netif->loop_last = last; + } + SYS_ARCH_UNPROTECT(lev); + +#if LWIP_NETIF_LOOPBACK_MULTITHREADING + /* For multithreading environment, schedule a call to netif_poll */ + tcpip_callback((void (*)(void *))(netif_poll), netif); +#endif /* LWIP_NETIF_LOOPBACK_MULTITHREADING */ + + return ERR_OK; +} + +/** + * Call netif_poll() in the main loop of your application. This is to prevent + * reentering non-reentrant functions like tcp_input(). Packets passed to + * netif_loop_output() are put on a list that is passed to netif->input() by + * netif_poll(). + */ +void +netif_poll(struct netif *netif) +{ + struct pbuf *in; + SYS_ARCH_DECL_PROTECT(lev); + + do { + /* Get a packet from the list. With SYS_LIGHTWEIGHT_PROT=1, this is protected */ + SYS_ARCH_PROTECT(lev); + in = netif->loop_first; + if(in != NULL) { + struct pbuf *in_end = in; +#if LWIP_LOOPBACK_MAX_PBUFS + u8_t clen = pbuf_clen(in); + /* adjust the number of pbufs on queue */ + LWIP_ASSERT("netif->loop_cnt_current underflow", + ((netif->loop_cnt_current - clen) < netif->loop_cnt_current)); + netif->loop_cnt_current -= clen; +#endif /* LWIP_LOOPBACK_MAX_PBUFS */ + while(in_end->len != in_end->tot_len) { + LWIP_ASSERT("bogus pbuf: len != tot_len but next == NULL!", in_end->next != NULL); + in_end = in_end->next; + } + /* 'in_end' now points to the last pbuf from 'in' */ + if(in_end == netif->loop_last) { + /* this was the last pbuf in the list */ + netif->loop_first = netif->loop_last = NULL; + } else { + /* pop the pbuf off the list */ + netif->loop_first = in_end->next; + LWIP_ASSERT("should not be null since first != last!", netif->loop_first != NULL); + } + /* De-queue the pbuf from its successors on the 'loop_' list. */ + in_end->next = NULL; + } + SYS_ARCH_UNPROTECT(lev); + + if(in != NULL) { + /* loopback packets are always IP packets! */ + if(ip_input(in, netif) != ERR_OK) { + pbuf_free(in); + } + /* Don't reference the packet any more! */ + in = NULL; + } + /* go on while there is a packet on the list */ + } while(netif->loop_first != NULL); +} + +#if !LWIP_NETIF_LOOPBACK_MULTITHREADING +/** + * Calls netif_poll() for every netif on the netif_list. + */ +void +netif_poll_all(void) +{ + struct netif *netif = netif_list; + /* loop through netifs */ + while (netif != NULL) { + netif_poll(netif); + /* proceed to next network interface */ + netif = netif->next; + } +} +#endif /* !LWIP_NETIF_LOOPBACK_MULTITHREADING */ +#endif /* ENABLE_LOOPBACK */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/pbuf.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/pbuf.c new file mode 100644 index 0000000..6284b9a --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/pbuf.c @@ -0,0 +1,931 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Packet buffer management + * + * Packets are built from the pbuf data structure. It supports dynamic + * memory allocation for packet contents or can reference externally + * managed packet contents both in RAM and ROM. Quick allocation for + * incoming packets is provided through pools with fixed sized pbufs. + * + * A packet may span over multiple pbufs, chained as a singly linked + * list. This is called a "pbuf chain". + * + * Multiple packets may be queued, also using this singly linked list. + * This is called a "packet queue". + * + * So, a packet queue consists of one or more pbuf chains, each of + * which consist of one or more pbufs. CURRENTLY, PACKET QUEUES ARE + * NOT SUPPORTED!!! Use helper structs to queue multiple packets. + * + * The differences between a pbuf chain and a packet queue are very + * precise but subtle. + * + * The last pbuf of a packet has a ->tot_len field that equals the + * ->len field. It can be found by traversing the list. If the last + * pbuf of a packet has a ->next field other than NULL, more packets + * are on the queue. + * + * Therefore, looping through a pbuf of a single packet, has an + * loop end condition (tot_len == p->len), NOT (next == NULL). + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/stats.h" +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/pbuf.h" +#include "lwip/sys.h" +#include "arch/perf.h" +#if TCP_QUEUE_OOSEQ +#include "lwip/tcp.h" +#endif + +#include + +#define SIZEOF_STRUCT_PBUF LWIP_MEM_ALIGN_SIZE(sizeof(struct pbuf)) +/* Since the pool is created in memp, PBUF_POOL_BUFSIZE will be automatically + aligned there. Therefore, PBUF_POOL_BUFSIZE_ALIGNED can be used here. */ +#define PBUF_POOL_BUFSIZE_ALIGNED LWIP_MEM_ALIGN_SIZE(PBUF_POOL_BUFSIZE) + +#if !TCP_QUEUE_OOSEQ || NO_SYS +#define PBUF_POOL_IS_EMPTY() +#else /* !TCP_QUEUE_OOSEQ || NO_SYS */ +/** Define this to 0 to prevent freeing ooseq pbufs when the PBUF_POOL is empty */ +#ifndef PBUF_POOL_FREE_OOSEQ +#define PBUF_POOL_FREE_OOSEQ 1 +#endif /* PBUF_POOL_FREE_OOSEQ */ + +#if PBUF_POOL_FREE_OOSEQ +#include "lwip/tcpip.h" +#define PBUF_POOL_IS_EMPTY() pbuf_pool_is_empty() +static u8_t pbuf_free_ooseq_queued; +/** + * Attempt to reclaim some memory from queued out-of-sequence TCP segments + * if we run out of pool pbufs. It's better to give priority to new packets + * if we're running out. + * + * This must be done in the correct thread context therefore this function + * can only be used with NO_SYS=0 and through tcpip_callback. + */ +static void +pbuf_free_ooseq(void* arg) +{ + struct tcp_pcb* pcb; + SYS_ARCH_DECL_PROTECT(old_level); + LWIP_UNUSED_ARG(arg); + + SYS_ARCH_PROTECT(old_level); + pbuf_free_ooseq_queued = 0; + SYS_ARCH_UNPROTECT(old_level); + + for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) { + if (NULL != pcb->ooseq) { + /** Free the ooseq pbufs of one PCB only */ + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free_ooseq: freeing out-of-sequence pbufs\n")); + tcp_segs_free(pcb->ooseq); + pcb->ooseq = NULL; + return; + } + } +} + +/** Queue a call to pbuf_free_ooseq if not already queued. */ +static void +pbuf_pool_is_empty(void) +{ + u8_t queued; + SYS_ARCH_DECL_PROTECT(old_level); + + SYS_ARCH_PROTECT(old_level); + queued = pbuf_free_ooseq_queued; + pbuf_free_ooseq_queued = 1; + SYS_ARCH_UNPROTECT(old_level); + + if(!queued) { + /* queue a call to pbuf_free_ooseq if not already queued */ + if(tcpip_callback_with_block(pbuf_free_ooseq, NULL, 0) != ERR_OK) { + SYS_ARCH_PROTECT(old_level); + pbuf_free_ooseq_queued = 0; + SYS_ARCH_UNPROTECT(old_level); + } + } +} +#endif /* PBUF_POOL_FREE_OOSEQ */ +#endif /* !TCP_QUEUE_OOSEQ || NO_SYS */ + +/** + * Allocates a pbuf of the given type (possibly a chain for PBUF_POOL type). + * + * The actual memory allocated for the pbuf is determined by the + * layer at which the pbuf is allocated and the requested size + * (from the size parameter). + * + * @param layer flag to define header size + * @param length size of the pbuf's payload + * @param type this parameter decides how and where the pbuf + * should be allocated as follows: + * + * - PBUF_RAM: buffer memory for pbuf is allocated as one large + * chunk. This includes protocol headers as well. + * - PBUF_ROM: no buffer memory is allocated for the pbuf, even for + * protocol headers. Additional headers must be prepended + * by allocating another pbuf and chain in to the front of + * the ROM pbuf. It is assumed that the memory used is really + * similar to ROM in that it is immutable and will not be + * changed. Memory which is dynamic should generally not + * be attached to PBUF_ROM pbufs. Use PBUF_REF instead. + * - PBUF_REF: no buffer memory is allocated for the pbuf, even for + * protocol headers. It is assumed that the pbuf is only + * being used in a single thread. If the pbuf gets queued, + * then pbuf_take should be called to copy the buffer. + * - PBUF_POOL: the pbuf is allocated as a pbuf chain, with pbufs from + * the pbuf pool that is allocated during pbuf_init(). + * + * @return the allocated pbuf. If multiple pbufs where allocated, this + * is the first pbuf of a pbuf chain. + */ +struct pbuf * +pbuf_alloc(pbuf_layer layer, u16_t length, pbuf_type type) +{ + struct pbuf *p, *q, *r; + u16_t offset; + s32_t rem_len; /* remaining length */ + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F")\n", length)); + + /* determine header offset */ + offset = 0; + switch (layer) { + case PBUF_TRANSPORT: + /* add room for transport (often TCP) layer header */ + offset += PBUF_TRANSPORT_HLEN; + /* FALLTHROUGH */ + case PBUF_IP: + /* add room for IP layer header */ + offset += PBUF_IP_HLEN; + /* FALLTHROUGH */ + case PBUF_LINK: + /* add room for link layer header */ + offset += PBUF_LINK_HLEN; + break; + case PBUF_RAW: + break; + default: + LWIP_ASSERT("pbuf_alloc: bad pbuf layer", 0); + return NULL; + } + + switch (type) { + case PBUF_POOL: + /* allocate head of pbuf chain into p */ + p = memp_malloc(MEMP_PBUF_POOL); + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc: allocated pbuf %p\n", (void *)p)); + if (p == NULL) { + PBUF_POOL_IS_EMPTY(); + return NULL; + } + p->type = type; + p->next = NULL; + + /* make the payload pointer point 'offset' bytes into pbuf data memory */ + p->payload = LWIP_MEM_ALIGN((void *)((u8_t *)p + (SIZEOF_STRUCT_PBUF + offset))); + LWIP_ASSERT("pbuf_alloc: pbuf p->payload properly aligned", + ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0); + /* the total length of the pbuf chain is the requested size */ + p->tot_len = length; + /* set the length of the first pbuf in the chain */ + p->len = LWIP_MIN(length, PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)); + LWIP_ASSERT("check p->payload + p->len does not overflow pbuf", + ((u8_t*)p->payload + p->len <= + (u8_t*)p + SIZEOF_STRUCT_PBUF + PBUF_POOL_BUFSIZE_ALIGNED)); + LWIP_ASSERT("PBUF_POOL_BUFSIZE must be bigger than MEM_ALIGNMENT", + (PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)) > 0 ); + /* set reference count (needed here in case we fail) */ + p->ref = 1; + + /* now allocate the tail of the pbuf chain */ + + /* remember first pbuf for linkage in next iteration */ + r = p; + /* remaining length to be allocated */ + rem_len = length - p->len; + /* any remaining pbufs to be allocated? */ + while (rem_len > 0) { + q = memp_malloc(MEMP_PBUF_POOL); + if (q == NULL) { + PBUF_POOL_IS_EMPTY(); + /* free chain so far allocated */ + pbuf_free(p); + /* bail out unsuccesfully */ + return NULL; + } + q->type = type; + q->flags = 0; + q->next = NULL; + /* make previous pbuf point to this pbuf */ + r->next = q; + /* set total length of this pbuf and next in chain */ + LWIP_ASSERT("rem_len < max_u16_t", rem_len < 0xffff); + q->tot_len = (u16_t)rem_len; + /* this pbuf length is pool size, unless smaller sized tail */ + q->len = LWIP_MIN((u16_t)rem_len, PBUF_POOL_BUFSIZE_ALIGNED); + q->payload = (void *)((u8_t *)q + SIZEOF_STRUCT_PBUF); + LWIP_ASSERT("pbuf_alloc: pbuf q->payload properly aligned", + ((mem_ptr_t)q->payload % MEM_ALIGNMENT) == 0); + LWIP_ASSERT("check p->payload + p->len does not overflow pbuf", + ((u8_t*)p->payload + p->len <= + (u8_t*)p + SIZEOF_STRUCT_PBUF + PBUF_POOL_BUFSIZE_ALIGNED)); + q->ref = 1; + /* calculate remaining length to be allocated */ + rem_len -= q->len; + /* remember this pbuf for linkage in next iteration */ + r = q; + } + /* end of chain */ + /*r->next = NULL;*/ + + break; + case PBUF_RAM: + /* If pbuf is to be allocated in RAM, allocate memory for it. */ + p = (struct pbuf*)mem_malloc(LWIP_MEM_ALIGN_SIZE(SIZEOF_STRUCT_PBUF + offset) + LWIP_MEM_ALIGN_SIZE(length)); + if (p == NULL) { + return NULL; + } + /* Set up internal structure of the pbuf. */ + p->payload = LWIP_MEM_ALIGN((void *)((u8_t *)p + SIZEOF_STRUCT_PBUF + offset)); + p->len = p->tot_len = length; + p->next = NULL; + p->type = type; + + LWIP_ASSERT("pbuf_alloc: pbuf->payload properly aligned", + ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0); + break; + /* pbuf references existing (non-volatile static constant) ROM payload? */ + case PBUF_ROM: + /* pbuf references existing (externally allocated) RAM payload? */ + case PBUF_REF: + /* only allocate memory for the pbuf structure */ + p = memp_malloc(MEMP_PBUF); + if (p == NULL) { + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("pbuf_alloc: Could not allocate MEMP_PBUF for PBUF_%s.\n", + (type == PBUF_ROM) ? "ROM" : "REF")); + return NULL; + } + /* caller must set this field properly, afterwards */ + p->payload = NULL; + p->len = p->tot_len = length; + p->next = NULL; + p->type = type; + break; + default: + LWIP_ASSERT("pbuf_alloc: erroneous type", 0); + return NULL; + } + /* set reference count */ + p->ref = 1; + /* set flags */ + p->flags = 0; + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F") == %p\n", length, (void *)p)); + return p; +} + + +/** + * Shrink a pbuf chain to a desired length. + * + * @param p pbuf to shrink. + * @param new_len desired new length of pbuf chain + * + * Depending on the desired length, the first few pbufs in a chain might + * be skipped and left unchanged. The new last pbuf in the chain will be + * resized, and any remaining pbufs will be freed. + * + * @note If the pbuf is ROM/REF, only the ->tot_len and ->len fields are adjusted. + * @note May not be called on a packet queue. + * + * @note Despite its name, pbuf_realloc cannot grow the size of a pbuf (chain). + */ +void +pbuf_realloc(struct pbuf *p, u16_t new_len) +{ + struct pbuf *q; + u16_t rem_len; /* remaining length */ + s32_t grow; + + LWIP_ASSERT("pbuf_realloc: p != NULL", p != NULL); + LWIP_ASSERT("pbuf_realloc: sane p->type", p->type == PBUF_POOL || + p->type == PBUF_ROM || + p->type == PBUF_RAM || + p->type == PBUF_REF); + + /* desired length larger than current length? */ + if (new_len >= p->tot_len) { + /* enlarging not yet supported */ + return; + } + + /* the pbuf chain grows by (new_len - p->tot_len) bytes + * (which may be negative in case of shrinking) */ + grow = new_len - p->tot_len; + + /* first, step over any pbufs that should remain in the chain */ + rem_len = new_len; + q = p; + /* should this pbuf be kept? */ + while (rem_len > q->len) { + /* decrease remaining length by pbuf length */ + rem_len -= q->len; + /* decrease total length indicator */ + LWIP_ASSERT("grow < max_u16_t", grow < 0xffff); + q->tot_len += (u16_t)grow; + /* proceed to next pbuf in chain */ + q = q->next; + LWIP_ASSERT("pbuf_realloc: q != NULL", q != NULL); + } + /* we have now reached the new last pbuf (in q) */ + /* rem_len == desired length for pbuf q */ + + /* shrink allocated memory for PBUF_RAM */ + /* (other types merely adjust their length fields */ + if ((q->type == PBUF_RAM) && (rem_len != q->len)) { + /* reallocate and adjust the length of the pbuf that will be split */ + q = mem_realloc(q, (u8_t *)q->payload - (u8_t *)q + rem_len); + LWIP_ASSERT("mem_realloc give q == NULL", q != NULL); + } + /* adjust length fields for new last pbuf */ + q->len = rem_len; + q->tot_len = q->len; + + /* any remaining pbufs in chain? */ + if (q->next != NULL) { + /* free remaining pbufs in chain */ + pbuf_free(q->next); + } + /* q is last packet in chain */ + q->next = NULL; + +} + +/** + * Adjusts the payload pointer to hide or reveal headers in the payload. + * + * Adjusts the ->payload pointer so that space for a header + * (dis)appears in the pbuf payload. + * + * The ->payload, ->tot_len and ->len fields are adjusted. + * + * @param p pbuf to change the header size. + * @param header_size_increment Number of bytes to increment header size which + * increases the size of the pbuf. New space is on the front. + * (Using a negative value decreases the header size.) + * If hdr_size_inc is 0, this function does nothing and returns succesful. + * + * PBUF_ROM and PBUF_REF type buffers cannot have their sizes increased, so + * the call will fail. A check is made that the increase in header size does + * not move the payload pointer in front of the start of the buffer. + * @return non-zero on failure, zero on success. + * + */ +u8_t +pbuf_header(struct pbuf *p, s16_t header_size_increment) +{ + u16_t type; + void *payload; + u16_t increment_magnitude; + + LWIP_ASSERT("p != NULL", p != NULL); + if ((header_size_increment == 0) || (p == NULL)) + return 0; + + if (header_size_increment < 0){ + increment_magnitude = -header_size_increment; + /* Check that we aren't going to move off the end of the pbuf */ + LWIP_ERROR("increment_magnitude <= p->len", (increment_magnitude <= p->len), return 1;); + } else { + increment_magnitude = header_size_increment; +#if 0 + /* Can't assert these as some callers speculatively call + pbuf_header() to see if it's OK. Will return 1 below instead. */ + /* Check that we've got the correct type of pbuf to work with */ + LWIP_ASSERT("p->type == PBUF_RAM || p->type == PBUF_POOL", + p->type == PBUF_RAM || p->type == PBUF_POOL); + /* Check that we aren't going to move off the beginning of the pbuf */ + LWIP_ASSERT("p->payload - increment_magnitude >= p + SIZEOF_STRUCT_PBUF", + (u8_t *)p->payload - increment_magnitude >= (u8_t *)p + SIZEOF_STRUCT_PBUF); +#endif + } + + type = p->type; + /* remember current payload pointer */ + payload = p->payload; + + /* pbuf types containing payloads? */ + if (type == PBUF_RAM || type == PBUF_POOL) { + /* set new payload pointer */ + p->payload = (u8_t *)p->payload - header_size_increment; + /* boundary check fails? */ + if ((u8_t *)p->payload < (u8_t *)p + SIZEOF_STRUCT_PBUF) { + LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("pbuf_header: failed as %p < %p (not enough space for new header size)\n", + (void *)p->payload, (void *)(p + 1))); + /* restore old payload pointer */ + p->payload = payload; + /* bail out unsuccesfully */ + return 1; + } + /* pbuf types refering to external payloads? */ + } else if (type == PBUF_REF || type == PBUF_ROM) { + /* hide a header in the payload? */ + if ((header_size_increment < 0) && (increment_magnitude <= p->len)) { + /* increase payload pointer */ + p->payload = (u8_t *)p->payload - header_size_increment; + } else { + /* cannot expand payload to front (yet!) + * bail out unsuccesfully */ + return 1; + } + } + else { + /* Unknown type */ + LWIP_ASSERT("bad pbuf type", 0); + return 1; + } + /* modify pbuf length fields */ + p->len += header_size_increment; + p->tot_len += header_size_increment; + + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_header: old %p new %p (%"S16_F")\n", + (void *)payload, (void *)p->payload, header_size_increment)); + + return 0; +} + +/** + * Dereference a pbuf chain or queue and deallocate any no-longer-used + * pbufs at the head of this chain or queue. + * + * Decrements the pbuf reference count. If it reaches zero, the pbuf is + * deallocated. + * + * For a pbuf chain, this is repeated for each pbuf in the chain, + * up to the first pbuf which has a non-zero reference count after + * decrementing. So, when all reference counts are one, the whole + * chain is free'd. + * + * @param p The pbuf (chain) to be dereferenced. + * + * @return the number of pbufs that were de-allocated + * from the head of the chain. + * + * @note MUST NOT be called on a packet queue (Not verified to work yet). + * @note the reference counter of a pbuf equals the number of pointers + * that refer to the pbuf (or into the pbuf). + * + * @internal examples: + * + * Assuming existing chains a->b->c with the following reference + * counts, calling pbuf_free(a) results in: + * + * 1->2->3 becomes ...1->3 + * 3->3->3 becomes 2->3->3 + * 1->1->2 becomes ......1 + * 2->1->1 becomes 1->1->1 + * 1->1->1 becomes ....... + * + */ +u8_t +pbuf_free(struct pbuf *p) +{ + u16_t type; + struct pbuf *q; + u8_t count; + + if (p == NULL) { + LWIP_ASSERT("p != NULL", p != NULL); + /* if assertions are disabled, proceed with debug output */ + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("pbuf_free(p == NULL) was called.\n")); + return 0; + } + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free(%p)\n", (void *)p)); + + PERF_START; + + LWIP_ASSERT("pbuf_free: sane type", + p->type == PBUF_RAM || p->type == PBUF_ROM || + p->type == PBUF_REF || p->type == PBUF_POOL); + + count = 0; + /* de-allocate all consecutive pbufs from the head of the chain that + * obtain a zero reference count after decrementing*/ + while (p != NULL) { + u16_t ref; + SYS_ARCH_DECL_PROTECT(old_level); + /* Since decrementing ref cannot be guaranteed to be a single machine operation + * we must protect it. We put the new ref into a local variable to prevent + * further protection. */ + SYS_ARCH_PROTECT(old_level); + /* all pbufs in a chain are referenced at least once */ + LWIP_ASSERT("pbuf_free: p->ref > 0", p->ref > 0); + /* decrease reference count (number of pointers to pbuf) */ + ref = --(p->ref); + SYS_ARCH_UNPROTECT(old_level); + /* this pbuf is no longer referenced to? */ + if (ref == 0) { + /* remember next pbuf in chain for next iteration */ + q = p->next; + LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: deallocating %p\n", (void *)p)); + type = p->type; + /* is this a pbuf from the pool? */ + if (type == PBUF_POOL) { + memp_free(MEMP_PBUF_POOL, p); + /* is this a ROM or RAM referencing pbuf? */ + } else if (type == PBUF_ROM || type == PBUF_REF) { + memp_free(MEMP_PBUF, p); + /* type == PBUF_RAM */ + } else { + mem_free(p); + } + count++; + /* proceed to next pbuf */ + p = q; + /* p->ref > 0, this pbuf is still referenced to */ + /* (and so the remaining pbufs in chain as well) */ + } else { + LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: %p has ref %"U16_F", ending here.\n", (void *)p, ref)); + /* stop walking through the chain */ + p = NULL; + } + } + PERF_STOP("pbuf_free"); + /* return number of de-allocated pbufs */ + return count; +} + +/** + * Count number of pbufs in a chain + * + * @param p first pbuf of chain + * @return the number of pbufs in a chain + */ + +u8_t +pbuf_clen(struct pbuf *p) +{ + u8_t len; + + len = 0; + while (p != NULL) { + ++len; + p = p->next; + } + return len; +} + +/** + * Increment the reference count of the pbuf. + * + * @param p pbuf to increase reference counter of + * + */ +void +pbuf_ref(struct pbuf *p) +{ + SYS_ARCH_DECL_PROTECT(old_level); + /* pbuf given? */ + if (p != NULL) { + SYS_ARCH_PROTECT(old_level); + ++(p->ref); + SYS_ARCH_UNPROTECT(old_level); + } +} + +/** + * Concatenate two pbufs (each may be a pbuf chain) and take over + * the caller's reference of the tail pbuf. + * + * @note The caller MAY NOT reference the tail pbuf afterwards. + * Use pbuf_chain() for that purpose. + * + * @see pbuf_chain() + */ + +void +pbuf_cat(struct pbuf *h, struct pbuf *t) +{ + struct pbuf *p; + + LWIP_ERROR("(h != NULL) && (t != NULL) (programmer violates API)", + ((h != NULL) && (t != NULL)), return;); + + /* proceed to last pbuf of chain */ + for (p = h; p->next != NULL; p = p->next) { + /* add total length of second chain to all totals of first chain */ + p->tot_len += t->tot_len; + } + /* { p is last pbuf of first h chain, p->next == NULL } */ + LWIP_ASSERT("p->tot_len == p->len (of last pbuf in chain)", p->tot_len == p->len); + LWIP_ASSERT("p->next == NULL", p->next == NULL); + /* add total length of second chain to last pbuf total of first chain */ + p->tot_len += t->tot_len; + /* chain last pbuf of head (p) with first of tail (t) */ + p->next = t; + /* p->next now references t, but the caller will drop its reference to t, + * so netto there is no change to the reference count of t. + */ +} + +/** + * Chain two pbufs (or pbuf chains) together. + * + * The caller MUST call pbuf_free(t) once it has stopped + * using it. Use pbuf_cat() instead if you no longer use t. + * + * @param h head pbuf (chain) + * @param t tail pbuf (chain) + * @note The pbufs MUST belong to the same packet. + * @note MAY NOT be called on a packet queue. + * + * The ->tot_len fields of all pbufs of the head chain are adjusted. + * The ->next field of the last pbuf of the head chain is adjusted. + * The ->ref field of the first pbuf of the tail chain is adjusted. + * + */ +void +pbuf_chain(struct pbuf *h, struct pbuf *t) +{ + pbuf_cat(h, t); + /* t is now referenced by h */ + pbuf_ref(t); + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_chain: %p references %p\n", (void *)h, (void *)t)); +} + +/** + * Dechains the first pbuf from its succeeding pbufs in the chain. + * + * Makes p->tot_len field equal to p->len. + * @param p pbuf to dechain + * @return remainder of the pbuf chain, or NULL if it was de-allocated. + * @note May not be called on a packet queue. + */ +struct pbuf * +pbuf_dechain(struct pbuf *p) +{ + struct pbuf *q; + u8_t tail_gone = 1; + /* tail */ + q = p->next; + /* pbuf has successor in chain? */ + if (q != NULL) { + /* assert tot_len invariant: (p->tot_len == p->len + (p->next? p->next->tot_len: 0) */ + LWIP_ASSERT("p->tot_len == p->len + q->tot_len", q->tot_len == p->tot_len - p->len); + /* enforce invariant if assertion is disabled */ + q->tot_len = p->tot_len - p->len; + /* decouple pbuf from remainder */ + p->next = NULL; + /* total length of pbuf p is its own length only */ + p->tot_len = p->len; + /* q is no longer referenced by p, free it */ + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_dechain: unreferencing %p\n", (void *)q)); + tail_gone = pbuf_free(q); + if (tail_gone > 0) { + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, + ("pbuf_dechain: deallocated %p (as it is no longer referenced)\n", (void *)q)); + } + /* return remaining tail or NULL if deallocated */ + } + /* assert tot_len invariant: (p->tot_len == p->len + (p->next? p->next->tot_len: 0) */ + LWIP_ASSERT("p->tot_len == p->len", p->tot_len == p->len); + return ((tail_gone > 0) ? NULL : q); +} + +/** + * + * Create PBUF_RAM copies of pbufs. + * + * Used to queue packets on behalf of the lwIP stack, such as + * ARP based queueing. + * + * @note You MUST explicitly use p = pbuf_take(p); + * + * @note Only one packet is copied, no packet queue! + * + * @param p_to pbuf destination of the copy + * @param p_from pbuf source of the copy + * + * @return ERR_OK if pbuf was copied + * ERR_ARG if one of the pbufs is NULL or p_to is not big + * enough to hold p_from + */ +err_t +pbuf_copy(struct pbuf *p_to, struct pbuf *p_from) +{ + u16_t offset_to=0, offset_from=0, len; + + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy(%p, %p)\n", + (void*)p_to, (void*)p_from)); + + /* is the target big enough to hold the source? */ + LWIP_ERROR("pbuf_copy: target not big enough to hold source", ((p_to != NULL) && + (p_from != NULL) && (p_to->tot_len >= p_from->tot_len)), return ERR_ARG;); + + /* iterate through pbuf chain */ + do + { + LWIP_ASSERT("p_to != NULL", p_to != NULL); + /* copy one part of the original chain */ + if ((p_to->len - offset_to) >= (p_from->len - offset_from)) { + /* complete current p_from fits into current p_to */ + len = p_from->len - offset_from; + } else { + /* current p_from does not fit into current p_to */ + len = p_to->len - offset_to; + } + MEMCPY((u8_t*)p_to->payload + offset_to, (u8_t*)p_from->payload + offset_from, len); + offset_to += len; + offset_from += len; + LWIP_ASSERT("offset_to <= p_to->len", offset_to <= p_to->len); + if (offset_to == p_to->len) { + /* on to next p_to (if any) */ + offset_to = 0; + p_to = p_to->next; + } + LWIP_ASSERT("offset_from <= p_from->len", offset_from <= p_from->len); + if (offset_from >= p_from->len) { + /* on to next p_from (if any) */ + offset_from = 0; + p_from = p_from->next; + } + + if((p_from != NULL) && (p_from->len == p_from->tot_len)) { + /* don't copy more than one packet! */ + LWIP_ERROR("pbuf_copy() does not allow packet queues!\n", + (p_from->next == NULL), return ERR_VAL;); + } + if((p_to != NULL) && (p_to->len == p_to->tot_len)) { + /* don't copy more than one packet! */ + LWIP_ERROR("pbuf_copy() does not allow packet queues!\n", + (p_to->next == NULL), return ERR_VAL;); + } + } while (p_from); + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy: end of chain reached.\n")); + return ERR_OK; +} + +/** + * Copy (part of) the contents of a packet buffer + * to an application supplied buffer. + * + * @param buf the pbuf from which to copy data + * @param dataptr the application supplied buffer + * @param len length of data to copy (dataptr must be big enough). No more + * than buf->tot_len will be copied, irrespective of len + * @param offset offset into the packet buffer from where to begin copying len bytes + * @return the number of bytes copied, or 0 on failure + */ +u16_t +pbuf_copy_partial(struct pbuf *buf, void *dataptr, u16_t len, u16_t offset) +{ + struct pbuf *p; + u16_t left; + u16_t buf_copy_len; + u16_t copied_total = 0; + + LWIP_ERROR("pbuf_copy_partial: invalid buf", (buf != NULL), return 0;); + LWIP_ERROR("pbuf_copy_partial: invalid dataptr", (dataptr != NULL), return 0;); + + left = 0; + + if((buf == NULL) || (dataptr == NULL)) { + return 0; + } + + /* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */ + for(p = buf; len != 0 && p != NULL; p = p->next) { + if ((offset != 0) && (offset >= p->len)) { + /* don't copy from this buffer -> on to the next */ + offset -= p->len; + } else { + /* copy from this buffer. maybe only partially. */ + buf_copy_len = p->len - offset; + if (buf_copy_len > len) + buf_copy_len = len; + /* copy the necessary parts of the buffer */ + MEMCPY(&((char*)dataptr)[left], &((char*)p->payload)[offset], buf_copy_len); + copied_total += buf_copy_len; + left += buf_copy_len; + len -= buf_copy_len; + offset = 0; + } + } + return copied_total; +} + +/** + * Copy application supplied data into a pbuf. + * This function can only be used to copy the equivalent of buf->tot_len data. + * + * @param buf pbuf to fill with data + * @param dataptr application supplied data buffer + * @param len length of the application supplied data buffer + * + * @return ERR_OK if successful, ERR_MEM if the pbuf is not big enough + */ +err_t +pbuf_take(struct pbuf *buf, const void *dataptr, u16_t len) +{ + struct pbuf *p; + u16_t buf_copy_len; + u16_t total_copy_len = len; + u16_t copied_total = 0; + + LWIP_ERROR("pbuf_take: invalid buf", (buf != NULL), return 0;); + LWIP_ERROR("pbuf_take: invalid dataptr", (dataptr != NULL), return 0;); + + if ((buf == NULL) || (dataptr == NULL) || (buf->tot_len < len)) { + return ERR_ARG; + } + + /* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */ + for(p = buf; total_copy_len != 0; p = p->next) { + LWIP_ASSERT("pbuf_take: invalid pbuf", p != NULL); + buf_copy_len = total_copy_len; + if (buf_copy_len > p->len) { + /* this pbuf cannot hold all remaining data */ + buf_copy_len = p->len; + } + /* copy the necessary parts of the buffer */ + MEMCPY(p->payload, &((char*)dataptr)[copied_total], buf_copy_len); + total_copy_len -= buf_copy_len; + copied_total += buf_copy_len; + } + LWIP_ASSERT("did not copy all data", total_copy_len == 0 && copied_total == len); + return ERR_OK; +} + +/** + * Creates a single pbuf out of a queue of pbufs. + * + * @remark: The source pbuf 'p' is not freed by this function because that can + * be illegal in some places! + * + * @param p the source pbuf + * @param layer pbuf_layer of the new pbuf + * + * @return a new, single pbuf (p->next is NULL) + * or the old pbuf if allocation fails + */ +struct pbuf* +pbuf_coalesce(struct pbuf *p, pbuf_layer layer) +{ + struct pbuf *q; + err_t err; + if (p->next == NULL) { + return p; + } + q = pbuf_alloc(layer, p->tot_len, PBUF_RAM); + if (q == NULL) { + /* @todo: what do we do now? */ + return p; + } + err = pbuf_copy(q, p); + LWIP_ASSERT("pbuf_copy failed", err == ERR_OK); + pbuf_free(p); + return q; +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/raw.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/raw.c new file mode 100644 index 0000000..6966bbc --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/raw.c @@ -0,0 +1,355 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Implementation of raw protocol PCBs for low-level handling of + * different types of protocols besides (or overriding) those + * already available in lwIP. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_RAW /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/def.h" +#include "lwip/memp.h" +#include "lwip/inet.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/raw.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" +#include "arch/perf.h" + +#include + +/** The list of RAW PCBs */ +static struct raw_pcb *raw_pcbs; + +/** + * Determine if in incoming IP packet is covered by a RAW PCB + * and if so, pass it to a user-provided receive callback function. + * + * Given an incoming IP datagram (as a chain of pbufs) this function + * finds a corresponding RAW PCB and calls the corresponding receive + * callback function. + * + * @param p pbuf to be demultiplexed to a RAW PCB. + * @param inp network interface on which the datagram was received. + * @return - 1 if the packet has been eaten by a RAW PCB receive + * callback function. The caller MAY NOT not reference the + * packet any longer, and MAY NOT call pbuf_free(). + * @return - 0 if packet is not eaten (pbuf is still referenced by the + * caller). + * + */ +u8_t +raw_input(struct pbuf *p, struct netif *inp) +{ + struct raw_pcb *pcb, *prev; + struct ip_hdr *iphdr; + s16_t proto; + u8_t eaten = 0; + + LWIP_UNUSED_ARG(inp); + + iphdr = p->payload; + proto = IPH_PROTO(iphdr); + + prev = NULL; + pcb = raw_pcbs; + /* loop through all raw pcbs until the packet is eaten by one */ + /* this allows multiple pcbs to match against the packet by design */ + while ((eaten == 0) && (pcb != NULL)) { + if (pcb->protocol == proto) { +#if IP_SOF_BROADCAST_RECV + /* broadcast filter? */ + if ((pcb->so_options & SOF_BROADCAST) || !ip_addr_isbroadcast(&(iphdr->dest), inp)) +#endif /* IP_SOF_BROADCAST_RECV */ + { + /* receive callback function available? */ + if (pcb->recv != NULL) { + /* the receive callback function did not eat the packet? */ + if (pcb->recv(pcb->recv_arg, pcb, p, &(iphdr->src)) != 0) { + /* receive function ate the packet */ + p = NULL; + eaten = 1; + if (prev != NULL) { + /* move the pcb to the front of raw_pcbs so that is + found faster next time */ + prev->next = pcb->next; + pcb->next = raw_pcbs; + raw_pcbs = pcb; + } + } + } + /* no receive callback function was set for this raw PCB */ + } + /* drop the packet */ + } + prev = pcb; + pcb = pcb->next; + } + return eaten; +} + +/** + * Bind a RAW PCB. + * + * @param pcb RAW PCB to be bound with a local address ipaddr. + * @param ipaddr local IP address to bind with. Use IP_ADDR_ANY to + * bind to all local interfaces. + * + * @return lwIP error code. + * - ERR_OK. Successful. No error occured. + * - ERR_USE. The specified IP address is already bound to by + * another RAW PCB. + * + * @see raw_disconnect() + */ +err_t +raw_bind(struct raw_pcb *pcb, struct ip_addr *ipaddr) +{ + ip_addr_set(&pcb->local_ip, ipaddr); + return ERR_OK; +} + +/** + * Connect an RAW PCB. This function is required by upper layers + * of lwip. Using the raw api you could use raw_sendto() instead + * + * This will associate the RAW PCB with the remote address. + * + * @param pcb RAW PCB to be connected with remote address ipaddr and port. + * @param ipaddr remote IP address to connect with. + * + * @return lwIP error code + * + * @see raw_disconnect() and raw_sendto() + */ +err_t +raw_connect(struct raw_pcb *pcb, struct ip_addr *ipaddr) +{ + ip_addr_set(&pcb->remote_ip, ipaddr); + return ERR_OK; +} + + +/** + * Set the callback function for received packets that match the + * raw PCB's protocol and binding. + * + * The callback function MUST either + * - eat the packet by calling pbuf_free() and returning non-zero. The + * packet will not be passed to other raw PCBs or other protocol layers. + * - not free the packet, and return zero. The packet will be matched + * against further PCBs and/or forwarded to another protocol layers. + * + * @return non-zero if the packet was free()d, zero if the packet remains + * available for others. + */ +void +raw_recv(struct raw_pcb *pcb, + u8_t (* recv)(void *arg, struct raw_pcb *upcb, struct pbuf *p, + struct ip_addr *addr), + void *recv_arg) +{ + /* remember recv() callback and user data */ + pcb->recv = recv; + pcb->recv_arg = recv_arg; +} + +/** + * Send the raw IP packet to the given address. Note that actually you cannot + * modify the IP headers (this is inconsistent with the receive callback where + * you actually get the IP headers), you can only specify the IP payload here. + * It requires some more changes in lwIP. (there will be a raw_send() function + * then.) + * + * @param pcb the raw pcb which to send + * @param p the IP payload to send + * @param ipaddr the destination address of the IP packet + * + */ +err_t +raw_sendto(struct raw_pcb *pcb, struct pbuf *p, struct ip_addr *ipaddr) +{ + err_t err; + struct netif *netif; + struct ip_addr *src_ip; + struct pbuf *q; /* q will be sent down the stack */ + + LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_TRACE, ("raw_sendto\n")); + + /* not enough space to add an IP header to first pbuf in given p chain? */ + if (pbuf_header(p, IP_HLEN)) { + /* allocate header in new pbuf */ + q = pbuf_alloc(PBUF_IP, 0, PBUF_RAM); + /* new header pbuf could not be allocated? */ + if (q == NULL) { + LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("raw_sendto: could not allocate header\n")); + return ERR_MEM; + } + /* chain header q in front of given pbuf p */ + pbuf_chain(q, p); + /* { first pbuf q points to header pbuf } */ + LWIP_DEBUGF(RAW_DEBUG, ("raw_sendto: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p)); + } else { + /* first pbuf q equals given pbuf */ + q = p; + if(pbuf_header(q, -IP_HLEN)) { + LWIP_ASSERT("Can't restore header we just removed!", 0); + return ERR_MEM; + } + } + + if ((netif = ip_route(ipaddr)) == NULL) { + LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_LEVEL_WARNING, ("raw_sendto: No route to 0x%"X32_F"\n", ipaddr->addr)); + /* free any temporary header pbuf allocated by pbuf_header() */ + if (q != p) { + pbuf_free(q); + } + return ERR_RTE; + } + +#if IP_SOF_BROADCAST + /* broadcast filter? */ + if ( ((pcb->so_options & SOF_BROADCAST) == 0) && ip_addr_isbroadcast(ipaddr, netif) ) { + LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_LEVEL_WARNING, ("raw_sendto: SOF_BROADCAST not enabled on pcb %p\n", (void *)pcb)); + /* free any temporary header pbuf allocated by pbuf_header() */ + if (q != p) { + pbuf_free(q); + } + return ERR_VAL; + } +#endif /* IP_SOF_BROADCAST */ + + if (ip_addr_isany(&pcb->local_ip)) { + /* use outgoing network interface IP address as source address */ + src_ip = &(netif->ip_addr); + } else { + /* use RAW PCB local IP address as source address */ + src_ip = &(pcb->local_ip); + } + +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = &(pcb->addr_hint); +#endif /* LWIP_NETIF_HWADDRHINT*/ + err = ip_output_if (q, src_ip, ipaddr, pcb->ttl, pcb->tos, pcb->protocol, netif); +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = NULL; +#endif /* LWIP_NETIF_HWADDRHINT*/ + + /* did we chain a header earlier? */ + if (q != p) { + /* free the header */ + pbuf_free(q); + } + return err; +} + +/** + * Send the raw IP packet to the address given by raw_connect() + * + * @param pcb the raw pcb which to send + * @param p the IP payload to send + * + */ +err_t +raw_send(struct raw_pcb *pcb, struct pbuf *p) +{ + return raw_sendto(pcb, p, &pcb->remote_ip); +} + +/** + * Remove an RAW PCB. + * + * @param pcb RAW PCB to be removed. The PCB is removed from the list of + * RAW PCB's and the data structure is freed from memory. + * + * @see raw_new() + */ +void +raw_remove(struct raw_pcb *pcb) +{ + struct raw_pcb *pcb2; + /* pcb to be removed is first in list? */ + if (raw_pcbs == pcb) { + /* make list start at 2nd pcb */ + raw_pcbs = raw_pcbs->next; + /* pcb not 1st in list */ + } else { + for(pcb2 = raw_pcbs; pcb2 != NULL; pcb2 = pcb2->next) { + /* find pcb in raw_pcbs list */ + if (pcb2->next != NULL && pcb2->next == pcb) { + /* remove pcb from list */ + pcb2->next = pcb->next; + } + } + } + memp_free(MEMP_RAW_PCB, pcb); +} + +/** + * Create a RAW PCB. + * + * @return The RAW PCB which was created. NULL if the PCB data structure + * could not be allocated. + * + * @param proto the protocol number of the IPs payload (e.g. IP_PROTO_ICMP) + * + * @see raw_remove() + */ +struct raw_pcb * +raw_new(u8_t proto) { + struct raw_pcb *pcb; + + LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_TRACE, ("raw_new\n")); + + pcb = memp_malloc(MEMP_RAW_PCB); + /* could allocate RAW PCB? */ + if (pcb != NULL) { + /* initialize PCB to all zeroes */ + memset(pcb, 0, sizeof(struct raw_pcb)); + pcb->protocol = proto; + pcb->ttl = RAW_TTL; + pcb->next = raw_pcbs; + raw_pcbs = pcb; + } + return pcb; +} + +#endif /* LWIP_RAW */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/stats.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/stats.c new file mode 100644 index 0000000..4299a94 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/stats.c @@ -0,0 +1,151 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Statistics module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_STATS /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/def.h" +#include "lwip/stats.h" +#include "lwip/mem.h" + +#include + +struct stats_ lwip_stats; + +#if LWIP_STATS_DISPLAY +void +stats_display_proto(struct stats_proto *proto, char *name) +{ + LWIP_PLATFORM_DIAG(("\n%s\n\t", name)); + LWIP_PLATFORM_DIAG(("xmit: %"STAT_COUNTER_F"\n\t", proto->xmit)); + LWIP_PLATFORM_DIAG(("recv: %"STAT_COUNTER_F"\n\t", proto->recv)); + LWIP_PLATFORM_DIAG(("fw: %"STAT_COUNTER_F"\n\t", proto->fw)); + LWIP_PLATFORM_DIAG(("drop: %"STAT_COUNTER_F"\n\t", proto->drop)); + LWIP_PLATFORM_DIAG(("chkerr: %"STAT_COUNTER_F"\n\t", proto->chkerr)); + LWIP_PLATFORM_DIAG(("lenerr: %"STAT_COUNTER_F"\n\t", proto->lenerr)); + LWIP_PLATFORM_DIAG(("memerr: %"STAT_COUNTER_F"\n\t", proto->memerr)); + LWIP_PLATFORM_DIAG(("rterr: %"STAT_COUNTER_F"\n\t", proto->rterr)); + LWIP_PLATFORM_DIAG(("proterr: %"STAT_COUNTER_F"\n\t", proto->proterr)); + LWIP_PLATFORM_DIAG(("opterr: %"STAT_COUNTER_F"\n\t", proto->opterr)); + LWIP_PLATFORM_DIAG(("err: %"STAT_COUNTER_F"\n\t", proto->err)); + LWIP_PLATFORM_DIAG(("cachehit: %"STAT_COUNTER_F"\n", proto->cachehit)); +} + +#if IGMP_STATS +void +stats_display_igmp(struct stats_igmp *igmp) +{ + LWIP_PLATFORM_DIAG(("\nIGMP\n\t")); + LWIP_PLATFORM_DIAG(("lenerr: %"STAT_COUNTER_F"\n\t", igmp->lenerr)); + LWIP_PLATFORM_DIAG(("chkerr: %"STAT_COUNTER_F"\n\t", igmp->chkerr)); + LWIP_PLATFORM_DIAG(("v1_rxed: %"STAT_COUNTER_F"\n\t", igmp->v1_rxed)); + LWIP_PLATFORM_DIAG(("join_sent: %"STAT_COUNTER_F"\n\t", igmp->join_sent)); + LWIP_PLATFORM_DIAG(("leave_sent: %"STAT_COUNTER_F"\n\t", igmp->leave_sent)); + LWIP_PLATFORM_DIAG(("unicast_query: %"STAT_COUNTER_F"\n\t", igmp->unicast_query)); + LWIP_PLATFORM_DIAG(("report_sent: %"STAT_COUNTER_F"\n\t", igmp->report_sent)); + LWIP_PLATFORM_DIAG(("report_rxed: %"STAT_COUNTER_F"\n\t", igmp->report_rxed)); + LWIP_PLATFORM_DIAG(("group_query_rxed: %"STAT_COUNTER_F"\n", igmp->group_query_rxed)); +} +#endif /* IGMP_STATS */ + +#if MEM_STATS || MEMP_STATS +void +stats_display_mem(struct stats_mem *mem, char *name) +{ + LWIP_PLATFORM_DIAG(("\nMEM %s\n\t", name)); + LWIP_PLATFORM_DIAG(("avail: %"U32_F"\n\t", (u32_t)mem->avail)); + LWIP_PLATFORM_DIAG(("used: %"U32_F"\n\t", (u32_t)mem->used)); + LWIP_PLATFORM_DIAG(("max: %"U32_F"\n\t", (u32_t)mem->max)); + LWIP_PLATFORM_DIAG(("err: %"U32_F"\n", (u32_t)mem->err)); +} + +#if MEMP_STATS +void +stats_display_memp(struct stats_mem *mem, int index) +{ + char * memp_names[] = { +#define LWIP_MEMPOOL(name,num,size,desc) desc, +#include "lwip/memp_std.h" + }; + if(index < MEMP_MAX) { + stats_display_mem(mem, memp_names[index]); + } +} +#endif /* MEMP_STATS */ +#endif /* MEM_STATS || MEMP_STATS */ + +#if SYS_STATS +void +stats_display_sys(struct stats_sys *sys) +{ + LWIP_PLATFORM_DIAG(("\nSYS\n\t")); + LWIP_PLATFORM_DIAG(("sem.used: %"U32_F"\n\t", (u32_t)sys->sem.used)); + LWIP_PLATFORM_DIAG(("sem.max: %"U32_F"\n\t", (u32_t)sys->sem.max)); + LWIP_PLATFORM_DIAG(("sem.err: %"U32_F"\n\t", (u32_t)sys->sem.err)); + LWIP_PLATFORM_DIAG(("mbox.used: %"U32_F"\n\t", (u32_t)sys->mbox.used)); + LWIP_PLATFORM_DIAG(("mbox.max: %"U32_F"\n\t", (u32_t)sys->mbox.max)); + LWIP_PLATFORM_DIAG(("mbox.err: %"U32_F"\n\t", (u32_t)sys->mbox.err)); +} +#endif /* SYS_STATS */ + +void +stats_display(void) +{ + s16_t i; + + LINK_STATS_DISPLAY(); + ETHARP_STATS_DISPLAY(); + IPFRAG_STATS_DISPLAY(); + IP_STATS_DISPLAY(); + IGMP_STATS_DISPLAY(); + ICMP_STATS_DISPLAY(); + UDP_STATS_DISPLAY(); + TCP_STATS_DISPLAY(); + MEM_STATS_DISPLAY(); + for (i = 0; i < MEMP_MAX; i++) { + MEMP_STATS_DISPLAY(i); + } + SYS_STATS_DISPLAY(); +} +#endif /* LWIP_STATS_DISPLAY */ + +#endif /* LWIP_STATS */ + diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/tcp.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/tcp.c new file mode 100644 index 0000000..c588d21 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/tcp.c @@ -0,0 +1,1463 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Transmission Control Protocol for IP + * + * This file contains common functions for the TCP implementation, such as functinos + * for manipulating the data structures and the TCP timer functions. TCP functions + * related to input and output is found in tcp_in.c and tcp_out.c respectively. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/snmp.h" +#include "lwip/tcp.h" +#include "lwip/debug.h" +#include "lwip/stats.h" + +#include + +const char *tcp_state_str[] = { + "CLOSED", + "LISTEN", + "SYN_SENT", + "SYN_RCVD", + "ESTABLISHED", + "FIN_WAIT_1", + "FIN_WAIT_2", + "CLOSE_WAIT", + "CLOSING", + "LAST_ACK", + "TIME_WAIT" +}; + +/* Incremented every coarse grained timer shot (typically every 500 ms). */ +u32_t tcp_ticks; +const u8_t tcp_backoff[13] = + { 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7}; + /* Times per slowtmr hits */ +const u8_t tcp_persist_backoff[7] = { 3, 6, 12, 24, 48, 96, 120 }; + +/* The TCP PCB lists. */ + +/** List of all TCP PCBs bound but not yet (connected || listening) */ +struct tcp_pcb *tcp_bound_pcbs; +/** List of all TCP PCBs in LISTEN state */ +union tcp_listen_pcbs_t tcp_listen_pcbs; +/** List of all TCP PCBs that are in a state in which + * they accept or send data. */ +struct tcp_pcb *tcp_active_pcbs; +/** List of all TCP PCBs in TIME-WAIT state */ +struct tcp_pcb *tcp_tw_pcbs; + +struct tcp_pcb *tcp_tmp_pcb; + +static u8_t tcp_timer; +static u16_t tcp_new_port(void); + +/** + * Called periodically to dispatch TCP timers. + * + */ +void +tcp_tmr(void) +{ + /* Call tcp_fasttmr() every 250 ms */ + tcp_fasttmr(); + + if (++tcp_timer & 1) { + /* Call tcp_tmr() every 500 ms, i.e., every other timer + tcp_tmr() is called. */ + tcp_slowtmr(); + } +} + +/** + * Closes the connection held by the PCB. + * + * Listening pcbs are freed and may not be referenced any more. + * Connection pcbs are freed if not yet connected and may not be referenced + * any more. If a connection is established (at least SYN received or in + * a closing state), the connection is closed, and put in a closing state. + * The pcb is then automatically freed in tcp_slowtmr(). It is therefore + * unsafe to reference it. + * + * @param pcb the tcp_pcb to close + * @return ERR_OK if connection has been closed + * another err_t if closing failed and pcb is not freed + */ +err_t +tcp_close(struct tcp_pcb *pcb) +{ + err_t err; + +#if TCP_DEBUG + LWIP_DEBUGF(TCP_DEBUG, ("tcp_close: closing in ")); + tcp_debug_print_state(pcb->state); +#endif /* TCP_DEBUG */ + + switch (pcb->state) { + case CLOSED: + /* Closing a pcb in the CLOSED state might seem erroneous, + * however, it is in this state once allocated and as yet unused + * and the user needs some way to free it should the need arise. + * Calling tcp_close() with a pcb that has already been closed, (i.e. twice) + * or for a pcb that has been used and then entered the CLOSED state + * is erroneous, but this should never happen as the pcb has in those cases + * been freed, and so any remaining handles are bogus. */ + err = ERR_OK; + TCP_RMV(&tcp_bound_pcbs, pcb); + memp_free(MEMP_TCP_PCB, pcb); + pcb = NULL; + break; + case LISTEN: + err = ERR_OK; + tcp_pcb_remove((struct tcp_pcb **)&tcp_listen_pcbs.pcbs, pcb); + memp_free(MEMP_TCP_PCB_LISTEN, pcb); + pcb = NULL; + break; + case SYN_SENT: + err = ERR_OK; + tcp_pcb_remove(&tcp_active_pcbs, pcb); + memp_free(MEMP_TCP_PCB, pcb); + pcb = NULL; + snmp_inc_tcpattemptfails(); + break; + case SYN_RCVD: + err = tcp_send_ctrl(pcb, TCP_FIN); + if (err == ERR_OK) { + snmp_inc_tcpattemptfails(); + pcb->state = FIN_WAIT_1; + } + break; + case ESTABLISHED: + err = tcp_send_ctrl(pcb, TCP_FIN); + if (err == ERR_OK) { + snmp_inc_tcpestabresets(); + pcb->state = FIN_WAIT_1; + } + break; + case CLOSE_WAIT: + err = tcp_send_ctrl(pcb, TCP_FIN); + if (err == ERR_OK) { + snmp_inc_tcpestabresets(); + pcb->state = LAST_ACK; + } + break; + default: + /* Has already been closed, do nothing. */ + err = ERR_OK; + pcb = NULL; + break; + } + + if (pcb != NULL && err == ERR_OK) { + /* To ensure all data has been sent when tcp_close returns, we have + to make sure tcp_output doesn't fail. + Since we don't really have to ensure all data has been sent when tcp_close + returns (unsent data is sent from tcp timer functions, also), we don't care + for the return value of tcp_output for now. */ + /* @todo: When implementing SO_LINGER, this must be changed somehow: + If SOF_LINGER is set, the data should be sent when tcp_close returns. */ + tcp_output(pcb); + } + return err; +} + +/** + * Abandons a connection and optionally sends a RST to the remote + * host. Deletes the local protocol control block. This is done when + * a connection is killed because of shortage of memory. + * + * @param pcb the tcp_pcb to abort + * @param reset boolean to indicate whether a reset should be sent + */ +void +tcp_abandon(struct tcp_pcb *pcb, int reset) +{ + u32_t seqno, ackno; + u16_t remote_port, local_port; + struct ip_addr remote_ip, local_ip; +#if LWIP_CALLBACK_API + void (* errf)(void *arg, err_t err); +#endif /* LWIP_CALLBACK_API */ + void *errf_arg; + + + /* Figure out on which TCP PCB list we are, and remove us. If we + are in an active state, call the receive function associated with + the PCB with a NULL argument, and send an RST to the remote end. */ + if (pcb->state == TIME_WAIT) { + tcp_pcb_remove(&tcp_tw_pcbs, pcb); + memp_free(MEMP_TCP_PCB, pcb); + } else { + seqno = pcb->snd_nxt; + ackno = pcb->rcv_nxt; + ip_addr_set(&local_ip, &(pcb->local_ip)); + ip_addr_set(&remote_ip, &(pcb->remote_ip)); + local_port = pcb->local_port; + remote_port = pcb->remote_port; +#if LWIP_CALLBACK_API + errf = pcb->errf; +#endif /* LWIP_CALLBACK_API */ + errf_arg = pcb->callback_arg; + tcp_pcb_remove(&tcp_active_pcbs, pcb); + if (pcb->unacked != NULL) { + tcp_segs_free(pcb->unacked); + } + if (pcb->unsent != NULL) { + tcp_segs_free(pcb->unsent); + } +#if TCP_QUEUE_OOSEQ + if (pcb->ooseq != NULL) { + tcp_segs_free(pcb->ooseq); + } +#endif /* TCP_QUEUE_OOSEQ */ + memp_free(MEMP_TCP_PCB, pcb); + TCP_EVENT_ERR(errf, errf_arg, ERR_ABRT); + if (reset) { + LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_abandon: sending RST\n")); + tcp_rst(seqno, ackno, &local_ip, &remote_ip, local_port, remote_port); + } + } +} + +/** + * Binds the connection to a local portnumber and IP address. If the + * IP address is not given (i.e., ipaddr == NULL), the IP address of + * the outgoing network interface is used instead. + * + * @param pcb the tcp_pcb to bind (no check is done whether this pcb is + * already bound!) + * @param ipaddr the local ip address to bind to (use IP_ADDR_ANY to bind + * to any local address + * @param port the local port to bind to + * @return ERR_USE if the port is already in use + * ERR_OK if bound + */ +err_t +tcp_bind(struct tcp_pcb *pcb, struct ip_addr *ipaddr, u16_t port) +{ + struct tcp_pcb *cpcb; + + LWIP_ERROR("tcp_bind: can only bind in state CLOSED", pcb->state == CLOSED, return ERR_ISCONN); + + if (port == 0) { + port = tcp_new_port(); + } + /* Check if the address already is in use. */ + /* Check the listen pcbs. */ + for(cpcb = (struct tcp_pcb *)tcp_listen_pcbs.pcbs; + cpcb != NULL; cpcb = cpcb->next) { + if (cpcb->local_port == port) { + if (ip_addr_isany(&(cpcb->local_ip)) || + ip_addr_isany(ipaddr) || + ip_addr_cmp(&(cpcb->local_ip), ipaddr)) { + return ERR_USE; + } + } + } + /* Check the connected pcbs. */ + for(cpcb = tcp_active_pcbs; + cpcb != NULL; cpcb = cpcb->next) { + if (cpcb->local_port == port) { + if (ip_addr_isany(&(cpcb->local_ip)) || + ip_addr_isany(ipaddr) || + ip_addr_cmp(&(cpcb->local_ip), ipaddr)) { + return ERR_USE; + } + } + } + /* Check the bound, not yet connected pcbs. */ + for(cpcb = tcp_bound_pcbs; cpcb != NULL; cpcb = cpcb->next) { + if (cpcb->local_port == port) { + if (ip_addr_isany(&(cpcb->local_ip)) || + ip_addr_isany(ipaddr) || + ip_addr_cmp(&(cpcb->local_ip), ipaddr)) { + return ERR_USE; + } + } + } + /* @todo: until SO_REUSEADDR is implemented (see task #6995 on savannah), + * we have to check the pcbs in TIME-WAIT state, also: */ + for(cpcb = tcp_tw_pcbs; cpcb != NULL; cpcb = cpcb->next) { + if (cpcb->local_port == port) { + if (ip_addr_cmp(&(cpcb->local_ip), ipaddr)) { + return ERR_USE; + } + } + } + + if (!ip_addr_isany(ipaddr)) { + pcb->local_ip = *ipaddr; + } + pcb->local_port = port; + TCP_REG(&tcp_bound_pcbs, pcb); + LWIP_DEBUGF(TCP_DEBUG, ("tcp_bind: bind to port %"U16_F"\n", port)); + return ERR_OK; +} +#if LWIP_CALLBACK_API +/** + * Default accept callback if no accept callback is specified by the user. + */ +static err_t +tcp_accept_null(void *arg, struct tcp_pcb *pcb, err_t err) +{ + LWIP_UNUSED_ARG(arg); + LWIP_UNUSED_ARG(pcb); + LWIP_UNUSED_ARG(err); + + return ERR_ABRT; +} +#endif /* LWIP_CALLBACK_API */ + +/** + * Set the state of the connection to be LISTEN, which means that it + * is able to accept incoming connections. The protocol control block + * is reallocated in order to consume less memory. Setting the + * connection to LISTEN is an irreversible process. + * + * @param pcb the original tcp_pcb + * @param backlog the incoming connections queue limit + * @return tcp_pcb used for listening, consumes less memory. + * + * @note The original tcp_pcb is freed. This function therefore has to be + * called like this: + * tpcb = tcp_listen(tpcb); + */ +struct tcp_pcb * +tcp_listen_with_backlog(struct tcp_pcb *pcb, u8_t backlog) +{ + struct tcp_pcb_listen *lpcb; + + LWIP_UNUSED_ARG(backlog); + LWIP_ERROR("tcp_listen: pcb already connected", pcb->state == CLOSED, return NULL); + + /* already listening? */ + if (pcb->state == LISTEN) { + return pcb; + } + lpcb = memp_malloc(MEMP_TCP_PCB_LISTEN); + if (lpcb == NULL) { + return NULL; + } + lpcb->callback_arg = pcb->callback_arg; + lpcb->local_port = pcb->local_port; + lpcb->state = LISTEN; + lpcb->so_options = pcb->so_options; + lpcb->so_options |= SOF_ACCEPTCONN; + lpcb->ttl = pcb->ttl; + lpcb->tos = pcb->tos; + ip_addr_set(&lpcb->local_ip, &pcb->local_ip); + TCP_RMV(&tcp_bound_pcbs, pcb); + memp_free(MEMP_TCP_PCB, pcb); +#if LWIP_CALLBACK_API + lpcb->accept = tcp_accept_null; +#endif /* LWIP_CALLBACK_API */ +#if TCP_LISTEN_BACKLOG + lpcb->accepts_pending = 0; + lpcb->backlog = (backlog ? backlog : 1); +#endif /* TCP_LISTEN_BACKLOG */ + TCP_REG(&tcp_listen_pcbs.listen_pcbs, lpcb); + return (struct tcp_pcb *)lpcb; +} + +/** + * Update the state that tracks the available window space to advertise. + * + * Returns how much extra window would be advertised if we sent an + * update now. + */ +u32_t tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb) +{ + u32_t new_right_edge = pcb->rcv_nxt + pcb->rcv_wnd; + + if (TCP_SEQ_GEQ(new_right_edge, pcb->rcv_ann_right_edge + LWIP_MIN((TCP_WND / 2), pcb->mss))) { + /* we can advertise more window */ + pcb->rcv_ann_wnd = pcb->rcv_wnd; + return new_right_edge - pcb->rcv_ann_right_edge; + } else { + if (TCP_SEQ_GT(pcb->rcv_nxt, pcb->rcv_ann_right_edge)) { + /* Can happen due to other end sending out of advertised window, + * but within actual available (but not yet advertised) window */ + pcb->rcv_ann_wnd = 0; + } else { + /* keep the right edge of window constant */ + pcb->rcv_ann_wnd = pcb->rcv_ann_right_edge - pcb->rcv_nxt; + } + return 0; + } +} + +/** + * This function should be called by the application when it has + * processed the data. The purpose is to advertise a larger window + * when the data has been processed. + * + * @param pcb the tcp_pcb for which data is read + * @param len the amount of bytes that have been read by the application + */ +void +tcp_recved(struct tcp_pcb *pcb, u16_t len) +{ + int wnd_inflation; + + LWIP_ASSERT("tcp_recved: len would wrap rcv_wnd\n", + len <= 0xffff - pcb->rcv_wnd ); + + pcb->rcv_wnd += len; + if (pcb->rcv_wnd > TCP_WND) + pcb->rcv_wnd = TCP_WND; + + wnd_inflation = tcp_update_rcv_ann_wnd(pcb); + + /* If the change in the right edge of window is significant (default + * watermark is TCP_WND/2), then send an explicit update now. + * Otherwise wait for a packet to be sent in the normal course of + * events (or more window to be available later) */ + if (wnd_inflation >= TCP_WND_UPDATE_THRESHOLD) + tcp_ack_now(pcb); + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: recveived %"U16_F" bytes, wnd %"U16_F" (%"U16_F").\n", + len, pcb->rcv_wnd, TCP_WND - pcb->rcv_wnd)); +} + +/** + * A nastly hack featuring 'goto' statements that allocates a + * new TCP local port. + * + * @return a new (free) local TCP port number + */ +static u16_t +tcp_new_port(void) +{ + struct tcp_pcb *pcb; +#ifndef TCP_LOCAL_PORT_RANGE_START +#define TCP_LOCAL_PORT_RANGE_START 4096 +#define TCP_LOCAL_PORT_RANGE_END 0x7fff +#endif + static u16_t port = TCP_LOCAL_PORT_RANGE_START; + + again: + if (++port > TCP_LOCAL_PORT_RANGE_END) { + port = TCP_LOCAL_PORT_RANGE_START; + } + + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + if (pcb->local_port == port) { + goto again; + } + } + for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { + if (pcb->local_port == port) { + goto again; + } + } + for(pcb = (struct tcp_pcb *)tcp_listen_pcbs.pcbs; pcb != NULL; pcb = pcb->next) { + if (pcb->local_port == port) { + goto again; + } + } + return port; +} + +/** + * Connects to another host. The function given as the "connected" + * argument will be called when the connection has been established. + * + * @param pcb the tcp_pcb used to establish the connection + * @param ipaddr the remote ip address to connect to + * @param port the remote tcp port to connect to + * @param connected callback function to call when connected (or on error) + * @return ERR_VAL if invalid arguments are given + * ERR_OK if connect request has been sent + * other err_t values if connect request couldn't be sent + */ +err_t +tcp_connect(struct tcp_pcb *pcb, struct ip_addr *ipaddr, u16_t port, + err_t (* connected)(void *arg, struct tcp_pcb *tpcb, err_t err)) +{ + err_t ret; + u32_t iss; + + LWIP_ERROR("tcp_connect: can only connected from state CLOSED", pcb->state == CLOSED, return ERR_ISCONN); + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_connect to port %"U16_F"\n", port)); + if (ipaddr != NULL) { + pcb->remote_ip = *ipaddr; + } else { + return ERR_VAL; + } + pcb->remote_port = port; + if (pcb->local_port == 0) { + pcb->local_port = tcp_new_port(); + } + iss = tcp_next_iss(); + pcb->rcv_nxt = 0; + pcb->snd_nxt = iss; + pcb->lastack = iss - 1; + pcb->snd_lbb = iss - 1; + pcb->rcv_wnd = TCP_WND; + pcb->rcv_ann_wnd = TCP_WND; + pcb->rcv_ann_right_edge = pcb->rcv_nxt; + pcb->snd_wnd = TCP_WND; + /* As initial send MSS, we use TCP_MSS but limit it to 536. + The send MSS is updated when an MSS option is received. */ + pcb->mss = (TCP_MSS > 536) ? 536 : TCP_MSS; +#if TCP_CALCULATE_EFF_SEND_MSS + pcb->mss = tcp_eff_send_mss(pcb->mss, ipaddr); +#endif /* TCP_CALCULATE_EFF_SEND_MSS */ + pcb->cwnd = 1; + pcb->ssthresh = pcb->mss * 10; + pcb->state = SYN_SENT; +#if LWIP_CALLBACK_API + pcb->connected = connected; +#endif /* LWIP_CALLBACK_API */ + TCP_RMV(&tcp_bound_pcbs, pcb); + TCP_REG(&tcp_active_pcbs, pcb); + + snmp_inc_tcpactiveopens(); + + ret = tcp_enqueue(pcb, NULL, 0, TCP_SYN, 0, TF_SEG_OPTS_MSS +#if LWIP_TCP_TIMESTAMPS + | TF_SEG_OPTS_TS +#endif + ); + if (ret == ERR_OK) { + tcp_output(pcb); + } + return ret; +} + +/** + * Called every 500 ms and implements the retransmission timer and the timer that + * removes PCBs that have been in TIME-WAIT for enough time. It also increments + * various timers such as the inactivity timer in each PCB. + * + * Automatically called from tcp_tmr(). + */ +void +tcp_slowtmr(void) +{ + struct tcp_pcb *pcb, *pcb2, *prev; + u16_t eff_wnd; + u8_t pcb_remove; /* flag if a PCB should be removed */ + u8_t pcb_reset; /* flag if a RST should be sent when removing */ + err_t err; + + err = ERR_OK; + + ++tcp_ticks; + + /* Steps through all of the active PCBs. */ + prev = NULL; + pcb = tcp_active_pcbs; + if (pcb == NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: no active pcbs\n")); + } + while (pcb != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: processing active pcb\n")); + LWIP_ASSERT("tcp_slowtmr: active pcb->state != CLOSED\n", pcb->state != CLOSED); + LWIP_ASSERT("tcp_slowtmr: active pcb->state != LISTEN\n", pcb->state != LISTEN); + LWIP_ASSERT("tcp_slowtmr: active pcb->state != TIME-WAIT\n", pcb->state != TIME_WAIT); + + pcb_remove = 0; + pcb_reset = 0; + + if (pcb->state == SYN_SENT && pcb->nrtx == TCP_SYNMAXRTX) { + ++pcb_remove; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max SYN retries reached\n")); + } + else if (pcb->nrtx == TCP_MAXRTX) { + ++pcb_remove; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max DATA retries reached\n")); + } else { + if (pcb->persist_backoff > 0) { + /* If snd_wnd is zero, use persist timer to send 1 byte probes + * instead of using the standard retransmission mechanism. */ + pcb->persist_cnt++; + if (pcb->persist_cnt >= tcp_persist_backoff[pcb->persist_backoff-1]) { + pcb->persist_cnt = 0; + if (pcb->persist_backoff < sizeof(tcp_persist_backoff)) { + pcb->persist_backoff++; + } + tcp_zero_window_probe(pcb); + } + } else { + /* Increase the retransmission timer if it is running */ + if(pcb->rtime >= 0) + ++pcb->rtime; + + if (pcb->unacked != NULL && pcb->rtime >= pcb->rto) { + /* Time for a retransmission. */ + LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_slowtmr: rtime %"S16_F + " pcb->rto %"S16_F"\n", + pcb->rtime, pcb->rto)); + + /* Double retransmission time-out unless we are trying to + * connect to somebody (i.e., we are in SYN_SENT). */ + if (pcb->state != SYN_SENT) { + pcb->rto = ((pcb->sa >> 3) + pcb->sv) << tcp_backoff[pcb->nrtx]; + } + + /* Reset the retransmission timer. */ + pcb->rtime = 0; + + /* Reduce congestion window and ssthresh. */ + eff_wnd = LWIP_MIN(pcb->cwnd, pcb->snd_wnd); + pcb->ssthresh = eff_wnd >> 1; + if (pcb->ssthresh < pcb->mss) { + pcb->ssthresh = pcb->mss * 2; + } + pcb->cwnd = pcb->mss; + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: cwnd %"U16_F + " ssthresh %"U16_F"\n", + pcb->cwnd, pcb->ssthresh)); + + /* The following needs to be called AFTER cwnd is set to one + mss - STJ */ + tcp_rexmit_rto(pcb); + } + } + } + /* Check if this PCB has stayed too long in FIN-WAIT-2 */ + if (pcb->state == FIN_WAIT_2) { + if ((u32_t)(tcp_ticks - pcb->tmr) > + TCP_FIN_WAIT_TIMEOUT / TCP_SLOW_INTERVAL) { + ++pcb_remove; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in FIN-WAIT-2\n")); + } + } + + /* Check if KEEPALIVE should be sent */ + if((pcb->so_options & SOF_KEEPALIVE) && + ((pcb->state == ESTABLISHED) || + (pcb->state == CLOSE_WAIT))) { +#if LWIP_TCP_KEEPALIVE + if((u32_t)(tcp_ticks - pcb->tmr) > + (pcb->keep_idle + (pcb->keep_cnt*pcb->keep_intvl)) + / TCP_SLOW_INTERVAL) +#else + if((u32_t)(tcp_ticks - pcb->tmr) > + (pcb->keep_idle + TCP_MAXIDLE) / TCP_SLOW_INTERVAL) +#endif /* LWIP_TCP_KEEPALIVE */ + { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: KEEPALIVE timeout. Aborting connection to %"U16_F".%"U16_F".%"U16_F".%"U16_F".\n", + ip4_addr1(&pcb->remote_ip), ip4_addr2(&pcb->remote_ip), + ip4_addr3(&pcb->remote_ip), ip4_addr4(&pcb->remote_ip))); + + ++pcb_remove; + ++pcb_reset; + } +#if LWIP_TCP_KEEPALIVE + else if((u32_t)(tcp_ticks - pcb->tmr) > + (pcb->keep_idle + pcb->keep_cnt_sent * pcb->keep_intvl) + / TCP_SLOW_INTERVAL) +#else + else if((u32_t)(tcp_ticks - pcb->tmr) > + (pcb->keep_idle + pcb->keep_cnt_sent * TCP_KEEPINTVL_DEFAULT) + / TCP_SLOW_INTERVAL) +#endif /* LWIP_TCP_KEEPALIVE */ + { + tcp_keepalive(pcb); + pcb->keep_cnt_sent++; + } + } + + /* If this PCB has queued out of sequence data, but has been + inactive for too long, will drop the data (it will eventually + be retransmitted). */ +#if TCP_QUEUE_OOSEQ + if (pcb->ooseq != NULL && + (u32_t)tcp_ticks - pcb->tmr >= pcb->rto * TCP_OOSEQ_TIMEOUT) { + tcp_segs_free(pcb->ooseq); + pcb->ooseq = NULL; + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: dropping OOSEQ queued data\n")); + } +#endif /* TCP_QUEUE_OOSEQ */ + + /* Check if this PCB has stayed too long in SYN-RCVD */ + if (pcb->state == SYN_RCVD) { + if ((u32_t)(tcp_ticks - pcb->tmr) > + TCP_SYN_RCVD_TIMEOUT / TCP_SLOW_INTERVAL) { + ++pcb_remove; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in SYN-RCVD\n")); + } + } + + /* Check if this PCB has stayed too long in LAST-ACK */ + if (pcb->state == LAST_ACK) { + if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { + ++pcb_remove; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in LAST-ACK\n")); + } + } + + /* If the PCB should be removed, do it. */ + if (pcb_remove) { + tcp_pcb_purge(pcb); + /* Remove PCB from tcp_active_pcbs list. */ + if (prev != NULL) { + LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_active_pcbs", pcb != tcp_active_pcbs); + prev->next = pcb->next; + } else { + /* This PCB was the first. */ + LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_active_pcbs", tcp_active_pcbs == pcb); + tcp_active_pcbs = pcb->next; + } + + TCP_EVENT_ERR(pcb->errf, pcb->callback_arg, ERR_ABRT); + if (pcb_reset) { + tcp_rst(pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip, + pcb->local_port, pcb->remote_port); + } + + pcb2 = pcb->next; + memp_free(MEMP_TCP_PCB, pcb); + pcb = pcb2; + } else { + + /* We check if we should poll the connection. */ + ++pcb->polltmr; + if (pcb->polltmr >= pcb->pollinterval) { + pcb->polltmr = 0; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: polling application\n")); + TCP_EVENT_POLL(pcb, err); + if (err == ERR_OK) { + tcp_output(pcb); + } + } + + prev = pcb; + pcb = pcb->next; + } + } + + + /* Steps through all of the TIME-WAIT PCBs. */ + prev = NULL; + pcb = tcp_tw_pcbs; + while (pcb != NULL) { + LWIP_ASSERT("tcp_slowtmr: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); + pcb_remove = 0; + + /* Check if this PCB has stayed long enough in TIME-WAIT */ + if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { + ++pcb_remove; + } + + + + /* If the PCB should be removed, do it. */ + if (pcb_remove) { + tcp_pcb_purge(pcb); + /* Remove PCB from tcp_tw_pcbs list. */ + if (prev != NULL) { + LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_tw_pcbs", pcb != tcp_tw_pcbs); + prev->next = pcb->next; + } else { + /* This PCB was the first. */ + LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_tw_pcbs", tcp_tw_pcbs == pcb); + tcp_tw_pcbs = pcb->next; + } + pcb2 = pcb->next; + memp_free(MEMP_TCP_PCB, pcb); + pcb = pcb2; + } else { + prev = pcb; + pcb = pcb->next; + } + } +} + +/** + * Is called every TCP_FAST_INTERVAL (250 ms) and process data previously + * "refused" by upper layer (application) and sends delayed ACKs. + * + * Automatically called from tcp_tmr(). + */ +void +tcp_fasttmr(void) +{ + struct tcp_pcb *pcb; + + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + /* If there is data which was previously "refused" by upper layer */ + if (pcb->refused_data != NULL) { + /* Notify again application with data previously received. */ + err_t err; + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_fasttmr: notify kept packet\n")); + TCP_EVENT_RECV(pcb, pcb->refused_data, ERR_OK, err); + if (err == ERR_OK) { + pcb->refused_data = NULL; + } + } + + /* send delayed ACKs */ + if (pcb->flags & TF_ACK_DELAY) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: delayed ACK\n")); + tcp_ack_now(pcb); + pcb->flags &= ~(TF_ACK_DELAY | TF_ACK_NOW); + } + } +} + +/** + * Deallocates a list of TCP segments (tcp_seg structures). + * + * @param seg tcp_seg list of TCP segments to free + * @return the number of pbufs that were deallocated + */ +u8_t +tcp_segs_free(struct tcp_seg *seg) +{ + u8_t count = 0; + struct tcp_seg *next; + while (seg != NULL) { + next = seg->next; + count += tcp_seg_free(seg); + seg = next; + } + return count; +} + +/** + * Frees a TCP segment (tcp_seg structure). + * + * @param seg single tcp_seg to free + * @return the number of pbufs that were deallocated + */ +u8_t +tcp_seg_free(struct tcp_seg *seg) +{ + u8_t count = 0; + + if (seg != NULL) { + if (seg->p != NULL) { + count = pbuf_free(seg->p); +#if TCP_DEBUG + seg->p = NULL; +#endif /* TCP_DEBUG */ + } + memp_free(MEMP_TCP_SEG, seg); + } + return count; +} + +/** + * Sets the priority of a connection. + * + * @param pcb the tcp_pcb to manipulate + * @param prio new priority + */ +void +tcp_setprio(struct tcp_pcb *pcb, u8_t prio) +{ + pcb->prio = prio; +} +#if TCP_QUEUE_OOSEQ + +/** + * Returns a copy of the given TCP segment. + * The pbuf and data are not copied, only the pointers + * + * @param seg the old tcp_seg + * @return a copy of seg + */ +struct tcp_seg * +tcp_seg_copy(struct tcp_seg *seg) +{ + struct tcp_seg *cseg; + + cseg = memp_malloc(MEMP_TCP_SEG); + if (cseg == NULL) { + return NULL; + } + SMEMCPY((u8_t *)cseg, (const u8_t *)seg, sizeof(struct tcp_seg)); + pbuf_ref(cseg->p); + return cseg; +} +#endif + +#if LWIP_CALLBACK_API +/** + * Default receive callback that is called if the user didn't register + * a recv callback for the pcb. + */ +err_t +tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) +{ + LWIP_UNUSED_ARG(arg); + if (p != NULL) { + tcp_recved(pcb, p->tot_len); + pbuf_free(p); + } else if (err == ERR_OK) { + return tcp_close(pcb); + } + return ERR_OK; +} +#endif /* LWIP_CALLBACK_API */ + +/** + * Kills the oldest active connection that has lower priority than prio. + * + * @param prio minimum priority + */ +static void +tcp_kill_prio(u8_t prio) +{ + struct tcp_pcb *pcb, *inactive; + u32_t inactivity; + u8_t mprio; + + + mprio = TCP_PRIO_MAX; + + /* We kill the oldest active connection that has lower priority than prio. */ + inactivity = 0; + inactive = NULL; + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + if (pcb->prio <= prio && + pcb->prio <= mprio && + (u32_t)(tcp_ticks - pcb->tmr) >= inactivity) { + inactivity = tcp_ticks - pcb->tmr; + inactive = pcb; + mprio = pcb->prio; + } + } + if (inactive != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_prio: killing oldest PCB %p (%"S32_F")\n", + (void *)inactive, inactivity)); + tcp_abort(inactive); + } +} + +/** + * Kills the oldest connection that is in TIME_WAIT state. + * Called from tcp_alloc() if no more connections are available. + */ +static void +tcp_kill_timewait(void) +{ + struct tcp_pcb *pcb, *inactive; + u32_t inactivity; + + inactivity = 0; + inactive = NULL; + /* Go through the list of TIME_WAIT pcbs and get the oldest pcb. */ + for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { + if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) { + inactivity = tcp_ticks - pcb->tmr; + inactive = pcb; + } + } + if (inactive != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_timewait: killing oldest TIME-WAIT PCB %p (%"S32_F")\n", + (void *)inactive, inactivity)); + tcp_abort(inactive); + } +} + +/** + * Allocate a new tcp_pcb structure. + * + * @param prio priority for the new pcb + * @return a new tcp_pcb that initially is in state CLOSED + */ +struct tcp_pcb * +tcp_alloc(u8_t prio) +{ + struct tcp_pcb *pcb; + u32_t iss; + + pcb = memp_malloc(MEMP_TCP_PCB); + if (pcb == NULL) { + /* Try killing oldest connection in TIME-WAIT. */ + LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest TIME-WAIT connection\n")); + tcp_kill_timewait(); + /* Try to allocate a tcp_pcb again. */ + pcb = memp_malloc(MEMP_TCP_PCB); + if (pcb == NULL) { + /* Try killing active connections with lower priority than the new one. */ + LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing connection with prio lower than %d\n", prio)); + tcp_kill_prio(prio); + /* Try to allocate a tcp_pcb again. */ + pcb = memp_malloc(MEMP_TCP_PCB); + if (pcb != NULL) { + /* adjust err stats: memp_malloc failed twice before */ + MEMP_STATS_DEC(err, MEMP_TCP_PCB); + } + } + if (pcb != NULL) { + /* adjust err stats: timewait PCB was freed above */ + MEMP_STATS_DEC(err, MEMP_TCP_PCB); + } + } + if (pcb != NULL) { + memset(pcb, 0, sizeof(struct tcp_pcb)); + pcb->prio = TCP_PRIO_NORMAL; + pcb->snd_buf = TCP_SND_BUF; + pcb->snd_queuelen = 0; + pcb->rcv_wnd = TCP_WND; + pcb->rcv_ann_wnd = TCP_WND; + pcb->tos = 0; + pcb->ttl = TCP_TTL; + /* As initial send MSS, we use TCP_MSS but limit it to 536. + The send MSS is updated when an MSS option is received. */ + pcb->mss = (TCP_MSS > 536) ? 536 : TCP_MSS; + pcb->rto = 3000 / TCP_SLOW_INTERVAL; + pcb->sa = 0; + pcb->sv = 3000 / TCP_SLOW_INTERVAL; + pcb->rtime = -1; + pcb->cwnd = 1; + iss = tcp_next_iss(); + pcb->snd_wl2 = iss; + pcb->snd_nxt = iss; + pcb->lastack = iss; + pcb->snd_lbb = iss; + pcb->tmr = tcp_ticks; + + pcb->polltmr = 0; + +#if LWIP_CALLBACK_API + pcb->recv = tcp_recv_null; +#endif /* LWIP_CALLBACK_API */ + + /* Init KEEPALIVE timer */ + pcb->keep_idle = TCP_KEEPIDLE_DEFAULT; + +#if LWIP_TCP_KEEPALIVE + pcb->keep_intvl = TCP_KEEPINTVL_DEFAULT; + pcb->keep_cnt = TCP_KEEPCNT_DEFAULT; +#endif /* LWIP_TCP_KEEPALIVE */ + + pcb->keep_cnt_sent = 0; + } + return pcb; +} + +/** + * Creates a new TCP protocol control block but doesn't place it on + * any of the TCP PCB lists. + * The pcb is not put on any list until binding using tcp_bind(). + * + * @internal: Maybe there should be a idle TCP PCB list where these + * PCBs are put on. Port reservation using tcp_bind() is implemented but + * allocated pcbs that are not bound can't be killed automatically if wanting + * to allocate a pcb with higher prio (@see tcp_kill_prio()) + * + * @return a new tcp_pcb that initially is in state CLOSED + */ +struct tcp_pcb * +tcp_new(void) +{ + return tcp_alloc(TCP_PRIO_NORMAL); +} + +/** + * Used to specify the argument that should be passed callback + * functions. + * + * @param pcb tcp_pcb to set the callback argument + * @param arg void pointer argument to pass to callback functions + */ +void +tcp_arg(struct tcp_pcb *pcb, void *arg) +{ + pcb->callback_arg = arg; +} +#if LWIP_CALLBACK_API + +/** + * Used to specify the function that should be called when a TCP + * connection receives data. + * + * @param pcb tcp_pcb to set the recv callback + * @param recv callback function to call for this pcb when data is received + */ +void +tcp_recv(struct tcp_pcb *pcb, + err_t (* recv)(void *arg, struct tcp_pcb *tpcb, struct pbuf *p, err_t err)) +{ + pcb->recv = recv; +} + +/** + * Used to specify the function that should be called when TCP data + * has been successfully delivered to the remote host. + * + * @param pcb tcp_pcb to set the sent callback + * @param sent callback function to call for this pcb when data is successfully sent + */ +void +tcp_sent(struct tcp_pcb *pcb, + err_t (* sent)(void *arg, struct tcp_pcb *tpcb, u16_t len)) +{ + pcb->sent = sent; +} + +/** + * Used to specify the function that should be called when a fatal error + * has occured on the connection. + * + * @param pcb tcp_pcb to set the err callback + * @param errf callback function to call for this pcb when a fatal error + * has occured on the connection + */ +void +tcp_err(struct tcp_pcb *pcb, + void (* errf)(void *arg, err_t err)) +{ + pcb->errf = errf; +} + +/** + * Used for specifying the function that should be called when a + * LISTENing connection has been connected to another host. + * + * @param pcb tcp_pcb to set the accept callback + * @param accept callback function to call for this pcb when LISTENing + * connection has been connected to another host + */ +void +tcp_accept(struct tcp_pcb *pcb, + err_t (* accept)(void *arg, struct tcp_pcb *newpcb, err_t err)) +{ + pcb->accept = accept; +} +#endif /* LWIP_CALLBACK_API */ + + +/** + * Used to specify the function that should be called periodically + * from TCP. The interval is specified in terms of the TCP coarse + * timer interval, which is called twice a second. + * + */ +void +tcp_poll(struct tcp_pcb *pcb, + err_t (* poll)(void *arg, struct tcp_pcb *tpcb), u8_t interval) +{ +#if LWIP_CALLBACK_API + pcb->poll = poll; +#endif /* LWIP_CALLBACK_API */ + pcb->pollinterval = interval; +} + +/** + * Purges a TCP PCB. Removes any buffered data and frees the buffer memory + * (pcb->ooseq, pcb->unsent and pcb->unacked are freed). + * + * @param pcb tcp_pcb to purge. The pcb itself is not deallocated! + */ +void +tcp_pcb_purge(struct tcp_pcb *pcb) +{ + if (pcb->state != CLOSED && + pcb->state != TIME_WAIT && + pcb->state != LISTEN) { + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge\n")); + +#if TCP_LISTEN_BACKLOG + if (pcb->state == SYN_RCVD) { + /* Need to find the corresponding listen_pcb and decrease its accepts_pending */ + struct tcp_pcb_listen *lpcb; + LWIP_ASSERT("tcp_pcb_purge: pcb->state == SYN_RCVD but tcp_listen_pcbs is NULL", + tcp_listen_pcbs.listen_pcbs != NULL); + for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { + if ((lpcb->local_port == pcb->local_port) && + (ip_addr_isany(&lpcb->local_ip) || + ip_addr_cmp(&pcb->local_ip, &lpcb->local_ip))) { + /* port and address of the listen pcb match the timed-out pcb */ + LWIP_ASSERT("tcp_pcb_purge: listen pcb does not have accepts pending", + lpcb->accepts_pending > 0); + lpcb->accepts_pending--; + break; + } + } + } +#endif /* TCP_LISTEN_BACKLOG */ + + + if (pcb->refused_data != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->refused_data\n")); + pbuf_free(pcb->refused_data); + pcb->refused_data = NULL; + } + if (pcb->unsent != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: not all data sent\n")); + } + if (pcb->unacked != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->unacked\n")); + } +#if TCP_QUEUE_OOSEQ /* LW */ + if (pcb->ooseq != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->ooseq\n")); + } + + /* Stop the retransmission timer as it will expect data on unacked + queue if it fires */ + pcb->rtime = -1; + + tcp_segs_free(pcb->ooseq); + pcb->ooseq = NULL; +#endif /* TCP_QUEUE_OOSEQ */ + tcp_segs_free(pcb->unsent); + tcp_segs_free(pcb->unacked); + pcb->unacked = pcb->unsent = NULL; + } +} + +/** + * Purges the PCB and removes it from a PCB list. Any delayed ACKs are sent first. + * + * @param pcblist PCB list to purge. + * @param pcb tcp_pcb to purge. The pcb itself is NOT deallocated! + */ +void +tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb) +{ + TCP_RMV(pcblist, pcb); + + tcp_pcb_purge(pcb); + + /* if there is an outstanding delayed ACKs, send it */ + if (pcb->state != TIME_WAIT && + pcb->state != LISTEN && + pcb->flags & TF_ACK_DELAY) { + pcb->flags |= TF_ACK_NOW; + tcp_output(pcb); + } + + if (pcb->state != LISTEN) { + LWIP_ASSERT("unsent segments leaking", pcb->unsent == NULL); + LWIP_ASSERT("unacked segments leaking", pcb->unacked == NULL); +#if TCP_QUEUE_OOSEQ + LWIP_ASSERT("ooseq segments leaking", pcb->ooseq == NULL); +#endif /* TCP_QUEUE_OOSEQ */ + } + + pcb->state = CLOSED; + + LWIP_ASSERT("tcp_pcb_remove: tcp_pcbs_sane()", tcp_pcbs_sane()); +} + +/** + * Calculates a new initial sequence number for new connections. + * + * @return u32_t pseudo random sequence number + */ +u32_t +tcp_next_iss(void) +{ + static u32_t iss = 6510; + + iss += tcp_ticks; /* XXX */ + return iss; +} + +#if TCP_CALCULATE_EFF_SEND_MSS +/** + * Calcluates the effective send mss that can be used for a specific IP address + * by using ip_route to determin the netif used to send to the address and + * calculating the minimum of TCP_MSS and that netif's mtu (if set). + */ +u16_t +tcp_eff_send_mss(u16_t sendmss, struct ip_addr *addr) +{ + u16_t mss_s; + struct netif *outif; + + outif = ip_route(addr); + if ((outif != NULL) && (outif->mtu != 0)) { + mss_s = outif->mtu - IP_HLEN - TCP_HLEN; + /* RFC 1122, chap 4.2.2.6: + * Eff.snd.MSS = min(SendMSS+20, MMS_S) - TCPhdrsize - IPoptionsize + * We correct for TCP options in tcp_enqueue(), and don't support + * IP options + */ + sendmss = LWIP_MIN(sendmss, mss_s); + } + return sendmss; +} +#endif /* TCP_CALCULATE_EFF_SEND_MSS */ + +const char* +tcp_debug_state_str(enum tcp_state s) +{ + return tcp_state_str[s]; +} + +#if TCP_DEBUG || TCP_INPUT_DEBUG || TCP_OUTPUT_DEBUG +/** + * Print a tcp header for debugging purposes. + * + * @param tcphdr pointer to a struct tcp_hdr + */ +void +tcp_debug_print(struct tcp_hdr *tcphdr) +{ + LWIP_DEBUGF(TCP_DEBUG, ("TCP header:\n")); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(TCP_DEBUG, ("| %5"U16_F" | %5"U16_F" | (src port, dest port)\n", + ntohs(tcphdr->src), ntohs(tcphdr->dest))); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(TCP_DEBUG, ("| %010"U32_F" | (seq no)\n", + ntohl(tcphdr->seqno))); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(TCP_DEBUG, ("| %010"U32_F" | (ack no)\n", + ntohl(tcphdr->ackno))); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(TCP_DEBUG, ("| %2"U16_F" | |%"U16_F"%"U16_F"%"U16_F"%"U16_F"%"U16_F"%"U16_F"| %5"U16_F" | (hdrlen, flags (", + TCPH_HDRLEN(tcphdr), + TCPH_FLAGS(tcphdr) >> 5 & 1, + TCPH_FLAGS(tcphdr) >> 4 & 1, + TCPH_FLAGS(tcphdr) >> 3 & 1, + TCPH_FLAGS(tcphdr) >> 2 & 1, + TCPH_FLAGS(tcphdr) >> 1 & 1, + TCPH_FLAGS(tcphdr) & 1, + ntohs(tcphdr->wnd))); + tcp_debug_print_flags(TCPH_FLAGS(tcphdr)); + LWIP_DEBUGF(TCP_DEBUG, ("), win)\n")); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(TCP_DEBUG, ("| 0x%04"X16_F" | %5"U16_F" | (chksum, urgp)\n", + ntohs(tcphdr->chksum), ntohs(tcphdr->urgp))); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); +} + +/** + * Print a tcp state for debugging purposes. + * + * @param s enum tcp_state to print + */ +void +tcp_debug_print_state(enum tcp_state s) +{ + LWIP_DEBUGF(TCP_DEBUG, ("State: %s\n", tcp_state_str[s])); +} + +/** + * Print tcp flags for debugging purposes. + * + * @param flags tcp flags, all active flags are printed + */ +void +tcp_debug_print_flags(u8_t flags) +{ + if (flags & TCP_FIN) { + LWIP_DEBUGF(TCP_DEBUG, ("FIN ")); + } + if (flags & TCP_SYN) { + LWIP_DEBUGF(TCP_DEBUG, ("SYN ")); + } + if (flags & TCP_RST) { + LWIP_DEBUGF(TCP_DEBUG, ("RST ")); + } + if (flags & TCP_PSH) { + LWIP_DEBUGF(TCP_DEBUG, ("PSH ")); + } + if (flags & TCP_ACK) { + LWIP_DEBUGF(TCP_DEBUG, ("ACK ")); + } + if (flags & TCP_URG) { + LWIP_DEBUGF(TCP_DEBUG, ("URG ")); + } + if (flags & TCP_ECE) { + LWIP_DEBUGF(TCP_DEBUG, ("ECE ")); + } + if (flags & TCP_CWR) { + LWIP_DEBUGF(TCP_DEBUG, ("CWR ")); + } + LWIP_DEBUGF(TCP_DEBUG, ("\n")); +} + +/** + * Print all tcp_pcbs in every list for debugging purposes. + */ +void +tcp_debug_print_pcbs(void) +{ + struct tcp_pcb *pcb; + LWIP_DEBUGF(TCP_DEBUG, ("Active PCB states:\n")); + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_DEBUGF(TCP_DEBUG, ("[%p]Local port %"U16_F", foreign port %"U16_F" snd_nxt %"U32_F" rcv_nxt %"U32_F" ", + pcb, pcb->local_port, pcb->remote_port, + pcb->snd_nxt, pcb->rcv_nxt)); + tcp_debug_print_state(pcb->state); + } + LWIP_DEBUGF(TCP_DEBUG, ("Listen PCB states:\n")); + for(pcb = (struct tcp_pcb *)tcp_listen_pcbs.pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_DEBUGF(TCP_DEBUG, ("[%p]Local port %"U16_F", foreign port %"U16_F" snd_nxt %"U32_F" rcv_nxt %"U32_F" ", + pcb, pcb->local_port, pcb->remote_port, + pcb->snd_nxt, pcb->rcv_nxt)); + tcp_debug_print_state(pcb->state); + } + LWIP_DEBUGF(TCP_DEBUG, ("TIME-WAIT PCB states:\n")); + for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_DEBUGF(TCP_DEBUG, ("[%p]Local port %"U16_F", foreign port %"U16_F" snd_nxt %"U32_F" rcv_nxt %"U32_F" ", + pcb, pcb->local_port, pcb->remote_port, + pcb->snd_nxt, pcb->rcv_nxt)); + tcp_debug_print_state(pcb->state); + } +} + +/** + * Check state consistency of the tcp_pcb lists. + */ +s16_t +tcp_pcbs_sane(void) +{ + struct tcp_pcb *pcb; + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_ASSERT("tcp_pcbs_sane: active pcb->state != CLOSED", pcb->state != CLOSED); + LWIP_ASSERT("tcp_pcbs_sane: active pcb->state != LISTEN", pcb->state != LISTEN); + LWIP_ASSERT("tcp_pcbs_sane: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT); + } + for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_ASSERT("tcp_pcbs_sane: tw pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); + } + return 1; +} +#endif /* TCP_DEBUG */ + +#endif /* LWIP_TCP */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/tcp_in.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/tcp_in.c new file mode 100644 index 0000000..3930b40 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/tcp_in.c @@ -0,0 +1,1508 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Transmission Control Protocol, incoming traffic + * + * The input processing functions of the TCP layer. + * + * These functions are generally called in the order (ip_input() ->) + * tcp_input() -> * tcp_process() -> tcp_receive() (-> application). + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/tcp.h" +#include "lwip/def.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" +#include "arch/perf.h" + +/* These variables are global to all functions involved in the input + processing of TCP segments. They are set by the tcp_input() + function. */ +static struct tcp_seg inseg; +static struct tcp_hdr *tcphdr; +static struct ip_hdr *iphdr; +static u32_t seqno, ackno; +static u8_t flags; +static u16_t tcplen; + +static u8_t recv_flags; +static struct pbuf *recv_data; + +struct tcp_pcb *tcp_input_pcb; + +/* Forward declarations. */ +static err_t tcp_process(struct tcp_pcb *pcb); +static void tcp_receive(struct tcp_pcb *pcb); +static void tcp_parseopt(struct tcp_pcb *pcb); + +static err_t tcp_listen_input(struct tcp_pcb_listen *pcb); +static err_t tcp_timewait_input(struct tcp_pcb *pcb); + +/** + * The initial input processing of TCP. It verifies the TCP header, demultiplexes + * the segment between the PCBs and passes it on to tcp_process(), which implements + * the TCP finite state machine. This function is called by the IP layer (in + * ip_input()). + * + * @param p received TCP segment to process (p->payload pointing to the IP header) + * @param inp network interface on which this segment was received + */ +void +tcp_input(struct pbuf *p, struct netif *inp) +{ + struct tcp_pcb *pcb, *prev; + struct tcp_pcb_listen *lpcb; + u8_t hdrlen; + err_t err; + + PERF_START; + + TCP_STATS_INC(tcp.recv); + snmp_inc_tcpinsegs(); + + iphdr = p->payload; + tcphdr = (struct tcp_hdr *)((u8_t *)p->payload + IPH_HL(iphdr) * 4); + +#if TCP_INPUT_DEBUG + tcp_debug_print(tcphdr); +#endif + + /* remove header from payload */ + if (pbuf_header(p, -((s16_t)(IPH_HL(iphdr) * 4))) || (p->tot_len < sizeof(struct tcp_hdr))) { + /* drop short packets */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: short packet (%"U16_F" bytes) discarded\n", p->tot_len)); + TCP_STATS_INC(tcp.lenerr); + TCP_STATS_INC(tcp.drop); + snmp_inc_tcpinerrs(); + pbuf_free(p); + return; + } + + /* Don't even process incoming broadcasts/multicasts. */ + if (ip_addr_isbroadcast(&(iphdr->dest), inp) || + ip_addr_ismulticast(&(iphdr->dest))) { + TCP_STATS_INC(tcp.proterr); + TCP_STATS_INC(tcp.drop); + snmp_inc_tcpinerrs(); + pbuf_free(p); + return; + } + +#if CHECKSUM_CHECK_TCP + /* Verify TCP checksum. */ + if (inet_chksum_pseudo(p, (struct ip_addr *)&(iphdr->src), + (struct ip_addr *)&(iphdr->dest), + IP_PROTO_TCP, p->tot_len) != 0) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packet discarded due to failing checksum 0x%04"X16_F"\n", + inet_chksum_pseudo(p, (struct ip_addr *)&(iphdr->src), (struct ip_addr *)&(iphdr->dest), + IP_PROTO_TCP, p->tot_len))); +#if TCP_DEBUG + tcp_debug_print(tcphdr); +#endif /* TCP_DEBUG */ + TCP_STATS_INC(tcp.chkerr); + TCP_STATS_INC(tcp.drop); + snmp_inc_tcpinerrs(); + pbuf_free(p); + return; + } +#endif + + /* Move the payload pointer in the pbuf so that it points to the + TCP data instead of the TCP header. */ + hdrlen = TCPH_HDRLEN(tcphdr); + if(pbuf_header(p, -(hdrlen * 4))){ + /* drop short packets */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: short packet\n")); + TCP_STATS_INC(tcp.lenerr); + TCP_STATS_INC(tcp.drop); + snmp_inc_tcpinerrs(); + pbuf_free(p); + return; + } + + /* Convert fields in TCP header to host byte order. */ + tcphdr->src = ntohs(tcphdr->src); + tcphdr->dest = ntohs(tcphdr->dest); + seqno = tcphdr->seqno = ntohl(tcphdr->seqno); + ackno = tcphdr->ackno = ntohl(tcphdr->ackno); + tcphdr->wnd = ntohs(tcphdr->wnd); + + flags = TCPH_FLAGS(tcphdr); + tcplen = p->tot_len + ((flags & (TCP_FIN | TCP_SYN)) ? 1 : 0); + + /* Demultiplex an incoming segment. First, we check if it is destined + for an active connection. */ + prev = NULL; + + + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_ASSERT("tcp_input: active pcb->state != CLOSED", pcb->state != CLOSED); + LWIP_ASSERT("tcp_input: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT); + LWIP_ASSERT("tcp_input: active pcb->state != LISTEN", pcb->state != LISTEN); + if (pcb->remote_port == tcphdr->src && + pcb->local_port == tcphdr->dest && + ip_addr_cmp(&(pcb->remote_ip), &(iphdr->src)) && + ip_addr_cmp(&(pcb->local_ip), &(iphdr->dest))) { + + /* Move this PCB to the front of the list so that subsequent + lookups will be faster (we exploit locality in TCP segment + arrivals). */ + LWIP_ASSERT("tcp_input: pcb->next != pcb (before cache)", pcb->next != pcb); + if (prev != NULL) { + prev->next = pcb->next; + pcb->next = tcp_active_pcbs; + tcp_active_pcbs = pcb; + } + LWIP_ASSERT("tcp_input: pcb->next != pcb (after cache)", pcb->next != pcb); + break; + } + prev = pcb; + } + + if (pcb == NULL) { + /* If it did not go to an active connection, we check the connections + in the TIME-WAIT state. */ + for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_ASSERT("tcp_input: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); + if (pcb->remote_port == tcphdr->src && + pcb->local_port == tcphdr->dest && + ip_addr_cmp(&(pcb->remote_ip), &(iphdr->src)) && + ip_addr_cmp(&(pcb->local_ip), &(iphdr->dest))) { + /* We don't really care enough to move this PCB to the front + of the list since we are not very likely to receive that + many segments for connections in TIME-WAIT. */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packed for TIME_WAITing connection.\n")); + tcp_timewait_input(pcb); + pbuf_free(p); + return; + } + } + + /* Finally, if we still did not get a match, we check all PCBs that + are LISTENing for incoming connections. */ + prev = NULL; + for(lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { + if ((ip_addr_isany(&(lpcb->local_ip)) || + ip_addr_cmp(&(lpcb->local_ip), &(iphdr->dest))) && + lpcb->local_port == tcphdr->dest) { + /* Move this PCB to the front of the list so that subsequent + lookups will be faster (we exploit locality in TCP segment + arrivals). */ + if (prev != NULL) { + ((struct tcp_pcb_listen *)prev)->next = lpcb->next; + /* our successor is the remainder of the listening list */ + lpcb->next = tcp_listen_pcbs.listen_pcbs; + /* put this listening pcb at the head of the listening list */ + tcp_listen_pcbs.listen_pcbs = lpcb; + } + + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packed for LISTENing connection.\n")); + tcp_listen_input(lpcb); + pbuf_free(p); + return; + } + prev = (struct tcp_pcb *)lpcb; + } + } + +#if TCP_INPUT_DEBUG + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("+-+-+-+-+-+-+-+-+-+-+-+-+-+- tcp_input: flags ")); + tcp_debug_print_flags(TCPH_FLAGS(tcphdr)); + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("-+-+-+-+-+-+-+-+-+-+-+-+-+-+\n")); +#endif /* TCP_INPUT_DEBUG */ + + + if (pcb != NULL) { + /* The incoming segment belongs to a connection. */ +#if TCP_INPUT_DEBUG +#if TCP_DEBUG + tcp_debug_print_state(pcb->state); +#endif /* TCP_DEBUG */ +#endif /* TCP_INPUT_DEBUG */ + + /* Set up a tcp_seg structure. */ + inseg.next = NULL; + inseg.len = p->tot_len; + inseg.dataptr = p->payload; + inseg.p = p; + inseg.tcphdr = tcphdr; + + recv_data = NULL; + recv_flags = 0; + + /* If there is data which was previously "refused" by upper layer */ + if (pcb->refused_data != NULL) { + /* Notify again application with data previously received. */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: notify kept packet\n")); + TCP_EVENT_RECV(pcb, pcb->refused_data, ERR_OK, err); + if (err == ERR_OK) { + pcb->refused_data = NULL; + } else { + /* drop incoming packets, because pcb is "full" */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: drop incoming packets, because pcb is \"full\"\n")); + TCP_STATS_INC(tcp.drop); + snmp_inc_tcpinerrs(); + pbuf_free(p); + return; + } + } + tcp_input_pcb = pcb; + err = tcp_process(pcb); + /* A return value of ERR_ABRT means that tcp_abort() was called + and that the pcb has been freed. If so, we don't do anything. */ + if (err != ERR_ABRT) { + if (recv_flags & TF_RESET) { + /* TF_RESET means that the connection was reset by the other + end. We then call the error callback to inform the + application that the connection is dead before we + deallocate the PCB. */ + TCP_EVENT_ERR(pcb->errf, pcb->callback_arg, ERR_RST); + tcp_pcb_remove(&tcp_active_pcbs, pcb); + memp_free(MEMP_TCP_PCB, pcb); + } else if (recv_flags & TF_CLOSED) { + /* The connection has been closed and we will deallocate the + PCB. */ + tcp_pcb_remove(&tcp_active_pcbs, pcb); + memp_free(MEMP_TCP_PCB, pcb); + } else { + err = ERR_OK; + /* If the application has registered a "sent" function to be + called when new send buffer space is available, we call it + now. */ + if (pcb->acked > 0) { + TCP_EVENT_SENT(pcb, pcb->acked, err); + } + + if (recv_data != NULL) { + if(flags & TCP_PSH) { + recv_data->flags |= PBUF_FLAG_PUSH; + } + + /* Notify application that data has been received. */ + TCP_EVENT_RECV(pcb, recv_data, ERR_OK, err); + + /* If the upper layer can't receive this data, store it */ + if (err != ERR_OK) { + pcb->refused_data = recv_data; + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: keep incoming packet, because pcb is \"full\"\n")); + } + } + + /* If a FIN segment was received, we call the callback + function with a NULL buffer to indicate EOF. */ + if (recv_flags & TF_GOT_FIN) { + TCP_EVENT_RECV(pcb, NULL, ERR_OK, err); + } + + tcp_input_pcb = NULL; + /* Try to send something out. */ + tcp_output(pcb); +#if TCP_INPUT_DEBUG +#if TCP_DEBUG + tcp_debug_print_state(pcb->state); +#endif /* TCP_DEBUG */ +#endif /* TCP_INPUT_DEBUG */ + } + } + tcp_input_pcb = NULL; + + + /* give up our reference to inseg.p */ + if (inseg.p != NULL) + { + pbuf_free(inseg.p); + inseg.p = NULL; + } + } else { + + /* If no matching PCB was found, send a TCP RST (reset) to the + sender. */ + LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_input: no PCB match found, resetting.\n")); + if (!(TCPH_FLAGS(tcphdr) & TCP_RST)) { + TCP_STATS_INC(tcp.proterr); + TCP_STATS_INC(tcp.drop); + tcp_rst(ackno, seqno + tcplen, + &(iphdr->dest), &(iphdr->src), + tcphdr->dest, tcphdr->src); + } + pbuf_free(p); + } + + LWIP_ASSERT("tcp_input: tcp_pcbs_sane()", tcp_pcbs_sane()); + PERF_STOP("tcp_input"); +} + +/** + * Called by tcp_input() when a segment arrives for a listening + * connection (from tcp_input()). + * + * @param pcb the tcp_pcb_listen for which a segment arrived + * @return ERR_OK if the segment was processed + * another err_t on error + * + * @note the return value is not (yet?) used in tcp_input() + * @note the segment which arrived is saved in global variables, therefore only the pcb + * involved is passed as a parameter to this function + */ +static err_t +tcp_listen_input(struct tcp_pcb_listen *pcb) +{ + struct tcp_pcb *npcb; + err_t rc; + + /* In the LISTEN state, we check for incoming SYN segments, + creates a new PCB, and responds with a SYN|ACK. */ + if (flags & TCP_ACK) { + /* For incoming segments with the ACK flag set, respond with a + RST. */ + LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_listen_input: ACK in LISTEN, sending reset\n")); + tcp_rst(ackno + 1, seqno + tcplen, + &(iphdr->dest), &(iphdr->src), + tcphdr->dest, tcphdr->src); + } else if (flags & TCP_SYN) { + LWIP_DEBUGF(TCP_DEBUG, ("TCP connection request %"U16_F" -> %"U16_F".\n", tcphdr->src, tcphdr->dest)); +#if TCP_LISTEN_BACKLOG + if (pcb->accepts_pending >= pcb->backlog) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_listen_input: listen backlog exceeded for port %"U16_F"\n", tcphdr->dest)); + return ERR_ABRT; + } +#endif /* TCP_LISTEN_BACKLOG */ + npcb = tcp_alloc(pcb->prio); + /* If a new PCB could not be created (probably due to lack of memory), + we don't do anything, but rely on the sender will retransmit the + SYN at a time when we have more memory available. */ + if (npcb == NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_listen_input: could not allocate PCB\n")); + TCP_STATS_INC(tcp.memerr); + return ERR_MEM; + } +#if TCP_LISTEN_BACKLOG + pcb->accepts_pending++; +#endif /* TCP_LISTEN_BACKLOG */ + /* Set up the new PCB. */ + ip_addr_set(&(npcb->local_ip), &(iphdr->dest)); + npcb->local_port = pcb->local_port; + ip_addr_set(&(npcb->remote_ip), &(iphdr->src)); + npcb->remote_port = tcphdr->src; + npcb->state = SYN_RCVD; + npcb->rcv_nxt = seqno + 1; + npcb->rcv_ann_right_edge = npcb->rcv_nxt; + npcb->snd_wnd = tcphdr->wnd; + npcb->ssthresh = npcb->snd_wnd; + npcb->snd_wl1 = seqno - 1;/* initialise to seqno-1 to force window update */ + npcb->callback_arg = pcb->callback_arg; +#if LWIP_CALLBACK_API + npcb->accept = pcb->accept; +#endif /* LWIP_CALLBACK_API */ + /* inherit socket options */ + npcb->so_options = pcb->so_options & (SOF_DEBUG|SOF_DONTROUTE|SOF_KEEPALIVE|SOF_OOBINLINE|SOF_LINGER); + /* Register the new PCB so that we can begin receiving segments + for it. */ + TCP_REG(&tcp_active_pcbs, npcb); + + /* Parse any options in the SYN. */ + tcp_parseopt(npcb); +#if TCP_CALCULATE_EFF_SEND_MSS + npcb->mss = tcp_eff_send_mss(npcb->mss, &(npcb->remote_ip)); +#endif /* TCP_CALCULATE_EFF_SEND_MSS */ + + snmp_inc_tcppassiveopens(); + + /* Send a SYN|ACK together with the MSS option. */ + rc = tcp_enqueue(npcb, NULL, 0, TCP_SYN | TCP_ACK, 0, TF_SEG_OPTS_MSS +#if LWIP_TCP_TIMESTAMPS + /* and maybe include the TIMESTAMP option */ + | (npcb->flags & TF_TIMESTAMP ? TF_SEG_OPTS_TS : 0) +#endif + ); + if (rc != ERR_OK) { + tcp_abandon(npcb, 0); + return rc; + } + return tcp_output(npcb); + } + return ERR_OK; +} + +/** + * Called by tcp_input() when a segment arrives for a connection in + * TIME_WAIT. + * + * @param pcb the tcp_pcb for which a segment arrived + * + * @note the segment which arrived is saved in global variables, therefore only the pcb + * involved is passed as a parameter to this function + */ +static err_t +tcp_timewait_input(struct tcp_pcb *pcb) +{ + /* RFC 1337: in TIME_WAIT, ignore RST and ACK FINs + any 'acceptable' segments */ + /* RFC 793 3.9 Event Processing - Segment Arrives: + * - first check sequence number - we skip that one in TIME_WAIT (always + * acceptable since we only send ACKs) + * - second check the RST bit (... return) */ + if (flags & TCP_RST) { + return ERR_OK; + } + /* - fourth, check the SYN bit, */ + if (flags & TCP_SYN) { + /* If an incoming segment is not acceptable, an acknowledgment + should be sent in reply */ + if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt+pcb->rcv_wnd)) { + /* If the SYN is in the window it is an error, send a reset */ + tcp_rst(ackno, seqno + tcplen, &(iphdr->dest), &(iphdr->src), + tcphdr->dest, tcphdr->src); + return ERR_OK; + } + } else if (flags & TCP_FIN) { + /* - eighth, check the FIN bit: Remain in the TIME-WAIT state. + Restart the 2 MSL time-wait timeout.*/ + pcb->tmr = tcp_ticks; + } + + if ((tcplen > 0)) { + /* Acknowledge data, FIN or out-of-window SYN */ + pcb->flags |= TF_ACK_NOW; + return tcp_output(pcb); + } + return ERR_OK; +} + +/** + * Implements the TCP state machine. Called by tcp_input. In some + * states tcp_receive() is called to receive data. The tcp_seg + * argument will be freed by the caller (tcp_input()) unless the + * recv_data pointer in the pcb is set. + * + * @param pcb the tcp_pcb for which a segment arrived + * + * @note the segment which arrived is saved in global variables, therefore only the pcb + * involved is passed as a parameter to this function + */ +static err_t +tcp_process(struct tcp_pcb *pcb) +{ + struct tcp_seg *rseg; + u8_t acceptable = 0; + err_t err; + + err = ERR_OK; + + /* Process incoming RST segments. */ + if (flags & TCP_RST) { + /* First, determine if the reset is acceptable. */ + if (pcb->state == SYN_SENT) { + if (ackno == pcb->snd_nxt) { + acceptable = 1; + } + } else { + if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, + pcb->rcv_nxt+pcb->rcv_wnd)) { + acceptable = 1; + } + } + + if (acceptable) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: Connection RESET\n")); + LWIP_ASSERT("tcp_input: pcb->state != CLOSED", pcb->state != CLOSED); + recv_flags |= TF_RESET; + pcb->flags &= ~TF_ACK_DELAY; + return ERR_RST; + } else { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n", + seqno, pcb->rcv_nxt)); + LWIP_DEBUGF(TCP_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n", + seqno, pcb->rcv_nxt)); + return ERR_OK; + } + } + + if ((flags & TCP_SYN) && (pcb->state != SYN_SENT && pcb->state != SYN_RCVD)) { + /* Cope with new connection attempt after remote end crashed */ + tcp_ack_now(pcb); + return ERR_OK; + } + + /* Update the PCB (in)activity timer. */ + pcb->tmr = tcp_ticks; + pcb->keep_cnt_sent = 0; + + tcp_parseopt(pcb); + + /* Do different things depending on the TCP state. */ + switch (pcb->state) { + case SYN_SENT: + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("SYN-SENT: ackno %"U32_F" pcb->snd_nxt %"U32_F" unacked %"U32_F"\n", ackno, + pcb->snd_nxt, ntohl(pcb->unacked->tcphdr->seqno))); + /* received SYN ACK with expected sequence number? */ + if ((flags & TCP_ACK) && (flags & TCP_SYN) + && ackno == ntohl(pcb->unacked->tcphdr->seqno) + 1) { + pcb->snd_buf++; + pcb->rcv_nxt = seqno + 1; + pcb->rcv_ann_right_edge = pcb->rcv_nxt; + pcb->lastack = ackno; + pcb->snd_wnd = tcphdr->wnd; + pcb->snd_wl1 = seqno - 1; /* initialise to seqno - 1 to force window update */ + pcb->state = ESTABLISHED; + +#if TCP_CALCULATE_EFF_SEND_MSS + pcb->mss = tcp_eff_send_mss(pcb->mss, &(pcb->remote_ip)); +#endif /* TCP_CALCULATE_EFF_SEND_MSS */ + + /* Set ssthresh again after changing pcb->mss (already set in tcp_connect + * but for the default value of pcb->mss) */ + pcb->ssthresh = pcb->mss * 10; + + pcb->cwnd = ((pcb->cwnd == 1) ? (pcb->mss * 2) : pcb->mss); + LWIP_ASSERT("pcb->snd_queuelen > 0", (pcb->snd_queuelen > 0)); + --pcb->snd_queuelen; + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_process: SYN-SENT --queuelen %"U16_F"\n", (u16_t)pcb->snd_queuelen)); + rseg = pcb->unacked; + pcb->unacked = rseg->next; + + /* If there's nothing left to acknowledge, stop the retransmit + timer, otherwise reset it to start again */ + if(pcb->unacked == NULL) + pcb->rtime = -1; + else { + pcb->rtime = 0; + pcb->nrtx = 0; + } + + tcp_seg_free(rseg); + + /* Call the user specified function to call when sucessfully + * connected. */ + TCP_EVENT_CONNECTED(pcb, ERR_OK, err); + tcp_ack_now(pcb); + } + /* received ACK? possibly a half-open connection */ + else if (flags & TCP_ACK) { + /* send a RST to bring the other side in a non-synchronized state. */ + tcp_rst(ackno, seqno + tcplen, &(iphdr->dest), &(iphdr->src), + tcphdr->dest, tcphdr->src); + } + break; + case SYN_RCVD: + if (flags & TCP_ACK) { + /* expected ACK number? */ + if (TCP_SEQ_BETWEEN(ackno, pcb->lastack+1, pcb->snd_nxt)) { + u16_t old_cwnd; + pcb->state = ESTABLISHED; + LWIP_DEBUGF(TCP_DEBUG, ("TCP connection established %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); +#if LWIP_CALLBACK_API + LWIP_ASSERT("pcb->accept != NULL", pcb->accept != NULL); +#endif + /* Call the accept function. */ + TCP_EVENT_ACCEPT(pcb, ERR_OK, err); + if (err != ERR_OK) { + /* If the accept function returns with an error, we abort + * the connection. */ + tcp_abort(pcb); + return ERR_ABRT; + } + old_cwnd = pcb->cwnd; + /* If there was any data contained within this ACK, + * we'd better pass it on to the application as well. */ + tcp_receive(pcb); + + /* Prevent ACK for SYN to generate a sent event */ + if (pcb->acked != 0) { + pcb->acked--; + } + + pcb->cwnd = ((old_cwnd == 1) ? (pcb->mss * 2) : pcb->mss); + + if (recv_flags & TF_GOT_FIN) { + tcp_ack_now(pcb); + pcb->state = CLOSE_WAIT; + } + } + /* incorrect ACK number */ + else { + /* send RST */ + tcp_rst(ackno, seqno + tcplen, &(iphdr->dest), &(iphdr->src), + tcphdr->dest, tcphdr->src); + } + } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) { + /* Looks like another copy of the SYN - retransmit our SYN-ACK */ + tcp_rexmit(pcb); + } + break; + case CLOSE_WAIT: + /* FALLTHROUGH */ + case ESTABLISHED: + tcp_receive(pcb); + if (recv_flags & TF_GOT_FIN) { /* passive close */ + tcp_ack_now(pcb); + pcb->state = CLOSE_WAIT; + } + break; + case FIN_WAIT_1: + tcp_receive(pcb); + if (recv_flags & TF_GOT_FIN) { + if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt)) { + LWIP_DEBUGF(TCP_DEBUG, + ("TCP connection closed: FIN_WAIT_1 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); + tcp_ack_now(pcb); + tcp_pcb_purge(pcb); + TCP_RMV(&tcp_active_pcbs, pcb); + pcb->state = TIME_WAIT; + TCP_REG(&tcp_tw_pcbs, pcb); + } else { + tcp_ack_now(pcb); + pcb->state = CLOSING; + } + } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt)) { + pcb->state = FIN_WAIT_2; + } + break; + case FIN_WAIT_2: + tcp_receive(pcb); + if (recv_flags & TF_GOT_FIN) { + LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: FIN_WAIT_2 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); + tcp_ack_now(pcb); + tcp_pcb_purge(pcb); + TCP_RMV(&tcp_active_pcbs, pcb); + pcb->state = TIME_WAIT; + TCP_REG(&tcp_tw_pcbs, pcb); + } + break; + case CLOSING: + tcp_receive(pcb); + if (flags & TCP_ACK && ackno == pcb->snd_nxt) { + LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: CLOSING %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); + tcp_pcb_purge(pcb); + TCP_RMV(&tcp_active_pcbs, pcb); + pcb->state = TIME_WAIT; + TCP_REG(&tcp_tw_pcbs, pcb); + } + break; + case LAST_ACK: + tcp_receive(pcb); + if (flags & TCP_ACK && ackno == pcb->snd_nxt) { + LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: LAST_ACK %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); + /* bugfix #21699: don't set pcb->state to CLOSED here or we risk leaking segments */ + recv_flags |= TF_CLOSED; + } + break; + default: + break; + } + return ERR_OK; +} + +#if TCP_QUEUE_OOSEQ +/** + * Insert segment into the list (segments covered with new one will be deleted) + * + * Called from tcp_receive() + */ +static void +tcp_oos_insert_segment(struct tcp_seg *cseg, struct tcp_seg *next) +{ + struct tcp_seg *old_seg; + + if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) { + /* received segment overlaps all following segments */ + tcp_segs_free(next); + next = NULL; + } + else { + /* delete some following segments + oos queue may have segments with FIN flag */ + while (next && + TCP_SEQ_GEQ((seqno + cseg->len), + (next->tcphdr->seqno + next->len))) { + /* cseg with FIN already processed */ + if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) { + TCPH_FLAGS_SET(cseg->tcphdr, TCPH_FLAGS(cseg->tcphdr) | TCP_FIN); + } + old_seg = next; + next = next->next; + tcp_seg_free(old_seg); + } + if (next && + TCP_SEQ_GT(seqno + cseg->len, next->tcphdr->seqno)) { + /* We need to trim the incoming segment. */ + cseg->len = (u16_t)(next->tcphdr->seqno - seqno); + pbuf_realloc(cseg->p, cseg->len); + } + } + cseg->next = next; +} +#endif + +/** + * Called by tcp_process. Checks if the given segment is an ACK for outstanding + * data, and if so frees the memory of the buffered data. Next, is places the + * segment on any of the receive queues (pcb->recved or pcb->ooseq). If the segment + * is buffered, the pbuf is referenced by pbuf_ref so that it will not be freed until + * i it has been removed from the buffer. + * + * If the incoming segment constitutes an ACK for a segment that was used for RTT + * estimation, the RTT is estimated here as well. + * + * Called from tcp_process(). + */ +static void +tcp_receive(struct tcp_pcb *pcb) +{ + struct tcp_seg *next; +#if TCP_QUEUE_OOSEQ + struct tcp_seg *prev, *cseg; +#endif + struct pbuf *p; + s32_t off; + s16_t m; + u32_t right_wnd_edge; + u16_t new_tot_len; + int found_dupack = 0; + + if (flags & TCP_ACK) { + right_wnd_edge = pcb->snd_wnd + pcb->snd_wl2; + + /* Update window. */ + if (TCP_SEQ_LT(pcb->snd_wl1, seqno) || + (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) || + (pcb->snd_wl2 == ackno && tcphdr->wnd > pcb->snd_wnd)) { + pcb->snd_wnd = tcphdr->wnd; + pcb->snd_wl1 = seqno; + pcb->snd_wl2 = ackno; + if (pcb->snd_wnd > 0 && pcb->persist_backoff > 0) { + pcb->persist_backoff = 0; + } + LWIP_DEBUGF(TCP_WND_DEBUG, ("tcp_receive: window update %"U16_F"\n", pcb->snd_wnd)); +#if TCP_WND_DEBUG + } else { + if (pcb->snd_wnd != tcphdr->wnd) { + LWIP_DEBUGF(TCP_WND_DEBUG, + ("tcp_receive: no window update lastack %"U32_F" ackno %" + U32_F" wl1 %"U32_F" seqno %"U32_F" wl2 %"U32_F"\n", + pcb->lastack, ackno, pcb->snd_wl1, seqno, pcb->snd_wl2)); + } +#endif /* TCP_WND_DEBUG */ + } + + /* (From Stevens TCP/IP Illustrated Vol II, p970.) Its only a + * duplicate ack if: + * 1) It doesn't ACK new data + * 2) length of received packet is zero (i.e. no payload) + * 3) the advertised window hasn't changed + * 4) There is outstanding unacknowledged data (retransmission timer running) + * 5) The ACK is == biggest ACK sequence number so far seen (snd_una) + * + * If it passes all five, should process as a dupack: + * a) dupacks < 3: do nothing + * b) dupacks == 3: fast retransmit + * c) dupacks > 3: increase cwnd + * + * If it only passes 1-3, should reset dupack counter (and add to + * stats, which we don't do in lwIP) + * + * If it only passes 1, should reset dupack counter + * + */ + + /* Clause 1 */ + if (TCP_SEQ_LEQ(ackno, pcb->lastack)) { + pcb->acked = 0; + /* Clause 2 */ + if (tcplen == 0) { + /* Clause 3 */ + if (pcb->snd_wl2 + pcb->snd_wnd == right_wnd_edge){ + /* Clause 4 */ + if (pcb->rtime >= 0) { + /* Clause 5 */ + if (pcb->lastack == ackno) { + found_dupack = 1; + if (pcb->dupacks + 1 > pcb->dupacks) + ++pcb->dupacks; + if (pcb->dupacks > 3) { + /* Inflate the congestion window, but not if it means that + the value overflows. */ + if ((u16_t)(pcb->cwnd + pcb->mss) > pcb->cwnd) { + pcb->cwnd += pcb->mss; + } + } else if (pcb->dupacks == 3) { + /* Do fast retransmit */ + tcp_rexmit_fast(pcb); + } + } + } + } + } + /* If Clause (1) or more is true, but not a duplicate ack, reset + * count of consecutive duplicate acks */ + if (!found_dupack) { + pcb->dupacks = 0; + } + } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack+1, pcb->snd_nxt)){ + /* We come here when the ACK acknowledges new data. */ + + /* Reset the "IN Fast Retransmit" flag, since we are no longer + in fast retransmit. Also reset the congestion window to the + slow start threshold. */ + if (pcb->flags & TF_INFR) { + pcb->flags &= ~TF_INFR; + pcb->cwnd = pcb->ssthresh; + } + + /* Reset the number of retransmissions. */ + pcb->nrtx = 0; + + /* Reset the retransmission time-out. */ + pcb->rto = (pcb->sa >> 3) + pcb->sv; + + /* Update the send buffer space. Diff between the two can never exceed 64K? */ + pcb->acked = (u16_t)(ackno - pcb->lastack); + + pcb->snd_buf += pcb->acked; + + /* Reset the fast retransmit variables. */ + pcb->dupacks = 0; + pcb->lastack = ackno; + + /* Update the congestion control variables (cwnd and + ssthresh). */ + if (pcb->state >= ESTABLISHED) { + if (pcb->cwnd < pcb->ssthresh) { + if ((u16_t)(pcb->cwnd + pcb->mss) > pcb->cwnd) { + pcb->cwnd += pcb->mss; + } + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: slow start cwnd %"U16_F"\n", pcb->cwnd)); + } else { + u16_t new_cwnd = (pcb->cwnd + pcb->mss * pcb->mss / pcb->cwnd); + if (new_cwnd > pcb->cwnd) { + pcb->cwnd = new_cwnd; + } + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: congestion avoidance cwnd %"U16_F"\n", pcb->cwnd)); + } + } + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: ACK for %"U32_F", unacked->seqno %"U32_F":%"U32_F"\n", + ackno, + pcb->unacked != NULL? + ntohl(pcb->unacked->tcphdr->seqno): 0, + pcb->unacked != NULL? + ntohl(pcb->unacked->tcphdr->seqno) + TCP_TCPLEN(pcb->unacked): 0)); + + /* Remove segment from the unacknowledged list if the incoming + ACK acknowlegdes them. */ + while (pcb->unacked != NULL && + TCP_SEQ_LEQ(ntohl(pcb->unacked->tcphdr->seqno) + + TCP_TCPLEN(pcb->unacked), ackno)) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->unacked\n", + ntohl(pcb->unacked->tcphdr->seqno), + ntohl(pcb->unacked->tcphdr->seqno) + + TCP_TCPLEN(pcb->unacked))); + + next = pcb->unacked; + pcb->unacked = pcb->unacked->next; + + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"U16_F" ... ", (u16_t)pcb->snd_queuelen)); + LWIP_ASSERT("pcb->snd_queuelen >= pbuf_clen(next->p)", (pcb->snd_queuelen >= pbuf_clen(next->p))); + /* Prevent ACK for FIN to generate a sent event */ + if ((pcb->acked != 0) && ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0)) { + pcb->acked--; + } + + pcb->snd_queuelen -= pbuf_clen(next->p); + tcp_seg_free(next); + + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"U16_F" (after freeing unacked)\n", (u16_t)pcb->snd_queuelen)); + if (pcb->snd_queuelen != 0) { + LWIP_ASSERT("tcp_receive: valid queue length", pcb->unacked != NULL || + pcb->unsent != NULL); + } + } + + /* If there's nothing left to acknowledge, stop the retransmit + timer, otherwise reset it to start again */ + if(pcb->unacked == NULL) + pcb->rtime = -1; + else + pcb->rtime = 0; + + pcb->polltmr = 0; + } else { + /* Fix bug bug #21582: out of sequence ACK, didn't really ack anything */ + pcb->acked = 0; + } + + /* We go through the ->unsent list to see if any of the segments + on the list are acknowledged by the ACK. This may seem + strange since an "unsent" segment shouldn't be acked. The + rationale is that lwIP puts all outstanding segments on the + ->unsent list after a retransmission, so these segments may + in fact have been sent once. */ + while (pcb->unsent != NULL && + TCP_SEQ_BETWEEN(ackno, ntohl(pcb->unsent->tcphdr->seqno) + + TCP_TCPLEN(pcb->unsent), pcb->snd_nxt)) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->unsent\n", + ntohl(pcb->unsent->tcphdr->seqno), ntohl(pcb->unsent->tcphdr->seqno) + + TCP_TCPLEN(pcb->unsent))); + + next = pcb->unsent; + pcb->unsent = pcb->unsent->next; + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"U16_F" ... ", (u16_t)pcb->snd_queuelen)); + LWIP_ASSERT("pcb->snd_queuelen >= pbuf_clen(next->p)", (pcb->snd_queuelen >= pbuf_clen(next->p))); + /* Prevent ACK for FIN to generate a sent event */ + if ((pcb->acked != 0) && ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0)) { + pcb->acked--; + } + pcb->snd_queuelen -= pbuf_clen(next->p); + tcp_seg_free(next); + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"U16_F" (after freeing unsent)\n", (u16_t)pcb->snd_queuelen)); + if (pcb->snd_queuelen != 0) { + LWIP_ASSERT("tcp_receive: valid queue length", + pcb->unacked != NULL || pcb->unsent != NULL); + } + } + /* End of ACK for new data processing. */ + + LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: pcb->rttest %"U32_F" rtseq %"U32_F" ackno %"U32_F"\n", + pcb->rttest, pcb->rtseq, ackno)); + + /* RTT estimation calculations. This is done by checking if the + incoming segment acknowledges the segment we use to take a + round-trip time measurement. */ + if (pcb->rttest && TCP_SEQ_LT(pcb->rtseq, ackno)) { + /* diff between this shouldn't exceed 32K since this are tcp timer ticks + and a round-trip shouldn't be that long... */ + m = (s16_t)(tcp_ticks - pcb->rttest); + + LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: experienced rtt %"U16_F" ticks (%"U16_F" msec).\n", + m, m * TCP_SLOW_INTERVAL)); + + /* This is taken directly from VJs original code in his paper */ + m = m - (pcb->sa >> 3); + pcb->sa += m; + if (m < 0) { + m = -m; + } + m = m - (pcb->sv >> 2); + pcb->sv += m; + pcb->rto = (pcb->sa >> 3) + pcb->sv; + + LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: RTO %"U16_F" (%"U16_F" milliseconds)\n", + pcb->rto, pcb->rto * TCP_SLOW_INTERVAL)); + + pcb->rttest = 0; + } + } + + /* If the incoming segment contains data, we must process it + further. */ + if (tcplen > 0) { + /* This code basically does three things: + + +) If the incoming segment contains data that is the next + in-sequence data, this data is passed to the application. This + might involve trimming the first edge of the data. The rcv_nxt + variable and the advertised window are adjusted. + + +) If the incoming segment has data that is above the next + sequence number expected (->rcv_nxt), the segment is placed on + the ->ooseq queue. This is done by finding the appropriate + place in the ->ooseq queue (which is ordered by sequence + number) and trim the segment in both ends if needed. An + immediate ACK is sent to indicate that we received an + out-of-sequence segment. + + +) Finally, we check if the first segment on the ->ooseq queue + now is in sequence (i.e., if rcv_nxt >= ooseq->seqno). If + rcv_nxt > ooseq->seqno, we must trim the first edge of the + segment on ->ooseq before we adjust rcv_nxt. The data in the + segments that are now on sequence are chained onto the + incoming segment so that we only need to call the application + once. + */ + + /* First, we check if we must trim the first edge. We have to do + this if the sequence number of the incoming segment is less + than rcv_nxt, and the sequence number plus the length of the + segment is larger than rcv_nxt. */ + /* if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)){ + if (TCP_SEQ_LT(pcb->rcv_nxt, seqno + tcplen)) {*/ + if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)){ + /* Trimming the first edge is done by pushing the payload + pointer in the pbuf downwards. This is somewhat tricky since + we do not want to discard the full contents of the pbuf up to + the new starting point of the data since we have to keep the + TCP header which is present in the first pbuf in the chain. + + What is done is really quite a nasty hack: the first pbuf in + the pbuf chain is pointed to by inseg.p. Since we need to be + able to deallocate the whole pbuf, we cannot change this + inseg.p pointer to point to any of the later pbufs in the + chain. Instead, we point the ->payload pointer in the first + pbuf to data in one of the later pbufs. We also set the + inseg.data pointer to point to the right place. This way, the + ->p pointer will still point to the first pbuf, but the + ->p->payload pointer will point to data in another pbuf. + + After we are done with adjusting the pbuf pointers we must + adjust the ->data pointer in the seg and the segment + length.*/ + + off = pcb->rcv_nxt - seqno; + p = inseg.p; + LWIP_ASSERT("inseg.p != NULL", inseg.p); + LWIP_ASSERT("insane offset!", (off < 0x7fff)); + if (inseg.p->len < off) { + LWIP_ASSERT("pbuf too short!", (((s32_t)inseg.p->tot_len) >= off)); + new_tot_len = (u16_t)(inseg.p->tot_len - off); + while (p->len < off) { + off -= p->len; + /* KJM following line changed (with addition of new_tot_len var) + to fix bug #9076 + inseg.p->tot_len -= p->len; */ + p->tot_len = new_tot_len; + p->len = 0; + p = p->next; + } + if(pbuf_header(p, (s16_t)-off)) { + /* Do we need to cope with this failing? Assert for now */ + LWIP_ASSERT("pbuf_header failed", 0); + } + } else { + if(pbuf_header(inseg.p, (s16_t)-off)) { + /* Do we need to cope with this failing? Assert for now */ + LWIP_ASSERT("pbuf_header failed", 0); + } + } + /* KJM following line changed to use p->payload rather than inseg->p->payload + to fix bug #9076 */ + inseg.dataptr = p->payload; + inseg.len -= (u16_t)(pcb->rcv_nxt - seqno); + inseg.tcphdr->seqno = seqno = pcb->rcv_nxt; + } + else { + if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)){ + /* the whole segment is < rcv_nxt */ + /* must be a duplicate of a packet that has already been correctly handled */ + + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: duplicate seqno %"U32_F"\n", seqno)); + tcp_ack_now(pcb); + } + } + + /* The sequence number must be within the window (above rcv_nxt + and below rcv_nxt + rcv_wnd) in order to be further + processed. */ + if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, + pcb->rcv_nxt + pcb->rcv_wnd - 1)){ + if (pcb->rcv_nxt == seqno) { + /* The incoming segment is the next in sequence. We check if + we have to trim the end of the segment and update rcv_nxt + and pass the data to the application. */ + tcplen = TCP_TCPLEN(&inseg); + + if (tcplen > pcb->rcv_wnd) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, + ("tcp_receive: other end overran receive window" + "seqno %"U32_F" len %"U32_F" right edge %"U32_F"\n", + seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd)); + if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { + /* Must remove the FIN from the header as we're trimming + * that byte of sequence-space from the packet */ + TCPH_FLAGS_SET(inseg.tcphdr, TCPH_FLAGS(inseg.tcphdr) &~ TCP_FIN); + } + /* Adjust length of segment to fit in the window. */ + inseg.len = pcb->rcv_wnd; + if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) { + inseg.len -= 1; + } + pbuf_realloc(inseg.p, inseg.len); + tcplen = TCP_TCPLEN(&inseg); + LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n", + (seqno + tcplen) == (pcb->rcv_nxt + pcb->rcv_wnd)); + } +#if TCP_QUEUE_OOSEQ + if (pcb->ooseq != NULL) { + if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, + ("tcp_receive: received in-order FIN, binning ooseq queue\n")); + /* Received in-order FIN means anything that was received + * out of order must now have been received in-order, so + * bin the ooseq queue + * rcv_nxt + * . |--ooseq--| + * .==seg============|FIN + */ + while (pcb->ooseq != NULL) { + struct tcp_seg *old_ooseq = pcb->ooseq; + pcb->ooseq = pcb->ooseq->next; + tcp_seg_free(old_ooseq); + } + } + else { + struct tcp_seg* next = pcb->ooseq; + struct tcp_seg *old_seg; + /* rcv_nxt + * . |--ooseq--| + * .==seg============| + */ + while (next && + TCP_SEQ_GEQ(seqno + tcplen, + next->tcphdr->seqno + next->len)) { + /* inseg doesn't have FIN (already processed) */ + if (TCPH_FLAGS(next->tcphdr) & TCP_FIN && + (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) == 0) { + TCPH_FLAGS_SET(inseg.tcphdr, + TCPH_FLAGS(inseg.tcphdr) | TCP_FIN); + tcplen = TCP_TCPLEN(&inseg); + } + old_seg = next; + next = next->next; + tcp_seg_free(old_seg); + } + /* rcv_nxt + * . |--ooseq--| + * .==seg============| + */ + if (next && + TCP_SEQ_GT(seqno + tcplen, + next->tcphdr->seqno)) { + /* FIN in inseg already handled by dropping whole ooseq queue */ + inseg.len = (u16_t)(pcb->ooseq->tcphdr->seqno - seqno); + if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) { + inseg.len -= 1; + } + pbuf_realloc(inseg.p, inseg.len); + tcplen = TCP_TCPLEN(&inseg); + LWIP_ASSERT("tcp_receive: segment not trimmed correctly to ooseq queue\n", + (seqno + tcplen) == pcb->ooseq->tcphdr->seqno); + } + pcb->ooseq = next; + } + } +#endif /* TCP_QUEUE_OOSEQ */ + + pcb->rcv_nxt = seqno + tcplen; + + /* Update the receiver's (our) window. */ + LWIP_ASSERT("tcp_receive: tcplen > rcv_wnd\n", pcb->rcv_wnd >= tcplen); + pcb->rcv_wnd -= tcplen; + + tcp_update_rcv_ann_wnd(pcb); + + /* If there is data in the segment, we make preparations to + pass this up to the application. The ->recv_data variable + is used for holding the pbuf that goes to the + application. The code for reassembling out-of-sequence data + chains its data on this pbuf as well. + + If the segment was a FIN, we set the TF_GOT_FIN flag that will + be used to indicate to the application that the remote side has + closed its end of the connection. */ + if (inseg.p->tot_len > 0) { + recv_data = inseg.p; + /* Since this pbuf now is the responsibility of the + application, we delete our reference to it so that we won't + (mistakingly) deallocate it. */ + inseg.p = NULL; + } + if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received FIN.\n")); + recv_flags |= TF_GOT_FIN; + } + +#if TCP_QUEUE_OOSEQ + /* We now check if we have segments on the ->ooseq queue that + is now in sequence. */ + while (pcb->ooseq != NULL && + pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) { + + cseg = pcb->ooseq; + seqno = pcb->ooseq->tcphdr->seqno; + + pcb->rcv_nxt += TCP_TCPLEN(cseg); + LWIP_ASSERT("tcp_receive: ooseq tcplen > rcv_wnd\n", + pcb->rcv_wnd >= TCP_TCPLEN(cseg)); + pcb->rcv_wnd -= TCP_TCPLEN(cseg); + + tcp_update_rcv_ann_wnd(pcb); + + if (cseg->p->tot_len > 0) { + /* Chain this pbuf onto the pbuf that we will pass to + the application. */ + if (recv_data) { + pbuf_cat(recv_data, cseg->p); + } else { + recv_data = cseg->p; + } + cseg->p = NULL; + } + if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: dequeued FIN.\n")); + recv_flags |= TF_GOT_FIN; + if (pcb->state == ESTABLISHED) { /* force passive close or we can move to active close */ + pcb->state = CLOSE_WAIT; + } + } + + pcb->ooseq = cseg->next; + tcp_seg_free(cseg); + } +#endif /* TCP_QUEUE_OOSEQ */ + + + /* Acknowledge the segment(s). */ + tcp_ack(pcb); + + } else { + /* We get here if the incoming segment is out-of-sequence. */ + tcp_send_empty_ack(pcb); +#if TCP_QUEUE_OOSEQ + /* We queue the segment on the ->ooseq queue. */ + if (pcb->ooseq == NULL) { + pcb->ooseq = tcp_seg_copy(&inseg); + } else { + /* If the queue is not empty, we walk through the queue and + try to find a place where the sequence number of the + incoming segment is between the sequence numbers of the + previous and the next segment on the ->ooseq queue. That is + the place where we put the incoming segment. If needed, we + trim the second edges of the previous and the incoming + segment so that it will fit into the sequence. + + If the incoming segment has the same sequence number as a + segment on the ->ooseq queue, we discard the segment that + contains less data. */ + + prev = NULL; + for(next = pcb->ooseq; next != NULL; next = next->next) { + if (seqno == next->tcphdr->seqno) { + /* The sequence number of the incoming segment is the + same as the sequence number of the segment on + ->ooseq. We check the lengths to see which one to + discard. */ + if (inseg.len > next->len) { + /* The incoming segment is larger than the old + segment. We replace some segments with the new + one. */ + cseg = tcp_seg_copy(&inseg); + if (cseg != NULL) { + if (prev != NULL) { + prev->next = cseg; + } else { + pcb->ooseq = cseg; + } + tcp_oos_insert_segment(cseg, next); + } + break; + } else { + /* Either the lenghts are the same or the incoming + segment was smaller than the old one; in either + case, we ditch the incoming segment. */ + break; + } + } else { + if (prev == NULL) { + if (TCP_SEQ_LT(seqno, next->tcphdr->seqno)) { + /* The sequence number of the incoming segment is lower + than the sequence number of the first segment on the + queue. We put the incoming segment first on the + queue. */ + cseg = tcp_seg_copy(&inseg); + if (cseg != NULL) { + pcb->ooseq = cseg; + tcp_oos_insert_segment(cseg, next); + } + break; + } + } else { + /*if (TCP_SEQ_LT(prev->tcphdr->seqno, seqno) && + TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {*/ + if (TCP_SEQ_BETWEEN(seqno, prev->tcphdr->seqno+1, next->tcphdr->seqno-1)) { + /* The sequence number of the incoming segment is in + between the sequence numbers of the previous and + the next segment on ->ooseq. We trim trim the previous + segment, delete next segments that included in received segment + and trim received, if needed. */ + cseg = tcp_seg_copy(&inseg); + if (cseg != NULL) { + if (TCP_SEQ_GT(prev->tcphdr->seqno + prev->len, seqno)) { + /* We need to trim the prev segment. */ + prev->len = (u16_t)(seqno - prev->tcphdr->seqno); + pbuf_realloc(prev->p, prev->len); + } + prev->next = cseg; + tcp_oos_insert_segment(cseg, next); + } + break; + } + } + /* If the "next" segment is the last segment on the + ooseq queue, we add the incoming segment to the end + of the list. */ + if (next->next == NULL && + TCP_SEQ_GT(seqno, next->tcphdr->seqno)) { + if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) { + /* segment "next" already contains all data */ + break; + } + next->next = tcp_seg_copy(&inseg); + if (next->next != NULL) { + if (TCP_SEQ_GT(next->tcphdr->seqno + next->len, seqno)) { + /* We need to trim the last segment. */ + next->len = (u16_t)(seqno - next->tcphdr->seqno); + pbuf_realloc(next->p, next->len); + } + } + break; + } + } + prev = next; + } + } +#endif /* TCP_QUEUE_OOSEQ */ + + } + } else { + /* The incoming segment is not withing the window. */ + tcp_send_empty_ack(pcb); + } + } else { + /* Segments with length 0 is taken care of here. Segments that + fall out of the window are ACKed. */ + /*if (TCP_SEQ_GT(pcb->rcv_nxt, seqno) || + TCP_SEQ_GEQ(seqno, pcb->rcv_nxt + pcb->rcv_wnd)) {*/ + if(!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd-1)){ + tcp_ack_now(pcb); + } + } +} + +/** + * Parses the options contained in the incoming segment. + * + * Called from tcp_listen_input() and tcp_process(). + * Currently, only the MSS option is supported! + * + * @param pcb the tcp_pcb for which a segment arrived + */ +static void +tcp_parseopt(struct tcp_pcb *pcb) +{ + u16_t c, max_c; + u16_t mss; + u8_t *opts, opt; +#if LWIP_TCP_TIMESTAMPS + u32_t tsval; +#endif + + opts = (u8_t *)tcphdr + TCP_HLEN; + + /* Parse the TCP MSS option, if present. */ + if(TCPH_HDRLEN(tcphdr) > 0x5) { + max_c = (TCPH_HDRLEN(tcphdr) - 5) << 2; + for (c = 0; c < max_c; ) { + opt = opts[c]; + switch (opt) { + case 0x00: + /* End of options. */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: EOL\n")); + return; + case 0x01: + /* NOP option. */ + ++c; + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: NOP\n")); + break; + case 0x02: + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: MSS\n")); + if (opts[c + 1] != 0x04 || c + 0x04 > max_c) { + /* Bad length */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n")); + return; + } + /* An MSS option with the right option length. */ + mss = (opts[c + 2] << 8) | opts[c + 3]; + /* Limit the mss to the configured TCP_MSS and prevent division by zero */ + pcb->mss = ((mss > TCP_MSS) || (mss == 0)) ? TCP_MSS : mss; + /* Advance to next option */ + c += 0x04; + break; +#if LWIP_TCP_TIMESTAMPS + case 0x08: + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: TS\n")); + if (opts[c + 1] != 0x0A || c + 0x0A > max_c) { + /* Bad length */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n")); + return; + } + /* TCP timestamp option with valid length */ + tsval = (opts[c+2]) | (opts[c+3] << 8) | + (opts[c+4] << 16) | (opts[c+5] << 24); + if (flags & TCP_SYN) { + pcb->ts_recent = ntohl(tsval); + pcb->flags |= TF_TIMESTAMP; + } else if (TCP_SEQ_BETWEEN(pcb->ts_lastacksent, seqno, seqno+tcplen)) { + pcb->ts_recent = ntohl(tsval); + } + /* Advance to next option */ + c += 0x0A; + break; +#endif + default: + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: other\n")); + if (opts[c + 1] == 0) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n")); + /* If the length field is zero, the options are malformed + and we don't process them further. */ + return; + } + /* All other options have a length field, so that we easily + can skip past them. */ + c += opts[c + 1]; + } + } + } +} + +#endif /* LWIP_TCP */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/tcp_out.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/tcp_out.c new file mode 100644 index 0000000..9605beb --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/tcp_out.c @@ -0,0 +1,1071 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Transmission Control Protocol, outgoing traffic + * + * The output functions of TCP. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/tcp.h" +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/sys.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" + +#include +#define _TEST_HD_ +/* Forward declarations.*/ +static void tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb); + +static struct tcp_hdr * +tcp_output_set_header(struct tcp_pcb *pcb, struct pbuf *p, int optlen, + u32_t seqno_be /* already in network byte order */) +{ + struct tcp_hdr *tcphdr = p->payload; + tcphdr->src = htons(pcb->local_port); + tcphdr->dest = htons(pcb->remote_port); + tcphdr->seqno = seqno_be; + tcphdr->ackno = htonl(pcb->rcv_nxt); + TCPH_FLAGS_SET(tcphdr, TCP_ACK); + tcphdr->wnd = htons(pcb->rcv_ann_wnd); + tcphdr->urgp = 0; + TCPH_HDRLEN_SET(tcphdr, (5 + optlen / 4)); + tcphdr->chksum = 0; + + /* If we're sending a packet, update the announced right window edge */ + pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd; + + return tcphdr; +} + +/** + * Called by tcp_close() to send a segment including flags but not data. + * + * @param pcb the tcp_pcb over which to send a segment + * @param flags the flags to set in the segment header + * @return ERR_OK if sent, another err_t otherwise + */ +err_t +tcp_send_ctrl(struct tcp_pcb *pcb, u8_t flags) +{ + /* no data, no length, flags, copy=1, no optdata */ + return tcp_enqueue(pcb, NULL, 0, flags, TCP_WRITE_FLAG_COPY, 0); +} + +/** + * Write data for sending (but does not send it immediately). + * + * It waits in the expectation of more data being sent soon (as + * it can send them more efficiently by combining them together). + * To prompt the system to send data now, call tcp_output() after + * calling tcp_write(). + * + * @param pcb Protocol control block of the TCP connection to enqueue data for. + * @param data pointer to the data to send + * @param len length (in bytes) of the data to send + * @param apiflags combination of following flags : + * - TCP_WRITE_FLAG_COPY (0x01) data will be copied into memory belonging to the stack + * - TCP_WRITE_FLAG_MORE (0x02) for TCP connection, PSH flag will be set on last segment sent, + * @return ERR_OK if enqueued, another err_t on error + * + * @see tcp_write() + */ +err_t +tcp_write(struct tcp_pcb *pcb, const void *data, u16_t len, u8_t apiflags) +{ + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_write(pcb=%p, data=%p, len=%"U16_F", apiflags=%"U16_F")\n", (void *)pcb, + data, len, (u16_t)apiflags)); + /* connection is in valid state for data transmission? */ + if (pcb->state == ESTABLISHED || + pcb->state == CLOSE_WAIT || + pcb->state == SYN_SENT || + pcb->state == SYN_RCVD) { + if (len > 0) { +#if LWIP_TCP_TIMESTAMPS + return tcp_enqueue(pcb, (void *)data, len, 0, apiflags, + pcb->flags & TF_TIMESTAMP ? TF_SEG_OPTS_TS : 0); +#else + return tcp_enqueue(pcb, (void *)data, len, 0, apiflags, 0); +#endif + } + return ERR_OK; + } else { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_STATE | LWIP_DBG_LEVEL_SEVERE, ("tcp_write() called in invalid state\n")); + return ERR_CONN; + } +} + +/** + * Enqueue data and/or TCP options for transmission + * + * Called by tcp_connect(), tcp_listen_input(), tcp_send_ctrl() and tcp_write(). + * + * @param pcb Protocol control block for the TCP connection to enqueue data for. + * @param arg Pointer to the data to be enqueued for sending. + * @param len Data length in bytes + * @param flags tcp header flags to set in the outgoing segment + * @param apiflags combination of following flags : + * - TCP_WRITE_FLAG_COPY (0x01) data will be copied into memory belonging to the stack + * - TCP_WRITE_FLAG_MORE (0x02) for TCP connection, PSH flag will be set on last segment sent, + * @param optflags options to include in segment later on (see definition of struct tcp_seg) + */ +err_t +tcp_enqueue(struct tcp_pcb *pcb, void *arg, u16_t len, + u8_t flags, u8_t apiflags, u8_t optflags) +{ + struct pbuf *p; + struct tcp_seg *seg, *useg, *queue; + u32_t seqno; + u16_t left, seglen; + void *ptr; + u16_t queuelen; + u8_t optlen; + + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, + ("tcp_enqueue(pcb=%p, arg=%p, len=%"U16_F", flags=%"X16_F", apiflags=%"U16_F")\n", + (void *)pcb, arg, len, (u16_t)flags, (u16_t)apiflags)); + LWIP_ERROR("tcp_enqueue: packet needs payload, options, or SYN/FIN (programmer violates API)", + ((len != 0) || (optflags != 0) || ((flags & (TCP_SYN | TCP_FIN)) != 0)), + return ERR_ARG;); + LWIP_ERROR("tcp_enqueue: len != 0 || arg == NULL (programmer violates API)", + ((len != 0) || (arg == NULL)), return ERR_ARG;); + + /* fail on too much data */ + if (len > pcb->snd_buf) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_WARNING, + ("tcp_enqueue: too much data (len=%"U16_F" > snd_buf=%"U16_F")\n", len, pcb->snd_buf)); + pcb->flags |= TF_NAGLEMEMERR; + return ERR_MEM; + } + left = len; + ptr = arg; + + optlen = LWIP_TCP_OPT_LENGTH(optflags); + + /* seqno will be the sequence number of the first segment enqueued + * by the call to this function. */ + seqno = pcb->snd_lbb; + + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: queuelen: %"U16_F"\n", (u16_t)pcb->snd_queuelen)); + + /* If total number of pbufs on the unsent/unacked queues exceeds the + * configured maximum, return an error */ + queuelen = pcb->snd_queuelen; + /* check for configured max queuelen and possible overflow */ + if ((queuelen >= TCP_SND_QUEUELEN) || (queuelen > TCP_SNDQUEUELEN_OVERFLOW)) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_WARNING, + ("tcp_enqueue: too long queue %"U16_F" (max %"U16_F")\n", queuelen, TCP_SND_QUEUELEN)); + TCP_STATS_INC(tcp.memerr); + pcb->flags |= TF_NAGLEMEMERR; + return ERR_MEM; + } + if (queuelen != 0) { + LWIP_ASSERT("tcp_enqueue: pbufs on queue => at least one queue non-empty", + pcb->unacked != NULL || pcb->unsent != NULL); + } else { + LWIP_ASSERT("tcp_enqueue: no pbufs on queue => both queues empty", + pcb->unacked == NULL && pcb->unsent == NULL); + } + + /* First, break up the data into segments and tuck them together in + * the local "queue" variable. */ + useg = queue = seg = NULL; + seglen = 0; + while (queue == NULL || left > 0) { + /* The segment length (including options) should be at most the MSS */ + seglen = left > (pcb->mss - optlen) ? (pcb->mss - optlen) : left; + + /* Allocate memory for tcp_seg, and fill in fields. */ + seg = memp_malloc(MEMP_TCP_SEG); + if (seg == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("tcp_enqueue: could not allocate memory for tcp_seg\n")); + goto memerr; + } + seg->next = NULL; + seg->p = NULL; + + /* first segment of to-be-queued data? */ + if (queue == NULL) { + queue = seg; + } + /* subsequent segments of to-be-queued data */ + else { + /* Attach the segment to the end of the queued segments */ + LWIP_ASSERT("useg != NULL", useg != NULL); + useg->next = seg; + } + /* remember last segment of to-be-queued data for next iteration */ + useg = seg; + + /* If copy is set, memory should be allocated + * and data copied into pbuf, otherwise data comes from + * ROM or other static memory, and need not be copied. */ + if (apiflags & TCP_WRITE_FLAG_COPY) { + if ((seg->p = pbuf_alloc(PBUF_TRANSPORT, seglen + optlen, PBUF_RAM)) == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("tcp_enqueue : could not allocate memory for pbuf copy size %"U16_F"\n", seglen)); + goto memerr; + } + LWIP_ASSERT("check that first pbuf can hold the complete seglen", + (seg->p->len >= seglen + optlen)); + queuelen += pbuf_clen(seg->p); + if (arg != NULL) { + MEMCPY((char *)seg->p->payload + optlen, ptr, seglen); + } + seg->dataptr = seg->p->payload; + } + /* do not copy data */ + else { + /* First, allocate a pbuf for the headers. */ + if ((seg->p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("tcp_enqueue: could not allocate memory for header pbuf\n")); + goto memerr; + } + queuelen += pbuf_clen(seg->p); + + /* Second, allocate a pbuf for holding the data. + * since the referenced data is available at least until it is sent out on the + * link (as it has to be ACKed by the remote party) we can safely use PBUF_ROM + * instead of PBUF_REF here. + */ + if (left > 0) { + if ((p = pbuf_alloc(PBUF_RAW, seglen, PBUF_ROM)) == NULL) { + /* If allocation fails, we have to deallocate the header pbuf as well. */ + pbuf_free(seg->p); + seg->p = NULL; + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("tcp_enqueue: could not allocate memory for zero-copy pbuf\n")); + goto memerr; + } + ++queuelen; + /* reference the non-volatile payload data */ + p->payload = ptr; + seg->dataptr = ptr; + + /* Concatenate the headers and data pbufs together. */ + pbuf_cat(seg->p/*header*/, p/*data*/); + p = NULL; + } + } + + /* Now that there are more segments queued, we check again if the + length of the queue exceeds the configured maximum or overflows. */ + if ((queuelen > TCP_SND_QUEUELEN) || (queuelen > TCP_SNDQUEUELEN_OVERFLOW)) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("tcp_enqueue: queue too long %"U16_F" (%"U16_F")\n", queuelen, TCP_SND_QUEUELEN)); + goto memerr; + } + + seg->len = seglen; + + /* build TCP header */ + if (pbuf_header(seg->p, TCP_HLEN)) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_enqueue: no room for TCP header in pbuf.\n")); + TCP_STATS_INC(tcp.err); + goto memerr; + } + seg->tcphdr = seg->p->payload; + seg->tcphdr->src = htons(pcb->local_port); + seg->tcphdr->dest = htons(pcb->remote_port); + seg->tcphdr->seqno = htonl(seqno); + seg->tcphdr->urgp = 0; + TCPH_FLAGS_SET(seg->tcphdr, flags); + /* don't fill in tcphdr->ackno and tcphdr->wnd until later */ + + seg->flags = optflags; + + /* Set the length of the header */ + TCPH_HDRLEN_SET(seg->tcphdr, (5 + optlen / 4)); + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_TRACE, ("tcp_enqueue: queueing %"U32_F":%"U32_F" (0x%"X16_F")\n", + ntohl(seg->tcphdr->seqno), + ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg), + (u16_t)flags)); + + left -= seglen; + seqno += seglen; + ptr = (void *)((u8_t *)ptr + seglen); + } + + /* Now that the data to be enqueued has been broken up into TCP + segments in the queue variable, we add them to the end of the + pcb->unsent queue. */ + if (pcb->unsent == NULL) { + useg = NULL; + } + else { + for (useg = pcb->unsent; useg->next != NULL; useg = useg->next); + } + /* { useg is last segment on the unsent queue, NULL if list is empty } */ + + /* If there is room in the last pbuf on the unsent queue, + chain the first pbuf on the queue together with that. */ + if (useg != NULL && + TCP_TCPLEN(useg) != 0 && + !(TCPH_FLAGS(useg->tcphdr) & (TCP_SYN | TCP_FIN)) && + (!(flags & (TCP_SYN | TCP_FIN)) || (flags == TCP_FIN)) && + /* fit within max seg size */ + (useg->len + queue->len <= pcb->mss) && + /* only concatenate segments with the same options */ + (useg->flags == queue->flags) && + /* segments are consecutive */ + (ntohl(useg->tcphdr->seqno) + useg->len == ntohl(queue->tcphdr->seqno)) ) { + /* Remove TCP header from first segment of our to-be-queued list */ + if(pbuf_header(queue->p, -(TCP_HLEN + optlen))) { + /* Can we cope with this failing? Just assert for now */ + LWIP_ASSERT("pbuf_header failed\n", 0); + TCP_STATS_INC(tcp.err); + goto memerr; + } + if (queue->p->len == 0) { + /* free the first (header-only) pbuf if it is now empty (contained only headers) */ + struct pbuf *old_q = queue->p; + queue->p = queue->p->next; + old_q->next = NULL; + queuelen--; + pbuf_free(old_q); + } + if (flags & TCP_FIN) { + /* the new segment contains only FIN, no data -> put the FIN into the last segment */ + LWIP_ASSERT("FIN enqueued together with data", queue->p == NULL && queue->len == 0); + TCPH_SET_FLAG(useg->tcphdr, TCP_FIN); + } else { + LWIP_ASSERT("zero-length pbuf", (queue->p != NULL) && (queue->p->len > 0)); + pbuf_cat(useg->p, queue->p); + useg->len += queue->len; + useg->next = queue->next; + } + + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("tcp_enqueue: chaining segments, new len %"U16_F"\n", useg->len)); + if (seg == queue) { + seg = useg; + seglen = useg->len; + } + memp_free(MEMP_TCP_SEG, queue); + } + else { + /* empty list */ + if (useg == NULL) { + /* initialize list with this segment */ + pcb->unsent = queue; + } + /* enqueue segment */ + else { + useg->next = queue; + } + } + if ((flags & TCP_SYN) || (flags & TCP_FIN)) { + ++len; + } + if (flags & TCP_FIN) { + pcb->flags |= TF_FIN; + } + pcb->snd_lbb += len; + + pcb->snd_buf -= len; + + /* update number of segments on the queues */ + pcb->snd_queuelen = queuelen; + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: %"S16_F" (after enqueued)\n", pcb->snd_queuelen)); + if (pcb->snd_queuelen != 0) { + LWIP_ASSERT("tcp_enqueue: valid queue length", + pcb->unacked != NULL || pcb->unsent != NULL); + } + + /* Set the PSH flag in the last segment that we enqueued, but only + if the segment has data (indicated by seglen > 0). */ + if (seg != NULL && seglen > 0 && seg->tcphdr != NULL && ((apiflags & TCP_WRITE_FLAG_MORE)==0)) { + TCPH_SET_FLAG(seg->tcphdr, TCP_PSH); + } + + return ERR_OK; +memerr: + pcb->flags |= TF_NAGLEMEMERR; + TCP_STATS_INC(tcp.memerr); + + if (queue != NULL) { + tcp_segs_free(queue); + } + if (pcb->snd_queuelen != 0) { + LWIP_ASSERT("tcp_enqueue: valid queue length", pcb->unacked != NULL || + pcb->unsent != NULL); + } + LWIP_DEBUGF(TCP_QLEN_DEBUG | LWIP_DBG_STATE, ("tcp_enqueue: %"S16_F" (with mem err)\n", pcb->snd_queuelen)); + return ERR_MEM; +} + + +#if LWIP_TCP_TIMESTAMPS +/* Build a timestamp option (12 bytes long) at the specified options pointer) + * + * @param pcb tcp_pcb + * @param opts option pointer where to store the timestamp option + */ +static void +tcp_build_timestamp_option(struct tcp_pcb *pcb, u32_t *opts) +{ + /* Pad with two NOP options to make everything nicely aligned */ + opts[0] = htonl(0x0101080A); + opts[1] = htonl(sys_now()); + opts[2] = htonl(pcb->ts_recent); +} +#endif + +/** Send an ACK without data. + * + * @param pcb Protocol control block for the TCP connection to send the ACK + */ +err_t +tcp_send_empty_ack(struct tcp_pcb *pcb) +{ + struct pbuf *p; + struct tcp_hdr *tcphdr; + u8_t optlen = 0; + +#if LWIP_TCP_TIMESTAMPS + if (pcb->flags & TF_TIMESTAMP) { + optlen = LWIP_TCP_OPT_LENGTH(TF_SEG_OPTS_TS); + } +#endif + p = pbuf_alloc(PBUF_IP, TCP_HLEN + optlen, PBUF_RAM); + if (p == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: (ACK) could not allocate pbuf\n")); + return ERR_BUF; + } + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, + ("tcp_output: sending ACK for %"U32_F"\n", pcb->rcv_nxt)); + /* remove ACK flags from the PCB, as we send an empty ACK now */ + pcb->flags &= ~(TF_ACK_DELAY | TF_ACK_NOW); + + tcphdr = tcp_output_set_header(pcb, p, optlen, htonl(pcb->snd_nxt)); + + /* NB. MSS option is only sent on SYNs, so ignore it here */ +#if LWIP_TCP_TIMESTAMPS + pcb->ts_lastacksent = pcb->rcv_nxt; + + if (pcb->flags & TF_TIMESTAMP) { + tcp_build_timestamp_option(pcb, (u32_t *)(tcphdr + 1)); + } +#endif + +#if CHECKSUM_GEN_TCP + tcphdr->chksum = inet_chksum_pseudo(p, &(pcb->local_ip), &(pcb->remote_ip), + IP_PROTO_TCP, p->tot_len); +#endif +#if LWIP_NETIF_HWADDRHINT + ip_output_hinted(p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, + IP_PROTO_TCP, &(pcb->addr_hint)); +#else /* LWIP_NETIF_HWADDRHINT*/ + ip_output(p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, + IP_PROTO_TCP); +#endif /* LWIP_NETIF_HWADDRHINT*/ + pbuf_free(p); + + return ERR_OK; +} + +/** + * Find out what we can send and send it + * + * @param pcb Protocol control block for the TCP connection to send data + * @return ERR_OK if data has been sent or nothing to send + * another err_t on error + */ +err_t +tcp_output(struct tcp_pcb *pcb) +{ + struct tcp_seg *seg, *useg; + u32_t wnd, snd_nxt; +#if TCP_CWND_DEBUG + s16_t i = 0; +#endif /* TCP_CWND_DEBUG */ + + /* First, check if we are invoked by the TCP input processing + code. If so, we do not output anything. Instead, we rely on the + input processing code to call us when input processing is done + with. */ + if (tcp_input_pcb == pcb) { + return ERR_OK; + } + + wnd = LWIP_MIN(pcb->snd_wnd, pcb->cwnd); + + seg = pcb->unsent; + + /* If the TF_ACK_NOW flag is set and no data will be sent (either + * because the ->unsent queue is empty or because the window does + * not allow it), construct an empty ACK segment and send it. + * + * If data is to be sent, we will just piggyback the ACK (see below). + */ + if (pcb->flags & TF_ACK_NOW && + (seg == NULL || + ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > wnd)) { + return tcp_send_empty_ack(pcb); + } + + /* useg should point to last segment on unacked queue */ + useg = pcb->unacked; + if (useg != NULL) { + for (; useg->next != NULL; useg = useg->next); + } + +#if TCP_OUTPUT_DEBUG + if (seg == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: nothing to send (%p)\n", + (void*)pcb->unsent)); + } +#endif /* TCP_OUTPUT_DEBUG */ +#if TCP_CWND_DEBUG + if (seg == NULL) { + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_output: snd_wnd %"U16_F + ", cwnd %"U16_F", wnd %"U32_F + ", seg == NULL, ack %"U32_F"\n", + pcb->snd_wnd, pcb->cwnd, wnd, pcb->lastack)); + } else { + LWIP_DEBUGF(TCP_CWND_DEBUG, + ("tcp_output: snd_wnd %"U16_F", cwnd %"U16_F", wnd %"U32_F + ", effwnd %"U32_F", seq %"U32_F", ack %"U32_F"\n", + pcb->snd_wnd, pcb->cwnd, wnd, + ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len, + ntohl(seg->tcphdr->seqno), pcb->lastack)); + } +#endif /* TCP_CWND_DEBUG */ + /* data available and window allows it to be sent? */ + while (seg != NULL && + ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) { + LWIP_ASSERT("RST not expected here!", + (TCPH_FLAGS(seg->tcphdr) & TCP_RST) == 0); + /* Stop sending if the nagle algorithm would prevent it + * Don't stop: + * - if tcp_enqueue had a memory error before (prevent delayed ACK timeout) or + * - if FIN was already enqueued for this PCB (SYN is always alone in a segment - + * either seg->next != NULL or pcb->unacked == NULL; + * RST is no sent using tcp_enqueue/tcp_output. + */ + if((tcp_do_output_nagle(pcb) == 0) && + ((pcb->flags & (TF_NAGLEMEMERR | TF_FIN)) == 0)){ + break; + } +#if TCP_CWND_DEBUG + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_output: snd_wnd %"U16_F", cwnd %"U16_F", wnd %"U32_F", effwnd %"U32_F", seq %"U32_F", ack %"U32_F", i %"S16_F"\n", + pcb->snd_wnd, pcb->cwnd, wnd, + ntohl(seg->tcphdr->seqno) + seg->len - + pcb->lastack, + ntohl(seg->tcphdr->seqno), pcb->lastack, i)); + ++i; +#endif /* TCP_CWND_DEBUG */ + + pcb->unsent = seg->next; + + if (pcb->state != SYN_SENT) { + TCPH_SET_FLAG(seg->tcphdr, TCP_ACK); + pcb->flags &= ~(TF_ACK_DELAY | TF_ACK_NOW); + } + + tcp_output_segment(seg, pcb); + snd_nxt = ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg); + if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) { + pcb->snd_nxt = snd_nxt; + } + /* put segment on unacknowledged list if length > 0 */ + if (TCP_TCPLEN(seg) > 0) { + seg->next = NULL; + /* unacked list is empty? */ + if (pcb->unacked == NULL) { + pcb->unacked = seg; + useg = seg; + /* unacked list is not empty? */ + } else { + /* In the case of fast retransmit, the packet should not go to the tail + * of the unacked queue, but rather somewhere before it. We need to check for + * this case. -STJ Jul 27, 2004 */ + if (TCP_SEQ_LT(ntohl(seg->tcphdr->seqno), ntohl(useg->tcphdr->seqno))){ + /* add segment to before tail of unacked list, keeping the list sorted */ + struct tcp_seg **cur_seg = &(pcb->unacked); + while (*cur_seg && + TCP_SEQ_LT(ntohl((*cur_seg)->tcphdr->seqno), ntohl(seg->tcphdr->seqno))) { + cur_seg = &((*cur_seg)->next ); + } + seg->next = (*cur_seg); + (*cur_seg) = seg; + } else { + /* add segment to tail of unacked list */ + useg->next = seg; + useg = useg->next; + } + } + /* do not queue empty segments on the unacked list */ + } else { + tcp_seg_free(seg); + } + seg = pcb->unsent; + } + + if (seg != NULL && pcb->persist_backoff == 0 && + ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > pcb->snd_wnd) { + /* prepare for persist timer */ + pcb->persist_cnt = 0; + pcb->persist_backoff = 1; + } + + pcb->flags &= ~TF_NAGLEMEMERR; + return ERR_OK; +} + +/** + * Called by tcp_output() to actually send a TCP segment over IP. + * + * @param seg the tcp_seg to send + * @param pcb the tcp_pcb for the TCP connection used to send the segment + */ +static void +tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb) +{ + u16_t len; + struct netif *netif; + u32_t *opts; + + /** @bug Exclude retransmitted segments from this count. */ + snmp_inc_tcpoutsegs(); + + /* The TCP header has already been constructed, but the ackno and + wnd fields remain. */ + seg->tcphdr->ackno = htonl(pcb->rcv_nxt); + + /* advertise our receive window size in this TCP segment */ + seg->tcphdr->wnd = htons(pcb->rcv_ann_wnd); + + pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd; + + /* Add any requested options. NB MSS option is only set on SYN + packets, so ignore it here */ + opts = (u32_t *)(seg->tcphdr + 1); + if (seg->flags & TF_SEG_OPTS_MSS) { + TCP_BUILD_MSS_OPTION(*opts); + opts += 1; + } +#if LWIP_TCP_TIMESTAMPS + pcb->ts_lastacksent = pcb->rcv_nxt; + + if (seg->flags & TF_SEG_OPTS_TS) { + tcp_build_timestamp_option(pcb, opts); + opts += 3; + } +#endif + +#ifdef _TEST_HD_ + /* ANGR: set rtime this _before_ checking ip_route(). Otherwise TCP_SYN will + * not be retransmitted in case the interface was down and tcp_connect() + * will not return any error. Since we still want the err_cb() (or maybe + * the wifi link comes up), make sure that we fulfill the retransmissions in + * tcp_slowtmr() + */ + + /* Set retransmission timer running if it is not currently enabled */ + if(pcb->rtime == -1) + pcb->rtime = 0; +#endif + + /* If we don't have a local IP address, we get one by + calling ip_route(). */ + if (ip_addr_isany(&(pcb->local_ip))) { + netif = ip_route(&(pcb->remote_ip)); + if (netif == NULL) { + return; + } + ip_addr_set(&(pcb->local_ip), &(netif->ip_addr)); + } + +#ifndef _TEST_HD_ + //Set retransmission timer running if it is not currently enabled + if(pcb->rtime == -1) + pcb->rtime = 0; +#endif + + if (pcb->rttest == 0) { + pcb->rttest = tcp_ticks; + pcb->rtseq = ntohl(seg->tcphdr->seqno); + + LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_output_segment: rtseq %"U32_F"\n", pcb->rtseq)); + } + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output_segment: %"U32_F":%"U32_F"\n", + htonl(seg->tcphdr->seqno), htonl(seg->tcphdr->seqno) + + seg->len)); + + len = (u16_t)((u8_t *)seg->tcphdr - (u8_t *)seg->p->payload); + + seg->p->len -= len; + seg->p->tot_len -= len; + + seg->p->payload = seg->tcphdr; + + seg->tcphdr->chksum = 0; +#if CHECKSUM_GEN_TCP + seg->tcphdr->chksum = inet_chksum_pseudo(seg->p, + &(pcb->local_ip), + &(pcb->remote_ip), + IP_PROTO_TCP, seg->p->tot_len); +#endif + TCP_STATS_INC(tcp.xmit); + +#if LWIP_NETIF_HWADDRHINT + ip_output_hinted(seg->p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, + IP_PROTO_TCP, &(pcb->addr_hint)); +#else /* LWIP_NETIF_HWADDRHINT*/ + ip_output(seg->p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, + IP_PROTO_TCP); +#endif /* LWIP_NETIF_HWADDRHINT*/ +} + +/** + * Send a TCP RESET packet (empty segment with RST flag set) either to + * abort a connection or to show that there is no matching local connection + * for a received segment. + * + * Called by tcp_abort() (to abort a local connection), tcp_input() (if no + * matching local pcb was found), tcp_listen_input() (if incoming segment + * has ACK flag set) and tcp_process() (received segment in the wrong state) + * + * Since a RST segment is in most cases not sent for an active connection, + * tcp_rst() has a number of arguments that are taken from a tcp_pcb for + * most other segment output functions. + * + * @param seqno the sequence number to use for the outgoing segment + * @param ackno the acknowledge number to use for the outgoing segment + * @param local_ip the local IP address to send the segment from + * @param remote_ip the remote IP address to send the segment to + * @param local_port the local TCP port to send the segment from + * @param remote_port the remote TCP port to send the segment to + */ +void +tcp_rst(u32_t seqno, u32_t ackno, + struct ip_addr *local_ip, struct ip_addr *remote_ip, + u16_t local_port, u16_t remote_port) +{ + struct pbuf *p; + struct tcp_hdr *tcphdr; + p = pbuf_alloc(PBUF_IP, TCP_HLEN, PBUF_RAM); + if (p == NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_rst: could not allocate memory for pbuf\n")); + return; + } + LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr", + (p->len >= sizeof(struct tcp_hdr))); + + tcphdr = p->payload; + tcphdr->src = htons(local_port); + tcphdr->dest = htons(remote_port); + tcphdr->seqno = htonl(seqno); + tcphdr->ackno = htonl(ackno); + TCPH_FLAGS_SET(tcphdr, TCP_RST | TCP_ACK); + tcphdr->wnd = htons(TCP_WND); + tcphdr->urgp = 0; + TCPH_HDRLEN_SET(tcphdr, 5); + + tcphdr->chksum = 0; +#if CHECKSUM_GEN_TCP + tcphdr->chksum = inet_chksum_pseudo(p, local_ip, remote_ip, + IP_PROTO_TCP, p->tot_len); +#endif + TCP_STATS_INC(tcp.xmit); + snmp_inc_tcpoutrsts(); + /* Send output with hardcoded TTL since we have no access to the pcb */ + ip_output(p, local_ip, remote_ip, TCP_TTL, 0, IP_PROTO_TCP); + pbuf_free(p); + LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_rst: seqno %"U32_F" ackno %"U32_F".\n", seqno, ackno)); +} + +/** + * Requeue all unacked segments for retransmission + * + * Called by tcp_slowtmr() for slow retransmission. + * + * @param pcb the tcp_pcb for which to re-enqueue all unacked segments + */ +void +tcp_rexmit_rto(struct tcp_pcb *pcb) +{ + struct tcp_seg *seg; + + if (pcb->unacked == NULL) { + return; + } + + /* Move all unacked segments to the head of the unsent queue */ + for (seg = pcb->unacked; seg->next != NULL; seg = seg->next); + /* concatenate unsent queue after unacked queue */ + seg->next = pcb->unsent; + /* unsent queue is the concatenated queue (of unacked, unsent) */ + pcb->unsent = pcb->unacked; + /* unacked queue is now empty */ + pcb->unacked = NULL; + + /* increment number of retransmissions */ + ++pcb->nrtx; + + /* Don't take any RTT measurements after retransmitting. */ + pcb->rttest = 0; + + /* Do the actual retransmission */ + tcp_output(pcb); +} + +/** + * Requeue the first unacked segment for retransmission + * + * Called by tcp_receive() for fast retramsmit. + * + * @param pcb the tcp_pcb for which to retransmit the first unacked segment + */ +void +tcp_rexmit(struct tcp_pcb *pcb) +{ + struct tcp_seg *seg; + struct tcp_seg **cur_seg; + + if (pcb->unacked == NULL) { + return; + } + + /* Move the first unacked segment to the unsent queue */ + /* Keep the unsent queue sorted. */ + seg = pcb->unacked; + pcb->unacked = seg->next; + + cur_seg = &(pcb->unsent); + while (*cur_seg && + TCP_SEQ_LT(ntohl((*cur_seg)->tcphdr->seqno), ntohl(seg->tcphdr->seqno))) { + cur_seg = &((*cur_seg)->next ); + } + seg->next = *cur_seg; + *cur_seg = seg; + + ++pcb->nrtx; + + /* Don't take any rtt measurements after retransmitting. */ + pcb->rttest = 0; + + /* Do the actual retransmission. */ + snmp_inc_tcpretranssegs(); + /* No need to call tcp_output: we are always called from tcp_input() + and thus tcp_output directly returns. */ +} + + +/** + * Handle retransmission after three dupacks received + * + * @param pcb the tcp_pcb for which to retransmit the first unacked segment + */ +void +tcp_rexmit_fast(struct tcp_pcb *pcb) +{ + if (pcb->unacked != NULL && !(pcb->flags & TF_INFR)) { + /* This is fast retransmit. Retransmit the first unacked segment. */ + LWIP_DEBUGF(TCP_FR_DEBUG, + ("tcp_receive: dupacks %"U16_F" (%"U32_F + "), fast retransmit %"U32_F"\n", + (u16_t)pcb->dupacks, pcb->lastack, + ntohl(pcb->unacked->tcphdr->seqno))); + tcp_rexmit(pcb); + + /* Set ssthresh to half of the minimum of the current + * cwnd and the advertised window */ + if (pcb->cwnd > pcb->snd_wnd) + pcb->ssthresh = pcb->snd_wnd / 2; + else + pcb->ssthresh = pcb->cwnd / 2; + + /* The minimum value for ssthresh should be 2 MSS */ + if (pcb->ssthresh < 2*pcb->mss) { + LWIP_DEBUGF(TCP_FR_DEBUG, + ("tcp_receive: The minimum value for ssthresh %"U16_F + " should be min 2 mss %"U16_F"...\n", + pcb->ssthresh, 2*pcb->mss)); + pcb->ssthresh = 2*pcb->mss; + } + + pcb->cwnd = pcb->ssthresh + 3 * pcb->mss; + pcb->flags |= TF_INFR; + } +} + + +/** + * Send keepalive packets to keep a connection active although + * no data is sent over it. + * + * Called by tcp_slowtmr() + * + * @param pcb the tcp_pcb for which to send a keepalive packet + */ +void +tcp_keepalive(struct tcp_pcb *pcb) +{ + struct pbuf *p; + struct tcp_hdr *tcphdr; + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: sending KEEPALIVE probe to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1(&pcb->remote_ip), ip4_addr2(&pcb->remote_ip), + ip4_addr3(&pcb->remote_ip), ip4_addr4(&pcb->remote_ip))); + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: tcp_ticks %"U32_F" pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n", + tcp_ticks, pcb->tmr, pcb->keep_cnt_sent)); + + p = pbuf_alloc(PBUF_IP, TCP_HLEN, PBUF_RAM); + + if(p == NULL) { + LWIP_DEBUGF(TCP_DEBUG, + ("tcp_keepalive: could not allocate memory for pbuf\n")); + return; + } + LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr", + (p->len >= sizeof(struct tcp_hdr))); + + tcphdr = tcp_output_set_header(pcb, p, 0, htonl(pcb->snd_nxt - 1)); + +#if CHECKSUM_GEN_TCP + tcphdr->chksum = inet_chksum_pseudo(p, &pcb->local_ip, &pcb->remote_ip, + IP_PROTO_TCP, p->tot_len); +#endif + TCP_STATS_INC(tcp.xmit); + + /* Send output to IP */ +#if LWIP_NETIF_HWADDRHINT + ip_output_hinted(p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, 0, IP_PROTO_TCP, + &(pcb->addr_hint)); +#else /* LWIP_NETIF_HWADDRHINT*/ + ip_output(p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, 0, IP_PROTO_TCP); +#endif /* LWIP_NETIF_HWADDRHINT*/ + + pbuf_free(p); + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: seqno %"U32_F" ackno %"U32_F".\n", + pcb->snd_nxt - 1, pcb->rcv_nxt)); +} + + +/** + * Send persist timer zero-window probes to keep a connection active + * when a window update is lost. + * + * Called by tcp_slowtmr() + * + * @param pcb the tcp_pcb for which to send a zero-window probe packet + */ +void +tcp_zero_window_probe(struct tcp_pcb *pcb) +{ + struct pbuf *p; + struct tcp_hdr *tcphdr; + struct tcp_seg *seg; + u16_t len; + u8_t is_fin; + + LWIP_DEBUGF(TCP_DEBUG, + ("tcp_zero_window_probe: sending ZERO WINDOW probe to %" + U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1(&pcb->remote_ip), ip4_addr2(&pcb->remote_ip), + ip4_addr3(&pcb->remote_ip), ip4_addr4(&pcb->remote_ip))); + + LWIP_DEBUGF(TCP_DEBUG, + ("tcp_zero_window_probe: tcp_ticks %"U32_F + " pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n", + tcp_ticks, pcb->tmr, pcb->keep_cnt_sent)); + + seg = pcb->unacked; + + if(seg == NULL) + seg = pcb->unsent; + + if(seg == NULL) + return; + + is_fin = ((TCPH_FLAGS(seg->tcphdr) & TCP_FIN) != 0) && (seg->len == 0); + len = is_fin ? TCP_HLEN : TCP_HLEN + 1; + + p = pbuf_alloc(PBUF_IP, len, PBUF_RAM); + if(p == NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: no memory for pbuf\n")); + return; + } + LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr", + (p->len >= sizeof(struct tcp_hdr))); + + tcphdr = tcp_output_set_header(pcb, p, 0, seg->tcphdr->seqno); + + if (is_fin) { + /* FIN segment, no data */ + TCPH_FLAGS_SET(tcphdr, TCP_ACK | TCP_FIN); + } else { + /* Data segment, copy in one byte from the head of the unacked queue */ + *((char *)p->payload + sizeof(struct tcp_hdr)) = *(char *)seg->dataptr; + } + +#if CHECKSUM_GEN_TCP + tcphdr->chksum = inet_chksum_pseudo(p, &pcb->local_ip, &pcb->remote_ip, + IP_PROTO_TCP, p->tot_len); +#endif + TCP_STATS_INC(tcp.xmit); + + /* Send output to IP */ +#if LWIP_NETIF_HWADDRHINT + ip_output_hinted(p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, 0, IP_PROTO_TCP, + &(pcb->addr_hint)); +#else /* LWIP_NETIF_HWADDRHINT*/ + ip_output(p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, 0, IP_PROTO_TCP); +#endif /* LWIP_NETIF_HWADDRHINT*/ + + pbuf_free(p); + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: seqno %"U32_F + " ackno %"U32_F".\n", + pcb->snd_nxt - 1, pcb->rcv_nxt)); +} +#endif /* LWIP_TCP */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/udp.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/udp.c new file mode 100644 index 0000000..697ca7c --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/udp.c @@ -0,0 +1,843 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * User Datagram Protocol module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + + +/* udp.c + * + * The code for the User Datagram Protocol UDP & UDPLite (RFC 3828). + * + */ + +/* @todo Check the use of '(struct udp_pcb).chksum_len_rx'! + */ + +#include "lwip/opt.h" + +#if LWIP_UDP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/udp.h" +#include "lwip/def.h" +#include "lwip/memp.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/icmp.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" +#include "arch/perf.h" +#include "lwip/dhcp.h" + +#include + +/* The list of UDP PCBs */ +/* exported in udp.h (was static) */ +struct udp_pcb *udp_pcbs; + +/** + * Process an incoming UDP datagram. + * + * Given an incoming UDP datagram (as a chain of pbufs) this function + * finds a corresponding UDP PCB and hands over the pbuf to the pcbs + * recv function. If no pcb is found or the datagram is incorrect, the + * pbuf is freed. + * + * @param p pbuf to be demultiplexed to a UDP PCB. + * @param inp network interface on which the datagram was received. + * + */ +void +udp_input(struct pbuf *p, struct netif *inp) +{ + struct udp_hdr *udphdr; + struct udp_pcb *pcb, *prev; + struct udp_pcb *uncon_pcb; + struct ip_hdr *iphdr; + u16_t src, dest; + u8_t local_match; + u8_t broadcast; + + PERF_START; + + UDP_STATS_INC(udp.recv); + + iphdr = p->payload; + + /* Check minimum length (IP header + UDP header) + * and move payload pointer to UDP header */ + if (p->tot_len < (IPH_HL(iphdr) * 4 + UDP_HLEN) || pbuf_header(p, -(s16_t)(IPH_HL(iphdr) * 4))) { + /* drop short packets */ + LWIP_DEBUGF(UDP_DEBUG, + ("udp_input: short UDP datagram (%"U16_F" bytes) discarded\n", p->tot_len)); + UDP_STATS_INC(udp.lenerr); + UDP_STATS_INC(udp.drop); + snmp_inc_udpinerrors(); + pbuf_free(p); + goto end; + } + + udphdr = (struct udp_hdr *)p->payload; + + /* is broadcast packet ? */ + broadcast = ip_addr_isbroadcast(&(iphdr->dest), inp); + + LWIP_DEBUGF(UDP_DEBUG, ("udp_input: received datagram of length %"U16_F"\n", p->tot_len)); + + /* convert src and dest ports to host byte order */ + src = ntohs(udphdr->src); + dest = ntohs(udphdr->dest); + + udp_debug_print(udphdr); + + /* print the UDP source and destination */ + LWIP_DEBUGF(UDP_DEBUG, + ("udp (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F") <-- " + "(%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F")\n", + ip4_addr1(&iphdr->dest), ip4_addr2(&iphdr->dest), + ip4_addr3(&iphdr->dest), ip4_addr4(&iphdr->dest), ntohs(udphdr->dest), + ip4_addr1(&iphdr->src), ip4_addr2(&iphdr->src), + ip4_addr3(&iphdr->src), ip4_addr4(&iphdr->src), ntohs(udphdr->src))); + +#if LWIP_DHCP + pcb = NULL; + /* when LWIP_DHCP is active, packets to DHCP_CLIENT_PORT may only be processed by + the dhcp module, no other UDP pcb may use the local UDP port DHCP_CLIENT_PORT */ + if (dest == DHCP_CLIENT_PORT) { + /* all packets for DHCP_CLIENT_PORT not coming from DHCP_SERVER_PORT are dropped! */ + if (src == DHCP_SERVER_PORT) { + if ((inp->dhcp != NULL) && (inp->dhcp->pcb != NULL)) { + /* accept the packe if + (- broadcast or directed to us) -> DHCP is link-layer-addressed, local ip is always ANY! + - inp->dhcp->pcb->remote == ANY or iphdr->src */ + if ((ip_addr_isany(&inp->dhcp->pcb->remote_ip) || + ip_addr_cmp(&(inp->dhcp->pcb->remote_ip), &(iphdr->src)))) { + pcb = inp->dhcp->pcb; + } + } + } + } else +#endif /* LWIP_DHCP */ + { + prev = NULL; + local_match = 0; + uncon_pcb = NULL; + /* Iterate through the UDP pcb list for a matching pcb. + * 'Perfect match' pcbs (connected to the remote port & ip address) are + * preferred. If no perfect match is found, the first unconnected pcb that + * matches the local port and ip address gets the datagram. */ + for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) { + local_match = 0; + /* print the PCB local and remote address */ + LWIP_DEBUGF(UDP_DEBUG, + ("pcb (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F") --- " + "(%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F")\n", + ip4_addr1(&pcb->local_ip), ip4_addr2(&pcb->local_ip), + ip4_addr3(&pcb->local_ip), ip4_addr4(&pcb->local_ip), pcb->local_port, + ip4_addr1(&pcb->remote_ip), ip4_addr2(&pcb->remote_ip), + ip4_addr3(&pcb->remote_ip), ip4_addr4(&pcb->remote_ip), pcb->remote_port)); + + /* compare PCB local addr+port to UDP destination addr+port */ + if ((pcb->local_port == dest) && + ((!broadcast && ip_addr_isany(&pcb->local_ip)) || + ip_addr_cmp(&(pcb->local_ip), &(iphdr->dest)) || +#if LWIP_IGMP + ip_addr_ismulticast(&(iphdr->dest)) || +#endif /* LWIP_IGMP */ +#if IP_SOF_BROADCAST_RECV + (broadcast && (pcb->so_options & SOF_BROADCAST)))) { +#else /* IP_SOF_BROADCAST_RECV */ + (broadcast))) { +#endif /* IP_SOF_BROADCAST_RECV */ + local_match = 1; + if ((uncon_pcb == NULL) && + ((pcb->flags & UDP_FLAGS_CONNECTED) == 0)) { + /* the first unconnected matching PCB */ + uncon_pcb = pcb; + } + } + /* compare PCB remote addr+port to UDP source addr+port */ + if ((local_match != 0) && + (pcb->remote_port == src) && + (ip_addr_isany(&pcb->remote_ip) || + ip_addr_cmp(&(pcb->remote_ip), &(iphdr->src)))) { + /* the first fully matching PCB */ + if (prev != NULL) { + /* move the pcb to the front of udp_pcbs so that is + found faster next time */ + prev->next = pcb->next; + pcb->next = udp_pcbs; + udp_pcbs = pcb; + } else { + UDP_STATS_INC(udp.cachehit); + } + break; + } + prev = pcb; + } + /* no fully matching pcb found? then look for an unconnected pcb */ + if (pcb == NULL) { + pcb = uncon_pcb; + } + } + + /* Check checksum if this is a match or if it was directed at us. */ + if (pcb != NULL || ip_addr_cmp(&inp->ip_addr, &iphdr->dest)) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_input: calculating checksum\n")); +#if LWIP_UDPLITE + if (IPH_PROTO(iphdr) == IP_PROTO_UDPLITE) { + /* Do the UDP Lite checksum */ +#if CHECKSUM_CHECK_UDP + u16_t chklen = ntohs(udphdr->len); + if (chklen < sizeof(struct udp_hdr)) { + if (chklen == 0) { + /* For UDP-Lite, checksum length of 0 means checksum + over the complete packet (See RFC 3828 chap. 3.1) */ + chklen = p->tot_len; + } else { + /* At least the UDP-Lite header must be covered by the + checksum! (Again, see RFC 3828 chap. 3.1) */ + UDP_STATS_INC(udp.chkerr); + UDP_STATS_INC(udp.drop); + snmp_inc_udpinerrors(); + pbuf_free(p); + goto end; + } + } + if (inet_chksum_pseudo_partial(p, (struct ip_addr *)&(iphdr->src), + (struct ip_addr *)&(iphdr->dest), + IP_PROTO_UDPLITE, p->tot_len, chklen) != 0) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("udp_input: UDP Lite datagram discarded due to failing checksum\n")); + UDP_STATS_INC(udp.chkerr); + UDP_STATS_INC(udp.drop); + snmp_inc_udpinerrors(); + pbuf_free(p); + goto end; + } +#endif /* CHECKSUM_CHECK_UDP */ + } else +#endif /* LWIP_UDPLITE */ + { +#if CHECKSUM_CHECK_UDP + if (udphdr->chksum != 0) { + if (inet_chksum_pseudo(p, (struct ip_addr *)&(iphdr->src), + (struct ip_addr *)&(iphdr->dest), + IP_PROTO_UDP, p->tot_len) != 0) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("udp_input: UDP datagram discarded due to failing checksum\n")); + UDP_STATS_INC(udp.chkerr); + UDP_STATS_INC(udp.drop); + snmp_inc_udpinerrors(); + pbuf_free(p); + goto end; + } + } +#endif /* CHECKSUM_CHECK_UDP */ + } + if(pbuf_header(p, -UDP_HLEN)) { + /* Can we cope with this failing? Just assert for now */ + LWIP_ASSERT("pbuf_header failed\n", 0); + UDP_STATS_INC(udp.drop); + snmp_inc_udpinerrors(); + pbuf_free(p); + goto end; + } + if (pcb != NULL) { + snmp_inc_udpindatagrams(); + /* callback */ + if (pcb->recv != NULL) { + /* now the recv function is responsible for freeing p */ + pcb->recv(pcb->recv_arg, pcb, p, &iphdr->src, src); + } else { + /* no recv function registered? then we have to free the pbuf! */ + pbuf_free(p); + goto end; + } + } else { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_input: not for us.\n")); + +#if LWIP_ICMP + /* No match was found, send ICMP destination port unreachable unless + destination address was broadcast/multicast. */ + if (!broadcast && + !ip_addr_ismulticast(&iphdr->dest)) { + /* move payload pointer back to ip header */ + pbuf_header(p, (IPH_HL(iphdr) * 4) + UDP_HLEN); + LWIP_ASSERT("p->payload == iphdr", (p->payload == iphdr)); + icmp_dest_unreach(p, ICMP_DUR_PORT); + } +#endif /* LWIP_ICMP */ + UDP_STATS_INC(udp.proterr); + UDP_STATS_INC(udp.drop); + snmp_inc_udpnoports(); + pbuf_free(p); + } + } else { + pbuf_free(p); + } +end: + PERF_STOP("udp_input"); +} + +/** + * Send data using UDP. + * + * @param pcb UDP PCB used to send the data. + * @param p chain of pbuf's to be sent. + * + * The datagram will be sent to the current remote_ip & remote_port + * stored in pcb. If the pcb is not bound to a port, it will + * automatically be bound to a random port. + * + * @return lwIP error code. + * - ERR_OK. Successful. No error occured. + * - ERR_MEM. Out of memory. + * - ERR_RTE. Could not find route to destination address. + * - More errors could be returned by lower protocol layers. + * + * @see udp_disconnect() udp_sendto() + */ +err_t +udp_send(struct udp_pcb *pcb, struct pbuf *p) +{ + /* send to the packet using remote ip and port stored in the pcb */ + return udp_sendto(pcb, p, &pcb->remote_ip, pcb->remote_port); +} + +/** + * Send data to a specified address using UDP. + * + * @param pcb UDP PCB used to send the data. + * @param p chain of pbuf's to be sent. + * @param dst_ip Destination IP address. + * @param dst_port Destination UDP port. + * + * dst_ip & dst_port are expected to be in the same byte order as in the pcb. + * + * If the PCB already has a remote address association, it will + * be restored after the data is sent. + * + * @return lwIP error code (@see udp_send for possible error codes) + * + * @see udp_disconnect() udp_send() + */ +err_t +udp_sendto(struct udp_pcb *pcb, struct pbuf *p, + struct ip_addr *dst_ip, u16_t dst_port) +{ + struct netif *netif; + + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send\n")); + + /* find the outgoing network interface for this packet */ +#if LWIP_IGMP + netif = ip_route((ip_addr_ismulticast(dst_ip))?(&(pcb->multicast_ip)):(dst_ip)); +#else + netif = ip_route(dst_ip); +#endif /* LWIP_IGMP */ + + /* no outgoing network interface could be found? */ + if (netif == NULL) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: No route to 0x%"X32_F"\n", dst_ip->addr)); + UDP_STATS_INC(udp.rterr); + return ERR_RTE; + } + return udp_sendto_if(pcb, p, dst_ip, dst_port, netif); +} + +/** + * Send data to a specified address using UDP. + * The netif used for sending can be specified. + * + * This function exists mainly for DHCP, to be able to send UDP packets + * on a netif that is still down. + * + * @param pcb UDP PCB used to send the data. + * @param p chain of pbuf's to be sent. + * @param dst_ip Destination IP address. + * @param dst_port Destination UDP port. + * @param netif the netif used for sending. + * + * dst_ip & dst_port are expected to be in the same byte order as in the pcb. + * + * @return lwIP error code (@see udp_send for possible error codes) + * + * @see udp_disconnect() udp_send() + */ +err_t +udp_sendto_if(struct udp_pcb *pcb, struct pbuf *p, + struct ip_addr *dst_ip, u16_t dst_port, struct netif *netif) +{ + struct udp_hdr *udphdr; + struct ip_addr *src_ip; + err_t err; + struct pbuf *q; /* q will be sent down the stack */ + +#if IP_SOF_BROADCAST + /* broadcast filter? */ + if ( ((pcb->so_options & SOF_BROADCAST) == 0) && ip_addr_isbroadcast(dst_ip, netif) ) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("udp_sendto_if: SOF_BROADCAST not enabled on pcb %p\n", (void *)pcb)); + return ERR_VAL; + } +#endif /* IP_SOF_BROADCAST */ + + /* if the PCB is not yet bound to a port, bind it here */ + if (pcb->local_port == 0) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send: not yet bound to a port, binding now\n")); + err = udp_bind(pcb, &pcb->local_ip, pcb->local_port); + if (err != ERR_OK) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: forced port bind failed\n")); + return err; + } + } + + /* not enough space to add an UDP header to first pbuf in given p chain? */ + if (pbuf_header(p, UDP_HLEN)) { + /* allocate header in a separate new pbuf */ + q = pbuf_alloc(PBUF_IP, UDP_HLEN, PBUF_RAM); + /* new header pbuf could not be allocated? */ + if (q == NULL) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: could not allocate header\n")); + return ERR_MEM; + } + /* chain header q in front of given pbuf p */ + pbuf_chain(q, p); + /* first pbuf q points to header pbuf */ + LWIP_DEBUGF(UDP_DEBUG, + ("udp_send: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p)); + } else { + /* adding space for header within p succeeded */ + /* first pbuf q equals given pbuf */ + q = p; + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: added header in given pbuf %p\n", (void *)p)); + } + LWIP_ASSERT("check that first pbuf can hold struct udp_hdr", + (q->len >= sizeof(struct udp_hdr))); + /* q now represents the packet to be sent */ + udphdr = q->payload; + udphdr->src = htons(pcb->local_port); + udphdr->dest = htons(dst_port); + /* in UDP, 0 checksum means 'no checksum' */ + udphdr->chksum = 0x0000; + + /* PCB local address is IP_ANY_ADDR? */ + if (ip_addr_isany(&pcb->local_ip)) { + /* use outgoing network interface IP address as source address */ + src_ip = &(netif->ip_addr); + } else { + /* check if UDP PCB local IP address is correct + * this could be an old address if netif->ip_addr has changed */ + if (!ip_addr_cmp(&(pcb->local_ip), &(netif->ip_addr))) { + /* local_ip doesn't match, drop the packet */ + if (q != p) { + /* free the header pbuf */ + pbuf_free(q); + q = NULL; + /* p is still referenced by the caller, and will live on */ + } + return ERR_VAL; + } + /* use UDP PCB local IP address as source address */ + src_ip = &(pcb->local_ip); + } + + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: sending datagram of length %"U16_F"\n", q->tot_len)); + +#if LWIP_UDPLITE + /* UDP Lite protocol? */ + if (pcb->flags & UDP_FLAGS_UDPLITE) { + u16_t chklen, chklen_hdr; + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP LITE packet length %"U16_F"\n", q->tot_len)); + /* set UDP message length in UDP header */ + chklen_hdr = chklen = pcb->chksum_len_tx; + if ((chklen < sizeof(struct udp_hdr)) || (chklen > q->tot_len)) { + if (chklen != 0) { + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP LITE pcb->chksum_len is illegal: %"U16_F"\n", chklen)); + } + /* For UDP-Lite, checksum length of 0 means checksum + over the complete packet. (See RFC 3828 chap. 3.1) + At least the UDP-Lite header must be covered by the + checksum, therefore, if chksum_len has an illegal + value, we generate the checksum over the complete + packet to be safe. */ + chklen_hdr = 0; + chklen = q->tot_len; + } + udphdr->len = htons(chklen_hdr); + /* calculate checksum */ +#if CHECKSUM_GEN_UDP + udphdr->chksum = inet_chksum_pseudo_partial(q, src_ip, dst_ip, + IP_PROTO_UDPLITE, q->tot_len, chklen); + /* chksum zero must become 0xffff, as zero means 'no checksum' */ + if (udphdr->chksum == 0x0000) + udphdr->chksum = 0xffff; +#endif /* CHECKSUM_CHECK_UDP */ + /* output to IP */ + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,IP_PROTO_UDPLITE,)\n")); +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = &(pcb->addr_hint); +#endif /* LWIP_NETIF_HWADDRHINT*/ + err = ip_output_if(q, src_ip, dst_ip, pcb->ttl, pcb->tos, IP_PROTO_UDPLITE, netif); +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = NULL; +#endif /* LWIP_NETIF_HWADDRHINT*/ + } else +#endif /* LWIP_UDPLITE */ + { /* UDP */ + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP packet length %"U16_F"\n", q->tot_len)); + udphdr->len = htons(q->tot_len); + /* calculate checksum */ +#if CHECKSUM_GEN_UDP + if ((pcb->flags & UDP_FLAGS_NOCHKSUM) == 0) { + udphdr->chksum = inet_chksum_pseudo(q, src_ip, dst_ip, IP_PROTO_UDP, q->tot_len); + /* chksum zero must become 0xffff, as zero means 'no checksum' */ + if (udphdr->chksum == 0x0000) udphdr->chksum = 0xffff; + } +#endif /* CHECKSUM_CHECK_UDP */ + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP checksum 0x%04"X16_F"\n", udphdr->chksum)); + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,IP_PROTO_UDP,)\n")); + /* output to IP */ +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = &(pcb->addr_hint); +#endif /* LWIP_NETIF_HWADDRHINT*/ + err = ip_output_if(q, src_ip, dst_ip, pcb->ttl, pcb->tos, IP_PROTO_UDP, netif); +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = NULL; +#endif /* LWIP_NETIF_HWADDRHINT*/ + } + /* TODO: must this be increased even if error occured? */ + snmp_inc_udpoutdatagrams(); + + /* did we chain a separate header pbuf earlier? */ + if (q != p) { + /* free the header pbuf */ + pbuf_free(q); + q = NULL; + /* p is still referenced by the caller, and will live on */ + } + + UDP_STATS_INC(udp.xmit); + return err; +} + +/** + * Bind an UDP PCB. + * + * @param pcb UDP PCB to be bound with a local address ipaddr and port. + * @param ipaddr local IP address to bind with. Use IP_ADDR_ANY to + * bind to all local interfaces. + * @param port local UDP port to bind with. Use 0 to automatically bind + * to a random port between UDP_LOCAL_PORT_RANGE_START and + * UDP_LOCAL_PORT_RANGE_END. + * + * ipaddr & port are expected to be in the same byte order as in the pcb. + * + * @return lwIP error code. + * - ERR_OK. Successful. No error occured. + * - ERR_USE. The specified ipaddr and port are already bound to by + * another UDP PCB. + * + * @see udp_disconnect() + */ +err_t +udp_bind(struct udp_pcb *pcb, struct ip_addr *ipaddr, u16_t port) +{ + struct udp_pcb *ipcb; + u8_t rebind; + + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_bind(ipaddr = ")); + ip_addr_debug_print(UDP_DEBUG, ipaddr); + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, (", port = %"U16_F")\n", port)); + + rebind = 0; + /* Check for double bind and rebind of the same pcb */ + for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) { + /* is this UDP PCB already on active list? */ + if (pcb == ipcb) { + /* pcb may occur at most once in active list */ + LWIP_ASSERT("rebind == 0", rebind == 0); + /* pcb already in list, just rebind */ + rebind = 1; + } + + /* this code does not allow upper layer to share a UDP port for + listening to broadcast or multicast traffic (See SO_REUSE_ADDR and + SO_REUSE_PORT under *BSD). TODO: See where it fits instead, OR + combine with implementation of UDP PCB flags. Leon Woestenberg. */ +#ifdef LWIP_UDP_TODO + /* port matches that of PCB in list? */ + else + if ((ipcb->local_port == port) && + /* IP address matches, or one is IP_ADDR_ANY? */ + (ip_addr_isany(&(ipcb->local_ip)) || + ip_addr_isany(ipaddr) || + ip_addr_cmp(&(ipcb->local_ip), ipaddr))) { + /* other PCB already binds to this local IP and port */ + LWIP_DEBUGF(UDP_DEBUG, + ("udp_bind: local port %"U16_F" already bound by another pcb\n", port)); + return ERR_USE; + } +#endif + } + + ip_addr_set(&pcb->local_ip, ipaddr); + + /* no port specified? */ + if (port == 0) { +#ifndef UDP_LOCAL_PORT_RANGE_START +#define UDP_LOCAL_PORT_RANGE_START 4096 +#define UDP_LOCAL_PORT_RANGE_END 0x7fff +#endif + port = UDP_LOCAL_PORT_RANGE_START; + ipcb = udp_pcbs; + while ((ipcb != NULL) && (port != UDP_LOCAL_PORT_RANGE_END)) { + if (ipcb->local_port == port) { + /* port is already used by another udp_pcb */ + port++; + /* restart scanning all udp pcbs */ + ipcb = udp_pcbs; + } else + /* go on with next udp pcb */ + ipcb = ipcb->next; + } + if (ipcb != NULL) { + /* no more ports available in local range */ + LWIP_DEBUGF(UDP_DEBUG, ("udp_bind: out of free UDP ports\n")); + return ERR_USE; + } + } + pcb->local_port = port; + snmp_insert_udpidx_tree(pcb); + /* pcb not active yet? */ + if (rebind == 0) { + /* place the PCB on the active list if not already there */ + pcb->next = udp_pcbs; + udp_pcbs = pcb; + } + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("udp_bind: bound to %"U16_F".%"U16_F".%"U16_F".%"U16_F", port %"U16_F"\n", + (u16_t)((ntohl(pcb->local_ip.addr) >> 24) & 0xff), + (u16_t)((ntohl(pcb->local_ip.addr) >> 16) & 0xff), + (u16_t)((ntohl(pcb->local_ip.addr) >> 8) & 0xff), + (u16_t)(ntohl(pcb->local_ip.addr) & 0xff), pcb->local_port)); + return ERR_OK; +} +/** + * Connect an UDP PCB. + * + * This will associate the UDP PCB with the remote address. + * + * @param pcb UDP PCB to be connected with remote address ipaddr and port. + * @param ipaddr remote IP address to connect with. + * @param port remote UDP port to connect with. + * + * @return lwIP error code + * + * ipaddr & port are expected to be in the same byte order as in the pcb. + * + * The udp pcb is bound to a random local port if not already bound. + * + * @see udp_disconnect() + */ +err_t +udp_connect(struct udp_pcb *pcb, struct ip_addr *ipaddr, u16_t port) +{ + struct udp_pcb *ipcb; + + if (pcb->local_port == 0) { + err_t err = udp_bind(pcb, &pcb->local_ip, pcb->local_port); + if (err != ERR_OK) + return err; + } + + ip_addr_set(&pcb->remote_ip, ipaddr); + pcb->remote_port = port; + pcb->flags |= UDP_FLAGS_CONNECTED; +/** TODO: this functionality belongs in upper layers */ +#ifdef LWIP_UDP_TODO + /* Nail down local IP for netconn_addr()/getsockname() */ + if (ip_addr_isany(&pcb->local_ip) && !ip_addr_isany(&pcb->remote_ip)) { + struct netif *netif; + + if ((netif = ip_route(&(pcb->remote_ip))) == NULL) { + LWIP_DEBUGF(UDP_DEBUG, ("udp_connect: No route to 0x%lx\n", pcb->remote_ip.addr)); + UDP_STATS_INC(udp.rterr); + return ERR_RTE; + } + /** TODO: this will bind the udp pcb locally, to the interface which + is used to route output packets to the remote address. However, we + might want to accept incoming packets on any interface! */ + pcb->local_ip = netif->ip_addr; + } else if (ip_addr_isany(&pcb->remote_ip)) { + pcb->local_ip.addr = 0; + } +#endif + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("udp_connect: connected to %"U16_F".%"U16_F".%"U16_F".%"U16_F",port %"U16_F"\n", + (u16_t)((ntohl(pcb->remote_ip.addr) >> 24) & 0xff), + (u16_t)((ntohl(pcb->remote_ip.addr) >> 16) & 0xff), + (u16_t)((ntohl(pcb->remote_ip.addr) >> 8) & 0xff), + (u16_t)(ntohl(pcb->remote_ip.addr) & 0xff), pcb->remote_port)); + + /* Insert UDP PCB into the list of active UDP PCBs. */ + for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) { + if (pcb == ipcb) { + /* already on the list, just return */ + return ERR_OK; + } + } + /* PCB not yet on the list, add PCB now */ + pcb->next = udp_pcbs; + udp_pcbs = pcb; + return ERR_OK; +} + +/** + * Disconnect a UDP PCB + * + * @param pcb the udp pcb to disconnect. + */ +void +udp_disconnect(struct udp_pcb *pcb) +{ + /* reset remote address association */ + ip_addr_set(&pcb->remote_ip, IP_ADDR_ANY); + pcb->remote_port = 0; + /* mark PCB as unconnected */ + pcb->flags &= ~UDP_FLAGS_CONNECTED; +} + +/** + * Set a receive callback for a UDP PCB + * + * This callback will be called when receiving a datagram for the pcb. + * + * @param pcb the pcb for wich to set the recv callback + * @param recv function pointer of the callback function + * @param recv_arg additional argument to pass to the callback function + */ +void +udp_recv(struct udp_pcb *pcb, + void (* recv)(void *arg, struct udp_pcb *upcb, struct pbuf *p, + struct ip_addr *addr, u16_t port), + void *recv_arg) +{ + /* remember recv() callback and user data */ + pcb->recv = recv; + pcb->recv_arg = recv_arg; +} + +/** + * Remove an UDP PCB. + * + * @param pcb UDP PCB to be removed. The PCB is removed from the list of + * UDP PCB's and the data structure is freed from memory. + * + * @see udp_new() + */ +void +udp_remove(struct udp_pcb *pcb) +{ + struct udp_pcb *pcb2; + + snmp_delete_udpidx_tree(pcb); + /* pcb to be removed is first in list? */ + if (udp_pcbs == pcb) { + /* make list start at 2nd pcb */ + udp_pcbs = udp_pcbs->next; + /* pcb not 1st in list */ + } else + for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) { + /* find pcb in udp_pcbs list */ + if (pcb2->next != NULL && pcb2->next == pcb) { + /* remove pcb from list */ + pcb2->next = pcb->next; + } + } + memp_free(MEMP_UDP_PCB, pcb); +} + +/** + * Create a UDP PCB. + * + * @return The UDP PCB which was created. NULL if the PCB data structure + * could not be allocated. + * + * @see udp_remove() + */ +struct udp_pcb * +udp_new(void) +{ + struct udp_pcb *pcb; + pcb = memp_malloc(MEMP_UDP_PCB); + /* could allocate UDP PCB? */ + if (pcb != NULL) { + /* UDP Lite: by initializing to all zeroes, chksum_len is set to 0 + * which means checksum is generated over the whole datagram per default + * (recommended as default by RFC 3828). */ + /* initialize PCB to all zeroes */ + memset(pcb, 0, sizeof(struct udp_pcb)); + pcb->ttl = UDP_TTL; + } + return pcb; +} + +#if UDP_DEBUG +/** + * Print UDP header information for debug purposes. + * + * @param udphdr pointer to the udp header in memory. + */ +void +udp_debug_print(struct udp_hdr *udphdr) +{ + LWIP_DEBUGF(UDP_DEBUG, ("UDP header:\n")); + LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(UDP_DEBUG, ("| %5"U16_F" | %5"U16_F" | (src port, dest port)\n", + ntohs(udphdr->src), ntohs(udphdr->dest))); + LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(UDP_DEBUG, ("| %5"U16_F" | 0x%04"X16_F" | (len, chksum)\n", + ntohs(udphdr->len), ntohs(udphdr->chksum))); + LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n")); +} +#endif /* UDP_DEBUG */ + +#endif /* LWIP_UDP */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/autoip.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/autoip.h new file mode 100644 index 0000000..d5464b7 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/autoip.h @@ -0,0 +1,118 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * + * AutoIP Automatic LinkLocal IP Configuration + */ + +/* + * + * Copyright (c) 2007 Dominik Spies + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Dominik Spies + * + * This is a AutoIP implementation for the lwIP TCP/IP stack. It aims to conform + * with RFC 3927. + * + * + * Please coordinate changes and requests with Dominik Spies + * + */ + +#ifndef __LWIP_AUTOIP_H__ +#define __LWIP_AUTOIP_H__ + +#include "lwip/opt.h" + +#if LWIP_AUTOIP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/netif.h" +#include "lwip/udp.h" +#include "netif/etharp.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* AutoIP Timing */ +#define AUTOIP_TMR_INTERVAL 100 +#define AUTOIP_TICKS_PER_SECOND (1000 / AUTOIP_TMR_INTERVAL) + +/* RFC 3927 Constants */ +#define PROBE_WAIT 1 /* second (initial random delay) */ +#define PROBE_MIN 1 /* second (minimum delay till repeated probe) */ +#define PROBE_MAX 2 /* seconds (maximum delay till repeated probe) */ +#define PROBE_NUM 3 /* (number of probe packets) */ +#define ANNOUNCE_NUM 2 /* (number of announcement packets) */ +#define ANNOUNCE_INTERVAL 2 /* seconds (time between announcement packets) */ +#define ANNOUNCE_WAIT 2 /* seconds (delay before announcing) */ +#define MAX_CONFLICTS 10 /* (max conflicts before rate limiting) */ +#define RATE_LIMIT_INTERVAL 60 /* seconds (delay between successive attempts) */ +#define DEFEND_INTERVAL 10 /* seconds (min. wait between defensive ARPs) */ + +/* AutoIP client states */ +#define AUTOIP_STATE_OFF 0 +#define AUTOIP_STATE_PROBING 1 +#define AUTOIP_STATE_ANNOUNCING 2 +#define AUTOIP_STATE_BOUND 3 + +struct autoip +{ + struct ip_addr llipaddr; /* the currently selected, probed, announced or used LL IP-Address */ + u8_t state; /* current AutoIP state machine state */ + u8_t sent_num; /* sent number of probes or announces, dependent on state */ + u16_t ttw; /* ticks to wait, tick is AUTOIP_TMR_INTERVAL long */ + u8_t lastconflict; /* ticks until a conflict can be solved by defending */ + u8_t tried_llipaddr; /* total number of probed/used Link Local IP-Addresses */ +}; + + +/** Init srand, has to be called before entering mainloop */ +void autoip_init(void); + +/** Start AutoIP client */ +err_t autoip_start(struct netif *netif); + +/** Stop AutoIP client */ +err_t autoip_stop(struct netif *netif); + +/** Handles every incoming ARP Packet, called by etharp_arp_input */ +void autoip_arp_reply(struct netif *netif, struct etharp_hdr *hdr); + +/** Has to be called in loop every AUTOIP_TMR_INTERVAL milliseconds */ +void autoip_tmr(void); + +/** Handle a possible change in the network configuration */ +void autoip_network_changed(struct netif *netif); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_AUTOIP */ + +#endif /* __LWIP_AUTOIP_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/icmp.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/icmp.h new file mode 100644 index 0000000..3f917ba --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/icmp.h @@ -0,0 +1,113 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_ICMP_H__ +#define __LWIP_ICMP_H__ + +#include "lwip/opt.h" +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define ICMP_ER 0 /* echo reply */ +#define ICMP_DUR 3 /* destination unreachable */ +#define ICMP_SQ 4 /* source quench */ +#define ICMP_RD 5 /* redirect */ +#define ICMP_ECHO 8 /* echo */ +#define ICMP_TE 11 /* time exceeded */ +#define ICMP_PP 12 /* parameter problem */ +#define ICMP_TS 13 /* timestamp */ +#define ICMP_TSR 14 /* timestamp reply */ +#define ICMP_IRQ 15 /* information request */ +#define ICMP_IR 16 /* information reply */ + +enum icmp_dur_type { + ICMP_DUR_NET = 0, /* net unreachable */ + ICMP_DUR_HOST = 1, /* host unreachable */ + ICMP_DUR_PROTO = 2, /* protocol unreachable */ + ICMP_DUR_PORT = 3, /* port unreachable */ + ICMP_DUR_FRAG = 4, /* fragmentation needed and DF set */ + ICMP_DUR_SR = 5 /* source route failed */ +}; + +enum icmp_te_type { + ICMP_TE_TTL = 0, /* time to live exceeded in transit */ + ICMP_TE_FRAG = 1 /* fragment reassembly time exceeded */ +}; + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +/** This is the standard ICMP header only that the u32_t data + * is splitted to two u16_t like ICMP echo needs it. + * This header is also used for other ICMP types that do not + * use the data part. + */ +PACK_STRUCT_BEGIN +struct icmp_echo_hdr { + PACK_STRUCT_FIELD(u8_t type); + PACK_STRUCT_FIELD(u8_t code); + PACK_STRUCT_FIELD(u16_t chksum); + PACK_STRUCT_FIELD(u16_t id); + PACK_STRUCT_FIELD(u16_t seqno); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define ICMPH_TYPE(hdr) ((hdr)->type) +#define ICMPH_CODE(hdr) ((hdr)->code) + +/** Combines type and code to an u16_t */ +#define ICMPH_TYPE_SET(hdr, t) ((hdr)->type = (t)) +#define ICMPH_CODE_SET(hdr, c) ((hdr)->code = (c)) + + +#if LWIP_ICMP /* don't build if not configured for use in lwipopts.h */ + +void icmp_input(struct pbuf *p, struct netif *inp); +void icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t); +void icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t); + +#endif /* LWIP_ICMP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_ICMP_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/igmp.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/igmp.h new file mode 100644 index 0000000..da67e75 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/igmp.h @@ -0,0 +1,164 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2002 CITEL Technologies Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of CITEL Technologies Ltd nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY CITEL TECHNOLOGIES AND CONTRIBUTORS ``AS IS'' + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL CITEL TECHNOLOGIES OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is a contribution to the lwIP TCP/IP stack. + * The Swedish Institute of Computer Science and Adam Dunkels + * are specifically granted permission to redistribute this + * source code. +*/ + +#ifndef __LWIP_IGMP_H__ +#define __LWIP_IGMP_H__ + +#include "lwip/opt.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/pbuf.h" + +#if LWIP_IGMP /* don't build if not configured for use in lwipopts.h */ + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * IGMP constants + */ +#define IP_PROTO_IGMP 2 +#define IGMP_TTL 1 +#define IGMP_MINLEN 8 +#define ROUTER_ALERT 0x9404 +#define ROUTER_ALERTLEN 4 + +/* + * IGMP message types, including version number. + */ +#define IGMP_MEMB_QUERY 0x11 /* Membership query */ +#define IGMP_V1_MEMB_REPORT 0x12 /* Ver. 1 membership report */ +#define IGMP_V2_MEMB_REPORT 0x16 /* Ver. 2 membership report */ +#define IGMP_LEAVE_GROUP 0x17 /* Leave-group message */ + +/* IGMP timer */ +#define IGMP_TMR_INTERVAL 100 /* Milliseconds */ +#define IGMP_V1_DELAYING_MEMBER_TMR (1000/IGMP_TMR_INTERVAL) +#define IGMP_JOIN_DELAYING_MEMBER_TMR (500 /IGMP_TMR_INTERVAL) + +/* MAC Filter Actions */ +#define IGMP_DEL_MAC_FILTER 0 +#define IGMP_ADD_MAC_FILTER 1 + +/* Group membership states */ +#define IGMP_GROUP_NON_MEMBER 0 +#define IGMP_GROUP_DELAYING_MEMBER 1 +#define IGMP_GROUP_IDLE_MEMBER 2 + +/* + * IGMP packet format. + */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct igmp_msg { + PACK_STRUCT_FIELD(u8_t igmp_msgtype); + PACK_STRUCT_FIELD(u8_t igmp_maxresp); + PACK_STRUCT_FIELD(u16_t igmp_checksum); + PACK_STRUCT_FIELD(struct ip_addr igmp_group_address); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +/* + * now a group structure - there is + * a list of groups for each interface + * these should really be linked from the interface, but + * if we keep them separate we will not affect the lwip original code + * too much + * + * There will be a group for the all systems group address but this + * will not run the state machine as it is used to kick off reports + * from all the other groups + */ + +struct igmp_group { + struct igmp_group *next; + struct netif *interface; + struct ip_addr group_address; + u8_t last_reporter_flag; /* signifies we were the last person to report */ + u8_t group_state; + u16_t timer; + u8_t use; /* counter of simultaneous uses */ +}; + + +/* Prototypes */ +void igmp_init(void); + +err_t igmp_start( struct netif *netif); + +err_t igmp_stop( struct netif *netif); + +void igmp_report_groups( struct netif *netif); + +struct igmp_group *igmp_lookfor_group( struct netif *ifp, struct ip_addr *addr); + +struct igmp_group *igmp_lookup_group( struct netif *ifp, struct ip_addr *addr); + +err_t igmp_remove_group( struct igmp_group *group); + +void igmp_input( struct pbuf *p, struct netif *inp, struct ip_addr *dest); + +err_t igmp_joingroup( struct ip_addr *ifaddr, struct ip_addr *groupaddr); + +err_t igmp_leavegroup( struct ip_addr *ifaddr, struct ip_addr *groupaddr); + +void igmp_tmr(void); + +void igmp_timeout( struct igmp_group *group); + +void igmp_start_timer( struct igmp_group *group, u8_t max_time); + +void igmp_stop_timer( struct igmp_group *group); + +void igmp_delaying_member( struct igmp_group *group, u8_t maxresp); + +err_t igmp_ip_output_if( struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, u8_t ttl, u8_t proto, struct netif *netif); + +void igmp_send( struct igmp_group *group, u8_t type); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_IGMP */ + +#endif /* __LWIP_IGMP_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/inet.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/inet.h new file mode 100644 index 0000000..903afdf --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/inet.h @@ -0,0 +1,105 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_INET_H__ +#define __LWIP_INET_H__ + +#include "lwip/opt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* For compatibility with BSD code */ +struct in_addr { + u32_t s_addr; +}; + +#define INADDR_NONE ((u32_t)0xffffffffUL) /* 255.255.255.255 */ +#define INADDR_LOOPBACK ((u32_t)0x7f000001UL) /* 127.0.0.1 */ +#define INADDR_ANY ((u32_t)0x00000000UL) /* 0.0.0.0 */ +#define INADDR_BROADCAST ((u32_t)0xffffffffUL) /* 255.255.255.255 */ + +u32_t inet_addr(const char *cp); +int inet_aton(const char *cp, struct in_addr *addr); +char *inet_ntoa(struct in_addr addr); /* returns ptr to static buffer; not reentrant! */ + +#ifdef htons +#undef htons +#endif /* htons */ +#ifdef htonl +#undef htonl +#endif /* htonl */ +#ifdef ntohs +#undef ntohs +#endif /* ntohs */ +#ifdef ntohl +#undef ntohl +#endif /* ntohl */ + +#ifndef LWIP_PLATFORM_BYTESWAP +#define LWIP_PLATFORM_BYTESWAP 0 +#endif + +#if BYTE_ORDER == BIG_ENDIAN +#define htons(x) (x) +#define ntohs(x) (x) +#define htonl(x) (x) +#define ntohl(x) (x) +#else /* BYTE_ORDER != BIG_ENDIAN */ +#ifdef LWIP_PREFIX_BYTEORDER_FUNCS +/* workaround for naming collisions on some platforms */ +#define htons lwip_htons +#define ntohs lwip_ntohs +#define htonl lwip_htonl +#define ntohl lwip_ntohl +#endif /* LWIP_PREFIX_BYTEORDER_FUNCS */ +#if LWIP_PLATFORM_BYTESWAP +#define htons(x) LWIP_PLATFORM_HTONS(x) +#define ntohs(x) LWIP_PLATFORM_HTONS(x) +#define htonl(x) LWIP_PLATFORM_HTONL(x) +#define ntohl(x) LWIP_PLATFORM_HTONL(x) +#else /* LWIP_PLATFORM_BYTESWAP */ +u16_t htons(u16_t x); +u16_t ntohs(u16_t x); +u32_t htonl(u32_t x); +u32_t ntohl(u32_t x); +#endif /* LWIP_PLATFORM_BYTESWAP */ + +#endif /* BYTE_ORDER == BIG_ENDIAN */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_INET_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/inet_chksum.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/inet_chksum.h new file mode 100644 index 0000000..6f5b1b6 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/inet_chksum.h @@ -0,0 +1,62 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_INET_CHKSUM_H__ +#define __LWIP_INET_CHKSUM_H__ + +#include "lwip/opt.h" + +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" + +#ifdef __cplusplus +extern "C" { +#endif + +u16_t inet_chksum(void *dataptr, u16_t len); +u16_t inet_chksum_pbuf(struct pbuf *p); +u16_t inet_chksum_pseudo(struct pbuf *p, + struct ip_addr *src, struct ip_addr *dest, + u8_t proto, u16_t proto_len); +#if LWIP_UDPLITE +u16_t inet_chksum_pseudo_partial(struct pbuf *p, + struct ip_addr *src, struct ip_addr *dest, + u8_t proto, u16_t proto_len, u16_t chksum_len); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_INET_H__ */ + diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/ip.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/ip.h new file mode 100644 index 0000000..6b2cdee --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/ip.h @@ -0,0 +1,200 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_IP_H__ +#define __LWIP_IP_H__ + +#include "lwip/opt.h" + +#include "lwip/def.h" +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" +#include "lwip/err.h" +#include "lwip/netif.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** Currently, the function ip_output_if_opt() is only used with IGMP */ +#define IP_OPTIONS_SEND LWIP_IGMP + +#define IP_HLEN 20 + +#define IP_PROTO_ICMP 1 +#define IP_PROTO_UDP 17 +#define IP_PROTO_UDPLITE 136 +#define IP_PROTO_TCP 6 + +/* This is passed as the destination address to ip_output_if (not + to ip_output), meaning that an IP header already is constructed + in the pbuf. This is used when TCP retransmits. */ +#ifdef IP_HDRINCL +#undef IP_HDRINCL +#endif /* IP_HDRINCL */ +#define IP_HDRINCL NULL + +#if LWIP_NETIF_HWADDRHINT +#define IP_PCB_ADDRHINT ;u8_t addr_hint +#else +#define IP_PCB_ADDRHINT +#endif /* LWIP_NETIF_HWADDRHINT */ + +/* This is the common part of all PCB types. It needs to be at the + beginning of a PCB type definition. It is located here so that + changes to this common part are made in one location instead of + having to change all PCB structs. */ +#define IP_PCB \ + /* ip addresses in network byte order */ \ + struct ip_addr local_ip; \ + struct ip_addr remote_ip; \ + /* Socket options */ \ + u16_t so_options; \ + /* Type Of Service */ \ + u8_t tos; \ + /* Time To Live */ \ + u8_t ttl \ + /* link layer address resolution hint */ \ + IP_PCB_ADDRHINT + +struct ip_pcb { +/* Common members of all PCB types */ + IP_PCB; +}; + +/* + * Option flags per-socket. These are the same like SO_XXX. + */ +#define SOF_DEBUG (u16_t)0x0001U /* turn on debugging info recording */ +#define SOF_ACCEPTCONN (u16_t)0x0002U /* socket has had listen() */ +#define SOF_REUSEADDR (u16_t)0x0004U /* allow local address reuse */ +#define SOF_KEEPALIVE (u16_t)0x0008U /* keep connections alive */ +#define SOF_DONTROUTE (u16_t)0x0010U /* just use interface addresses */ +#define SOF_BROADCAST (u16_t)0x0020U /* permit to send and to receive broadcast messages (see IP_SOF_BROADCAST option) */ +#define SOF_USELOOPBACK (u16_t)0x0040U /* bypass hardware when possible */ +#define SOF_LINGER (u16_t)0x0080U /* linger on close if data present */ +#define SOF_OOBINLINE (u16_t)0x0100U /* leave received OOB data in line */ +#define SOF_REUSEPORT (u16_t)0x0200U /* allow local address & port reuse */ + + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct ip_hdr { + /* version / header length / type of service */ + PACK_STRUCT_FIELD(u16_t _v_hl_tos); + /* total length */ + PACK_STRUCT_FIELD(u16_t _len); + /* identification */ + PACK_STRUCT_FIELD(u16_t _id); + /* fragment offset field */ + PACK_STRUCT_FIELD(u16_t _offset); +#define IP_RF 0x8000 /* reserved fragment flag */ +#define IP_DF 0x4000 /* dont fragment flag */ +#define IP_MF 0x2000 /* more fragments flag */ +#define IP_OFFMASK 0x1fff /* mask for fragmenting bits */ + /* time to live / protocol*/ + PACK_STRUCT_FIELD(u16_t _ttl_proto); + /* checksum */ + PACK_STRUCT_FIELD(u16_t _chksum); + /* source and destination IP addresses */ + PACK_STRUCT_FIELD(struct ip_addr src); + PACK_STRUCT_FIELD(struct ip_addr dest); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define IPH_V(hdr) (ntohs((hdr)->_v_hl_tos) >> 12) +#define IPH_HL(hdr) ((ntohs((hdr)->_v_hl_tos) >> 8) & 0x0f) +#define IPH_TOS(hdr) (ntohs((hdr)->_v_hl_tos) & 0xff) +#define IPH_LEN(hdr) ((hdr)->_len) +#define IPH_ID(hdr) ((hdr)->_id) +#define IPH_OFFSET(hdr) ((hdr)->_offset) +#define IPH_TTL(hdr) (ntohs((hdr)->_ttl_proto) >> 8) +#define IPH_PROTO(hdr) (ntohs((hdr)->_ttl_proto) & 0xff) +#define IPH_CHKSUM(hdr) ((hdr)->_chksum) + +#define IPH_VHLTOS_SET(hdr, v, hl, tos) (hdr)->_v_hl_tos = (htons(((v) << 12) | ((hl) << 8) | (tos))) +#define IPH_LEN_SET(hdr, len) (hdr)->_len = (len) +#define IPH_ID_SET(hdr, id) (hdr)->_id = (id) +#define IPH_OFFSET_SET(hdr, off) (hdr)->_offset = (off) +#define IPH_TTL_SET(hdr, ttl) (hdr)->_ttl_proto = (htons(IPH_PROTO(hdr) | ((u16_t)(ttl) << 8))) +#define IPH_PROTO_SET(hdr, proto) (hdr)->_ttl_proto = (htons((proto) | (IPH_TTL(hdr) << 8))) +#define IPH_CHKSUM_SET(hdr, chksum) (hdr)->_chksum = (chksum) + +/** The interface that provided the packet for the current callback invocation. */ +extern struct netif *current_netif; +/** Header of the input packet currently being processed. */ +extern const struct ip_hdr *current_header; + +#define ip_init() /* Compatibility define, not init needed. */ +struct netif *ip_route(struct ip_addr *dest); +err_t ip_input(struct pbuf *p, struct netif *inp); +err_t ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, u8_t proto); +err_t ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, u8_t proto, + struct netif *netif); +#if LWIP_NETIF_HWADDRHINT +err_t ip_output_hinted(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, u8_t proto, u8_t *addr_hint); +#endif /* LWIP_NETIF_HWADDRHINT */ +#if IP_OPTIONS_SEND +err_t ip_output_if_opt(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options, + u16_t optlen); +#endif /* IP_OPTIONS_SEND */ +/** Get the interface that received the current packet. + * This function must only be called from a receive callback (udp_recv, + * raw_recv, tcp_accept). It will return NULL otherwise. */ +#define ip_current_netif() (current_netif) +/** Get the IP header of the current packet. + * This function must only be called from a receive callback (udp_recv, + * raw_recv, tcp_accept). It will return NULL otherwise. */ +#define ip_current_header() (current_header) +#if IP_DEBUG +void ip_debug_print(struct pbuf *p); +#else +#define ip_debug_print(p) +#endif /* IP_DEBUG */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_IP_H__ */ + + diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/ip_addr.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/ip_addr.h new file mode 100644 index 0000000..5fbc44d --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/ip_addr.h @@ -0,0 +1,175 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_IP_ADDR_H__ +#define __LWIP_IP_ADDR_H__ + +#include "lwip/opt.h" + +#include "lwip/inet.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct ip_addr { + PACK_STRUCT_FIELD(u32_t addr); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +/* + * struct ipaddr2 is used in the definition of the ARP packet format in + * order to support compilers that don't have structure packing. + */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct ip_addr2 { + PACK_STRUCT_FIELD(u16_t addrw[2]); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +struct netif; + +extern const struct ip_addr ip_addr_any; +extern const struct ip_addr ip_addr_broadcast; + +/** IP_ADDR_ can be used as a fixed IP address + * for the wildcard and the broadcast address + */ +#define IP_ADDR_ANY ((struct ip_addr *)&ip_addr_any) +#define IP_ADDR_BROADCAST ((struct ip_addr *)&ip_addr_broadcast) + +/* Definitions of the bits in an Internet address integer. + + On subnets, host and network parts are found according to + the subnet mask, not these masks. */ + +#define IN_CLASSA(a) ((((u32_t)(a)) & 0x80000000UL) == 0) +#define IN_CLASSA_NET 0xff000000 +#define IN_CLASSA_NSHIFT 24 +#define IN_CLASSA_HOST (0xffffffff & ~IN_CLASSA_NET) +#define IN_CLASSA_MAX 128 + +#define IN_CLASSB(a) ((((u32_t)(a)) & 0xc0000000UL) == 0x80000000UL) +#define IN_CLASSB_NET 0xffff0000 +#define IN_CLASSB_NSHIFT 16 +#define IN_CLASSB_HOST (0xffffffff & ~IN_CLASSB_NET) +#define IN_CLASSB_MAX 65536 + +#define IN_CLASSC(a) ((((u32_t)(a)) & 0xe0000000UL) == 0xc0000000UL) +#define IN_CLASSC_NET 0xffffff00 +#define IN_CLASSC_NSHIFT 8 +#define IN_CLASSC_HOST (0xffffffff & ~IN_CLASSC_NET) + +#define IN_CLASSD(a) (((u32_t)(a) & 0xf0000000UL) == 0xe0000000UL) +#define IN_CLASSD_NET 0xf0000000 /* These ones aren't really */ +#define IN_CLASSD_NSHIFT 28 /* net and host fields, but */ +#define IN_CLASSD_HOST 0x0fffffff /* routing needn't know. */ +#define IN_MULTICAST(a) IN_CLASSD(a) + +#define IN_EXPERIMENTAL(a) (((u32_t)(a) & 0xf0000000UL) == 0xf0000000UL) +#define IN_BADCLASS(a) (((u32_t)(a) & 0xf0000000UL) == 0xf0000000UL) + +#define IN_LOOPBACKNET 127 /* official! */ + +#define IP4_ADDR(ipaddr, a,b,c,d) \ + (ipaddr)->addr = htonl(((u32_t)((a) & 0xff) << 24) | \ + ((u32_t)((b) & 0xff) << 16) | \ + ((u32_t)((c) & 0xff) << 8) | \ + (u32_t)((d) & 0xff)) + +#define ip_addr_set(dest, src) (dest)->addr = \ + ((src) == NULL? 0:\ + (src)->addr) +/** + * Determine if two address are on the same network. + * + * @arg addr1 IP address 1 + * @arg addr2 IP address 2 + * @arg mask network identifier mask + * @return !0 if the network identifiers of both address match + */ +#define ip_addr_netcmp(addr1, addr2, mask) (((addr1)->addr & \ + (mask)->addr) == \ + ((addr2)->addr & \ + (mask)->addr)) +#define ip_addr_cmp(addr1, addr2) ((addr1)->addr == (addr2)->addr) + +#define ip_addr_isany(addr1) ((addr1) == NULL || (addr1)->addr == 0) + +u8_t ip_addr_isbroadcast(struct ip_addr *, struct netif *); + +#define ip_addr_ismulticast(addr1) (((addr1)->addr & ntohl(0xf0000000UL)) == ntohl(0xe0000000UL)) + +#define ip_addr_islinklocal(addr1) (((addr1)->addr & ntohl(0xffff0000UL)) == ntohl(0xa9fe0000UL)) + +#define ip_addr_debug_print(debug, ipaddr) \ + LWIP_DEBUGF(debug, ("%"U16_F".%"U16_F".%"U16_F".%"U16_F, \ + ipaddr != NULL ? \ + (u16_t)(ntohl((ipaddr)->addr) >> 24) & 0xff : 0, \ + ipaddr != NULL ? \ + (u16_t)(ntohl((ipaddr)->addr) >> 16) & 0xff : 0, \ + ipaddr != NULL ? \ + (u16_t)(ntohl((ipaddr)->addr) >> 8) & 0xff : 0, \ + ipaddr != NULL ? \ + (u16_t)ntohl((ipaddr)->addr) & 0xff : 0)) + +/* These are cast to u16_t, with the intent that they are often arguments + * to printf using the U16_F format from cc.h. */ +#define ip4_addr1(ipaddr) ((u16_t)(ntohl((ipaddr)->addr) >> 24) & 0xff) +#define ip4_addr2(ipaddr) ((u16_t)(ntohl((ipaddr)->addr) >> 16) & 0xff) +#define ip4_addr3(ipaddr) ((u16_t)(ntohl((ipaddr)->addr) >> 8) & 0xff) +#define ip4_addr4(ipaddr) ((u16_t)(ntohl((ipaddr)->addr)) & 0xff) + +/** + * Same as inet_ntoa() but takes a struct ip_addr* + */ +#define ip_ntoa(addr) ((addr != NULL) ? inet_ntoa(*((struct in_addr*)(addr))) : "NULL") + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_IP_ADDR_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/ip_frag.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/ip_frag.h new file mode 100644 index 0000000..adc6e91 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/ipv4/lwip/ip_frag.h @@ -0,0 +1,78 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Jani Monoses + * + */ + +#ifndef __LWIP_IP_FRAG_H__ +#define __LWIP_IP_FRAG_H__ + +#include "lwip/opt.h" +#include "lwip/err.h" +#include "lwip/pbuf.h" +#include "lwip/netif.h" +#include "lwip/ip_addr.h" +#include "lwip/ip.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if IP_REASSEMBLY +/* The IP reassembly timer interval in milliseconds. */ +#define IP_TMR_INTERVAL 1000 + +/* IP reassembly helper struct. + * This is exported because memp needs to know the size. + */ +struct ip_reassdata { + struct ip_reassdata *next; + struct pbuf *p; + struct ip_hdr iphdr; + u16_t datagram_len; + u8_t flags; + u8_t timer; +}; + +void ip_reass_init(void); +void ip_reass_tmr(void); +struct pbuf * ip_reass(struct pbuf *p); +#endif /* IP_REASSEMBLY */ + +#if IP_FRAG +err_t ip_frag(struct pbuf *p, struct netif *netif, struct ip_addr *dest); +#endif /* IP_FRAG */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_IP_FRAG_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/api.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/api.h new file mode 100644 index 0000000..7d2c9e6 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/api.h @@ -0,0 +1,224 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_API_H__ +#define __LWIP_API_H__ + +#include "lwip/opt.h" + +#if LWIP_NETCONN /* don't build if not configured for use in lwipopts.h */ + +#include /* for size_t */ + +#include "lwip/netbuf.h" +#include "lwip/sys.h" +#include "lwip/ip_addr.h" +#include "lwip/err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* Throughout this file, IP addresses and port numbers are expected to be in + * the same byte order as in the corresponding pcb. + */ + +/* Flags for netconn_write */ +#define NETCONN_NOFLAG 0x00 +#define NETCONN_NOCOPY 0x00 /* Only for source code compatibility */ +#define NETCONN_COPY 0x01 +#define NETCONN_MORE 0x02 + +/* Helpers to process several netconn_types by the same code */ +#define NETCONNTYPE_GROUP(t) (t&0xF0) +#define NETCONNTYPE_DATAGRAM(t) (t&0xE0) + +enum netconn_type { + NETCONN_INVALID = 0, + /* NETCONN_TCP Group */ + NETCONN_TCP = 0x10, + /* NETCONN_UDP Group */ + NETCONN_UDP = 0x20, + NETCONN_UDPLITE = 0x21, + NETCONN_UDPNOCHKSUM= 0x22, + /* NETCONN_RAW Group */ + NETCONN_RAW = 0x40 +}; + +enum netconn_state { + NETCONN_NONE, + NETCONN_WRITE, + NETCONN_LISTEN, + NETCONN_CONNECT, + NETCONN_CLOSE +}; + +enum netconn_evt { + NETCONN_EVT_RCVPLUS, + NETCONN_EVT_RCVMINUS, + NETCONN_EVT_SENDPLUS, + NETCONN_EVT_SENDMINUS +}; + +#if LWIP_IGMP +enum netconn_igmp { + NETCONN_JOIN, + NETCONN_LEAVE +}; +#endif /* LWIP_IGMP */ + +/* forward-declare some structs to avoid to include their headers */ +struct ip_pcb; +struct tcp_pcb; +struct udp_pcb; +struct raw_pcb; +struct netconn; + +/** A callback prototype to inform about events for a netconn */ +typedef void (* netconn_callback)(struct netconn *, enum netconn_evt, u16_t len); + +/** A netconn descriptor */ +struct netconn { + /** type of the netconn (TCP, UDP or RAW) */ + enum netconn_type type; + /** current state of the netconn */ + enum netconn_state state; + /** the lwIP internal protocol control block */ + union { + struct ip_pcb *ip; + struct tcp_pcb *tcp; + struct udp_pcb *udp; + struct raw_pcb *raw; + } pcb; + /** the last error this netconn had */ + err_t err; + /** sem that is used to synchroneously execute functions in the core context */ + sys_sem_t op_completed; + /** mbox where received packets are stored until they are fetched + by the netconn application thread (can grow quite big) */ + sys_mbox_t recvmbox; + /** mbox where new connections are stored until processed + by the application thread */ + sys_mbox_t acceptmbox; + /** only used for socket layer */ + int socket; +#if LWIP_SO_RCVTIMEO + /** timeout to wait for new data to be received + (or connections to arrive for listening netconns) */ + int recv_timeout; +#endif /* LWIP_SO_RCVTIMEO */ +#if LWIP_SO_RCVBUF + /** maximum amount of bytes queued in recvmbox */ + int recv_bufsize; +#endif /* LWIP_SO_RCVBUF */ + s16_t recv_avail; +#if LWIP_TCP + /** TCP: when data passed to netconn_write doesn't fit into the send buffer, + this temporarily stores the message. */ + struct api_msg_msg *write_msg; + /** TCP: when data passed to netconn_write doesn't fit into the send buffer, + this temporarily stores how much is already sent. */ + size_t write_offset; +#if LWIP_TCPIP_CORE_LOCKING + /** TCP: when data passed to netconn_write doesn't fit into the send buffer, + this temporarily stores whether to wake up the original application task + if data couldn't be sent in the first try. */ + u8_t write_delayed; +#endif /* LWIP_TCPIP_CORE_LOCKING */ +#endif /* LWIP_TCP */ + /** A callback function that is informed about events for this netconn */ + netconn_callback callback; +}; + +/* Register an Network connection event */ +#define API_EVENT(c,e,l) if (c->callback) { \ + (*c->callback)(c, e, l); \ + } + +/* Network connection functions: */ +#define netconn_new(t) netconn_new_with_proto_and_callback(t, 0, NULL) +#define netconn_new_with_callback(t, c) netconn_new_with_proto_and_callback(t, 0, c) +struct +netconn *netconn_new_with_proto_and_callback(enum netconn_type t, u8_t proto, + netconn_callback callback); +err_t netconn_delete (struct netconn *conn); +/** Get the type of a netconn (as enum netconn_type). */ +#define netconn_type(conn) (conn->type) + +err_t netconn_getaddr (struct netconn *conn, + struct ip_addr *addr, + u16_t *port, + u8_t local); +#define netconn_peer(c,i,p) netconn_getaddr(c,i,p,0) +#define netconn_addr(c,i,p) netconn_getaddr(c,i,p,1) + +err_t netconn_bind (struct netconn *conn, + struct ip_addr *addr, + u16_t port); +err_t netconn_connect (struct netconn *conn, + struct ip_addr *addr, + u16_t port); +err_t netconn_disconnect (struct netconn *conn); +err_t netconn_listen_with_backlog(struct netconn *conn, u8_t backlog); +#define netconn_listen(conn) netconn_listen_with_backlog(conn, TCP_DEFAULT_LISTEN_BACKLOG) +struct netconn * netconn_accept (struct netconn *conn); +struct netbuf * netconn_recv (struct netconn *conn); +err_t netconn_sendto (struct netconn *conn, + struct netbuf *buf, struct ip_addr *addr, u16_t port); +err_t netconn_send (struct netconn *conn, + struct netbuf *buf); +err_t netconn_write (struct netconn *conn, + const void *dataptr, size_t size, + u8_t apiflags); +err_t netconn_close (struct netconn *conn); + +#if LWIP_IGMP +err_t netconn_join_leave_group (struct netconn *conn, + struct ip_addr *multiaddr, + struct ip_addr *interface, + enum netconn_igmp join_or_leave); +#endif /* LWIP_IGMP */ +#if LWIP_DNS +err_t netconn_gethostbyname(const char *name, struct ip_addr *addr); +#endif /* LWIP_DNS */ + +#define netconn_err(conn) ((conn)->err) +#define netconn_recv_bufsize(conn) ((conn)->recv_bufsize) + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_NETCONN */ + +#endif /* __LWIP_API_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/api_msg.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/api_msg.h new file mode 100644 index 0000000..7718d90 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/api_msg.h @@ -0,0 +1,164 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_API_MSG_H__ +#define __LWIP_API_MSG_H__ + +#include "lwip/opt.h" + +#if LWIP_NETCONN /* don't build if not configured for use in lwipopts.h */ + +#include /* for size_t */ + +#include "lwip/ip_addr.h" +#include "lwip/err.h" +#include "lwip/sys.h" +#include "lwip/igmp.h" +#include "lwip/api.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* IP addresses and port numbers are expected to be in + * the same byte order as in the corresponding pcb. + */ +/** This struct includes everything that is necessary to execute a function + for a netconn in another thread context (mainly used to process netconns + in the tcpip_thread context to be thread safe). */ +struct api_msg_msg { + /** The netconn which to process - always needed: it includes the semaphore + which is used to block the application thread until the function finished. */ + struct netconn *conn; + /** Depending on the executed function, one of these union members is used */ + union { + /** used for do_send */ + struct netbuf *b; + /** used for do_newconn */ + struct { + u8_t proto; + } n; + /** used for do_bind and do_connect */ + struct { + struct ip_addr *ipaddr; + u16_t port; + } bc; + /** used for do_getaddr */ + struct { + struct ip_addr *ipaddr; + u16_t *port; + u8_t local; + } ad; + /** used for do_write */ + struct { + const void *dataptr; + size_t len; + u8_t apiflags; + } w; + /** used for do_recv */ + struct { + u16_t len; + } r; +#if LWIP_IGMP + /** used for do_join_leave_group */ + struct { + struct ip_addr *multiaddr; + struct ip_addr *interface; + enum netconn_igmp join_or_leave; + } jl; +#endif /* LWIP_IGMP */ +#if TCP_LISTEN_BACKLOG + struct { + u8_t backlog; + } lb; +#endif /* TCP_LISTEN_BACKLOG */ + } msg; +}; + +/** This struct contains a function to execute in another thread context and + a struct api_msg_msg that serves as an argument for this function. + This is passed to tcpip_apimsg to execute functions in tcpip_thread context. */ +struct api_msg { + /** function to execute in tcpip_thread context */ + void (* function)(struct api_msg_msg *msg); + /** arguments for this function */ + struct api_msg_msg msg; +}; + +#if LWIP_DNS +/** As do_gethostbyname requires more arguments but doesn't require a netconn, + it has its own struct (to avoid struct api_msg getting bigger than necessary). + do_gethostbyname must be called using tcpip_callback instead of tcpip_apimsg + (see netconn_gethostbyname). */ +struct dns_api_msg { + /** Hostname to query or dotted IP address string */ + const char *name; + /** Rhe resolved address is stored here */ + struct ip_addr *addr; + /** This semaphore is posted when the name is resolved, the application thread + should wait on it. */ + sys_sem_t sem; + /** Errors are given back here */ + err_t *err; +}; +#endif /* LWIP_DNS */ + +void do_newconn ( struct api_msg_msg *msg); +void do_delconn ( struct api_msg_msg *msg); +void do_bind ( struct api_msg_msg *msg); +void do_connect ( struct api_msg_msg *msg); +void do_disconnect ( struct api_msg_msg *msg); +void do_listen ( struct api_msg_msg *msg); +void do_send ( struct api_msg_msg *msg); +void do_recv ( struct api_msg_msg *msg); +void do_write ( struct api_msg_msg *msg); +void do_getaddr ( struct api_msg_msg *msg); +void do_close ( struct api_msg_msg *msg); +#if LWIP_IGMP +void do_join_leave_group( struct api_msg_msg *msg); +#endif /* LWIP_IGMP */ + +#if LWIP_DNS +void do_gethostbyname(void *arg); +#endif /* LWIP_DNS */ + +struct netconn* netconn_alloc(enum netconn_type t, netconn_callback callback); +void netconn_free(struct netconn *conn); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_NETCONN */ + +#endif /* __LWIP_API_MSG_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/arch.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/arch.h new file mode 100644 index 0000000..5ab190a --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/arch.h @@ -0,0 +1,235 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_ARCH_H__ +#define __LWIP_ARCH_H__ + +#ifndef LITTLE_ENDIAN +#define LITTLE_ENDIAN 1234 +#endif + +#ifndef BIG_ENDIAN +#define BIG_ENDIAN 4321 +#endif + +#include "arch/cc.h" + +/** Temporary: define format string for size_t if not defined in cc.h */ +#ifndef SZT_F +#define SZT_F U32_F +#endif /* SZT_F */ + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef PACK_STRUCT_BEGIN +#define PACK_STRUCT_BEGIN +#endif /* PACK_STRUCT_BEGIN */ + +#ifndef PACK_STRUCT_END +#define PACK_STRUCT_END +#endif /* PACK_STRUCT_END */ + +#ifndef PACK_STRUCT_FIELD +#define PACK_STRUCT_FIELD(x) x +#endif /* PACK_STRUCT_FIELD */ + + +#ifndef LWIP_UNUSED_ARG +#define LWIP_UNUSED_ARG(x) (void)x +#endif /* LWIP_UNUSED_ARG */ + + +#ifdef LWIP_PROVIDE_ERRNO + +#define EPERM 1 /* Operation not permitted */ +#define ENOENT 2 /* No such file or directory */ +#define ESRCH 3 /* No such process */ +#define EINTR 4 /* Interrupted system call */ +#define EIO 5 /* I/O error */ +#define ENXIO 6 /* No such device or address */ +#define E2BIG 7 /* Arg list too long */ +#define ENOEXEC 8 /* Exec format error */ +#define EBADF 9 /* Bad file number */ +#define ECHILD 10 /* No child processes */ +#define EAGAIN 11 /* Try again */ +#define ENOMEM 12 /* Out of memory */ +#define EACCES 13 /* Permission denied */ +#define EFAULT 14 /* Bad address */ +#define ENOTBLK 15 /* Block device required */ +#define EBUSY 16 /* Device or resource busy */ +#define EEXIST 17 /* File exists */ +#define EXDEV 18 /* Cross-device link */ +#define ENODEV 19 /* No such device */ +#define ENOTDIR 20 /* Not a directory */ +#define EISDIR 21 /* Is a directory */ +#define EINVAL 22 /* Invalid argument */ +#define ENFILE 23 /* File table overflow */ +#define EMFILE 24 /* Too many open files */ +#define ENOTTY 25 /* Not a typewriter */ +#define ETXTBSY 26 /* Text file busy */ +#define EFBIG 27 /* File too large */ +#define ENOSPC 28 /* No space left on device */ +#define ESPIPE 29 /* Illegal seek */ +#define EROFS 30 /* Read-only file system */ +#define EMLINK 31 /* Too many links */ +#define EPIPE 32 /* Broken pipe */ +#define EDOM 33 /* Math argument out of domain of func */ +#define ERANGE 34 /* Math result not representable */ +#define EDEADLK 35 /* Resource deadlock would occur */ +#define ENAMETOOLONG 36 /* File name too long */ +#define ENOLCK 37 /* No record locks available */ +#define ENOSYS 38 /* Function not implemented */ +#define ENOTEMPTY 39 /* Directory not empty */ +#define ELOOP 40 /* Too many symbolic links encountered */ +#define EWOULDBLOCK EAGAIN /* Operation would block */ +#define ENOMSG 42 /* No message of desired type */ +#define EIDRM 43 /* Identifier removed */ +#define ECHRNG 44 /* Channel number out of range */ +#define EL2NSYNC 45 /* Level 2 not synchronized */ +#define EL3HLT 46 /* Level 3 halted */ +#define EL3RST 47 /* Level 3 reset */ +#define ELNRNG 48 /* Link number out of range */ +#define EUNATCH 49 /* Protocol driver not attached */ +#define ENOCSI 50 /* No CSI structure available */ +#define EL2HLT 51 /* Level 2 halted */ +#define EBADE 52 /* Invalid exchange */ +#define EBADR 53 /* Invalid request descriptor */ +#define EXFULL 54 /* Exchange full */ +#define ENOANO 55 /* No anode */ +#define EBADRQC 56 /* Invalid request code */ +#define EBADSLT 57 /* Invalid slot */ + +#define EDEADLOCK EDEADLK + +#define EBFONT 59 /* Bad font file format */ +#define ENOSTR 60 /* Device not a stream */ +#define ENODATA 61 /* No data available */ +#define ETIME 62 /* Timer expired */ +#define ENOSR 63 /* Out of streams resources */ +#define ENONET 64 /* Machine is not on the network */ +#define ENOPKG 65 /* Package not installed */ +#define EREMOTE 66 /* Object is remote */ +#define ENOLINK 67 /* Link has been severed */ +#define EADV 68 /* Advertise error */ +#define ESRMNT 69 /* Srmount error */ +#define ECOMM 70 /* Communication error on send */ +#define EPROTO 71 /* Protocol error */ +#define EMULTIHOP 72 /* Multihop attempted */ +#define EDOTDOT 73 /* RFS specific error */ +#define EBADMSG 74 /* Not a data message */ +#define EOVERFLOW 75 /* Value too large for defined data type */ +#define ENOTUNIQ 76 /* Name not unique on network */ +#define EBADFD 77 /* File descriptor in bad state */ +#define EREMCHG 78 /* Remote address changed */ +#define ELIBACC 79 /* Can not access a needed shared library */ +#define ELIBBAD 80 /* Accessing a corrupted shared library */ +#define ELIBSCN 81 /* .lib section in a.out corrupted */ +#define ELIBMAX 82 /* Attempting to link in too many shared libraries */ +#define ELIBEXEC 83 /* Cannot exec a shared library directly */ +#define EILSEQ 84 /* Illegal byte sequence */ +#define ERESTART 85 /* Interrupted system call should be restarted */ +#define ESTRPIPE 86 /* Streams pipe error */ +#define EUSERS 87 /* Too many users */ +#define ENOTSOCK 88 /* Socket operation on non-socket */ +#define EDESTADDRREQ 89 /* Destination address required */ +#define EMSGSIZE 90 /* Message too long */ +#define EPROTOTYPE 91 /* Protocol wrong type for socket */ +#define ENOPROTOOPT 92 /* Protocol not available */ +#define EPROTONOSUPPORT 93 /* Protocol not supported */ +#define ESOCKTNOSUPPORT 94 /* Socket type not supported */ +#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ +#define EPFNOSUPPORT 96 /* Protocol family not supported */ +#define EAFNOSUPPORT 97 /* Address family not supported by protocol */ +#define EADDRINUSE 98 /* Address already in use */ +#define EADDRNOTAVAIL 99 /* Cannot assign requested address */ +#define ENETDOWN 100 /* Network is down */ +#define ENETUNREACH 101 /* Network is unreachable */ +#define ENETRESET 102 /* Network dropped connection because of reset */ +#define ECONNABORTED 103 /* Software caused connection abort */ +#define ECONNRESET 104 /* Connection reset by peer */ +#define ENOBUFS 105 /* No buffer space available */ +#define EISCONN 106 /* Transport endpoint is already connected */ +#define ENOTCONN 107 /* Transport endpoint is not connected */ +#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */ +#define ETOOMANYREFS 109 /* Too many references: cannot splice */ +#define ETIMEDOUT 110 /* Connection timed out */ +#define ECONNREFUSED 111 /* Connection refused */ +#define EHOSTDOWN 112 /* Host is down */ +#define EHOSTUNREACH 113 /* No route to host */ +#define EALREADY 114 /* Operation already in progress */ +#define EINPROGRESS 115 /* Operation now in progress */ +#define ESTALE 116 /* Stale NFS file handle */ +#define EUCLEAN 117 /* Structure needs cleaning */ +#define ENOTNAM 118 /* Not a XENIX named type file */ +#define ENAVAIL 119 /* No XENIX semaphores available */ +#define EISNAM 120 /* Is a named type file */ +#define EREMOTEIO 121 /* Remote I/O error */ +#define EDQUOT 122 /* Quota exceeded */ + +#define ENOMEDIUM 123 /* No medium found */ +#define EMEDIUMTYPE 124 /* Wrong medium type */ + + +#define ENSROK 0 /* DNS server returned answer with no data */ +#define ENSRNODATA 160 /* DNS server returned answer with no data */ +#define ENSRFORMERR 161 /* DNS server claims query was misformatted */ +#define ENSRSERVFAIL 162 /* DNS server returned general failure */ +#define ENSRNOTFOUND 163 /* Domain name not found */ +#define ENSRNOTIMP 164 /* DNS server does not implement requested operation */ +#define ENSRREFUSED 165 /* DNS server refused query */ +#define ENSRBADQUERY 166 /* Misformatted DNS query */ +#define ENSRBADNAME 167 /* Misformatted domain name */ +#define ENSRBADFAMILY 168 /* Unsupported address family */ +#define ENSRBADRESP 169 /* Misformatted DNS reply */ +#define ENSRCONNREFUSED 170 /* Could not contact DNS servers */ +#define ENSRTIMEOUT 171 /* Timeout while contacting DNS servers */ +#define ENSROF 172 /* End of file */ +#define ENSRFILE 173 /* Error reading file */ +#define ENSRNOMEM 174 /* Out of memory */ +#define ENSRDESTRUCTION 175 /* Application terminated lookup */ +#define ENSRQUERYDOMAINTOOLONG 176 /* Domain name is too long */ +#define ENSRCNAMELOOP 177 /* Domain name is too long */ + +#ifndef errno +extern int errno; +#endif + +#endif /* LWIP_PROVIDE_ERRNO */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_ARCH_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/debug.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/debug.h new file mode 100644 index 0000000..fb07607 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/debug.h @@ -0,0 +1,100 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_DEBUG_H__ +#define __LWIP_DEBUG_H__ + +#include "lwip/arch.h" + +/** lower two bits indicate debug level + * - 0 all + * - 1 warning + * - 2 serious + * - 3 severe + */ +#define LWIP_DBG_LEVEL_ALL 0x00 +#define LWIP_DBG_LEVEL_OFF LWIP_DBG_LEVEL_ALL /* compatibility define only */ +#define LWIP_DBG_LEVEL_WARNING 0x01 /* bad checksums, dropped packets, ... */ +#define LWIP_DBG_LEVEL_SERIOUS 0x02 /* memory allocation failures, ... */ +#define LWIP_DBG_LEVEL_SEVERE 0x03 +#define LWIP_DBG_MASK_LEVEL 0x03 + +/** flag for LWIP_DEBUGF to enable that debug message */ +#define LWIP_DBG_ON 0x80U +/** flag for LWIP_DEBUGF to disable that debug message */ +#define LWIP_DBG_OFF 0x00U + +/** flag for LWIP_DEBUGF indicating a tracing message (to follow program flow) */ +#define LWIP_DBG_TRACE 0x40U +/** flag for LWIP_DEBUGF indicating a state debug message (to follow module states) */ +#define LWIP_DBG_STATE 0x20U +/** flag for LWIP_DEBUGF indicating newly added code, not thoroughly tested yet */ +#define LWIP_DBG_FRESH 0x10U +/** flag for LWIP_DEBUGF to halt after printing this debug message */ +#define LWIP_DBG_HALT 0x08U + +#ifndef LWIP_NOASSERT +#define LWIP_ASSERT(message, assertion) do { if(!(assertion)) \ + LWIP_PLATFORM_ASSERT(message); } while(0) +#else /* LWIP_NOASSERT */ +#define LWIP_ASSERT(message, assertion) +#endif /* LWIP_NOASSERT */ + +/** if "expression" isn't true, then print "message" and execute "handler" expression */ +#ifndef LWIP_ERROR +#define LWIP_ERROR(message, expression, handler) do { if (!(expression)) { \ + LWIP_PLATFORM_ASSERT(message); handler;}} while(0) +#endif /* LWIP_ERROR */ + +#ifdef LWIP_DEBUG +/** print debug message only if debug message type is enabled... + * AND is of correct type AND is at least LWIP_DBG_LEVEL + */ +#define LWIP_DEBUGF(debug, message) do { \ + if ( \ + ((debug) & LWIP_DBG_ON) && \ + ((debug) & LWIP_DBG_TYPES_ON) && \ + ((s16_t)((debug) & LWIP_DBG_MASK_LEVEL) >= LWIP_DBG_MIN_LEVEL)) { \ + LWIP_PLATFORM_DIAG(message); \ + if ((debug) & LWIP_DBG_HALT) { \ + while(1); \ + } \ + } \ + } while(0) + +#else /* LWIP_DEBUG */ +#define LWIP_DEBUGF(debug, message) +#endif /* LWIP_DEBUG */ + +#endif /* __LWIP_DEBUG_H__ */ + diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/def.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/def.h new file mode 100644 index 0000000..c3681ac --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/def.h @@ -0,0 +1,49 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_DEF_H__ +#define __LWIP_DEF_H__ + +/* this might define NULL already */ +#include "lwip/arch.h" + +#define LWIP_MAX(x , y) (((x) > (y)) ? (x) : (y)) +#define LWIP_MIN(x , y) (((x) < (y)) ? (x) : (y)) + +#ifndef NULL +#define NULL ((void *)0) +#endif + + +#endif /* __LWIP_DEF_H__ */ + diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/dhcp.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/dhcp.h new file mode 100644 index 0000000..27a0ade --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/dhcp.h @@ -0,0 +1,248 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** @file + */ + +#ifndef __LWIP_DHCP_H__ +#define __LWIP_DHCP_H__ + +#include "lwip/opt.h" + +#if LWIP_DHCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/netif.h" +#include "lwip/udp.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** period (in seconds) of the application calling dhcp_coarse_tmr() */ +#define DHCP_COARSE_TIMER_SECS 60 +/** period (in milliseconds) of the application calling dhcp_coarse_tmr() */ +#define DHCP_COARSE_TIMER_MSECS (DHCP_COARSE_TIMER_SECS * 1000UL) +/** period (in milliseconds) of the application calling dhcp_fine_tmr() */ +#define DHCP_FINE_TIMER_MSECS 500 + +struct dhcp +{ + /** transaction identifier of last sent request */ + u32_t xid; + /** our connection to the DHCP server */ + struct udp_pcb *pcb; + /** incoming msg */ + struct dhcp_msg *msg_in; + /** incoming msg options */ + void *options_in; + /** ingoing msg options length */ + u16_t options_in_len; + /** current DHCP state machine state */ + u8_t state; + /** retries of current request */ + u8_t tries; + + struct pbuf *p_out; /* pbuf of outcoming msg */ + struct dhcp_msg *msg_out; /* outgoing msg */ + u16_t options_out_len; /* outgoing msg options length */ + u16_t request_timeout; /* #ticks with period DHCP_FINE_TIMER_SECS for request timeout */ + u16_t t1_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for renewal time */ + u16_t t2_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for rebind time */ + struct ip_addr server_ip_addr; /* dhcp server address that offered this lease */ + struct ip_addr offered_ip_addr; + struct ip_addr offered_sn_mask; + struct ip_addr offered_gw_addr; + struct ip_addr offered_bc_addr; +#define DHCP_MAX_DNS 2 + u32_t dns_count; /* actual number of DNS servers obtained */ + struct ip_addr offered_dns_addr[DHCP_MAX_DNS]; /* DNS server addresses */ + + u32_t offered_t0_lease; /* lease period (in seconds) */ + u32_t offered_t1_renew; /* recommended renew time (usually 50% of lease period) */ + u32_t offered_t2_rebind; /* recommended rebind time (usually 66% of lease period) */ +#if LWIP_DHCP_AUTOIP_COOP + u8_t autoip_coop_state; +#endif +/** Patch #1308 + * TODO: See dhcp.c "TODO"s + */ +#if 0 + struct ip_addr offered_si_addr; + u8_t *boot_file_name; +#endif +}; + +/* MUST be compiled with "pack structs" or equivalent! */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +/** minimum set of fields of any DHCP message */ +struct dhcp_msg +{ + PACK_STRUCT_FIELD(u8_t op); + PACK_STRUCT_FIELD(u8_t htype); + PACK_STRUCT_FIELD(u8_t hlen); + PACK_STRUCT_FIELD(u8_t hops); + PACK_STRUCT_FIELD(u32_t xid); + PACK_STRUCT_FIELD(u16_t secs); + PACK_STRUCT_FIELD(u16_t flags); + PACK_STRUCT_FIELD(struct ip_addr ciaddr); + PACK_STRUCT_FIELD(struct ip_addr yiaddr); + PACK_STRUCT_FIELD(struct ip_addr siaddr); + PACK_STRUCT_FIELD(struct ip_addr giaddr); +#define DHCP_CHADDR_LEN 16U + PACK_STRUCT_FIELD(u8_t chaddr[DHCP_CHADDR_LEN]); +#define DHCP_SNAME_LEN 64U + PACK_STRUCT_FIELD(u8_t sname[DHCP_SNAME_LEN]); +#define DHCP_FILE_LEN 128U + PACK_STRUCT_FIELD(u8_t file[DHCP_FILE_LEN]); + PACK_STRUCT_FIELD(u32_t cookie); +#define DHCP_MIN_OPTIONS_LEN 68U +/** make sure user does not configure this too small */ +#if ((defined(DHCP_OPTIONS_LEN)) && (DHCP_OPTIONS_LEN < DHCP_MIN_OPTIONS_LEN)) +# undef DHCP_OPTIONS_LEN +#endif +/** allow this to be configured in lwipopts.h, but not too small */ +#if (!defined(DHCP_OPTIONS_LEN)) +/** set this to be sufficient for your options in outgoing DHCP msgs */ +# define DHCP_OPTIONS_LEN DHCP_MIN_OPTIONS_LEN +#endif + PACK_STRUCT_FIELD(u8_t options[DHCP_OPTIONS_LEN]); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +/** start DHCP configuration */ +err_t dhcp_start(struct netif *netif); +/** enforce early lease renewal (not needed normally)*/ +err_t dhcp_renew(struct netif *netif); +/** release the DHCP lease, usually called before dhcp_stop()*/ +err_t dhcp_release(struct netif *netif); +/** stop DHCP configuration */ +void dhcp_stop(struct netif *netif); +/** inform server of our manual IP address */ +void dhcp_inform(struct netif *netif); +/** Handle a possible change in the network configuration */ +void dhcp_network_changed(struct netif *netif); + +/** if enabled, check whether the offered IP address is not in use, using ARP */ +#if DHCP_DOES_ARP_CHECK +void dhcp_arp_reply(struct netif *netif, struct ip_addr *addr); +#endif + +/** to be called every minute */ +void dhcp_coarse_tmr(void); +/** to be called every half second */ +void dhcp_fine_tmr(void); + +/** DHCP message item offsets and length */ +#define DHCP_MSG_OFS (UDP_DATA_OFS) + #define DHCP_OP_OFS (DHCP_MSG_OFS + 0) + #define DHCP_HTYPE_OFS (DHCP_MSG_OFS + 1) + #define DHCP_HLEN_OFS (DHCP_MSG_OFS + 2) + #define DHCP_HOPS_OFS (DHCP_MSG_OFS + 3) + #define DHCP_XID_OFS (DHCP_MSG_OFS + 4) + #define DHCP_SECS_OFS (DHCP_MSG_OFS + 8) + #define DHCP_FLAGS_OFS (DHCP_MSG_OFS + 10) + #define DHCP_CIADDR_OFS (DHCP_MSG_OFS + 12) + #define DHCP_YIADDR_OFS (DHCP_MSG_OFS + 16) + #define DHCP_SIADDR_OFS (DHCP_MSG_OFS + 20) + #define DHCP_GIADDR_OFS (DHCP_MSG_OFS + 24) + #define DHCP_CHADDR_OFS (DHCP_MSG_OFS + 28) + #define DHCP_SNAME_OFS (DHCP_MSG_OFS + 44) + #define DHCP_FILE_OFS (DHCP_MSG_OFS + 108) +#define DHCP_MSG_LEN 236 + +#define DHCP_COOKIE_OFS (DHCP_MSG_OFS + DHCP_MSG_LEN) +#define DHCP_OPTIONS_OFS (DHCP_MSG_OFS + DHCP_MSG_LEN + 4) + +#define DHCP_CLIENT_PORT 68 +#define DHCP_SERVER_PORT 67 + +/** DHCP client states */ +#define DHCP_REQUESTING 1 +#define DHCP_INIT 2 +#define DHCP_REBOOTING 3 +#define DHCP_REBINDING 4 +#define DHCP_RENEWING 5 +#define DHCP_SELECTING 6 +#define DHCP_INFORMING 7 +#define DHCP_CHECKING 8 +#define DHCP_PERMANENT 9 +#define DHCP_BOUND 10 +/** not yet implemented #define DHCP_RELEASING 11 */ +#define DHCP_BACKING_OFF 12 +#define DHCP_OFF 13 + +/** AUTOIP cooperatation flags */ +#define DHCP_AUTOIP_COOP_STATE_OFF 0 +#define DHCP_AUTOIP_COOP_STATE_ON 1 + +#define DHCP_BOOTREQUEST 1 +#define DHCP_BOOTREPLY 2 + +#define DHCP_DISCOVER 1 +#define DHCP_OFFER 2 +#define DHCP_REQUEST 3 +#define DHCP_DECLINE 4 +#define DHCP_ACK 5 +#define DHCP_NAK 6 +#define DHCP_RELEASE 7 +#define DHCP_INFORM 8 + +#define DHCP_HTYPE_ETH 1 + +#define DHCP_HLEN_ETH 6 + +#define DHCP_BROADCAST_FLAG 15 +#define DHCP_BROADCAST_MASK (1 << DHCP_FLAG_BROADCAST) + +/** BootP options */ +#define DHCP_OPTION_PAD 0 +#define DHCP_OPTION_SUBNET_MASK 1 /* RFC 2132 3.3 */ +#define DHCP_OPTION_ROUTER 3 +#define DHCP_OPTION_DNS_SERVER 6 +#define DHCP_OPTION_HOSTNAME 12 +#define DHCP_OPTION_IP_TTL 23 +#define DHCP_OPTION_MTU 26 +#define DHCP_OPTION_BROADCAST 28 +#define DHCP_OPTION_TCP_TTL 37 +#define DHCP_OPTION_END 255 + +/** DHCP options */ +#define DHCP_OPTION_REQUESTED_IP 50 /* RFC 2132 9.1, requested IP address */ +#define DHCP_OPTION_LEASE_TIME 51 /* RFC 2132 9.2, time in seconds, in 4 bytes */ +#define DHCP_OPTION_OVERLOAD 52 /* RFC2132 9.3, use file and/or sname field for options */ + +#define DHCP_OPTION_MESSAGE_TYPE 53 /* RFC 2132 9.6, important for DHCP */ +#define DHCP_OPTION_MESSAGE_TYPE_LEN 1 + + +#define DHCP_OPTION_SERVER_ID 54 /* RFC 2132 9.7, server IP address */ +#define DHCP_OPTION_PARAMETER_REQUEST_LIST 55 /* RFC 2132 9.8, requested option types */ + +#define DHCP_OPTION_MAX_MSG_SIZE 57 /* RFC 2132 9.10, message size accepted >= 576 */ +#define DHCP_OPTION_MAX_MSG_SIZE_LEN 2 + +#define DHCP_OPTION_T1 58 /* T1 renewal time */ +#define DHCP_OPTION_T2 59 /* T2 rebinding time */ +#define DHCP_OPTION_US 60 +#define DHCP_OPTION_CLIENT_ID 61 +#define DHCP_OPTION_TFTP_SERVERNAME 66 +#define DHCP_OPTION_BOOTFILE 67 + +/** possible combinations of overloading the file and sname fields with options */ +#define DHCP_OVERLOAD_NONE 0 +#define DHCP_OVERLOAD_FILE 1 +#define DHCP_OVERLOAD_SNAME 2 +#define DHCP_OVERLOAD_SNAME_FILE 3 + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_DHCP */ + +#endif /*__LWIP_DHCP_H__*/ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/dns.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/dns.h new file mode 100644 index 0000000..c1b8ae0 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/dns.h @@ -0,0 +1,99 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * lwip DNS resolver header file. + + * Author: Jim Pettinato + * April 2007 + + * ported from uIP resolv.c Copyright (c) 2002-2003, Adam Dunkels. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote + * products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __LWIP_DNS_H__ +#define __LWIP_DNS_H__ + +#include "lwip/opt.h" + +#if LWIP_DNS /* don't build if not configured for use in lwipopts.h */ + +/** DNS timer period */ +#define DNS_TMR_INTERVAL 1000 + +/** DNS field TYPE used for "Resource Records" */ +#define DNS_RRTYPE_A 1 /* a host address */ +#define DNS_RRTYPE_NS 2 /* an authoritative name server */ +#define DNS_RRTYPE_MD 3 /* a mail destination (Obsolete - use MX) */ +#define DNS_RRTYPE_MF 4 /* a mail forwarder (Obsolete - use MX) */ +#define DNS_RRTYPE_CNAME 5 /* the canonical name for an alias */ +#define DNS_RRTYPE_SOA 6 /* marks the start of a zone of authority */ +#define DNS_RRTYPE_MB 7 /* a mailbox domain name (EXPERIMENTAL) */ +#define DNS_RRTYPE_MG 8 /* a mail group member (EXPERIMENTAL) */ +#define DNS_RRTYPE_MR 9 /* a mail rename domain name (EXPERIMENTAL) */ +#define DNS_RRTYPE_NULL 10 /* a null RR (EXPERIMENTAL) */ +#define DNS_RRTYPE_WKS 11 /* a well known service description */ +#define DNS_RRTYPE_PTR 12 /* a domain name pointer */ +#define DNS_RRTYPE_HINFO 13 /* host information */ +#define DNS_RRTYPE_MINFO 14 /* mailbox or mail list information */ +#define DNS_RRTYPE_MX 15 /* mail exchange */ +#define DNS_RRTYPE_TXT 16 /* text strings */ + +/** DNS field CLASS used for "Resource Records" */ +#define DNS_RRCLASS_IN 1 /* the Internet */ +#define DNS_RRCLASS_CS 2 /* the CSNET class (Obsolete - used only for examples in some obsolete RFCs) */ +#define DNS_RRCLASS_CH 3 /* the CHAOS class */ +#define DNS_RRCLASS_HS 4 /* Hesiod [Dyer 87] */ +#define DNS_RRCLASS_FLUSH 0x800 /* Flush bit */ + +/** Callback which is invoked when a hostname is found. + * A function of this type must be implemented by the application using the DNS resolver. + * @param name pointer to the name that was looked up. + * @param ipaddr pointer to a struct ip_addr containing the IP address of the hostname, + * or NULL if the name could not be found (or on any other error). + * @param callback_arg a user-specified callback argument passed to dns_gethostbyname +*/ +typedef void (*dns_found_callback)(const char *name, struct ip_addr *ipaddr, void *callback_arg); + + +void dns_init(void); + +void dns_tmr(void); + +void dns_setserver(u8_t numdns, struct ip_addr *dnsserver); + +struct ip_addr dns_getserver(u8_t numdns); + +err_t dns_gethostbyname(const char *hostname, struct ip_addr *addr, + dns_found_callback found, void *callback_arg); + +#if DNS_LOCAL_HOSTLIST && DNS_LOCAL_HOSTLIST_IS_DYNAMIC +int dns_local_removehost(const char *hostname, const struct ip_addr *addr); +err_t dns_local_addhost(const char *hostname, const struct ip_addr *addr); +#endif /* DNS_LOCAL_HOSTLIST && DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + +#endif /* LWIP_DNS */ + +#endif /* __LWIP_DNS_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/err.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/err.h new file mode 100644 index 0000000..792f276 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/err.h @@ -0,0 +1,89 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_ERR_H__ +#define __LWIP_ERR_H__ + +#include "lwip/opt.h" +#include "lwip/arch.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** Define LWIP_ERR_T in cc.h if you want to use + * a different type for your platform (must be signed). */ +#ifdef LWIP_ERR_T +typedef LWIP_ERR_T err_t; +#else /* LWIP_ERR_T */ + typedef s8_t err_t; +#endif /* LWIP_ERR_T*/ + +/* Definitions for error constants. */ + +#define ERR_OK 0 /* No error, everything OK. */ +#define ERR_MEM -1 /* Out of memory error. */ +#define ERR_BUF -2 /* Buffer error. */ +#define ERR_TIMEOUT -3 /* Timeout. */ +#define ERR_RTE -4 /* Routing problem. */ + +#define ERR_IS_FATAL(e) ((e) < ERR_RTE) + +#define ERR_ABRT -5 /* Connection aborted. */ +#define ERR_RST -6 /* Connection reset. */ +#define ERR_CLSD -7 /* Connection closed. */ +#define ERR_CONN -8 /* Not connected. */ + +#define ERR_VAL -9 /* Illegal value. */ + +#define ERR_ARG -10 /* Illegal argument. */ + +#define ERR_USE -11 /* Address in use. */ + +#define ERR_IF -12 /* Low-level netif error */ +#define ERR_ISCONN -13 /* Already connected. */ + +#define ERR_INPROGRESS -14 /* Operation in progress */ + + +#ifdef LWIP_DEBUG +extern const char *lwip_strerr(err_t err); +#else +#define lwip_strerr(x) "" +#endif /* LWIP_DEBUG */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_ERR_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/init.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/init.h new file mode 100644 index 0000000..a86e0d9 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/init.h @@ -0,0 +1,74 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_INIT_H__ +#define __LWIP_INIT_H__ + +#include "lwip/opt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** X.x.x: Major version of the stack */ +#define LWIP_VERSION_MAJOR 1U +/** x.X.x: Minor version of the stack */ +#define LWIP_VERSION_MINOR 3U +/** x.x.X: Revision of the stack */ +#define LWIP_VERSION_REVISION 2U +/** For release candidates, this is set to 1..254 + * For official releases, this is set to 255 (LWIP_RC_RELEASE) + * For development versions (CVS), this is set to 0 (LWIP_RC_DEVELOPMENT) */ +#define LWIP_VERSION_RC 255U + +/** LWIP_VERSION_RC is set to LWIP_RC_RELEASE for official releases */ +#define LWIP_RC_RELEASE 255U +/** LWIP_VERSION_RC is set to LWIP_RC_DEVELOPMENT for CVS versions */ +#define LWIP_RC_DEVELOPMENT 0U + +#define LWIP_VERSION_IS_RELEASE (LWIP_VERSION_RC == LWIP_RC_RELEASE) +#define LWIP_VERSION_IS_DEVELOPMENT (LWIP_VERSION_RC == LWIP_RC_DEVELOPMENT) +#define LWIP_VERSION_IS_RC ((LWIP_VERSION_RC != LWIP_RC_RELEASE) && (LWIP_VERSION_RC != LWIP_RC_DEVELOPMENT)) + +/** Provides the version of the stack */ +#define LWIP_VERSION (LWIP_VERSION_MAJOR << 24 | LWIP_VERSION_MINOR << 16 | \ + LWIP_VERSION_REVISION << 8 | LWIP_VERSION_RC) + +/* Modules initialization */ +void lwip_init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_INIT_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/mem.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/mem.h new file mode 100644 index 0000000..327229e --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/mem.h @@ -0,0 +1,109 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_MEM_H__ +#define __LWIP_MEM_H__ + +#include "lwip/opt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if MEM_LIBC_MALLOC + +#include /* for size_t */ + +typedef size_t mem_size_t; + +/* aliases for C library malloc() */ +#define mem_init() +/* in case C library malloc() needs extra protection, + * allow these defines to be overridden. + */ +#ifndef mem_free +#define mem_free free +#endif +#ifndef mem_malloc +#define mem_malloc malloc +#endif +#ifndef mem_calloc +#define mem_calloc calloc +#endif +#ifndef mem_realloc +static void *mem_realloc(void *mem, mem_size_t size) +{ + LWIP_UNUSED_ARG(size); + return mem; +} +#endif +#else /* MEM_LIBC_MALLOC */ + +/* MEM_SIZE would have to be aligned, but using 64000 here instead of + * 65535 leaves some room for alignment... + */ +#if MEM_SIZE > 64000l +typedef u32_t mem_size_t; +#else +typedef u16_t mem_size_t; +#endif /* MEM_SIZE > 64000 */ + +#if MEM_USE_POOLS +/** mem_init is not used when using pools instead of a heap */ +#define mem_init() +/** mem_realloc is not used when using pools instead of a heap: + we can't free part of a pool element and don't want to copy the rest */ +#define mem_realloc(mem, size) (mem) +#else /* MEM_USE_POOLS */ +/* lwIP alternative malloc */ +void mem_init(void); +void *mem_realloc(void *mem, mem_size_t size); +#endif /* MEM_USE_POOLS */ +void *mem_malloc(mem_size_t size); +void *mem_calloc(mem_size_t count, mem_size_t size); +void mem_free(void *mem); +#endif /* MEM_LIBC_MALLOC */ + +#ifndef LWIP_MEM_ALIGN_SIZE +#define LWIP_MEM_ALIGN_SIZE(size) (((size) + MEM_ALIGNMENT - 1) & ~(MEM_ALIGNMENT-1)) +#endif + +#ifndef LWIP_MEM_ALIGN +#define LWIP_MEM_ALIGN(addr) ((void *)(((mem_ptr_t)(addr) + MEM_ALIGNMENT - 1) & ~(mem_ptr_t)(MEM_ALIGNMENT-1))) +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_MEM_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/memp.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/memp.h new file mode 100644 index 0000000..3de7bf9 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/memp.h @@ -0,0 +1,118 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#ifndef __LWIP_MEMP_H__ +#define __LWIP_MEMP_H__ + +#include "lwip/opt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* Create the list of all memory pools managed by memp. MEMP_MAX represents a NULL pool at the end */ +typedef enum { +#define LWIP_MEMPOOL(name,num,size,desc) MEMP_##name, +#include "lwip/memp_std.h" + MEMP_MAX +} memp_t; + +#if MEM_USE_POOLS +/* Use a helper type to get the start and end of the user "memory pools" for mem_malloc */ +typedef enum { + /* Get the first (via: + MEMP_POOL_HELPER_START = ((u8_t) 1*MEMP_POOL_A + 0*MEMP_POOL_B + 0*MEMP_POOL_C + 0)*/ + MEMP_POOL_HELPER_FIRST = ((u8_t) +#define LWIP_MEMPOOL(name,num,size,desc) +#define LWIP_MALLOC_MEMPOOL_START 1 +#define LWIP_MALLOC_MEMPOOL(num, size) * MEMP_POOL_##size + 0 +#define LWIP_MALLOC_MEMPOOL_END +#include "lwip/memp_std.h" + ) , + /* Get the last (via: + MEMP_POOL_HELPER_END = ((u8_t) 0 + MEMP_POOL_A*0 + MEMP_POOL_B*0 + MEMP_POOL_C*1) */ + MEMP_POOL_HELPER_LAST = ((u8_t) +#define LWIP_MEMPOOL(name,num,size,desc) +#define LWIP_MALLOC_MEMPOOL_START +#define LWIP_MALLOC_MEMPOOL(num, size) 0 + MEMP_POOL_##size * +#define LWIP_MALLOC_MEMPOOL_END 1 +#include "lwip/memp_std.h" + ) +} memp_pool_helper_t; + +/* The actual start and stop values are here (cast them over) + We use this helper type and these defines so we can avoid using const memp_t values */ +#define MEMP_POOL_FIRST ((memp_t) MEMP_POOL_HELPER_FIRST) +#define MEMP_POOL_LAST ((memp_t) MEMP_POOL_HELPER_LAST) +#endif /* MEM_USE_POOLS */ + +#if MEMP_MEM_MALLOC || MEM_USE_POOLS +extern const u16_t memp_sizes[MEMP_MAX]; +#endif /* MEMP_MEM_MALLOC || MEM_USE_POOLS */ + +#if MEMP_MEM_MALLOC + +#include "mem.h" + +#define memp_init() +#define memp_malloc(type) mem_malloc(memp_sizes[type]) +#define memp_free(type, mem) mem_free(mem) + +#else /* MEMP_MEM_MALLOC */ + +#if MEM_USE_POOLS +/** This structure is used to save the pool one element came from. */ +struct memp_malloc_helper +{ + memp_t poolnr; +}; +#endif /* MEM_USE_POOLS */ + +void memp_init(void); + +#if MEMP_OVERFLOW_CHECK +void *memp_malloc_fn(memp_t type, const char* file, const int line); +#define memp_malloc(t) memp_malloc_fn((t), __FILE__, __LINE__) +#else +void *memp_malloc(memp_t type); +#endif +void memp_free(memp_t type, void *mem); + +#endif /* MEMP_MEM_MALLOC */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_MEMP_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/memp_std.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/memp_std.h new file mode 100644 index 0000000..d8d4945 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/memp_std.h @@ -0,0 +1,104 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * SETUP: Make sure we define everything we will need. + * + * We have create three types of pools: + * 1) MEMPOOL - standard pools + * 2) MALLOC_MEMPOOL - to be used by mem_malloc in mem.c + * 3) PBUF_MEMPOOL - a mempool of pbuf's, so include space for the pbuf struct + * + * If the include'r doesn't require any special treatment of each of the types + * above, then will declare #2 & #3 to be just standard mempools. + */ +#ifndef LWIP_MALLOC_MEMPOOL +/* This treats "malloc pools" just like any other pool. + The pools are a little bigger to provide 'size' as the amount of user data. */ +#define LWIP_MALLOC_MEMPOOL(num, size) LWIP_MEMPOOL(POOL_##size, num, (size + sizeof(struct memp_malloc_helper)), "MALLOC_"#size) +#define LWIP_MALLOC_MEMPOOL_START +#define LWIP_MALLOC_MEMPOOL_END +#endif /* LWIP_MALLOC_MEMPOOL */ + +#ifndef LWIP_PBUF_MEMPOOL +/* This treats "pbuf pools" just like any other pool. + * Allocates buffers for a pbuf struct AND a payload size */ +#define LWIP_PBUF_MEMPOOL(name, num, payload, desc) LWIP_MEMPOOL(name, num, (MEMP_ALIGN_SIZE(sizeof(struct pbuf)) + MEMP_ALIGN_SIZE(payload)), desc) +#endif /* LWIP_PBUF_MEMPOOL */ + + +/* + * A list of internal pools used by LWIP. + * + * LWIP_MEMPOOL(pool_name, number_elements, element_size, pool_description) + * creates a pool name MEMP_pool_name. description is used in stats.c + */ +#if LWIP_RAW +LWIP_MEMPOOL(RAW_PCB, MEMP_NUM_RAW_PCB, sizeof(struct raw_pcb), "RAW_PCB") +#endif /* LWIP_RAW */ + +#if LWIP_UDP +LWIP_MEMPOOL(UDP_PCB, MEMP_NUM_UDP_PCB, sizeof(struct udp_pcb), "UDP_PCB") +#endif /* LWIP_UDP */ + +#if LWIP_TCP +LWIP_MEMPOOL(TCP_PCB, MEMP_NUM_TCP_PCB, sizeof(struct tcp_pcb), "TCP_PCB") +LWIP_MEMPOOL(TCP_PCB_LISTEN, MEMP_NUM_TCP_PCB_LISTEN, sizeof(struct tcp_pcb_listen), "TCP_PCB_LISTEN") +LWIP_MEMPOOL(TCP_SEG, MEMP_NUM_TCP_SEG, sizeof(struct tcp_seg), "TCP_SEG") +#endif /* LWIP_TCP */ + +#if IP_REASSEMBLY +LWIP_MEMPOOL(REASSDATA, MEMP_NUM_REASSDATA, sizeof(struct ip_reassdata), "REASSDATA") +#endif /* IP_REASSEMBLY */ + +#if LWIP_NETCONN +LWIP_MEMPOOL(NETBUF, MEMP_NUM_NETBUF, sizeof(struct netbuf), "NETBUF") +LWIP_MEMPOOL(NETCONN, MEMP_NUM_NETCONN, sizeof(struct netconn), "NETCONN") +#endif /* LWIP_NETCONN */ + +#if NO_SYS==0 +LWIP_MEMPOOL(TCPIP_MSG_API, MEMP_NUM_TCPIP_MSG_API, sizeof(struct tcpip_msg), "TCPIP_MSG_API") +LWIP_MEMPOOL(TCPIP_MSG_INPKT,MEMP_NUM_TCPIP_MSG_INPKT, sizeof(struct tcpip_msg), "TCPIP_MSG_INPKT") +#endif /* NO_SYS==0 */ + +#if ARP_QUEUEING +LWIP_MEMPOOL(ARP_QUEUE, MEMP_NUM_ARP_QUEUE, sizeof(struct etharp_q_entry), "ARP_QUEUE") +#endif /* ARP_QUEUEING */ + +#if LWIP_IGMP +LWIP_MEMPOOL(IGMP_GROUP, MEMP_NUM_IGMP_GROUP, sizeof(struct igmp_group), "IGMP_GROUP") +#endif /* LWIP_IGMP */ + +#if NO_SYS==0 +LWIP_MEMPOOL(SYS_TIMEOUT, MEMP_NUM_SYS_TIMEOUT, sizeof(struct sys_timeo), "SYS_TIMEOUT") +#endif /* NO_SYS==0 */ + + +/* + * A list of pools of pbuf's used by LWIP. + * + * LWIP_PBUF_MEMPOOL(pool_name, number_elements, pbuf_payload_size, pool_description) + * creates a pool name MEMP_pool_name. description is used in stats.c + * This allocates enough space for the pbuf struct and a payload. + * (Example: pbuf_payload_size=0 allocates only size for the struct) + */ +LWIP_PBUF_MEMPOOL(PBUF, MEMP_NUM_PBUF, 0, "PBUF_REF/ROM") +LWIP_PBUF_MEMPOOL(PBUF_POOL, PBUF_POOL_SIZE, PBUF_POOL_BUFSIZE, "PBUF_POOL") + + +/* + * Allow for user-defined pools; this must be explicitly set in lwipopts.h + * since the default is to NOT look for lwippools.h + */ +#if MEMP_USE_CUSTOM_POOLS +#include "lwippools.h" +#endif /* MEMP_USE_CUSTOM_POOLS */ + +/* + * REQUIRED CLEANUP: Clear up so we don't get "multiply defined" error later + * (#undef is ignored for something that is not defined) + */ +#undef LWIP_MEMPOOL +#undef LWIP_MALLOC_MEMPOOL +#undef LWIP_MALLOC_MEMPOOL_START +#undef LWIP_MALLOC_MEMPOOL_END +#undef LWIP_PBUF_MEMPOOL diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/netbuf.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/netbuf.h new file mode 100644 index 0000000..ab9ea33 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/netbuf.h @@ -0,0 +1,88 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_NETBUF_H__ +#define __LWIP_NETBUF_H__ + +#include "lwip/opt.h" +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" + +#ifdef __cplusplus +extern "C" { +#endif + +struct netbuf { + struct pbuf *p, *ptr; + struct ip_addr *addr; + u16_t port; +#if LWIP_NETBUF_RECVINFO + struct ip_addr *toaddr; + u16_t toport; +#endif /* LWIP_NETBUF_RECVINFO */ +}; + +/* Network buffer functions: */ +struct netbuf * netbuf_new (void); +void netbuf_delete (struct netbuf *buf); +void * netbuf_alloc (struct netbuf *buf, u16_t size); +void netbuf_free (struct netbuf *buf); +err_t netbuf_ref (struct netbuf *buf, + const void *dataptr, u16_t size); +void netbuf_chain (struct netbuf *head, + struct netbuf *tail); + +u16_t netbuf_len (struct netbuf *buf); +err_t netbuf_data (struct netbuf *buf, + void **dataptr, u16_t *len); +s8_t netbuf_next (struct netbuf *buf); +void netbuf_first (struct netbuf *buf); + + +#define netbuf_copy_partial(buf, dataptr, len, offset) \ + pbuf_copy_partial((buf)->p, (dataptr), (len), (offset)) +#define netbuf_copy(buf,dataptr,len) netbuf_copy_partial(buf, dataptr, len, 0) +#define netbuf_take(buf, dataptr, len) pbuf_take((buf)->p, dataptr, len) +#define netbuf_len(buf) ((buf)->p->tot_len) +#define netbuf_fromaddr(buf) ((buf)->addr) +#define netbuf_fromport(buf) ((buf)->port) +#if LWIP_NETBUF_RECVINFO +#define netbuf_destaddr(buf) ((buf)->toaddr) +#define netbuf_destport(buf) ((buf)->toport) +#endif /* LWIP_NETBUF_RECVINFO */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_NETBUF_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/netdb.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/netdb.h new file mode 100644 index 0000000..c59c3a4 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/netdb.h @@ -0,0 +1,113 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Simon Goldschmidt + * + */ + +#include "lwip/opt.h" + +#if LWIP_DNS && LWIP_SOCKET + +#include /* for size_t */ + +#include "lwip/sockets.h" + +/* some rarely used options */ +#ifndef LWIP_DNS_API_DECLARE_H_ERRNO +#define LWIP_DNS_API_DECLARE_H_ERRNO 1 +#endif + +#ifndef LWIP_DNS_API_DEFINE_ERRORS +#define LWIP_DNS_API_DEFINE_ERRORS 1 +#endif + +#ifndef LWIP_DNS_API_DECLARE_STRUCTS +#define LWIP_DNS_API_DECLARE_STRUCTS 1 +#endif + +#if LWIP_DNS_API_DEFINE_ERRORS +/** Errors used by the DNS API functions, h_errno can be one of them */ +#define EAI_NONAME 200 +#define EAI_SERVICE 201 +#define EAI_FAIL 202 +#define EAI_MEMORY 203 + +#define HOST_NOT_FOUND 210 +#define NO_DATA 211 +#define NO_RECOVERY 212 +#define TRY_AGAIN 213 +#endif /* LWIP_DNS_API_DEFINE_ERRORS */ + +#if LWIP_DNS_API_DECLARE_STRUCTS +struct hostent { + char *h_name; /* Official name of the host. */ + char **h_aliases; /* A pointer to an array of pointers to alternative host names, + terminated by a null pointer. */ + int h_addrtype; /* Address type. */ + int h_length; /* The length, in bytes, of the address. */ + char **h_addr_list; /* A pointer to an array of pointers to network addresses (in + network byte order) for the host, terminated by a null pointer. */ +#define h_addr h_addr_list[0] /* for backward compatibility */ +}; + +struct addrinfo { + int ai_flags; /* Input flags. */ + int ai_family; /* Address family of socket. */ + int ai_socktype; /* Socket type. */ + int ai_protocol; /* Protocol of socket. */ + socklen_t ai_addrlen; /* Length of socket address. */ + struct sockaddr *ai_addr; /* Socket address of socket. */ + char *ai_canonname; /* Canonical name of service location. */ + struct addrinfo *ai_next; /* Pointer to next in list. */ +}; +#endif /* LWIP_DNS_API_DECLARE_STRUCTS */ + +#if LWIP_DNS_API_DECLARE_H_ERRNO +/* application accessable error code set by the DNS API functions */ +extern int h_errno; +#endif /* LWIP_DNS_API_DECLARE_H_ERRNO*/ + +struct hostent *lwip_gethostbyname(const char *name); +int lwip_gethostbyname_r(const char *name, struct hostent *ret, char *buf, + size_t buflen, struct hostent **result, int *h_errnop); +void lwip_freeaddrinfo(struct addrinfo *ai); +int lwip_getaddrinfo(const char *nodename, + const char *servname, + const struct addrinfo *hints, + struct addrinfo **res); + +#if LWIP_COMPAT_SOCKETS +#define gethostbyname(name) lwip_gethostbyname(name) +#define gethostbyname_r(name, ret, buf, buflen, result, h_errnop) \ + lwip_gethostbyname_r(name, ret, buf, buflen, result, h_errnop) +#define freeaddrinfo(addrinfo) lwip_freeaddrinfo(addrinfo) +#define getaddrinfo(nodname, servname, hints, res) \ + lwip_getaddrinfo(nodname, servname, hints, res) +#endif /* LWIP_COMPAT_SOCKETS */ + +#endif /* LWIP_DNS && LWIP_SOCKET */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/netif.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/netif.h new file mode 100644 index 0000000..8e650d7 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/netif.h @@ -0,0 +1,265 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_NETIF_H__ +#define __LWIP_NETIF_H__ + +#include "lwip/opt.h" + +#define ENABLE_LOOPBACK (LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF) + +#include "lwip/err.h" + +#include "lwip/ip_addr.h" + +#include "lwip/inet.h" +#include "lwip/pbuf.h" +#if LWIP_DHCP +struct dhcp; +#endif +#if LWIP_AUTOIP +struct autoip; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/* Throughout this file, IP addresses are expected to be in + * the same byte order as in IP_PCB. */ + +/** must be the maximum of all used hardware address lengths + across all types of interfaces in use */ +#define NETIF_MAX_HWADDR_LEN 6U + +/** TODO: define the use (where, when, whom) of netif flags */ + +/** whether the network interface is 'up'. this is + * a software flag used to control whether this network + * interface is enabled and processes traffic. + */ +#define NETIF_FLAG_UP 0x01U +/** if set, the netif has broadcast capability */ +#define NETIF_FLAG_BROADCAST 0x02U +/** if set, the netif is one end of a point-to-point connection */ +#define NETIF_FLAG_POINTTOPOINT 0x04U +/** if set, the interface is configured using DHCP */ +#define NETIF_FLAG_DHCP 0x08U +/** if set, the interface has an active link + * (set by the network interface driver) */ +#define NETIF_FLAG_LINK_UP 0x10U +/** if set, the netif is an device using ARP */ +#define NETIF_FLAG_ETHARP 0x20U +/** if set, the netif has IGMP capability */ +#define NETIF_FLAG_IGMP 0x40U + +/** Generic data structure used for all lwIP network interfaces. + * The following fields should be filled in by the initialization + * function for the device driver: hwaddr_len, hwaddr[], mtu, flags */ + +struct netif { + /** pointer to next in linked list */ + struct netif *next; + + /** IP address configuration in network byte order */ + struct ip_addr ip_addr; + struct ip_addr netmask; + struct ip_addr gw; + + /** This function is called by the network device driver + * to pass a packet up the TCP/IP stack. */ + err_t (* input)(struct pbuf *p, struct netif *inp); + /** This function is called by the IP module when it wants + * to send a packet on the interface. This function typically + * first resolves the hardware address, then sends the packet. */ + err_t (* output)(struct netif *netif, struct pbuf *p, + struct ip_addr *ipaddr); + /** This function is called by the ARP module when it wants + * to send a packet on the interface. This function outputs + * the pbuf as-is on the link medium. */ + err_t (* linkoutput)(struct netif *netif, struct pbuf *p); +#if LWIP_NETIF_STATUS_CALLBACK + /** This function is called when the netif state is set to up or down + */ + void (* status_callback)(struct netif *netif); +#endif /* LWIP_NETIF_STATUS_CALLBACK */ +#if LWIP_NETIF_LINK_CALLBACK + /** This function is called when the netif link is set to up or down + */ + void (* link_callback)(struct netif *netif); +#endif /* LWIP_NETIF_LINK_CALLBACK */ + /** This field can be set by the device driver and could point + * to state information for the device. */ + void *state; +#if LWIP_DHCP + /** the DHCP client state information for this netif */ + struct dhcp *dhcp; +#endif /* LWIP_DHCP */ +#if LWIP_AUTOIP + /** the AutoIP client state information for this netif */ + struct autoip *autoip; +#endif +#if LWIP_NETIF_HOSTNAME + /* the hostname for this netif, NULL is a valid value */ + char* hostname; +#endif /* LWIP_NETIF_HOSTNAME */ + /** maximum transfer unit (in bytes) */ + u16_t mtu; + /** number of bytes used in hwaddr */ + u8_t hwaddr_len; + /** link level hardware address of this interface */ + u8_t hwaddr[NETIF_MAX_HWADDR_LEN]; + /** flags (see NETIF_FLAG_ above) */ + u8_t flags; + /** descriptive abbreviation */ + char name[2]; + /** number of this interface */ + u8_t num; +#if LWIP_SNMP + /** link type (from "snmp_ifType" enum from snmp.h) */ + u8_t link_type; + /** (estimate) link speed */ + u32_t link_speed; + /** timestamp at last change made (up/down) */ + u32_t ts; + /** counters */ + u32_t ifinoctets; + u32_t ifinucastpkts; + u32_t ifinnucastpkts; + u32_t ifindiscards; + u32_t ifoutoctets; + u32_t ifoutucastpkts; + u32_t ifoutnucastpkts; + u32_t ifoutdiscards; +#endif /* LWIP_SNMP */ +#if LWIP_IGMP + /* This function could be called to add or delete a entry in the multicast filter table of the ethernet MAC.*/ + err_t (*igmp_mac_filter)( struct netif *netif, struct ip_addr *group, u8_t action); +#endif /* LWIP_IGMP */ +#if LWIP_NETIF_HWADDRHINT + u8_t *addr_hint; +#endif /* LWIP_NETIF_HWADDRHINT */ +#if ENABLE_LOOPBACK + /* List of packets to be queued for ourselves. */ + struct pbuf *loop_first; + struct pbuf *loop_last; +#if LWIP_LOOPBACK_MAX_PBUFS + u16_t loop_cnt_current; +#endif /* LWIP_LOOPBACK_MAX_PBUFS */ +#endif /* ENABLE_LOOPBACK */ +}; + +#if LWIP_SNMP +#define NETIF_INIT_SNMP(netif, type, speed) \ + /* use "snmp_ifType" enum from snmp.h for "type", snmp_ifType_ethernet_csmacd by example */ \ + netif->link_type = type; \ + /* your link speed here (units: bits per second) */ \ + netif->link_speed = speed; \ + netif->ts = 0; \ + netif->ifinoctets = 0; \ + netif->ifinucastpkts = 0; \ + netif->ifinnucastpkts = 0; \ + netif->ifindiscards = 0; \ + netif->ifoutoctets = 0; \ + netif->ifoutucastpkts = 0; \ + netif->ifoutnucastpkts = 0; \ + netif->ifoutdiscards = 0 +#else /* LWIP_SNMP */ +#define NETIF_INIT_SNMP(netif, type, speed) +#endif /* LWIP_SNMP */ + + +/** The list of network interfaces. */ +extern struct netif *netif_list; +/** The default network interface. */ +extern struct netif *netif_default; + +#define netif_init() /* Compatibility define, not init needed. */ + +struct netif *netif_add(struct netif *netif, struct ip_addr *ipaddr, struct ip_addr *netmask, + struct ip_addr *gw, + void *state, + err_t (* init)(struct netif *netif), + err_t (* input)(struct pbuf *p, struct netif *netif)); + +void +netif_set_addr(struct netif *netif,struct ip_addr *ipaddr, struct ip_addr *netmask, + struct ip_addr *gw); +void netif_remove(struct netif * netif); + +/* Returns a network interface given its name. The name is of the form + "et0", where the first two letters are the "name" field in the + netif structure, and the digit is in the num field in the same + structure. */ +struct netif *netif_find(char *name); + +void netif_set_default(struct netif *netif); + +void netif_set_ipaddr(struct netif *netif, struct ip_addr *ipaddr); +void netif_set_netmask(struct netif *netif, struct ip_addr *netmask); +void netif_set_gw(struct netif *netif, struct ip_addr *gw); + +void netif_set_up(struct netif *netif); +void netif_set_down(struct netif *netif); +u8_t netif_is_up(struct netif *netif); + +#if LWIP_NETIF_STATUS_CALLBACK +/* + * Set callback to be called when interface is brought up/down + */ +void netif_set_status_callback(struct netif *netif, void (* status_callback)(struct netif *netif)); +#endif /* LWIP_NETIF_STATUS_CALLBACK */ + +#if LWIP_NETIF_LINK_CALLBACK +void netif_set_link_up(struct netif *netif); +void netif_set_link_down(struct netif *netif); +u8_t netif_is_link_up(struct netif *netif); +/* + * Set callback to be called when link is brought up/down + */ +void netif_set_link_callback(struct netif *netif, void (* link_callback)(struct netif *netif)); +#endif /* LWIP_NETIF_LINK_CALLBACK */ + +#ifdef __cplusplus +} +#endif + +#if ENABLE_LOOPBACK +err_t netif_loop_output(struct netif *netif, struct pbuf *p, struct ip_addr *dest_ip); +void netif_poll(struct netif *netif); +#if !LWIP_NETIF_LOOPBACK_MULTITHREADING +void netif_poll_all(void); +#endif /* !LWIP_NETIF_LOOPBACK_MULTITHREADING */ +#endif /* ENABLE_LOOPBACK */ + +#endif /* __LWIP_NETIF_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/netifapi.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/netifapi.h new file mode 100644 index 0000000..22d8690 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/netifapi.h @@ -0,0 +1,107 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + */ + +#ifndef __LWIP_NETIFAPI_H__ +#define __LWIP_NETIFAPI_H__ + +#include "lwip/opt.h" + +#if LWIP_NETIF_API /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/sys.h" +#include "lwip/netif.h" +#include "lwip/dhcp.h" +#include "lwip/autoip.h" + +#ifdef __cplusplus +extern "C" { +#endif + +struct netifapi_msg_msg { +#if !LWIP_TCPIP_CORE_LOCKING + sys_sem_t sem; +#endif /* !LWIP_TCPIP_CORE_LOCKING */ + err_t err; + struct netif *netif; + union { + struct { + struct ip_addr *ipaddr; + struct ip_addr *netmask; + struct ip_addr *gw; + void *state; + err_t (* init) (struct netif *netif); + err_t (* input)(struct pbuf *p, struct netif *netif); + } add; + struct { + void (* voidfunc)(struct netif *netif); + err_t (* errtfunc)(struct netif *netif); + } common; + } msg; +}; + +struct netifapi_msg { + void (* function)(struct netifapi_msg_msg *msg); + struct netifapi_msg_msg msg; +}; + + +/* API for application */ +err_t netifapi_netif_add ( struct netif *netif, + struct ip_addr *ipaddr, + struct ip_addr *netmask, + struct ip_addr *gw, + void *state, + err_t (* init)(struct netif *netif), + err_t (* input)(struct pbuf *p, struct netif *netif) ); + +err_t netifapi_netif_set_addr ( struct netif *netif, + struct ip_addr *ipaddr, + struct ip_addr *netmask, + struct ip_addr *gw ); + +err_t netifapi_netif_common ( struct netif *netif, + void (* voidfunc)(struct netif *netif), + err_t (* errtfunc)(struct netif *netif) ); + +#define netifapi_netif_remove(n) netifapi_netif_common(n, netif_remove, NULL) +#define netifapi_netif_set_up(n) netifapi_netif_common(n, netif_set_up, NULL) +#define netifapi_netif_set_down(n) netifapi_netif_common(n, netif_set_down, NULL) +#define netifapi_netif_set_default(n) netifapi_netif_common(n, netif_set_default, NULL) +#define netifapi_dhcp_start(n) netifapi_netif_common(n, NULL, dhcp_start) +#define netifapi_dhcp_stop(n) netifapi_netif_common(n, dhcp_stop, NULL) +#define netifapi_autoip_start(n) netifapi_netif_common(n, NULL, autoip_start) +#define netifapi_autoip_stop(n) netifapi_netif_common(n, NULL, autoip_stop) + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_NETIF_API */ + +#endif /* __LWIP_NETIFAPI_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/opt.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/opt.h new file mode 100644 index 0000000..f70f646 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/opt.h @@ -0,0 +1,1842 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * + * lwIP Options Configuration + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_OPT_H__ +#define __LWIP_OPT_H__ + +/* + * Include user defined options first. Anything not defined in these files + * will be set to standard values. Override anything you dont like! + */ +#include "lwipopts.h" +#include "lwip/debug.h" + +/* + ----------------------------------------------- + ---------- Platform specific locking ---------- + ----------------------------------------------- +*/ + +/** + * SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain + * critical regions during buffer allocation, deallocation and memory + * allocation and deallocation. + */ +#ifndef SYS_LIGHTWEIGHT_PROT +#define SYS_LIGHTWEIGHT_PROT 0 +#endif + +/** + * NO_SYS==1: Provides VERY minimal functionality. Otherwise, + * use lwIP facilities. + */ +#ifndef NO_SYS +#define NO_SYS 0 +#endif + +/** + * MEMCPY: override this if you have a faster implementation at hand than the + * one included in your C library + */ +#ifndef MEMCPY +#define MEMCPY(dst,src,len) memcpy(dst,src,len) +#endif + +/** + * SMEMCPY: override this with care! Some compilers (e.g. gcc) can inline a + * call to memcpy() if the length is known at compile time and is small. + */ +#ifndef SMEMCPY +#define SMEMCPY(dst,src,len) memcpy(dst,src,len) +#endif + +/* + ------------------------------------ + ---------- Memory options ---------- + ------------------------------------ +*/ +/** + * MEM_LIBC_MALLOC==1: Use malloc/free/realloc provided by your C-library + * instead of the lwip internal allocator. Can save code size if you + * already use it. + */ +#ifndef MEM_LIBC_MALLOC +#define MEM_LIBC_MALLOC 0 +#endif + +/** +* MEMP_MEM_MALLOC==1: Use mem_malloc/mem_free instead of the lwip pool allocator. +* Especially useful with MEM_LIBC_MALLOC but handle with care regarding execution +* speed and usage from interrupts! +*/ +#ifndef MEMP_MEM_MALLOC +#define MEMP_MEM_MALLOC 0 +#endif + +/** + * MEM_ALIGNMENT: should be set to the alignment of the CPU + * 4 byte alignment -> #define MEM_ALIGNMENT 4 + * 2 byte alignment -> #define MEM_ALIGNMENT 2 + */ +#ifndef MEM_ALIGNMENT +#define MEM_ALIGNMENT 1 +#endif + +/** + * MEM_SIZE: the size of the heap memory. If the application will send + * a lot of data that needs to be copied, this should be set high. + */ +#ifndef MEM_SIZE +#define MEM_SIZE 1600 +#endif + +/** + * MEMP_OVERFLOW_CHECK: memp overflow protection reserves a configurable + * amount of bytes before and after each memp element in every pool and fills + * it with a prominent default value. + * MEMP_OVERFLOW_CHECK == 0 no checking + * MEMP_OVERFLOW_CHECK == 1 checks each element when it is freed + * MEMP_OVERFLOW_CHECK >= 2 checks each element in every pool every time + * memp_malloc() or memp_free() is called (useful but slow!) + */ +#ifndef MEMP_OVERFLOW_CHECK +#define MEMP_OVERFLOW_CHECK 0 +#endif + +/** + * MEMP_SANITY_CHECK==1: run a sanity check after each memp_free() to make + * sure that there are no cycles in the linked lists. + */ +#ifndef MEMP_SANITY_CHECK +#define MEMP_SANITY_CHECK 0 +#endif + +/** + * MEM_USE_POOLS==1: Use an alternative to malloc() by allocating from a set + * of memory pools of various sizes. When mem_malloc is called, an element of + * the smallest pool that can provide the length needed is returned. + * To use this, MEMP_USE_CUSTOM_POOLS also has to be enabled. + */ +#ifndef MEM_USE_POOLS +#define MEM_USE_POOLS 0 +#endif + +/** + * MEM_USE_POOLS_TRY_BIGGER_POOL==1: if one malloc-pool is empty, try the next + * bigger pool - WARNING: THIS MIGHT WASTE MEMORY but it can make a system more + * reliable. */ +#ifndef MEM_USE_POOLS_TRY_BIGGER_POOL +#define MEM_USE_POOLS_TRY_BIGGER_POOL 0 +#endif + +/** + * MEMP_USE_CUSTOM_POOLS==1: whether to include a user file lwippools.h + * that defines additional pools beyond the "standard" ones required + * by lwIP. If you set this to 1, you must have lwippools.h in your + * inlude path somewhere. + */ +#ifndef MEMP_USE_CUSTOM_POOLS +#define MEMP_USE_CUSTOM_POOLS 0 +#endif + +/** + * Set this to 1 if you want to free PBUF_RAM pbufs (or call mem_free()) from + * interrupt context (or another context that doesn't allow waiting for a + * semaphore). + * If set to 1, mem_malloc will be protected by a semaphore and SYS_ARCH_PROTECT, + * while mem_free will only use SYS_ARCH_PROTECT. mem_malloc SYS_ARCH_UNPROTECTs + * with each loop so that mem_free can run. + * + * ATTENTION: As you can see from the above description, this leads to dis-/ + * enabling interrupts often, which can be slow! Also, on low memory, mem_malloc + * can need longer. + * + * If you don't want that, at least for NO_SYS=0, you can still use the following + * functions to enqueue a deallocation call which then runs in the tcpip_thread + * context: + * - pbuf_free_callback(p); + * - mem_free_callback(m); + */ +#ifndef LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT +#define LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT 0 +#endif + +/* + ------------------------------------------------ + ---------- Internal Memory Pool Sizes ---------- + ------------------------------------------------ +*/ +/** + * MEMP_NUM_PBUF: the number of memp struct pbufs (used for PBUF_ROM and PBUF_REF). + * If the application sends a lot of data out of ROM (or other static memory), + * this should be set high. + */ +#ifndef MEMP_NUM_PBUF +#define MEMP_NUM_PBUF 16 +#endif + +/** + * MEMP_NUM_RAW_PCB: Number of raw connection PCBs + * (requires the LWIP_RAW option) + */ +#ifndef MEMP_NUM_RAW_PCB +#define MEMP_NUM_RAW_PCB 4 +#endif + +/** + * MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One + * per active UDP "connection". + * (requires the LWIP_UDP option) + */ +#ifndef MEMP_NUM_UDP_PCB +#define MEMP_NUM_UDP_PCB 4 +#endif + +/** + * MEMP_NUM_TCP_PCB: the number of simulatenously active TCP connections. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_PCB +#define MEMP_NUM_TCP_PCB 5 +#endif + +/** + * MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP connections. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_PCB_LISTEN +#define MEMP_NUM_TCP_PCB_LISTEN 8 +#endif + +/** + * MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP segments. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_SEG +#define MEMP_NUM_TCP_SEG 16 +#endif + +/** + * MEMP_NUM_REASSDATA: the number of simultaneously IP packets queued for + * reassembly (whole packets, not fragments!) + */ +#ifndef MEMP_NUM_REASSDATA +#define MEMP_NUM_REASSDATA 5 +#endif + +/** + * MEMP_NUM_ARP_QUEUE: the number of simulateously queued outgoing + * packets (pbufs) that are waiting for an ARP request (to resolve + * their destination address) to finish. + * (requires the ARP_QUEUEING option) + */ +#ifndef MEMP_NUM_ARP_QUEUE +#define MEMP_NUM_ARP_QUEUE 30 +#endif + +/** + * MEMP_NUM_IGMP_GROUP: The number of multicast groups whose network interfaces + * can be members et the same time (one per netif - allsystems group -, plus one + * per netif membership). + * (requires the LWIP_IGMP option) + */ +#ifndef MEMP_NUM_IGMP_GROUP +#define MEMP_NUM_IGMP_GROUP 8 +#endif + +/** + * MEMP_NUM_SYS_TIMEOUT: the number of simulateously active timeouts. + * (requires NO_SYS==0) + */ +#ifndef MEMP_NUM_SYS_TIMEOUT +#define MEMP_NUM_SYS_TIMEOUT 3 +#endif + +/** + * MEMP_NUM_NETBUF: the number of struct netbufs. + * (only needed if you use the sequential API, like api_lib.c) + */ +#ifndef MEMP_NUM_NETBUF +#define MEMP_NUM_NETBUF 2 +#endif + +/** + * MEMP_NUM_NETCONN: the number of struct netconns. + * (only needed if you use the sequential API, like api_lib.c) + */ +#ifndef MEMP_NUM_NETCONN +#define MEMP_NUM_NETCONN 4 +#endif + +/** + * MEMP_NUM_TCPIP_MSG_API: the number of struct tcpip_msg, which are used + * for callback/timeout API communication. + * (only needed if you use tcpip.c) + */ +#ifndef MEMP_NUM_TCPIP_MSG_API +#define MEMP_NUM_TCPIP_MSG_API 8 +#endif + +/** + * MEMP_NUM_TCPIP_MSG_INPKT: the number of struct tcpip_msg, which are used + * for incoming packets. + * (only needed if you use tcpip.c) + */ +#ifndef MEMP_NUM_TCPIP_MSG_INPKT +#define MEMP_NUM_TCPIP_MSG_INPKT 8 +#endif + +/** + * PBUF_POOL_SIZE: the number of buffers in the pbuf pool. + */ +#ifndef PBUF_POOL_SIZE +#define PBUF_POOL_SIZE 16 +#endif + +/* + --------------------------------- + ---------- ARP options ---------- + --------------------------------- +*/ +/** + * LWIP_ARP==1: Enable ARP functionality. + */ +#ifndef LWIP_ARP +#define LWIP_ARP 1 +#endif + +/** + * ARP_TABLE_SIZE: Number of active MAC-IP address pairs cached. + */ +#ifndef ARP_TABLE_SIZE +#define ARP_TABLE_SIZE 10 +#endif + +/** + * ARP_QUEUEING==1: Outgoing packets are queued during hardware address + * resolution. + */ +#ifndef ARP_QUEUEING +#define ARP_QUEUEING 1 +#endif + +/** + * ETHARP_TRUST_IP_MAC==1: Incoming IP packets cause the ARP table to be + * updated with the source MAC and IP addresses supplied in the packet. + * You may want to disable this if you do not trust LAN peers to have the + * correct addresses, or as a limited approach to attempt to handle + * spoofing. If disabled, lwIP will need to make a new ARP request if + * the peer is not already in the ARP table, adding a little latency. + */ +#ifndef ETHARP_TRUST_IP_MAC +#define ETHARP_TRUST_IP_MAC 1 +#endif + +/** + * ETHARP_SUPPORT_VLAN==1: support receiving ethernet packets with VLAN header. + * Additionally, you can define ETHARP_VLAN_CHECK to an u16_t VLAN ID to check. + * If ETHARP_VLAN_CHECK is defined, only VLAN-traffic for this VLAN is accepted. + * If ETHARP_VLAN_CHECK is not defined, all traffic is accepted. + */ +#ifndef ETHARP_SUPPORT_VLAN +#define ETHARP_SUPPORT_VLAN 0 +#endif + +/* + -------------------------------- + ---------- IP options ---------- + -------------------------------- +*/ +/** + * IP_FORWARD==1: Enables the ability to forward IP packets across network + * interfaces. If you are going to run lwIP on a device with only one network + * interface, define this to 0. + */ +#ifndef IP_FORWARD +#define IP_FORWARD 0 +#endif + +/** + * IP_OPTIONS_ALLOWED: Defines the behavior for IP options. + * IP_OPTIONS_ALLOWED==0: All packets with IP options are dropped. + * IP_OPTIONS_ALLOWED==1: IP options are allowed (but not parsed). + */ +#ifndef IP_OPTIONS_ALLOWED +#define IP_OPTIONS_ALLOWED 1 +#endif + +/** + * IP_REASSEMBLY==1: Reassemble incoming fragmented IP packets. Note that + * this option does not affect outgoing packet sizes, which can be controlled + * via IP_FRAG. + */ +#ifndef IP_REASSEMBLY +#define IP_REASSEMBLY 1 +#endif + +/** + * IP_FRAG==1: Fragment outgoing IP packets if their size exceeds MTU. Note + * that this option does not affect incoming packet sizes, which can be + * controlled via IP_REASSEMBLY. + */ +#ifndef IP_FRAG +#define IP_FRAG 1 +#endif + +/** + * IP_REASS_MAXAGE: Maximum time (in multiples of IP_TMR_INTERVAL - so seconds, normally) + * a fragmented IP packet waits for all fragments to arrive. If not all fragments arrived + * in this time, the whole packet is discarded. + */ +#ifndef IP_REASS_MAXAGE +#define IP_REASS_MAXAGE 3 +#endif + +/** + * IP_REASS_MAX_PBUFS: Total maximum amount of pbufs waiting to be reassembled. + * Since the received pbufs are enqueued, be sure to configure + * PBUF_POOL_SIZE > IP_REASS_MAX_PBUFS so that the stack is still able to receive + * packets even if the maximum amount of fragments is enqueued for reassembly! + */ +#ifndef IP_REASS_MAX_PBUFS +#define IP_REASS_MAX_PBUFS 10 +#endif + +/** + * IP_FRAG_USES_STATIC_BUF==1: Use a static MTU-sized buffer for IP + * fragmentation. Otherwise pbufs are allocated and reference the original + * packet data to be fragmented. + */ +#ifndef IP_FRAG_USES_STATIC_BUF +#define IP_FRAG_USES_STATIC_BUF 1 +#endif + +/** + * IP_FRAG_MAX_MTU: Assumed max MTU on any interface for IP frag buffer + * (requires IP_FRAG_USES_STATIC_BUF==1) + */ +#if IP_FRAG_USES_STATIC_BUF && !defined(IP_FRAG_MAX_MTU) +#define IP_FRAG_MAX_MTU 1500 +#endif + +/** + * IP_DEFAULT_TTL: Default value for Time-To-Live used by transport layers. + */ +#ifndef IP_DEFAULT_TTL +#define IP_DEFAULT_TTL 255 +#endif + +/** + * IP_SOF_BROADCAST=1: Use the SOF_BROADCAST field to enable broadcast + * filter per pcb on udp and raw send operations. To enable broadcast filter + * on recv operations, you also have to set IP_SOF_BROADCAST_RECV=1. + */ +#ifndef IP_SOF_BROADCAST +#define IP_SOF_BROADCAST 0 +#endif + +/** + * IP_SOF_BROADCAST_RECV (requires IP_SOF_BROADCAST=1) enable the broadcast + * filter on recv operations. + */ +#ifndef IP_SOF_BROADCAST_RECV +#define IP_SOF_BROADCAST_RECV 0 +#endif + +/* + ---------------------------------- + ---------- ICMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_ICMP==1: Enable ICMP module inside the IP stack. + * Be careful, disable that make your product non-compliant to RFC1122 + */ +#ifndef LWIP_ICMP +#define LWIP_ICMP 1 +#endif + +/** + * ICMP_TTL: Default value for Time-To-Live used by ICMP packets. + */ +#ifndef ICMP_TTL +#define ICMP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * LWIP_BROADCAST_PING==1: respond to broadcast pings (default is unicast only) + */ +#ifndef LWIP_BROADCAST_PING +#define LWIP_BROADCAST_PING 0 +#endif + +/** + * LWIP_MULTICAST_PING==1: respond to multicast pings (default is unicast only) + */ +#ifndef LWIP_MULTICAST_PING +#define LWIP_MULTICAST_PING 0 +#endif + +/* + --------------------------------- + ---------- RAW options ---------- + --------------------------------- +*/ +/** + * LWIP_RAW==1: Enable application layer to hook into the IP layer itself. + */ +#ifndef LWIP_RAW +#define LWIP_RAW 1 +#endif + +/** + * LWIP_RAW==1: Enable application layer to hook into the IP layer itself. + */ +#ifndef RAW_TTL +#define RAW_TTL (IP_DEFAULT_TTL) +#endif + +/* + ---------------------------------- + ---------- DHCP options ---------- + ---------------------------------- +*/ +/** + * LWIP_DHCP==1: Enable DHCP module. + */ +#ifndef LWIP_DHCP +#define LWIP_DHCP 0 +#endif + +/** + * DHCP_DOES_ARP_CHECK==1: Do an ARP check on the offered address. + */ +#ifndef DHCP_DOES_ARP_CHECK +#define DHCP_DOES_ARP_CHECK ((LWIP_DHCP) && (LWIP_ARP)) +#endif + +/* + ------------------------------------ + ---------- AUTOIP options ---------- + ------------------------------------ +*/ +/** + * LWIP_AUTOIP==1: Enable AUTOIP module. + */ +#ifndef LWIP_AUTOIP +#define LWIP_AUTOIP 0 +#endif + +/** + * LWIP_DHCP_AUTOIP_COOP==1: Allow DHCP and AUTOIP to be both enabled on + * the same interface at the same time. + */ +#ifndef LWIP_DHCP_AUTOIP_COOP +#define LWIP_DHCP_AUTOIP_COOP 0 +#endif + +/** + * LWIP_DHCP_AUTOIP_COOP_TRIES: Set to the number of DHCP DISCOVER probes + * that should be sent before falling back on AUTOIP. This can be set + * as low as 1 to get an AutoIP address very quickly, but you should + * be prepared to handle a changing IP address when DHCP overrides + * AutoIP. + */ +#ifndef LWIP_DHCP_AUTOIP_COOP_TRIES +#define LWIP_DHCP_AUTOIP_COOP_TRIES 9 +#endif + +/* + ---------------------------------- + ---------- SNMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_SNMP==1: Turn on SNMP module. UDP must be available for SNMP + * transport. + */ +#ifndef LWIP_SNMP +#define LWIP_SNMP 0 +#endif + +/** + * SNMP_CONCURRENT_REQUESTS: Number of concurrent requests the module will + * allow. At least one request buffer is required. + */ +#ifndef SNMP_CONCURRENT_REQUESTS +#define SNMP_CONCURRENT_REQUESTS 1 +#endif + +/** + * SNMP_TRAP_DESTINATIONS: Number of trap destinations. At least one trap + * destination is required + */ +#ifndef SNMP_TRAP_DESTINATIONS +#define SNMP_TRAP_DESTINATIONS 1 +#endif + +/** + * SNMP_PRIVATE_MIB: + */ +#ifndef SNMP_PRIVATE_MIB +#define SNMP_PRIVATE_MIB 0 +#endif + +/** + * Only allow SNMP write actions that are 'safe' (e.g. disabeling netifs is not + * a safe action and disabled when SNMP_SAFE_REQUESTS = 1). + * Unsafe requests are disabled by default! + */ +#ifndef SNMP_SAFE_REQUESTS +#define SNMP_SAFE_REQUESTS 1 +#endif + +/* + ---------------------------------- + ---------- IGMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_IGMP==1: Turn on IGMP module. + */ +#ifndef LWIP_IGMP +#define LWIP_IGMP 0 +#endif + +/* + ---------------------------------- + ---------- DNS options ----------- + ---------------------------------- +*/ +/** + * LWIP_DNS==1: Turn on DNS module. UDP must be available for DNS + * transport. + */ +#ifndef LWIP_DNS +#define LWIP_DNS 0 +#endif + +/** DNS maximum number of entries to maintain locally. */ +#ifndef DNS_TABLE_SIZE +#define DNS_TABLE_SIZE 4 +#endif + +/** DNS maximum host name length supported in the name table. */ +#ifndef DNS_MAX_NAME_LENGTH +#define DNS_MAX_NAME_LENGTH 256 +#endif + +/** The maximum of DNS servers */ +#ifndef DNS_MAX_SERVERS +#define DNS_MAX_SERVERS 2 +#endif + +/** DNS do a name checking between the query and the response. */ +#ifndef DNS_DOES_NAME_CHECK +#define DNS_DOES_NAME_CHECK 1 +#endif + +/** DNS use a local buffer if DNS_USES_STATIC_BUF=0, a static one if + DNS_USES_STATIC_BUF=1, or a dynamic one if DNS_USES_STATIC_BUF=2. + The buffer will be of size DNS_MSG_SIZE */ +#ifndef DNS_USES_STATIC_BUF +#define DNS_USES_STATIC_BUF 1 +#endif + +/** DNS message max. size. Default value is RFC compliant. */ +#ifndef DNS_MSG_SIZE +#define DNS_MSG_SIZE 512 +#endif + +/** DNS_LOCAL_HOSTLIST: Implements a local host-to-address list. If enabled, + * you have to define + * #define DNS_LOCAL_HOSTLIST_INIT {{"host1", 0x123}, {"host2", 0x234}} + * (an array of structs name/address, where address is an u32_t in network + * byte order). + * + * Instead, you can also use an external function: + * #define DNS_LOOKUP_LOCAL_EXTERN(x) extern u32_t my_lookup_function(const char *name) + * that returns the IP address or INADDR_NONE if not found. + */ +#ifndef DNS_LOCAL_HOSTLIST +#define DNS_LOCAL_HOSTLIST 0 +#endif /* DNS_LOCAL_HOSTLIST */ + +/** If this is turned on, the local host-list can be dynamically changed + * at runtime. */ +#ifndef DNS_LOCAL_HOSTLIST_IS_DYNAMIC +#define DNS_LOCAL_HOSTLIST_IS_DYNAMIC 0 +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + +/* + --------------------------------- + ---------- UDP options ---------- + --------------------------------- +*/ +/** + * LWIP_UDP==1: Turn on UDP. + */ +#ifndef LWIP_UDP +#define LWIP_UDP 1 +#endif + +/** + * LWIP_UDPLITE==1: Turn on UDP-Lite. (Requires LWIP_UDP) + */ +#ifndef LWIP_UDPLITE +#define LWIP_UDPLITE 0 +#endif + +/** + * UDP_TTL: Default Time-To-Live value. + */ +#ifndef UDP_TTL +#define UDP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * LWIP_NETBUF_RECVINFO==1: append destination addr and port to every netbuf. + */ +#ifndef LWIP_NETBUF_RECVINFO +#define LWIP_NETBUF_RECVINFO 0 +#endif + +/* + --------------------------------- + ---------- TCP options ---------- + --------------------------------- +*/ +/** + * LWIP_TCP==1: Turn on TCP. + */ +#ifndef LWIP_TCP +#define LWIP_TCP 1 +#endif + +/** + * TCP_TTL: Default Time-To-Live value. + */ +#ifndef TCP_TTL +#define TCP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * TCP_WND: The size of a TCP window. This must be at least + * (2 * TCP_MSS) for things to work well + */ +#ifndef TCP_WND +#define TCP_WND (4 * TCP_MSS) +#endif + +/** + * TCP_MAXRTX: Maximum number of retransmissions of data segments. + */ +#ifndef TCP_MAXRTX +#define TCP_MAXRTX 12 +#endif + +/** + * TCP_SYNMAXRTX: Maximum number of retransmissions of SYN segments. + */ +#ifndef TCP_SYNMAXRTX +#define TCP_SYNMAXRTX 6 +#endif + +/** + * TCP_QUEUE_OOSEQ==1: TCP will queue segments that arrive out of order. + * Define to 0 if your device is low on memory. + */ +#ifndef TCP_QUEUE_OOSEQ +#define TCP_QUEUE_OOSEQ (LWIP_TCP) +#endif + +/** + * TCP_MSS: TCP Maximum segment size. (default is 536, a conservative default, + * you might want to increase this.) + * For the receive side, this MSS is advertised to the remote side + * when opening a connection. For the transmit size, this MSS sets + * an upper limit on the MSS advertised by the remote host. + */ +#ifndef TCP_MSS +#define TCP_MSS 536 +#endif + +/** + * TCP_CALCULATE_EFF_SEND_MSS: "The maximum size of a segment that TCP really + * sends, the 'effective send MSS,' MUST be the smaller of the send MSS (which + * reflects the available reassembly buffer size at the remote host) and the + * largest size permitted by the IP layer" (RFC 1122) + * Setting this to 1 enables code that checks TCP_MSS against the MTU of the + * netif used for a connection and limits the MSS if it would be too big otherwise. + */ +#ifndef TCP_CALCULATE_EFF_SEND_MSS +#define TCP_CALCULATE_EFF_SEND_MSS 1 +#endif + + +/** + * TCP_SND_BUF: TCP sender buffer space (bytes). + */ +#ifndef TCP_SND_BUF +#define TCP_SND_BUF 256 +#endif + +/** + * TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least + * as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work. + */ +#ifndef TCP_SND_QUEUELEN +#define TCP_SND_QUEUELEN (4 * (TCP_SND_BUF)/(TCP_MSS)) +#endif + +/** + * TCP_SNDLOWAT: TCP writable space (bytes). This must be less than or equal + * to TCP_SND_BUF. It is the amount of space which must be available in the + * TCP snd_buf for select to return writable. + */ +#ifndef TCP_SNDLOWAT +#define TCP_SNDLOWAT ((TCP_SND_BUF)/2) +#endif + +/** + * TCP_LISTEN_BACKLOG: Enable the backlog option for tcp listen pcb. + */ +#ifndef TCP_LISTEN_BACKLOG +#define TCP_LISTEN_BACKLOG 0 +#endif + +/** + * The maximum allowed backlog for TCP listen netconns. + * This backlog is used unless another is explicitly specified. + * 0xff is the maximum (u8_t). + */ +#ifndef TCP_DEFAULT_LISTEN_BACKLOG +#define TCP_DEFAULT_LISTEN_BACKLOG 0xff +#endif + +/** + * LWIP_TCP_TIMESTAMPS==1: support the TCP timestamp option. + */ +#ifndef LWIP_TCP_TIMESTAMPS +#define LWIP_TCP_TIMESTAMPS 0 +#endif + +/** + * TCP_WND_UPDATE_THRESHOLD: difference in window to trigger an + * explicit window update + */ +#ifndef TCP_WND_UPDATE_THRESHOLD +#define TCP_WND_UPDATE_THRESHOLD (TCP_WND / 4) +#endif + +/** + * LWIP_EVENT_API and LWIP_CALLBACK_API: Only one of these should be set to 1. + * LWIP_EVENT_API==1: The user defines lwip_tcp_event() to receive all + * events (accept, sent, etc) that happen in the system. + * LWIP_CALLBACK_API==1: The PCB callback function is called directly + * for the event. + */ +#ifndef LWIP_EVENT_API +#define LWIP_EVENT_API 0 +#define LWIP_CALLBACK_API 1 +#else +#define LWIP_EVENT_API 1 +#define LWIP_CALLBACK_API 0 +#endif + + +/* + ---------------------------------- + ---------- Pbuf options ---------- + ---------------------------------- +*/ +/** + * PBUF_LINK_HLEN: the number of bytes that should be allocated for a + * link level header. The default is 14, the standard value for + * Ethernet. + */ +#ifndef PBUF_LINK_HLEN +#define PBUF_LINK_HLEN 14 +#endif + +/** + * PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. The default is + * designed to accomodate single full size TCP frame in one pbuf, including + * TCP_MSS, IP header, and link header. + */ +#ifndef PBUF_POOL_BUFSIZE +#define PBUF_POOL_BUFSIZE LWIP_MEM_ALIGN_SIZE(TCP_MSS+40+PBUF_LINK_HLEN) +#endif + +/* + ------------------------------------------------ + ---------- Network Interfaces options ---------- + ------------------------------------------------ +*/ +/** + * LWIP_NETIF_HOSTNAME==1: use DHCP_OPTION_HOSTNAME with netif's hostname + * field. + */ +#ifndef LWIP_NETIF_HOSTNAME +#define LWIP_NETIF_HOSTNAME 0 +#endif + +/** + * LWIP_NETIF_API==1: Support netif api (in netifapi.c) + */ +#ifndef LWIP_NETIF_API +#define LWIP_NETIF_API 0 +#endif + +/** + * LWIP_NETIF_STATUS_CALLBACK==1: Support a callback function whenever an interface + * changes its up/down status (i.e., due to DHCP IP acquistion) + */ +#ifndef LWIP_NETIF_STATUS_CALLBACK +#define LWIP_NETIF_STATUS_CALLBACK 0 +#endif + +/** + * LWIP_NETIF_LINK_CALLBACK==1: Support a callback function from an interface + * whenever the link changes (i.e., link down) + */ +#ifndef LWIP_NETIF_LINK_CALLBACK +#define LWIP_NETIF_LINK_CALLBACK 0 +#endif + +/** + * LWIP_NETIF_HWADDRHINT==1: Cache link-layer-address hints (e.g. table + * indices) in struct netif. TCP and UDP can make use of this to prevent + * scanning the ARP table for every sent packet. While this is faster for big + * ARP tables or many concurrent connections, it might be counterproductive + * if you have a tiny ARP table or if there never are concurrent connections. + */ +#ifndef LWIP_NETIF_HWADDRHINT +#define LWIP_NETIF_HWADDRHINT 0 +#endif + +/** + * LWIP_NETIF_LOOPBACK==1: Support sending packets with a destination IP + * address equal to the netif IP address, looping them back up the stack. + */ +#ifndef LWIP_NETIF_LOOPBACK +#define LWIP_NETIF_LOOPBACK 0 +#endif + +/** + * LWIP_LOOPBACK_MAX_PBUFS: Maximum number of pbufs on queue for loopback + * sending for each netif (0 = disabled) + */ +#ifndef LWIP_LOOPBACK_MAX_PBUFS +#define LWIP_LOOPBACK_MAX_PBUFS 0 +#endif + +/** + * LWIP_NETIF_LOOPBACK_MULTITHREADING: Indicates whether threading is enabled in + * the system, as netifs must change how they behave depending on this setting + * for the LWIP_NETIF_LOOPBACK option to work. + * Setting this is needed to avoid reentering non-reentrant functions like + * tcp_input(). + * LWIP_NETIF_LOOPBACK_MULTITHREADING==1: Indicates that the user is using a + * multithreaded environment like tcpip.c. In this case, netif->input() + * is called directly. + * LWIP_NETIF_LOOPBACK_MULTITHREADING==0: Indicates a polling (or NO_SYS) setup. + * The packets are put on a list and netif_poll() must be called in + * the main application loop. + */ +#ifndef LWIP_NETIF_LOOPBACK_MULTITHREADING +#define LWIP_NETIF_LOOPBACK_MULTITHREADING (!NO_SYS) +#endif + +/** + * LWIP_NETIF_TX_SINGLE_PBUF: if this is set to 1, lwIP tries to put all data + * to be sent into one single pbuf. This is for compatibility with DMA-enabled + * MACs that do not support scatter-gather. + * Beware that this might involve CPU-memcpy before transmitting that would not + * be needed without this flag! Use this only if you need to! + * + * @todo: TCP and IP-frag do not work with this, yet: + */ +#ifndef LWIP_NETIF_TX_SINGLE_PBUF +#define LWIP_NETIF_TX_SINGLE_PBUF 0 +#endif /* LWIP_NETIF_TX_SINGLE_PBUF */ + +/* + ------------------------------------ + ---------- LOOPIF options ---------- + ------------------------------------ +*/ +/** + * LWIP_HAVE_LOOPIF==1: Support loop interface (127.0.0.1) and loopif.c + */ +#ifndef LWIP_HAVE_LOOPIF +#define LWIP_HAVE_LOOPIF 0 +#endif + +/* + ------------------------------------ + ---------- SLIPIF options ---------- + ------------------------------------ +*/ +/** + * LWIP_HAVE_SLIPIF==1: Support slip interface and slipif.c + */ +#ifndef LWIP_HAVE_SLIPIF +#define LWIP_HAVE_SLIPIF 0 +#endif + +/* + ------------------------------------ + ---------- Thread options ---------- + ------------------------------------ +*/ +/** + * TCPIP_THREAD_NAME: The name assigned to the main tcpip thread. + */ +#ifndef TCPIP_THREAD_NAME +#define TCPIP_THREAD_NAME "tcpip_thread" +#endif + +/** + * TCPIP_THREAD_STACKSIZE: The stack size used by the main tcpip thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef TCPIP_THREAD_STACKSIZE +#define TCPIP_THREAD_STACKSIZE 0 +#endif + +/** + * TCPIP_THREAD_PRIO: The priority assigned to the main tcpip thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef TCPIP_THREAD_PRIO +#define TCPIP_THREAD_PRIO 1 +#endif + +/** + * TCPIP_MBOX_SIZE: The mailbox size for the tcpip thread messages + * The queue size value itself is platform-dependent, but is passed to + * sys_mbox_new() when tcpip_init is called. + */ +#ifndef TCPIP_MBOX_SIZE +#define TCPIP_MBOX_SIZE 0 +#endif + +/** + * SLIPIF_THREAD_NAME: The name assigned to the slipif_loop thread. + */ +#ifndef SLIPIF_THREAD_NAME +#define SLIPIF_THREAD_NAME "slipif_loop" +#endif + +/** + * SLIP_THREAD_STACKSIZE: The stack size used by the slipif_loop thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef SLIPIF_THREAD_STACKSIZE +#define SLIPIF_THREAD_STACKSIZE 0 +#endif + +/** + * SLIPIF_THREAD_PRIO: The priority assigned to the slipif_loop thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef SLIPIF_THREAD_PRIO +#define SLIPIF_THREAD_PRIO 1 +#endif + +/** + * PPP_THREAD_NAME: The name assigned to the pppMain thread. + */ +#ifndef PPP_THREAD_NAME +#define PPP_THREAD_NAME "pppMain" +#endif + +/** + * PPP_THREAD_STACKSIZE: The stack size used by the pppMain thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef PPP_THREAD_STACKSIZE +#define PPP_THREAD_STACKSIZE 0 +#endif + +/** + * PPP_THREAD_PRIO: The priority assigned to the pppMain thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef PPP_THREAD_PRIO +#define PPP_THREAD_PRIO 1 +#endif + +/** + * DEFAULT_THREAD_NAME: The name assigned to any other lwIP thread. + */ +#ifndef DEFAULT_THREAD_NAME +#define DEFAULT_THREAD_NAME "lwIP" +#endif + +/** + * DEFAULT_THREAD_STACKSIZE: The stack size used by any other lwIP thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef DEFAULT_THREAD_STACKSIZE +#define DEFAULT_THREAD_STACKSIZE 0 +#endif + +/** + * DEFAULT_THREAD_PRIO: The priority assigned to any other lwIP thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef DEFAULT_THREAD_PRIO +#define DEFAULT_THREAD_PRIO 1 +#endif + +/** + * DEFAULT_RAW_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_RAW. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_RAW_RECVMBOX_SIZE +#define DEFAULT_RAW_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_UDP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_UDP. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_UDP_RECVMBOX_SIZE +#define DEFAULT_UDP_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_TCP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_TCP. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_TCP_RECVMBOX_SIZE +#define DEFAULT_TCP_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_ACCEPTMBOX_SIZE: The mailbox size for the incoming connections. + * The queue size value itself is platform-dependent, but is passed to + * sys_mbox_new() when the acceptmbox is created. + */ +#ifndef DEFAULT_ACCEPTMBOX_SIZE +#define DEFAULT_ACCEPTMBOX_SIZE 0 +#endif + +/* + ---------------------------------------------- + ---------- Sequential layer options ---------- + ---------------------------------------------- +*/ +/** + * LWIP_TCPIP_CORE_LOCKING: (EXPERIMENTAL!) + * Don't use it if you're not an active lwIP project member + */ +#ifndef LWIP_TCPIP_CORE_LOCKING +#define LWIP_TCPIP_CORE_LOCKING 0 +#endif + +/** + * LWIP_NETCONN==1: Enable Netconn API (require to use api_lib.c) + */ +#ifndef LWIP_NETCONN +#define LWIP_NETCONN 1 +#endif + +/* + ------------------------------------ + ---------- Socket options ---------- + ------------------------------------ +*/ +/** + * LWIP_SOCKET==1: Enable Socket API (require to use sockets.c) + */ +#ifndef LWIP_SOCKET +#define LWIP_SOCKET 1 +#endif + +/** + * LWIP_COMPAT_SOCKETS==1: Enable BSD-style sockets functions names. + * (only used if you use sockets.c) + */ +#ifndef LWIP_COMPAT_SOCKETS +#define LWIP_COMPAT_SOCKETS 1 +#endif + +/** + * LWIP_POSIX_SOCKETS_IO_NAMES==1: Enable POSIX-style sockets functions names. + * Disable this option if you use a POSIX operating system that uses the same + * names (read, write & close). (only used if you use sockets.c) + */ +#ifndef LWIP_POSIX_SOCKETS_IO_NAMES +#define LWIP_POSIX_SOCKETS_IO_NAMES 1 +#endif + +/** + * LWIP_TCP_KEEPALIVE==1: Enable TCP_KEEPIDLE, TCP_KEEPINTVL and TCP_KEEPCNT + * options processing. Note that TCP_KEEPIDLE and TCP_KEEPINTVL have to be set + * in seconds. (does not require sockets.c, and will affect tcp.c) + */ +#ifndef LWIP_TCP_KEEPALIVE +#define LWIP_TCP_KEEPALIVE 0 +#endif + +/** + * LWIP_SO_RCVTIMEO==1: Enable SO_RCVTIMEO processing. + */ +#ifndef LWIP_SO_RCVTIMEO +#define LWIP_SO_RCVTIMEO 0 +#endif + +/** + * LWIP_SO_RCVBUF==1: Enable SO_RCVBUF processing. + */ +#ifndef LWIP_SO_RCVBUF +#define LWIP_SO_RCVBUF 0 +#endif + +/** + * If LWIP_SO_RCVBUF is used, this is the default value for recv_bufsize. + */ +#ifndef RECV_BUFSIZE_DEFAULT +#define RECV_BUFSIZE_DEFAULT INT_MAX +#endif + +/** + * SO_REUSE==1: Enable SO_REUSEADDR and SO_REUSEPORT options. DO NOT USE! + */ +#ifndef SO_REUSE +#define SO_REUSE 0 +#endif + +/* + ---------------------------------------- + ---------- Statistics options ---------- + ---------------------------------------- +*/ +/** + * LWIP_STATS==1: Enable statistics collection in lwip_stats. + */ +#ifndef LWIP_STATS +#define LWIP_STATS 1 +#endif + +#if LWIP_STATS + +/** + * LWIP_STATS_DISPLAY==1: Compile in the statistics output functions. + */ +#ifndef LWIP_STATS_DISPLAY +#define LWIP_STATS_DISPLAY 0 +#endif + +/** + * LINK_STATS==1: Enable link stats. + */ +#ifndef LINK_STATS +#define LINK_STATS 1 +#endif + +/** + * ETHARP_STATS==1: Enable etharp stats. + */ +#ifndef ETHARP_STATS +#define ETHARP_STATS (LWIP_ARP) +#endif + +/** + * IP_STATS==1: Enable IP stats. + */ +#ifndef IP_STATS +#define IP_STATS 1 +#endif + +/** + * IPFRAG_STATS==1: Enable IP fragmentation stats. Default is + * on if using either frag or reass. + */ +#ifndef IPFRAG_STATS +#define IPFRAG_STATS (IP_REASSEMBLY || IP_FRAG) +#endif + +/** + * ICMP_STATS==1: Enable ICMP stats. + */ +#ifndef ICMP_STATS +#define ICMP_STATS 1 +#endif + +/** + * IGMP_STATS==1: Enable IGMP stats. + */ +#ifndef IGMP_STATS +#define IGMP_STATS (LWIP_IGMP) +#endif + +/** + * UDP_STATS==1: Enable UDP stats. Default is on if + * UDP enabled, otherwise off. + */ +#ifndef UDP_STATS +#define UDP_STATS (LWIP_UDP) +#endif + +/** + * TCP_STATS==1: Enable TCP stats. Default is on if TCP + * enabled, otherwise off. + */ +#ifndef TCP_STATS +#define TCP_STATS (LWIP_TCP) +#endif + +/** + * MEM_STATS==1: Enable mem.c stats. + */ +#ifndef MEM_STATS +#define MEM_STATS ((MEM_LIBC_MALLOC == 0) && (MEM_USE_POOLS == 0)) +#endif + +/** + * MEMP_STATS==1: Enable memp.c pool stats. + */ +#ifndef MEMP_STATS +#define MEMP_STATS (MEMP_MEM_MALLOC == 0) +#endif + +/** + * SYS_STATS==1: Enable system stats (sem and mbox counts, etc). + */ +#ifndef SYS_STATS +#define SYS_STATS (NO_SYS == 0) +#endif + +#else + +#define LINK_STATS 0 +#define IP_STATS 0 +#define IPFRAG_STATS 0 +#define ICMP_STATS 0 +#define IGMP_STATS 0 +#define UDP_STATS 0 +#define TCP_STATS 0 +#define MEM_STATS 0 +#define MEMP_STATS 0 +#define SYS_STATS 0 +#define LWIP_STATS_DISPLAY 0 + +#endif /* LWIP_STATS */ + +/* + --------------------------------- + ---------- PPP options ---------- + --------------------------------- +*/ +/** + * PPP_SUPPORT==1: Enable PPP. + */ +#ifndef PPP_SUPPORT +#define PPP_SUPPORT 0 +#endif + +/** + * PPPOE_SUPPORT==1: Enable PPP Over Ethernet + */ +#ifndef PPPOE_SUPPORT +#define PPPOE_SUPPORT 0 +#endif + +/** + * PPPOS_SUPPORT==1: Enable PPP Over Serial + */ +#ifndef PPPOS_SUPPORT +#define PPPOS_SUPPORT PPP_SUPPORT +#endif + +#if PPP_SUPPORT + +/** + * NUM_PPP: Max PPP sessions. + */ +#ifndef NUM_PPP +#define NUM_PPP 1 +#endif + +/** + * PAP_SUPPORT==1: Support PAP. + */ +#ifndef PAP_SUPPORT +#define PAP_SUPPORT 0 +#endif + +/** + * CHAP_SUPPORT==1: Support CHAP. + */ +#ifndef CHAP_SUPPORT +#define CHAP_SUPPORT 0 +#endif + +/** + * MSCHAP_SUPPORT==1: Support MSCHAP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef MSCHAP_SUPPORT +#define MSCHAP_SUPPORT 0 +#endif + +/** + * CBCP_SUPPORT==1: Support CBCP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef CBCP_SUPPORT +#define CBCP_SUPPORT 0 +#endif + +/** + * CCP_SUPPORT==1: Support CCP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef CCP_SUPPORT +#define CCP_SUPPORT 0 +#endif + +/** + * VJ_SUPPORT==1: Support VJ header compression. + */ +#ifndef VJ_SUPPORT +#define VJ_SUPPORT 0 +#endif + +/** + * MD5_SUPPORT==1: Support MD5 (see also CHAP). + */ +#ifndef MD5_SUPPORT +#define MD5_SUPPORT 0 +#endif + +/* + * Timeouts + */ +#ifndef FSM_DEFTIMEOUT +#define FSM_DEFTIMEOUT 6 /* Timeout time in seconds */ +#endif + +#ifndef FSM_DEFMAXTERMREQS +#define FSM_DEFMAXTERMREQS 2 /* Maximum Terminate-Request transmissions */ +#endif + +#ifndef FSM_DEFMAXCONFREQS +#define FSM_DEFMAXCONFREQS 10 /* Maximum Configure-Request transmissions */ +#endif + +#ifndef FSM_DEFMAXNAKLOOPS +#define FSM_DEFMAXNAKLOOPS 5 /* Maximum number of nak loops */ +#endif + +#ifndef UPAP_DEFTIMEOUT +#define UPAP_DEFTIMEOUT 6 /* Timeout (seconds) for retransmitting req */ +#endif + +#ifndef UPAP_DEFREQTIME +#define UPAP_DEFREQTIME 30 /* Time to wait for auth-req from peer */ +#endif + +#ifndef CHAP_DEFTIMEOUT +#define CHAP_DEFTIMEOUT 6 /* Timeout time in seconds */ +#endif + +#ifndef CHAP_DEFTRANSMITS +#define CHAP_DEFTRANSMITS 10 /* max # times to send challenge */ +#endif + +/* Interval in seconds between keepalive echo requests, 0 to disable. */ +#ifndef LCP_ECHOINTERVAL +#define LCP_ECHOINTERVAL 0 +#endif + +/* Number of unanswered echo requests before failure. */ +#ifndef LCP_MAXECHOFAILS +#define LCP_MAXECHOFAILS 3 +#endif + +/* Max Xmit idle time (in jiffies) before resend flag char. */ +#ifndef PPP_MAXIDLEFLAG +#define PPP_MAXIDLEFLAG 100 +#endif + +/* + * Packet sizes + * + * Note - lcp shouldn't be allowed to negotiate stuff outside these + * limits. See lcp.h in the pppd directory. + * (XXX - these constants should simply be shared by lcp.c instead + * of living in lcp.h) + */ +#define PPP_MTU 1500 /* Default MTU (size of Info field) */ +#ifndef PPP_MAXMTU +/* #define PPP_MAXMTU 65535 - (PPP_HDRLEN + PPP_FCSLEN) */ +#define PPP_MAXMTU 1500 /* Largest MTU we allow */ +#endif +#define PPP_MINMTU 64 +#define PPP_MRU 1500 /* default MRU = max length of info field */ +#define PPP_MAXMRU 1500 /* Largest MRU we allow */ +#ifndef PPP_DEFMRU +#define PPP_DEFMRU 296 /* Try for this */ +#endif +#define PPP_MINMRU 128 /* No MRUs below this */ + +#ifndef MAXNAMELEN +#define MAXNAMELEN 256 /* max length of hostname or name for auth */ +#endif +#ifndef MAXSECRETLEN +#define MAXSECRETLEN 256 /* max length of password or secret */ +#endif + +#endif /* PPP_SUPPORT */ + +/* + -------------------------------------- + ---------- Checksum options ---------- + -------------------------------------- +*/ +/** + * CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets. + */ +#ifndef CHECKSUM_GEN_IP +#define CHECKSUM_GEN_IP 1 +#endif + +/** + * CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets. + */ +#ifndef CHECKSUM_GEN_UDP +#define CHECKSUM_GEN_UDP 1 +#endif + +/** + * CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets. + */ +#ifndef CHECKSUM_GEN_TCP +#define CHECKSUM_GEN_TCP 1 +#endif + +/** + * CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets. + */ +#ifndef CHECKSUM_CHECK_IP +#define CHECKSUM_CHECK_IP 1 +#endif + +/** + * CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets. + */ +#ifndef CHECKSUM_CHECK_UDP +#define CHECKSUM_CHECK_UDP 1 +#endif + +/** + * CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets. + */ +#ifndef CHECKSUM_CHECK_TCP +#define CHECKSUM_CHECK_TCP 1 +#endif + +/* + --------------------------------------- + ---------- Debugging options ---------- + --------------------------------------- +*/ +/** + * LWIP_DBG_MIN_LEVEL: After masking, the value of the debug is + * compared against this value. If it is smaller, then debugging + * messages are written. + */ +#ifndef LWIP_DBG_MIN_LEVEL +#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_ALL +#endif + +/** + * LWIP_DBG_TYPES_ON: A mask that can be used to globally enable/disable + * debug messages of certain types. + */ +#ifndef LWIP_DBG_TYPES_ON +#define LWIP_DBG_TYPES_ON LWIP_DBG_ON +#endif + +/** + * ETHARP_DEBUG: Enable debugging in etharp.c. + */ +#ifndef ETHARP_DEBUG +#define ETHARP_DEBUG LWIP_DBG_OFF +#endif + +/** + * NETIF_DEBUG: Enable debugging in netif.c. + */ +#ifndef NETIF_DEBUG +#define NETIF_DEBUG LWIP_DBG_OFF +#endif + +/** + * PBUF_DEBUG: Enable debugging in pbuf.c. + */ +#ifndef PBUF_DEBUG +#define PBUF_DEBUG LWIP_DBG_OFF +#endif + +/** + * API_LIB_DEBUG: Enable debugging in api_lib.c. + */ +#ifndef API_LIB_DEBUG +#define API_LIB_DEBUG LWIP_DBG_OFF +#endif + +/** + * API_MSG_DEBUG: Enable debugging in api_msg.c. + */ +#ifndef API_MSG_DEBUG +#define API_MSG_DEBUG LWIP_DBG_OFF +#endif + +/** + * SOCKETS_DEBUG: Enable debugging in sockets.c. + */ +#ifndef SOCKETS_DEBUG +#define SOCKETS_DEBUG LWIP_DBG_OFF +#endif + +/** + * ICMP_DEBUG: Enable debugging in icmp.c. + */ +#ifndef ICMP_DEBUG +#define ICMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * IGMP_DEBUG: Enable debugging in igmp.c. + */ +#ifndef IGMP_DEBUG +#define IGMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * INET_DEBUG: Enable debugging in inet.c. + */ +#ifndef INET_DEBUG +#define INET_DEBUG LWIP_DBG_OFF +#endif + +/** + * IP_DEBUG: Enable debugging for IP. + */ +#ifndef IP_DEBUG +#define IP_DEBUG LWIP_DBG_OFF +#endif + +/** + * IP_REASS_DEBUG: Enable debugging in ip_frag.c for both frag & reass. + */ +#ifndef IP_REASS_DEBUG +#define IP_REASS_DEBUG LWIP_DBG_OFF +#endif + +/** + * RAW_DEBUG: Enable debugging in raw.c. + */ +#ifndef RAW_DEBUG +#define RAW_DEBUG LWIP_DBG_OFF +#endif + +/** + * MEM_DEBUG: Enable debugging in mem.c. + */ +#ifndef MEM_DEBUG +#define MEM_DEBUG LWIP_DBG_OFF +#endif + +/** + * MEMP_DEBUG: Enable debugging in memp.c. + */ +#ifndef MEMP_DEBUG +#define MEMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SYS_DEBUG: Enable debugging in sys.c. + */ +#ifndef SYS_DEBUG +#define SYS_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_DEBUG: Enable debugging for TCP. + */ +#ifndef TCP_DEBUG +#define TCP_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_INPUT_DEBUG: Enable debugging in tcp_in.c for incoming debug. + */ +#ifndef TCP_INPUT_DEBUG +#define TCP_INPUT_DEBUG LWIP_DBG_ON +#endif + +/** + * TCP_FR_DEBUG: Enable debugging in tcp_in.c for fast retransmit. + */ +#ifndef TCP_FR_DEBUG +#define TCP_FR_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_RTO_DEBUG: Enable debugging in TCP for retransmit + * timeout. + */ +#ifndef TCP_RTO_DEBUG +#define TCP_RTO_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_CWND_DEBUG: Enable debugging for TCP congestion window. + */ +#ifndef TCP_CWND_DEBUG +#define TCP_CWND_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_WND_DEBUG: Enable debugging in tcp_in.c for window updating. + */ +#ifndef TCP_WND_DEBUG +#define TCP_WND_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_OUTPUT_DEBUG: Enable debugging in tcp_out.c output functions. + */ +#ifndef TCP_OUTPUT_DEBUG +#define TCP_OUTPUT_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_RST_DEBUG: Enable debugging for TCP with the RST message. + */ +#ifndef TCP_RST_DEBUG +#define TCP_RST_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_QLEN_DEBUG: Enable debugging for TCP queue lengths. + */ +#ifndef TCP_QLEN_DEBUG +#define TCP_QLEN_DEBUG LWIP_DBG_OFF +#endif + +/** + * UDP_DEBUG: Enable debugging in UDP. + */ +#ifndef UDP_DEBUG +#define UDP_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCPIP_DEBUG: Enable debugging in tcpip.c. + */ +#ifndef TCPIP_DEBUG +#define TCPIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * PPP_DEBUG: Enable debugging for PPP. + */ +#ifndef PPP_DEBUG +#define PPP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SLIP_DEBUG: Enable debugging in slipif.c. + */ +#ifndef SLIP_DEBUG +#define SLIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * DHCP_DEBUG: Enable debugging in dhcp.c. + */ +#ifndef DHCP_DEBUG +#define DHCP_DEBUG LWIP_DBG_OFF +#endif + +/** + * AUTOIP_DEBUG: Enable debugging in autoip.c. + */ +#ifndef AUTOIP_DEBUG +#define AUTOIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SNMP_MSG_DEBUG: Enable debugging for SNMP messages. + */ +#ifndef SNMP_MSG_DEBUG +#define SNMP_MSG_DEBUG LWIP_DBG_OFF +#endif + +/** + * SNMP_MIB_DEBUG: Enable debugging for SNMP MIBs. + */ +#ifndef SNMP_MIB_DEBUG +#define SNMP_MIB_DEBUG LWIP_DBG_OFF +#endif + +/** + * DNS_DEBUG: Enable debugging for DNS. + */ +#ifndef DNS_DEBUG +#define DNS_DEBUG LWIP_DBG_OFF +#endif + +#endif /* __LWIP_OPT_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/pbuf.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/pbuf.h new file mode 100644 index 0000000..8ca61b1 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/pbuf.h @@ -0,0 +1,122 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#ifndef __LWIP_PBUF_H__ +#define __LWIP_PBUF_H__ + +#include "lwip/opt.h" +#include "lwip/err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define PBUF_TRANSPORT_HLEN 20 +#define PBUF_IP_HLEN 20 + +typedef enum { + PBUF_TRANSPORT, + PBUF_IP, + PBUF_LINK, + PBUF_RAW +} pbuf_layer; + +typedef enum { + PBUF_RAM, /* pbuf data is stored in RAM */ + PBUF_ROM, /* pbuf data is stored in ROM */ + PBUF_REF, /* pbuf comes from the pbuf pool */ + PBUF_POOL /* pbuf payload refers to RAM */ +} pbuf_type; + + +/** indicates this packet's data should be immediately passed to the application */ +#define PBUF_FLAG_PUSH 0x01U + +struct pbuf { + /** next pbuf in singly linked pbuf chain */ + struct pbuf *next; + + /** pointer to the actual data in the buffer */ + void *payload; + + /** + * total length of this buffer and all next buffers in chain + * belonging to the same packet. + * + * For non-queue packet chains this is the invariant: + * p->tot_len == p->len + (p->next? p->next->tot_len: 0) + */ + u16_t tot_len; + + /** length of this buffer */ + u16_t len; + + /** pbuf_type as u8_t instead of enum to save space */ + u8_t /*pbuf_type*/ type; + + /** misc flags */ + u8_t flags; + + /** + * the reference count always equals the number of pointers + * that refer to this pbuf. This can be pointers from an application, + * the stack itself, or pbuf->next pointers from a chain. + */ + u16_t ref; + +}; + +/* Initializes the pbuf module. This call is empty for now, but may not be in future. */ +#define pbuf_init() + +struct pbuf *pbuf_alloc(pbuf_layer l, u16_t size, pbuf_type type); +void pbuf_realloc(struct pbuf *p, u16_t size); +u8_t pbuf_header(struct pbuf *p, s16_t header_size); +void pbuf_ref(struct pbuf *p); +void pbuf_ref_chain(struct pbuf *p); +u8_t pbuf_free(struct pbuf *p); +u8_t pbuf_clen(struct pbuf *p); +void pbuf_cat(struct pbuf *head, struct pbuf *tail); +void pbuf_chain(struct pbuf *head, struct pbuf *tail); +struct pbuf *pbuf_dechain(struct pbuf *p); +err_t pbuf_copy(struct pbuf *p_to, struct pbuf *p_from); +u16_t pbuf_copy_partial(struct pbuf *p, void *dataptr, u16_t len, u16_t offset); +err_t pbuf_take(struct pbuf *buf, const void *dataptr, u16_t len); +struct pbuf *pbuf_coalesce(struct pbuf *p, pbuf_layer layer); + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_PBUF_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/raw.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/raw.h new file mode 100644 index 0000000..545c433 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/raw.h @@ -0,0 +1,99 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_RAW_H__ +#define __LWIP_RAW_H__ + +#include "lwip/opt.h" + +#if LWIP_RAW /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/pbuf.h" +#include "lwip/inet.h" +#include "lwip/ip.h" +#include "lwip/ip_addr.h" + +#ifdef __cplusplus +extern "C" { +#endif + +struct raw_pcb { +/* Common members of all PCB types */ + IP_PCB; + + struct raw_pcb *next; + + u8_t protocol; + + /* receive callback function + * @param arg user supplied argument (raw_pcb.recv_arg) + * @param pcb the raw_pcb which received data + * @param p the packet buffer that was received + * @param addr the remote IP address from which the packet was received + * @return 1 if the packet was 'eaten' (aka. deleted), + * 0 if the packet lives on + * If returning 1, the callback is responsible for freeing the pbuf + * if it's not used any more. + */ + u8_t (* recv)(void *arg, struct raw_pcb *pcb, struct pbuf *p, + struct ip_addr *addr); + /* user-supplied argument for the recv callback */ + void *recv_arg; +}; + +/* The following functions is the application layer interface to the + RAW code. */ +struct raw_pcb * raw_new (u8_t proto); +void raw_remove (struct raw_pcb *pcb); +err_t raw_bind (struct raw_pcb *pcb, struct ip_addr *ipaddr); +err_t raw_connect (struct raw_pcb *pcb, struct ip_addr *ipaddr); + +void raw_recv (struct raw_pcb *pcb, + u8_t (* recv)(void *arg, struct raw_pcb *pcb, + struct pbuf *p, + struct ip_addr *addr), + void *recv_arg); +err_t raw_sendto (struct raw_pcb *pcb, struct pbuf *p, struct ip_addr *ipaddr); +err_t raw_send (struct raw_pcb *pcb, struct pbuf *p); + +/* The following functions are the lower layer interface to RAW. */ +u8_t raw_input (struct pbuf *p, struct netif *inp); +#define raw_init() /* Compatibility define, not init needed. */ + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_RAW */ + +#endif /* __LWIP_RAW_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/sio.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/sio.h new file mode 100644 index 0000000..10eabcf --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/sio.h @@ -0,0 +1,143 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + */ + +/* + * This is the interface to the platform specific serial IO module + * It needs to be implemented by those platforms which need SLIP or PPP + */ + +#ifndef __SIO_H__ +#define __SIO_H__ + +#include "lwip/arch.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* If you want to define sio_fd_t elsewhere or differently, + define this in your cc.h file. */ +#ifndef __sio_fd_t_defined +typedef void * sio_fd_t; +#endif + +/* The following functions can be defined to something else in your cc.h file + or be implemented in your custom sio.c file. */ + +#ifndef sio_open +/** + * Opens a serial device for communication. + * + * @param devnum device number + * @return handle to serial device if successful, NULL otherwise + */ +sio_fd_t sio_open(u8_t devnum); +#endif + +#ifndef sio_send +/** + * Sends a single character to the serial device. + * + * @param c character to send + * @param fd serial device handle + * + * @note This function will block until the character can be sent. + */ +void sio_send(u8_t c, sio_fd_t fd); +#endif + +#ifndef sio_recv +/** + * Receives a single character from the serial device. + * + * @param fd serial device handle + * + * @note This function will block until a character is received. + */ +u8_t sio_recv(sio_fd_t fd); +#endif + +#ifndef sio_read +/** + * Reads from the serial device. + * + * @param fd serial device handle + * @param data pointer to data buffer for receiving + * @param len maximum length (in bytes) of data to receive + * @return number of bytes actually received - may be 0 if aborted by sio_read_abort + * + * @note This function will block until data can be received. The blocking + * can be cancelled by calling sio_read_abort(). + */ +u32_t sio_read(sio_fd_t fd, u8_t *data, u32_t len); +#endif + +#ifndef sio_tryread +/** + * Tries to read from the serial device. Same as sio_read but returns + * immediately if no data is available and never blocks. + * + * @param fd serial device handle + * @param data pointer to data buffer for receiving + * @param len maximum length (in bytes) of data to receive + * @return number of bytes actually received + */ +u32_t sio_tryread(sio_fd_t fd, u8_t *data, u32_t len); +#endif + +#ifndef sio_write +/** + * Writes to the serial device. + * + * @param fd serial device handle + * @param data pointer to data to send + * @param len length (in bytes) of data to send + * @return number of bytes actually sent + * + * @note This function will block until all data can be sent. + */ +u32_t sio_write(sio_fd_t fd, u8_t *data, u32_t len); +#endif + +#ifndef sio_read_abort +/** + * Aborts a blocking sio_read() call. + * + * @param fd serial device handle + */ +void sio_read_abort(sio_fd_t fd); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __SIO_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/snmp.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/snmp.h new file mode 100644 index 0000000..b87717f --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/snmp.h @@ -0,0 +1,366 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001, 2002 Leon Woestenberg + * Copyright (c) 2001, 2002 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Leon Woestenberg + * + */ +#ifndef __LWIP_SNMP_H__ +#define __LWIP_SNMP_H__ + +#include "lwip/opt.h" +#include "lwip/netif.h" +#include "lwip/udp.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @see RFC1213, "MIB-II, 6. Definitions" + */ +enum snmp_ifType { + snmp_ifType_other=1, /* none of the following */ + snmp_ifType_regular1822, + snmp_ifType_hdh1822, + snmp_ifType_ddn_x25, + snmp_ifType_rfc877_x25, + snmp_ifType_ethernet_csmacd, + snmp_ifType_iso88023_csmacd, + snmp_ifType_iso88024_tokenBus, + snmp_ifType_iso88025_tokenRing, + snmp_ifType_iso88026_man, + snmp_ifType_starLan, + snmp_ifType_proteon_10Mbit, + snmp_ifType_proteon_80Mbit, + snmp_ifType_hyperchannel, + snmp_ifType_fddi, + snmp_ifType_lapb, + snmp_ifType_sdlc, + snmp_ifType_ds1, /* T-1 */ + snmp_ifType_e1, /* european equiv. of T-1 */ + snmp_ifType_basicISDN, + snmp_ifType_primaryISDN, /* proprietary serial */ + snmp_ifType_propPointToPointSerial, + snmp_ifType_ppp, + snmp_ifType_softwareLoopback, + snmp_ifType_eon, /* CLNP over IP [11] */ + snmp_ifType_ethernet_3Mbit, + snmp_ifType_nsip, /* XNS over IP */ + snmp_ifType_slip, /* generic SLIP */ + snmp_ifType_ultra, /* ULTRA technologies */ + snmp_ifType_ds3, /* T-3 */ + snmp_ifType_sip, /* SMDS */ + snmp_ifType_frame_relay +}; + +#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */ + +/** SNMP "sysuptime" Interval */ +#define SNMP_SYSUPTIME_INTERVAL 10 + +/** fixed maximum length for object identifier type */ +#define LWIP_SNMP_OBJ_ID_LEN 32 + +/** internal object identifier representation */ +struct snmp_obj_id +{ + u8_t len; + s32_t id[LWIP_SNMP_OBJ_ID_LEN]; +}; + +/* system */ +void snmp_set_sysdesr(u8_t* str, u8_t* len); +void snmp_set_sysobjid(struct snmp_obj_id *oid); +void snmp_get_sysobjid_ptr(struct snmp_obj_id **oid); +void snmp_inc_sysuptime(void); +void snmp_add_sysuptime(u32_t value); +void snmp_get_sysuptime(u32_t *value); +void snmp_set_syscontact(u8_t *ocstr, u8_t *ocstrlen); +void snmp_set_sysname(u8_t *ocstr, u8_t *ocstrlen); +void snmp_set_syslocation(u8_t *ocstr, u8_t *ocstrlen); + +/* network interface */ +void snmp_add_ifinoctets(struct netif *ni, u32_t value); +void snmp_inc_ifinucastpkts(struct netif *ni); +void snmp_inc_ifinnucastpkts(struct netif *ni); +void snmp_inc_ifindiscards(struct netif *ni); +void snmp_add_ifoutoctets(struct netif *ni, u32_t value); +void snmp_inc_ifoutucastpkts(struct netif *ni); +void snmp_inc_ifoutnucastpkts(struct netif *ni); +void snmp_inc_ifoutdiscards(struct netif *ni); +void snmp_inc_iflist(void); +void snmp_dec_iflist(void); + +/* ARP (for atTable and ipNetToMediaTable) */ +void snmp_insert_arpidx_tree(struct netif *ni, struct ip_addr *ip); +void snmp_delete_arpidx_tree(struct netif *ni, struct ip_addr *ip); + +/* IP */ +void snmp_inc_ipinreceives(void); +void snmp_inc_ipinhdrerrors(void); +void snmp_inc_ipinaddrerrors(void); +void snmp_inc_ipforwdatagrams(void); +void snmp_inc_ipinunknownprotos(void); +void snmp_inc_ipindiscards(void); +void snmp_inc_ipindelivers(void); +void snmp_inc_ipoutrequests(void); +void snmp_inc_ipoutdiscards(void); +void snmp_inc_ipoutnoroutes(void); +void snmp_inc_ipreasmreqds(void); +void snmp_inc_ipreasmoks(void); +void snmp_inc_ipreasmfails(void); +void snmp_inc_ipfragoks(void); +void snmp_inc_ipfragfails(void); +void snmp_inc_ipfragcreates(void); +void snmp_inc_iproutingdiscards(void); +void snmp_insert_ipaddridx_tree(struct netif *ni); +void snmp_delete_ipaddridx_tree(struct netif *ni); +void snmp_insert_iprteidx_tree(u8_t dflt, struct netif *ni); +void snmp_delete_iprteidx_tree(u8_t dflt, struct netif *ni); + +/* ICMP */ +void snmp_inc_icmpinmsgs(void); +void snmp_inc_icmpinerrors(void); +void snmp_inc_icmpindestunreachs(void); +void snmp_inc_icmpintimeexcds(void); +void snmp_inc_icmpinparmprobs(void); +void snmp_inc_icmpinsrcquenchs(void); +void snmp_inc_icmpinredirects(void); +void snmp_inc_icmpinechos(void); +void snmp_inc_icmpinechoreps(void); +void snmp_inc_icmpintimestamps(void); +void snmp_inc_icmpintimestampreps(void); +void snmp_inc_icmpinaddrmasks(void); +void snmp_inc_icmpinaddrmaskreps(void); +void snmp_inc_icmpoutmsgs(void); +void snmp_inc_icmpouterrors(void); +void snmp_inc_icmpoutdestunreachs(void); +void snmp_inc_icmpouttimeexcds(void); +void snmp_inc_icmpoutparmprobs(void); +void snmp_inc_icmpoutsrcquenchs(void); +void snmp_inc_icmpoutredirects(void); +void snmp_inc_icmpoutechos(void); +void snmp_inc_icmpoutechoreps(void); +void snmp_inc_icmpouttimestamps(void); +void snmp_inc_icmpouttimestampreps(void); +void snmp_inc_icmpoutaddrmasks(void); +void snmp_inc_icmpoutaddrmaskreps(void); + +/* TCP */ +void snmp_inc_tcpactiveopens(void); +void snmp_inc_tcppassiveopens(void); +void snmp_inc_tcpattemptfails(void); +void snmp_inc_tcpestabresets(void); +void snmp_inc_tcpinsegs(void); +void snmp_inc_tcpoutsegs(void); +void snmp_inc_tcpretranssegs(void); +void snmp_inc_tcpinerrs(void); +void snmp_inc_tcpoutrsts(void); + +/* UDP */ +void snmp_inc_udpindatagrams(void); +void snmp_inc_udpnoports(void); +void snmp_inc_udpinerrors(void); +void snmp_inc_udpoutdatagrams(void); +void snmp_insert_udpidx_tree(struct udp_pcb *pcb); +void snmp_delete_udpidx_tree(struct udp_pcb *pcb); + +/* SNMP */ +void snmp_inc_snmpinpkts(void); +void snmp_inc_snmpoutpkts(void); +void snmp_inc_snmpinbadversions(void); +void snmp_inc_snmpinbadcommunitynames(void); +void snmp_inc_snmpinbadcommunityuses(void); +void snmp_inc_snmpinasnparseerrs(void); +void snmp_inc_snmpintoobigs(void); +void snmp_inc_snmpinnosuchnames(void); +void snmp_inc_snmpinbadvalues(void); +void snmp_inc_snmpinreadonlys(void); +void snmp_inc_snmpingenerrs(void); +void snmp_add_snmpintotalreqvars(u8_t value); +void snmp_add_snmpintotalsetvars(u8_t value); +void snmp_inc_snmpingetrequests(void); +void snmp_inc_snmpingetnexts(void); +void snmp_inc_snmpinsetrequests(void); +void snmp_inc_snmpingetresponses(void); +void snmp_inc_snmpintraps(void); +void snmp_inc_snmpouttoobigs(void); +void snmp_inc_snmpoutnosuchnames(void); +void snmp_inc_snmpoutbadvalues(void); +void snmp_inc_snmpoutgenerrs(void); +void snmp_inc_snmpoutgetrequests(void); +void snmp_inc_snmpoutgetnexts(void); +void snmp_inc_snmpoutsetrequests(void); +void snmp_inc_snmpoutgetresponses(void); +void snmp_inc_snmpouttraps(void); +void snmp_get_snmpgrpid_ptr(struct snmp_obj_id **oid); +void snmp_set_snmpenableauthentraps(u8_t *value); +void snmp_get_snmpenableauthentraps(u8_t *value); + +/* LWIP_SNMP support not available */ +/* define everything to be empty */ +#else + +/* system */ +#define snmp_set_sysdesr(str, len) +#define snmp_set_sysobjid(oid); +#define snmp_get_sysobjid_ptr(oid) +#define snmp_inc_sysuptime() +#define snmp_add_sysuptime(value) +#define snmp_get_sysuptime(value) +#define snmp_set_syscontact(ocstr, ocstrlen); +#define snmp_set_sysname(ocstr, ocstrlen); +#define snmp_set_syslocation(ocstr, ocstrlen); + +/* network interface */ +#define snmp_add_ifinoctets(ni,value) +#define snmp_inc_ifinucastpkts(ni) +#define snmp_inc_ifinnucastpkts(ni) +#define snmp_inc_ifindiscards(ni) +#define snmp_add_ifoutoctets(ni,value) +#define snmp_inc_ifoutucastpkts(ni) +#define snmp_inc_ifoutnucastpkts(ni) +#define snmp_inc_ifoutdiscards(ni) +#define snmp_inc_iflist() +#define snmp_dec_iflist() + +/* ARP */ +#define snmp_insert_arpidx_tree(ni,ip) +#define snmp_delete_arpidx_tree(ni,ip) + +/* IP */ +#define snmp_inc_ipinreceives() +#define snmp_inc_ipinhdrerrors() +#define snmp_inc_ipinaddrerrors() +#define snmp_inc_ipforwdatagrams() +#define snmp_inc_ipinunknownprotos() +#define snmp_inc_ipindiscards() +#define snmp_inc_ipindelivers() +#define snmp_inc_ipoutrequests() +#define snmp_inc_ipoutdiscards() +#define snmp_inc_ipoutnoroutes() +#define snmp_inc_ipreasmreqds() +#define snmp_inc_ipreasmoks() +#define snmp_inc_ipreasmfails() +#define snmp_inc_ipfragoks() +#define snmp_inc_ipfragfails() +#define snmp_inc_ipfragcreates() +#define snmp_inc_iproutingdiscards() +#define snmp_insert_ipaddridx_tree(ni) +#define snmp_delete_ipaddridx_tree(ni) +#define snmp_insert_iprteidx_tree(dflt, ni) +#define snmp_delete_iprteidx_tree(dflt, ni) + +/* ICMP */ +#define snmp_inc_icmpinmsgs() +#define snmp_inc_icmpinerrors() +#define snmp_inc_icmpindestunreachs() +#define snmp_inc_icmpintimeexcds() +#define snmp_inc_icmpinparmprobs() +#define snmp_inc_icmpinsrcquenchs() +#define snmp_inc_icmpinredirects() +#define snmp_inc_icmpinechos() +#define snmp_inc_icmpinechoreps() +#define snmp_inc_icmpintimestamps() +#define snmp_inc_icmpintimestampreps() +#define snmp_inc_icmpinaddrmasks() +#define snmp_inc_icmpinaddrmaskreps() +#define snmp_inc_icmpoutmsgs() +#define snmp_inc_icmpouterrors() +#define snmp_inc_icmpoutdestunreachs() +#define snmp_inc_icmpouttimeexcds() +#define snmp_inc_icmpoutparmprobs() +#define snmp_inc_icmpoutsrcquenchs() +#define snmp_inc_icmpoutredirects() +#define snmp_inc_icmpoutechos() +#define snmp_inc_icmpoutechoreps() +#define snmp_inc_icmpouttimestamps() +#define snmp_inc_icmpouttimestampreps() +#define snmp_inc_icmpoutaddrmasks() +#define snmp_inc_icmpoutaddrmaskreps() +/* TCP */ +#define snmp_inc_tcpactiveopens() +#define snmp_inc_tcppassiveopens() +#define snmp_inc_tcpattemptfails() +#define snmp_inc_tcpestabresets() +#define snmp_inc_tcpinsegs() +#define snmp_inc_tcpoutsegs() +#define snmp_inc_tcpretranssegs() +#define snmp_inc_tcpinerrs() +#define snmp_inc_tcpoutrsts() + +/* UDP */ +#define snmp_inc_udpindatagrams() +#define snmp_inc_udpnoports() +#define snmp_inc_udpinerrors() +#define snmp_inc_udpoutdatagrams() +#define snmp_insert_udpidx_tree(pcb) +#define snmp_delete_udpidx_tree(pcb) + +/* SNMP */ +#define snmp_inc_snmpinpkts() +#define snmp_inc_snmpoutpkts() +#define snmp_inc_snmpinbadversions() +#define snmp_inc_snmpinbadcommunitynames() +#define snmp_inc_snmpinbadcommunityuses() +#define snmp_inc_snmpinasnparseerrs() +#define snmp_inc_snmpintoobigs() +#define snmp_inc_snmpinnosuchnames() +#define snmp_inc_snmpinbadvalues() +#define snmp_inc_snmpinreadonlys() +#define snmp_inc_snmpingenerrs() +#define snmp_add_snmpintotalreqvars(value) +#define snmp_add_snmpintotalsetvars(value) +#define snmp_inc_snmpingetrequests() +#define snmp_inc_snmpingetnexts() +#define snmp_inc_snmpinsetrequests() +#define snmp_inc_snmpingetresponses() +#define snmp_inc_snmpintraps() +#define snmp_inc_snmpouttoobigs() +#define snmp_inc_snmpoutnosuchnames() +#define snmp_inc_snmpoutbadvalues() +#define snmp_inc_snmpoutgenerrs() +#define snmp_inc_snmpoutgetrequests() +#define snmp_inc_snmpoutgetnexts() +#define snmp_inc_snmpoutsetrequests() +#define snmp_inc_snmpoutgetresponses() +#define snmp_inc_snmpouttraps() +#define snmp_get_snmpgrpid_ptr(oid) +#define snmp_set_snmpenableauthentraps(value) +#define snmp_get_snmpenableauthentraps(value) + +#endif /* LWIP_SNMP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_SNMP_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/snmp_asn1.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/snmp_asn1.h new file mode 100644 index 0000000..a40d5ef --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/snmp_asn1.h @@ -0,0 +1,103 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Abstract Syntax Notation One (ISO 8824, 8825) codec. + */ + +/* + * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Christiaan Simons + */ + +#ifndef __LWIP_SNMP_ASN1_H__ +#define __LWIP_SNMP_ASN1_H__ + +#include "lwip/opt.h" +#include "lwip/err.h" +#include "lwip/pbuf.h" +#include "lwip/snmp.h" + +#if LWIP_SNMP + +#ifdef __cplusplus +extern "C" { +#endif + +#define SNMP_ASN1_UNIV (!0x80 | !0x40) +#define SNMP_ASN1_APPLIC (!0x80 | 0x40) +#define SNMP_ASN1_CONTXT ( 0x80 | !0x40) + +#define SNMP_ASN1_CONSTR (0x20) +#define SNMP_ASN1_PRIMIT (!0x20) + +/* universal tags */ +#define SNMP_ASN1_INTEG 2 +#define SNMP_ASN1_OC_STR 4 +#define SNMP_ASN1_NUL 5 +#define SNMP_ASN1_OBJ_ID 6 +#define SNMP_ASN1_SEQ 16 + +/* application specific (SNMP) tags */ +#define SNMP_ASN1_IPADDR 0 /* octet string size(4) */ +#define SNMP_ASN1_COUNTER 1 /* u32_t */ +#define SNMP_ASN1_GAUGE 2 /* u32_t */ +#define SNMP_ASN1_TIMETICKS 3 /* u32_t */ +#define SNMP_ASN1_OPAQUE 4 /* octet string */ + +/* context specific (SNMP) tags */ +#define SNMP_ASN1_PDU_GET_REQ 0 +#define SNMP_ASN1_PDU_GET_NEXT_REQ 1 +#define SNMP_ASN1_PDU_GET_RESP 2 +#define SNMP_ASN1_PDU_SET_REQ 3 +#define SNMP_ASN1_PDU_TRAP 4 + +err_t snmp_asn1_dec_type(struct pbuf *p, u16_t ofs, u8_t *type); +err_t snmp_asn1_dec_length(struct pbuf *p, u16_t ofs, u8_t *octets_used, u16_t *length); +err_t snmp_asn1_dec_u32t(struct pbuf *p, u16_t ofs, u16_t len, u32_t *value); +err_t snmp_asn1_dec_s32t(struct pbuf *p, u16_t ofs, u16_t len, s32_t *value); +err_t snmp_asn1_dec_oid(struct pbuf *p, u16_t ofs, u16_t len, struct snmp_obj_id *oid); +err_t snmp_asn1_dec_raw(struct pbuf *p, u16_t ofs, u16_t len, u16_t raw_len, u8_t *raw); + +void snmp_asn1_enc_length_cnt(u16_t length, u8_t *octets_needed); +void snmp_asn1_enc_u32t_cnt(u32_t value, u16_t *octets_needed); +void snmp_asn1_enc_s32t_cnt(s32_t value, u16_t *octets_needed); +void snmp_asn1_enc_oid_cnt(u8_t ident_len, s32_t *ident, u16_t *octets_needed); +err_t snmp_asn1_enc_type(struct pbuf *p, u16_t ofs, u8_t type); +err_t snmp_asn1_enc_length(struct pbuf *p, u16_t ofs, u16_t length); +err_t snmp_asn1_enc_u32t(struct pbuf *p, u16_t ofs, u8_t octets_needed, u32_t value); +err_t snmp_asn1_enc_s32t(struct pbuf *p, u16_t ofs, u8_t octets_needed, s32_t value); +err_t snmp_asn1_enc_oid(struct pbuf *p, u16_t ofs, u8_t ident_len, s32_t *ident); +err_t snmp_asn1_enc_raw(struct pbuf *p, u16_t ofs, u8_t raw_len, u8_t *raw); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_SNMP */ + +#endif /* __LWIP_SNMP_ASN1_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/snmp_msg.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/snmp_msg.h new file mode 100644 index 0000000..6e50a61 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/snmp_msg.h @@ -0,0 +1,313 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * SNMP Agent message handling structures. + */ + +/* + * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Christiaan Simons + */ + +#ifndef __LWIP_SNMP_MSG_H__ +#define __LWIP_SNMP_MSG_H__ + +#include "lwip/opt.h" +#include "lwip/snmp.h" +#include "lwip/snmp_structs.h" + +#if LWIP_SNMP + +#if SNMP_PRIVATE_MIB +#include "private_mib.h" +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/* The listen port of the SNMP agent. Clients have to make their requests to + this port. Most standard clients won't work if you change this! */ +#ifndef SNMP_IN_PORT +#define SNMP_IN_PORT 161 +#endif +/* The remote port the SNMP agent sends traps to. Most standard trap sinks won't + work if you change this! */ +#ifndef SNMP_TRAP_PORT +#define SNMP_TRAP_PORT 162 +#endif + +#define SNMP_ES_NOERROR 0 +#define SNMP_ES_TOOBIG 1 +#define SNMP_ES_NOSUCHNAME 2 +#define SNMP_ES_BADVALUE 3 +#define SNMP_ES_READONLY 4 +#define SNMP_ES_GENERROR 5 + +#define SNMP_GENTRAP_COLDSTART 0 +#define SNMP_GENTRAP_WARMSTART 1 +#define SNMP_GENTRAP_AUTHFAIL 4 +#define SNMP_GENTRAP_ENTERPRISESPC 6 + +struct snmp_varbind +{ + /* next pointer, NULL for last in list */ + struct snmp_varbind *next; + /* previous pointer, NULL for first in list */ + struct snmp_varbind *prev; + + /* object identifier length (in s32_t) */ + u8_t ident_len; + /* object identifier array */ + s32_t *ident; + + /* object value ASN1 type */ + u8_t value_type; + /* object value length (in u8_t) */ + u8_t value_len; + /* object value */ + void *value; + + /* encoding varbind seq length length */ + u8_t seqlenlen; + /* encoding object identifier length length */ + u8_t olenlen; + /* encoding object value length length */ + u8_t vlenlen; + /* encoding varbind seq length */ + u16_t seqlen; + /* encoding object identifier length */ + u16_t olen; + /* encoding object value length */ + u16_t vlen; +}; + +struct snmp_varbind_root +{ + struct snmp_varbind *head; + struct snmp_varbind *tail; + /* number of variable bindings in list */ + u8_t count; + /* encoding varbind-list seq length length */ + u8_t seqlenlen; + /* encoding varbind-list seq length */ + u16_t seqlen; +}; + +/** output response message header length fields */ +struct snmp_resp_header_lengths +{ + /* encoding error-index length length */ + u8_t erridxlenlen; + /* encoding error-status length length */ + u8_t errstatlenlen; + /* encoding request id length length */ + u8_t ridlenlen; + /* encoding pdu length length */ + u8_t pdulenlen; + /* encoding community length length */ + u8_t comlenlen; + /* encoding version length length */ + u8_t verlenlen; + /* encoding sequence length length */ + u8_t seqlenlen; + + /* encoding error-index length */ + u16_t erridxlen; + /* encoding error-status length */ + u16_t errstatlen; + /* encoding request id length */ + u16_t ridlen; + /* encoding pdu length */ + u16_t pdulen; + /* encoding community length */ + u16_t comlen; + /* encoding version length */ + u16_t verlen; + /* encoding sequence length */ + u16_t seqlen; +}; + +/** output response message header length fields */ +struct snmp_trap_header_lengths +{ + /* encoding timestamp length length */ + u8_t tslenlen; + /* encoding specific-trap length length */ + u8_t strplenlen; + /* encoding generic-trap length length */ + u8_t gtrplenlen; + /* encoding agent-addr length length */ + u8_t aaddrlenlen; + /* encoding enterprise-id length length */ + u8_t eidlenlen; + /* encoding pdu length length */ + u8_t pdulenlen; + /* encoding community length length */ + u8_t comlenlen; + /* encoding version length length */ + u8_t verlenlen; + /* encoding sequence length length */ + u8_t seqlenlen; + + /* encoding timestamp length */ + u16_t tslen; + /* encoding specific-trap length */ + u16_t strplen; + /* encoding generic-trap length */ + u16_t gtrplen; + /* encoding agent-addr length */ + u16_t aaddrlen; + /* encoding enterprise-id length */ + u16_t eidlen; + /* encoding pdu length */ + u16_t pdulen; + /* encoding community length */ + u16_t comlen; + /* encoding version length */ + u16_t verlen; + /* encoding sequence length */ + u16_t seqlen; +}; + +/* Accepting new SNMP messages. */ +#define SNMP_MSG_EMPTY 0 +/* Search for matching object for variable binding. */ +#define SNMP_MSG_SEARCH_OBJ 1 +/* Perform SNMP operation on in-memory object. + Pass-through states, for symmetry only. */ +#define SNMP_MSG_INTERNAL_GET_OBJDEF 2 +#define SNMP_MSG_INTERNAL_GET_VALUE 3 +#define SNMP_MSG_INTERNAL_SET_TEST 4 +#define SNMP_MSG_INTERNAL_GET_OBJDEF_S 5 +#define SNMP_MSG_INTERNAL_SET_VALUE 6 +/* Perform SNMP operation on object located externally. + In theory this could be used for building a proxy agent. + Practical use is for an enterprise spc. app. gateway. */ +#define SNMP_MSG_EXTERNAL_GET_OBJDEF 7 +#define SNMP_MSG_EXTERNAL_GET_VALUE 8 +#define SNMP_MSG_EXTERNAL_SET_TEST 9 +#define SNMP_MSG_EXTERNAL_GET_OBJDEF_S 10 +#define SNMP_MSG_EXTERNAL_SET_VALUE 11 + +#define SNMP_COMMUNITY_STR_LEN 64 +struct snmp_msg_pstat +{ + /* lwIP local port (161) binding */ + struct udp_pcb *pcb; + /* source IP address */ + struct ip_addr sip; + /* source UDP port */ + u16_t sp; + /* request type */ + u8_t rt; + /* request ID */ + s32_t rid; + /* error status */ + s32_t error_status; + /* error index */ + s32_t error_index; + /* community name (zero terminated) */ + u8_t community[SNMP_COMMUNITY_STR_LEN + 1]; + /* community string length (exclusive zero term) */ + u8_t com_strlen; + /* one out of MSG_EMPTY, MSG_DEMUX, MSG_INTERNAL, MSG_EXTERNAL_x */ + u8_t state; + /* saved arguments for MSG_EXTERNAL_x */ + struct mib_external_node *ext_mib_node; + struct snmp_name_ptr ext_name_ptr; + struct obj_def ext_object_def; + struct snmp_obj_id ext_oid; + /* index into input variable binding list */ + u8_t vb_idx; + /* ptr into input variable binding list */ + struct snmp_varbind *vb_ptr; + /* list of variable bindings from input */ + struct snmp_varbind_root invb; + /* list of variable bindings to output */ + struct snmp_varbind_root outvb; + /* output response lengths used in ASN encoding */ + struct snmp_resp_header_lengths rhl; +}; + +struct snmp_msg_trap +{ + /* lwIP local port (161) binding */ + struct udp_pcb *pcb; + /* destination IP address in network order */ + struct ip_addr dip; + + /* source enterprise ID (sysObjectID) */ + struct snmp_obj_id *enterprise; + /* source IP address, raw network order format */ + u8_t sip_raw[4]; + /* generic trap code */ + u32_t gen_trap; + /* specific trap code */ + u32_t spc_trap; + /* timestamp */ + u32_t ts; + /* list of variable bindings to output */ + struct snmp_varbind_root outvb; + /* output trap lengths used in ASN encoding */ + struct snmp_trap_header_lengths thl; +}; + +/** Agent Version constant, 0 = v1 oddity */ +extern const s32_t snmp_version; +/** Agent default "public" community string */ +extern const char snmp_publiccommunity[7]; + +extern struct snmp_msg_trap trap_msg; + +/** Agent setup, start listening to port 161. */ +void snmp_init(void); +void snmp_trap_dst_enable(u8_t dst_idx, u8_t enable); +void snmp_trap_dst_ip_set(u8_t dst_idx, struct ip_addr *dst); + +/** Varbind-list functions. */ +struct snmp_varbind* snmp_varbind_alloc(struct snmp_obj_id *oid, u8_t type, u8_t len); +void snmp_varbind_free(struct snmp_varbind *vb); +void snmp_varbind_list_free(struct snmp_varbind_root *root); +void snmp_varbind_tail_add(struct snmp_varbind_root *root, struct snmp_varbind *vb); +struct snmp_varbind* snmp_varbind_tail_remove(struct snmp_varbind_root *root); + +/** Handle an internal (recv) or external (private response) event. */ +void snmp_msg_event(u8_t request_id); +err_t snmp_send_response(struct snmp_msg_pstat *m_stat); +err_t snmp_send_trap(s8_t generic_trap, struct snmp_obj_id *eoid, s32_t specific_trap); +void snmp_coldstart_trap(void); +void snmp_authfail_trap(void); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_SNMP */ + +#endif /* __LWIP_SNMP_MSG_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/snmp_structs.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/snmp_structs.h new file mode 100644 index 0000000..93f4ea3 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/snmp_structs.h @@ -0,0 +1,264 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Generic MIB tree structures. + * + * @todo namespace prefixes + */ + +/* + * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Christiaan Simons + */ + +#ifndef __LWIP_SNMP_STRUCTS_H__ +#define __LWIP_SNMP_STRUCTS_H__ + +#include "lwip/opt.h" + +#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/snmp.h" + +#if SNMP_PRIVATE_MIB +#include "private_mib.h" +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/* MIB object instance */ +#define MIB_OBJECT_NONE 0 +#define MIB_OBJECT_SCALAR 1 +#define MIB_OBJECT_TAB 2 + +/* MIB object access */ +#define MIB_OBJECT_READ_ONLY 0 +#define MIB_OBJECT_READ_WRITE 1 +#define MIB_OBJECT_WRITE_ONLY 2 +#define MIB_OBJECT_NOT_ACCESSIBLE 3 + +/** object definition returned by (get_object_def)() */ +struct obj_def +{ + /* MIB_OBJECT_NONE (0), MIB_OBJECT_SCALAR (1), MIB_OBJECT_TAB (2) */ + u8_t instance; + /* 0 read-only, 1 read-write, 2 write-only, 3 not-accessible */ + u8_t access; + /* ASN type for this object */ + u8_t asn_type; + /* value length (host length) */ + u16_t v_len; + /* length of instance part of supplied object identifier */ + u8_t id_inst_len; + /* instance part of supplied object identifier */ + s32_t *id_inst_ptr; +}; + +struct snmp_name_ptr +{ + u8_t ident_len; + s32_t *ident; +}; + +/** MIB const scalar (.0) node */ +#define MIB_NODE_SC 0x01 +/** MIB const array node */ +#define MIB_NODE_AR 0x02 +/** MIB array node (mem_malloced from RAM) */ +#define MIB_NODE_RA 0x03 +/** MIB list root node (mem_malloced from RAM) */ +#define MIB_NODE_LR 0x04 +/** MIB node for external objects */ +#define MIB_NODE_EX 0x05 + +/** node "base class" layout, the mandatory fields for a node */ +struct mib_node +{ + /** returns struct obj_def for the given object identifier */ + void (*get_object_def)(u8_t ident_len, s32_t *ident, struct obj_def *od); + /** returns object value for the given object identifier, + @note the caller must allocate at least len bytes for the value */ + void (*get_value)(struct obj_def *od, u16_t len, void *value); + /** tests length and/or range BEFORE setting */ + u8_t (*set_test)(struct obj_def *od, u16_t len, void *value); + /** sets object value, only to be called when set_test() */ + void (*set_value)(struct obj_def *od, u16_t len, void *value); + /** One out of MIB_NODE_AR, MIB_NODE_LR or MIB_NODE_EX */ + const u8_t node_type; + /* array or max list length */ + const u16_t maxlength; +}; + +/** derived node for scalars .0 index */ +typedef struct mib_node mib_scalar_node; + +/** derived node, points to a fixed size const array + of sub-identifiers plus a 'child' pointer */ +struct mib_array_node +{ + /* inherited "base class" members */ + void (* const get_object_def)(u8_t ident_len, s32_t *ident, struct obj_def *od); + void (* const get_value)(struct obj_def *od, u16_t len, void *value); + u8_t (*set_test)(struct obj_def *od, u16_t len, void *value); + void (*set_value)(struct obj_def *od, u16_t len, void *value); + + const u8_t node_type; + const u16_t maxlength; + + /* aditional struct members */ + const s32_t *objid; + struct mib_node* const *nptr; +}; + +/** derived node, points to a fixed size mem_malloced array + of sub-identifiers plus a 'child' pointer */ +struct mib_ram_array_node +{ + /* inherited "base class" members */ + void (*get_object_def)(u8_t ident_len, s32_t *ident, struct obj_def *od); + void (*get_value)(struct obj_def *od, u16_t len, void *value); + u8_t (*set_test)(struct obj_def *od, u16_t len, void *value); + void (*set_value)(struct obj_def *od, u16_t len, void *value); + + u8_t node_type; + u16_t maxlength; + + /* aditional struct members */ + s32_t *objid; + struct mib_node **nptr; +}; + +struct mib_list_node +{ + struct mib_list_node *prev; + struct mib_list_node *next; + s32_t objid; + struct mib_node *nptr; +}; + +/** derived node, points to a doubly linked list + of sub-identifiers plus a 'child' pointer */ +struct mib_list_rootnode +{ + /* inherited "base class" members */ + void (*get_object_def)(u8_t ident_len, s32_t *ident, struct obj_def *od); + void (*get_value)(struct obj_def *od, u16_t len, void *value); + u8_t (*set_test)(struct obj_def *od, u16_t len, void *value); + void (*set_value)(struct obj_def *od, u16_t len, void *value); + + u8_t node_type; + u16_t maxlength; + + /* aditional struct members */ + struct mib_list_node *head; + struct mib_list_node *tail; + /* counts list nodes in list */ + u16_t count; +}; + +/** derived node, has access functions for mib object in external memory or device + using 'tree_level' and 'idx', with a range 0 .. (level_length() - 1) */ +struct mib_external_node +{ + /* inherited "base class" members */ + void (*get_object_def)(u8_t ident_len, s32_t *ident, struct obj_def *od); + void (*get_value)(struct obj_def *od, u16_t len, void *value); + u8_t (*set_test)(struct obj_def *od, u16_t len, void *value); + void (*set_value)(struct obj_def *od, u16_t len, void *value); + + u8_t node_type; + u16_t maxlength; + + /* aditional struct members */ + /** points to an extenal (in memory) record of some sort of addressing + information, passed to and interpreted by the funtions below */ + void* addr_inf; + /** tree levels under this node */ + u8_t tree_levels; + /** number of objects at this level */ + u16_t (*level_length)(void* addr_inf, u8_t level); + /** compares object sub identifier with external id + return zero when equal, nonzero when unequal */ + s32_t (*ident_cmp)(void* addr_inf, u8_t level, u16_t idx, s32_t sub_id); + void (*get_objid)(void* addr_inf, u8_t level, u16_t idx, s32_t *sub_id); + + /** async Questions */ + void (*get_object_def_q)(void* addr_inf, u8_t rid, u8_t ident_len, s32_t *ident); + void (*get_value_q)(u8_t rid, struct obj_def *od); + void (*set_test_q)(u8_t rid, struct obj_def *od); + void (*set_value_q)(u8_t rid, struct obj_def *od, u16_t len, void *value); + /** async Answers */ + void (*get_object_def_a)(u8_t rid, u8_t ident_len, s32_t *ident, struct obj_def *od); + void (*get_value_a)(u8_t rid, struct obj_def *od, u16_t len, void *value); + u8_t (*set_test_a)(u8_t rid, struct obj_def *od, u16_t len, void *value); + void (*set_value_a)(u8_t rid, struct obj_def *od, u16_t len, void *value); + /** async Panic Close (agent returns error reply, + e.g. used for external transaction cleanup) */ + void (*get_object_def_pc)(u8_t rid, u8_t ident_len, s32_t *ident); + void (*get_value_pc)(u8_t rid, struct obj_def *od); + void (*set_test_pc)(u8_t rid, struct obj_def *od); + void (*set_value_pc)(u8_t rid, struct obj_def *od); +}; + +/** export MIB tree from mib2.c */ +extern const struct mib_array_node internet; + +/** dummy function pointers for non-leaf MIB nodes from mib2.c */ +void noleafs_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +void noleafs_get_value(struct obj_def *od, u16_t len, void *value); +u8_t noleafs_set_test(struct obj_def *od, u16_t len, void *value); +void noleafs_set_value(struct obj_def *od, u16_t len, void *value); + +void snmp_oidtoip(s32_t *ident, struct ip_addr *ip); +void snmp_iptooid(struct ip_addr *ip, s32_t *ident); +void snmp_ifindextonetif(s32_t ifindex, struct netif **netif); +void snmp_netiftoifindex(struct netif *netif, s32_t *ifidx); + +struct mib_list_node* snmp_mib_ln_alloc(s32_t id); +void snmp_mib_ln_free(struct mib_list_node *ln); +struct mib_list_rootnode* snmp_mib_lrn_alloc(void); +void snmp_mib_lrn_free(struct mib_list_rootnode *lrn); + +s8_t snmp_mib_node_insert(struct mib_list_rootnode *rn, s32_t objid, struct mib_list_node **insn); +s8_t snmp_mib_node_find(struct mib_list_rootnode *rn, s32_t objid, struct mib_list_node **fn); +struct mib_list_rootnode *snmp_mib_node_delete(struct mib_list_rootnode *rn, struct mib_list_node *n); + +struct mib_node* snmp_search_tree(struct mib_node *node, u8_t ident_len, s32_t *ident, struct snmp_name_ptr *np); +struct mib_node* snmp_expand_tree(struct mib_node *node, u8_t ident_len, s32_t *ident, struct snmp_obj_id *oidret); +u8_t snmp_iso_prefix_tst(u8_t ident_len, s32_t *ident); +u8_t snmp_iso_prefix_expand(u8_t ident_len, s32_t *ident, struct snmp_obj_id *oidret); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_SNMP */ + +#endif /* __LWIP_SNMP_STRUCTS_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/sockets.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/sockets.h new file mode 100644 index 0000000..675c1f7 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/sockets.h @@ -0,0 +1,359 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + + +#ifndef __LWIP_SOCKETS_H__ +#define __LWIP_SOCKETS_H__ + +#include "lwip/opt.h" + +#if LWIP_SOCKET /* don't build if not configured for use in lwipopts.h */ + +#include /* for size_t */ + +#include "lwip/ip_addr.h" +#include "lwip/inet.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* members are in network byte order */ +struct sockaddr_in { + u8_t sin_len; + u8_t sin_family; + u16_t sin_port; + struct in_addr sin_addr; + char sin_zero[8]; +}; + +struct sockaddr { + u8_t sa_len; + u8_t sa_family; + char sa_data[14]; +}; + +#ifndef socklen_t +# define socklen_t u32_t +#endif + +/* Socket protocol types (TCP/UDP/RAW) */ +#define SOCK_STREAM 1 +#define SOCK_DGRAM 2 +#define SOCK_RAW 3 + +/* + * Option flags per-socket. These must match the SOF_ flags in ip.h! + */ +#define SO_DEBUG 0x0001 /* Unimplemented: turn on debugging info recording */ +#define SO_ACCEPTCONN 0x0002 /* socket has had listen() */ +#define SO_REUSEADDR 0x0004 /* Unimplemented: allow local address reuse */ +#define SO_KEEPALIVE 0x0008 /* keep connections alive */ +#define SO_DONTROUTE 0x0010 /* Unimplemented: just use interface addresses */ +#define SO_BROADCAST 0x0020 /* permit to send and to receive broadcast messages (see IP_SOF_BROADCAST option) */ +#define SO_USELOOPBACK 0x0040 /* Unimplemented: bypass hardware when possible */ +#define SO_LINGER 0x0080 /* linger on close if data present */ +#define SO_OOBINLINE 0x0100 /* Unimplemented: leave received OOB data in line */ +#define SO_REUSEPORT 0x0200 /* Unimplemented: allow local address & port reuse */ + +#define SO_DONTLINGER ((int)(~SO_LINGER)) + +/* + * Additional options, not kept in so_options. + */ +#define SO_SNDBUF 0x1001 /* Unimplemented: send buffer size */ +#define SO_RCVBUF 0x1002 /* receive buffer size */ +#define SO_SNDLOWAT 0x1003 /* Unimplemented: send low-water mark */ +#define SO_RCVLOWAT 0x1004 /* Unimplemented: receive low-water mark */ +#define SO_SNDTIMEO 0x1005 /* Unimplemented: send timeout */ +#define SO_RCVTIMEO 0x1006 /* receive timeout */ +#define SO_ERROR 0x1007 /* get error status and clear */ +#define SO_TYPE 0x1008 /* get socket type */ +#define SO_CONTIMEO 0x1009 /* Unimplemented: connect timeout */ +#define SO_NO_CHECK 0x100a /* don't create UDP checksum */ + + +/* + * Structure used for manipulating linger option. + */ +struct linger { + int l_onoff; /* option on/off */ + int l_linger; /* linger time */ +}; + +/* + * Level number for (get/set)sockopt() to apply to socket itself. + */ +#define SOL_SOCKET 0xfff /* options for socket level */ + + +#define AF_UNSPEC 0 +#define AF_INET 2 +#define PF_INET AF_INET +#define PF_UNSPEC AF_UNSPEC + +#define IPPROTO_IP 0 +#define IPPROTO_TCP 6 +#define IPPROTO_UDP 17 +#define IPPROTO_UDPLITE 136 + +/* Flags we can use with send and recv. */ +#define MSG_PEEK 0x01 /* Peeks at an incoming message */ +#define MSG_WAITALL 0x02 /* Unimplemented: Requests that the function block until the full amount of data requested can be returned */ +#define MSG_OOB 0x04 /* Unimplemented: Requests out-of-band data. The significance and semantics of out-of-band data are protocol-specific */ +#define MSG_DONTWAIT 0x08 /* Nonblocking i/o for this operation only */ +#define MSG_MORE 0x10 /* Sender will send more */ + + +/* + * Options for level IPPROTO_IP + */ +#define IP_TOS 1 +#define IP_TTL 2 + +#if LWIP_TCP +/* + * Options for level IPPROTO_TCP + */ +#define TCP_NODELAY 0x01 /* don't delay send to coalesce packets */ +#define TCP_KEEPALIVE 0x02 /* send KEEPALIVE probes when idle for pcb->keep_idle milliseconds */ +#define TCP_KEEPIDLE 0x03 /* set pcb->keep_idle - Same as TCP_KEEPALIVE, but use seconds for get/setsockopt */ +#define TCP_KEEPINTVL 0x04 /* set pcb->keep_intvl - Use seconds for get/setsockopt */ +#define TCP_KEEPCNT 0x05 /* set pcb->keep_cnt - Use number of probes sent for get/setsockopt */ +#endif /* LWIP_TCP */ + +#if LWIP_UDP && LWIP_UDPLITE +/* + * Options for level IPPROTO_UDPLITE + */ +#define UDPLITE_SEND_CSCOV 0x01 /* sender checksum coverage */ +#define UDPLITE_RECV_CSCOV 0x02 /* minimal receiver checksum coverage */ +#endif /* LWIP_UDP && LWIP_UDPLITE*/ + + +#if LWIP_IGMP +/* + * Options and types for UDP multicast traffic handling + */ +#define IP_ADD_MEMBERSHIP 3 +#define IP_DROP_MEMBERSHIP 4 +#define IP_MULTICAST_TTL 5 +#define IP_MULTICAST_IF 6 +#define IP_MULTICAST_LOOP 7 + +typedef struct ip_mreq { + struct in_addr imr_multiaddr; /* IP multicast address of group */ + struct in_addr imr_interface; /* local IP address of interface */ +} ip_mreq; +#endif /* LWIP_IGMP */ + +/* + * The Type of Service provides an indication of the abstract + * parameters of the quality of service desired. These parameters are + * to be used to guide the selection of the actual service parameters + * when transmitting a datagram through a particular network. Several + * networks offer service precedence, which somehow treats high + * precedence traffic as more important than other traffic (generally + * by accepting only traffic above a certain precedence at time of high + * load). The major choice is a three way tradeoff between low-delay, + * high-reliability, and high-throughput. + * The use of the Delay, Throughput, and Reliability indications may + * increase the cost (in some sense) of the service. In many networks + * better performance for one of these parameters is coupled with worse + * performance on another. Except for very unusual cases at most two + * of these three indications should be set. + */ +#define IPTOS_TOS_MASK 0x1E +#define IPTOS_TOS(tos) ((tos) & IPTOS_TOS_MASK) +#define IPTOS_LOWDELAY 0x10 +#define IPTOS_THROUGHPUT 0x08 +#define IPTOS_RELIABILITY 0x04 +#define IPTOS_LOWCOST 0x02 +#define IPTOS_MINCOST IPTOS_LOWCOST + +/* + * The Network Control precedence designation is intended to be used + * within a network only. The actual use and control of that + * designation is up to each network. The Internetwork Control + * designation is intended for use by gateway control originators only. + * If the actual use of these precedence designations is of concern to + * a particular network, it is the responsibility of that network to + * control the access to, and use of, those precedence designations. + */ +#define IPTOS_PREC_MASK 0xe0 +#define IPTOS_PREC(tos) ((tos) & IPTOS_PREC_MASK) +#define IPTOS_PREC_NETCONTROL 0xe0 +#define IPTOS_PREC_INTERNETCONTROL 0xc0 +#define IPTOS_PREC_CRITIC_ECP 0xa0 +#define IPTOS_PREC_FLASHOVERRIDE 0x80 +#define IPTOS_PREC_FLASH 0x60 +#define IPTOS_PREC_IMMEDIATE 0x40 +#define IPTOS_PREC_PRIORITY 0x20 +#define IPTOS_PREC_ROUTINE 0x00 + + +/* + * Commands for ioctlsocket(), taken from the BSD file fcntl.h. + * lwip_ioctl only supports FIONREAD and FIONBIO, for now + * + * Ioctl's have the command encoded in the lower word, + * and the size of any in or out parameters in the upper + * word. The high 2 bits of the upper word are used + * to encode the in/out status of the parameter; for now + * we restrict parameters to at most 128 bytes. + */ +#if !defined(FIONREAD) || !defined(FIONBIO) +#define IOCPARM_MASK 0x7fU /* parameters must be < 128 bytes */ +#define IOC_VOID 0x20000000UL /* no parameters */ +#define IOC_OUT 0x40000000UL /* copy out parameters */ +#define IOC_IN 0x80000000UL /* copy in parameters */ +#define IOC_INOUT (IOC_IN|IOC_OUT) + /* 0x20000000 distinguishes new & + old ioctl's */ +#define _IO(x,y) (IOC_VOID|((x)<<8)|(y)) + +#define _IOR(x,y,t) (IOC_OUT|(((long)sizeof(t)&IOCPARM_MASK)<<16)|((x)<<8)|(y)) + +#define _IOW(x,y,t) (IOC_IN|(((long)sizeof(t)&IOCPARM_MASK)<<16)|((x)<<8)|(y)) +#endif /* !defined(FIONREAD) || !defined(FIONBIO) */ + +#ifndef FIONREAD +#define FIONREAD _IOR('f', 127, unsigned long) /* get # bytes to read */ +#endif +#ifndef FIONBIO +#define FIONBIO _IOW('f', 126, unsigned long) /* set/clear non-blocking i/o */ +#endif + +/* Socket I/O Controls: unimplemented */ +#ifndef SIOCSHIWAT +#define SIOCSHIWAT _IOW('s', 0, unsigned long) /* set high watermark */ +#define SIOCGHIWAT _IOR('s', 1, unsigned long) /* get high watermark */ +#define SIOCSLOWAT _IOW('s', 2, unsigned long) /* set low watermark */ +#define SIOCGLOWAT _IOR('s', 3, unsigned long) /* get low watermark */ +#define SIOCATMARK _IOR('s', 7, unsigned long) /* at oob mark? */ +#endif + +/* Socket flags: */ +#ifndef O_NONBLOCK +#define O_NONBLOCK 04000U +#endif + +/* FD_SET used for lwip_select */ +#ifndef FD_SET + #undef FD_SETSIZE + /* Make FD_SETSIZE match NUM_SOCKETS in socket.c */ + #define FD_SETSIZE MEMP_NUM_NETCONN + #define FD_SET(n, p) ((p)->fd_bits[(n)/8] |= (1 << ((n) & 7))) + #define FD_CLR(n, p) ((p)->fd_bits[(n)/8] &= ~(1 << ((n) & 7))) + #define FD_ISSET(n,p) ((p)->fd_bits[(n)/8] & (1 << ((n) & 7))) + #define FD_ZERO(p) memset((void*)(p),0,sizeof(*(p))) + + typedef struct fd_set { + unsigned char fd_bits [(FD_SETSIZE+7)/8]; + } fd_set; + +#endif /* FD_SET */ + +/** LWIP_TIMEVAL_PRIVATE: if you want to use the struct timeval provided + * by your system, set this to 0 and include in cc.h */ +#ifndef LWIP_TIMEVAL_PRIVATE +#define LWIP_TIMEVAL_PRIVATE 1 +#endif + +#if LWIP_TIMEVAL_PRIVATE +struct timeval { + long tv_sec; /* seconds */ + long tv_usec; /* and microseconds */ +}; +#endif /* LWIP_TIMEVAL_PRIVATE */ + +void lwip_socket_init(void); + +int lwip_accept(int s, struct sockaddr *addr, socklen_t *addrlen); +int lwip_bind(int s, const struct sockaddr *name, socklen_t namelen); +int lwip_shutdown(int s, int how); +int lwip_getpeername (int s, struct sockaddr *name, socklen_t *namelen); +int lwip_getsockname (int s, struct sockaddr *name, socklen_t *namelen); +int lwip_getsockopt (int s, int level, int optname, void *optval, socklen_t *optlen); +int lwip_setsockopt (int s, int level, int optname, const void *optval, socklen_t optlen); +int lwip_close(int s); +int lwip_connect(int s, const struct sockaddr *name, socklen_t namelen); +int lwip_listen(int s, int backlog); +int lwip_recv(int s, void *mem, size_t len, int flags); +int lwip_read(int s, void *mem, size_t len); +int lwip_recvfrom(int s, void *mem, size_t len, int flags, + struct sockaddr *from, socklen_t *fromlen); +int lwip_send(int s, const void *dataptr, size_t size, int flags); +int lwip_sendto(int s, const void *dataptr, size_t size, int flags, + const struct sockaddr *to, socklen_t tolen); +int lwip_socket(int domain, int type, int protocol); +int lwip_write(int s, const void *dataptr, size_t size); +int lwip_select(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset, + struct timeval *timeout); +int lwip_ioctl(int s, long cmd, void *argp); + +#if LWIP_COMPAT_SOCKETS +#define accept(a,b,c) lwip_accept(a,b,c) +#define bind(a,b,c) lwip_bind(a,b,c) +#define shutdown(a,b) lwip_shutdown(a,b) +#define closesocket(s) lwip_close(s) +#define connect(a,b,c) lwip_connect(a,b,c) +#define getsockname(a,b,c) lwip_getsockname(a,b,c) +#define getpeername(a,b,c) lwip_getpeername(a,b,c) +#define setsockopt(a,b,c,d,e) lwip_setsockopt(a,b,c,d,e) +#define getsockopt(a,b,c,d,e) lwip_getsockopt(a,b,c,d,e) +#define listen(a,b) lwip_listen(a,b) +#define recv(a,b,c,d) lwip_recv(a,b,c,d) +#define recvfrom(a,b,c,d,e,f) lwip_recvfrom(a,b,c,d,e,f) +#define send(a,b,c,d) lwip_send(a,b,c,d) +#define sendto(a,b,c,d,e,f) lwip_sendto(a,b,c,d,e,f) +#define socket(a,b,c) lwip_socket(a,b,c) +#define select(a,b,c,d,e) lwip_select(a,b,c,d,e) +#define ioctlsocket(a,b,c) lwip_ioctl(a,b,c) + +#if LWIP_POSIX_SOCKETS_IO_NAMES +#define read(a,b,c) lwip_read(a,b,c) +#define write(a,b,c) lwip_write(a,b,c) +#define close(s) lwip_close(s) +#endif /* LWIP_POSIX_SOCKETS_IO_NAMES */ + +#endif /* LWIP_COMPAT_SOCKETS */ + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_SOCKET */ + +#endif /* __LWIP_SOCKETS_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/stats.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/stats.h new file mode 100644 index 0000000..4aec5e5 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/stats.h @@ -0,0 +1,285 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_STATS_H__ +#define __LWIP_STATS_H__ + +#include "lwip/opt.h" + +#include "lwip/mem.h" +#include "lwip/memp.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if LWIP_STATS + +#ifndef LWIP_STATS_LARGE +#define LWIP_STATS_LARGE 0 +#endif + +#if LWIP_STATS_LARGE +#define STAT_COUNTER u32_t +#define STAT_COUNTER_F U32_F +#else +#define STAT_COUNTER u16_t +#define STAT_COUNTER_F U16_F +#endif + +struct stats_proto { + STAT_COUNTER xmit; /* Transmitted packets. */ + STAT_COUNTER recv; /* Received packets. */ + STAT_COUNTER fw; /* Forwarded packets. */ + STAT_COUNTER drop; /* Dropped packets. */ + STAT_COUNTER chkerr; /* Checksum error. */ + STAT_COUNTER lenerr; /* Invalid length error. */ + STAT_COUNTER memerr; /* Out of memory error. */ + STAT_COUNTER rterr; /* Routing error. */ + STAT_COUNTER proterr; /* Protocol error. */ + STAT_COUNTER opterr; /* Error in options. */ + STAT_COUNTER err; /* Misc error. */ + STAT_COUNTER cachehit; +}; + +struct stats_igmp { + STAT_COUNTER lenerr; /* Invalid length error. */ + STAT_COUNTER chkerr; /* Checksum error. */ + STAT_COUNTER v1_rxed; /* */ + STAT_COUNTER join_sent; /* */ + STAT_COUNTER leave_sent; /* */ + STAT_COUNTER unicast_query; /* */ + STAT_COUNTER report_sent; /* */ + STAT_COUNTER report_rxed; /* */ + STAT_COUNTER group_query_rxed; /* */ +}; + +struct stats_mem { + mem_size_t avail; + mem_size_t used; + mem_size_t max; + STAT_COUNTER err; + STAT_COUNTER illegal; +}; + +struct stats_syselem { + STAT_COUNTER used; + STAT_COUNTER max; + STAT_COUNTER err; +}; + +struct stats_sys { + struct stats_syselem sem; + struct stats_syselem mbox; +}; + +struct stats_ { +#if LINK_STATS + struct stats_proto link; +#endif +#if ETHARP_STATS + struct stats_proto etharp; +#endif +#if IPFRAG_STATS + struct stats_proto ip_frag; +#endif +#if IP_STATS + struct stats_proto ip; +#endif +#if ICMP_STATS + struct stats_proto icmp; +#endif +#if IGMP_STATS + struct stats_igmp igmp; +#endif +#if UDP_STATS + struct stats_proto udp; +#endif +#if TCP_STATS + struct stats_proto tcp; +#endif +#if MEM_STATS + struct stats_mem mem; +#endif +#if MEMP_STATS + struct stats_mem memp[MEMP_MAX]; +#endif +#if SYS_STATS + struct stats_sys sys; +#endif +}; + +extern struct stats_ lwip_stats; + +#define stats_init() /* Compatibility define, not init needed. */ + +#define STATS_INC(x) ++lwip_stats.x +#define STATS_DEC(x) --lwip_stats.x +#else +#define stats_init() +#define STATS_INC(x) +#define STATS_DEC(x) +#endif /* LWIP_STATS */ + +#if TCP_STATS +#define TCP_STATS_INC(x) STATS_INC(x) +#define TCP_STATS_DISPLAY() stats_display_proto(&lwip_stats.tcp, "TCP") +#else +#define TCP_STATS_INC(x) +#define TCP_STATS_DISPLAY() +#endif + +#if UDP_STATS +#define UDP_STATS_INC(x) STATS_INC(x) +#define UDP_STATS_DISPLAY() stats_display_proto(&lwip_stats.udp, "UDP") +#else +#define UDP_STATS_INC(x) +#define UDP_STATS_DISPLAY() +#endif + +#if ICMP_STATS +#define ICMP_STATS_INC(x) STATS_INC(x) +#define ICMP_STATS_DISPLAY() stats_display_proto(&lwip_stats.icmp, "ICMP") +#else +#define ICMP_STATS_INC(x) +#define ICMP_STATS_DISPLAY() +#endif + +#if IGMP_STATS +#define IGMP_STATS_INC(x) STATS_INC(x) +#define IGMP_STATS_DISPLAY() stats_display_igmp(&lwip_stats.igmp) +#else +#define IGMP_STATS_INC(x) +#define IGMP_STATS_DISPLAY() +#endif + +#if IP_STATS +#define IP_STATS_INC(x) STATS_INC(x) +#define IP_STATS_DISPLAY() stats_display_proto(&lwip_stats.ip, "IP") +#else +#define IP_STATS_INC(x) +#define IP_STATS_DISPLAY() +#endif + +#if IPFRAG_STATS +#define IPFRAG_STATS_INC(x) STATS_INC(x) +#define IPFRAG_STATS_DISPLAY() stats_display_proto(&lwip_stats.ip_frag, "IP_FRAG") +#else +#define IPFRAG_STATS_INC(x) +#define IPFRAG_STATS_DISPLAY() +#endif + +#if ETHARP_STATS +#define ETHARP_STATS_INC(x) STATS_INC(x) +#define ETHARP_STATS_DISPLAY() stats_display_proto(&lwip_stats.etharp, "ETHARP") +#else +#define ETHARP_STATS_INC(x) +#define ETHARP_STATS_DISPLAY() +#endif + +#if LINK_STATS +#define LINK_STATS_INC(x) STATS_INC(x) +#define LINK_STATS_DISPLAY() stats_display_proto(&lwip_stats.link, "LINK") +#else +#define LINK_STATS_INC(x) +#define LINK_STATS_DISPLAY() +#endif + +#if MEM_STATS +#define MEM_STATS_AVAIL(x, y) lwip_stats.mem.x = y +#define MEM_STATS_INC(x) STATS_INC(mem.x) +#define MEM_STATS_INC_USED(x, y) do { lwip_stats.mem.used += y; \ + if (lwip_stats.mem.max < lwip_stats.mem.used) { \ + lwip_stats.mem.max = lwip_stats.mem.used; \ + } \ + } while(0) +#define MEM_STATS_DEC_USED(x, y) lwip_stats.mem.x -= y +#define MEM_STATS_DISPLAY() stats_display_mem(&lwip_stats.mem, "HEAP") +#else +#define MEM_STATS_AVAIL(x, y) +#define MEM_STATS_INC(x) +#define MEM_STATS_INC_USED(x, y) +#define MEM_STATS_DEC_USED(x, y) +#define MEM_STATS_DISPLAY() +#endif + +#if MEMP_STATS +#define MEMP_STATS_AVAIL(x, i, y) lwip_stats.memp[i].x = y +#define MEMP_STATS_INC(x, i) STATS_INC(memp[i].x) +#define MEMP_STATS_DEC(x, i) STATS_DEC(memp[i].x) +#define MEMP_STATS_INC_USED(x, i) do { ++lwip_stats.memp[i].used; \ + if (lwip_stats.memp[i].max < lwip_stats.memp[i].used) { \ + lwip_stats.memp[i].max = lwip_stats.memp[i].used; \ + } \ + } while(0) +#define MEMP_STATS_DISPLAY(i) stats_display_memp(&lwip_stats.memp[i], i) +#else +#define MEMP_STATS_AVAIL(x, i, y) +#define MEMP_STATS_INC(x, i) +#define MEMP_STATS_DEC(x, i) +#define MEMP_STATS_INC_USED(x, i) +#define MEMP_STATS_DISPLAY(i) +#endif + +#if SYS_STATS +#define SYS_STATS_INC(x) STATS_INC(sys.x) +#define SYS_STATS_DEC(x) STATS_DEC(sys.x) +#define SYS_STATS_DISPLAY() stats_display_sys(&lwip_stats.sys) +#else +#define SYS_STATS_INC(x) +#define SYS_STATS_DEC(x) +#define SYS_STATS_DISPLAY() +#endif + +/* Display of statistics */ +#if LWIP_STATS_DISPLAY +void stats_display(void); +void stats_display_proto(struct stats_proto *proto, char *name); +void stats_display_igmp(struct stats_igmp *igmp); +void stats_display_mem(struct stats_mem *mem, char *name); +void stats_display_memp(struct stats_mem *mem, int index); +void stats_display_sys(struct stats_sys *sys); +#else +#define stats_display() +#define stats_display_proto(proto, name) +#define stats_display_igmp(igmp) +#define stats_display_mem(mem, name) +#define stats_display_memp(mem, index) +#define stats_display_sys(sys) +#endif /* LWIP_STATS_DISPLAY */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_STATS_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/sys.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/sys.h new file mode 100644 index 0000000..9a4f02a --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/sys.h @@ -0,0 +1,245 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_SYS_H__ +#define __LWIP_SYS_H__ + +#include "lwip/opt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if NO_SYS + +/* For a totally minimal and standalone system, we provide null + definitions of the sys_ functions. */ +typedef u8_t sys_sem_t; +typedef u8_t sys_mbox_t; +struct sys_timeo {u8_t dummy;}; + +#define sys_init() +#define sys_timeout(m,h,a) +#define sys_untimeout(m,a) +#define sys_sem_new(c) c +#define sys_sem_signal(s) +#define sys_sem_wait(s) +#define sys_sem_wait_timeout(s,t) +#define sys_arch_sem_wait(s,t) +#define sys_sem_free(s) +#define sys_mbox_new(s) 0 +#define sys_mbox_fetch(m,d) +#define sys_mbox_tryfetch(m,d) +#define sys_mbox_post(m,d) +#define sys_mbox_trypost(m,d) +#define sys_mbox_free(m) + +#define sys_thread_new(n,t,a,s,p) + +#else /* NO_SYS */ + +/** Return code for timeouts from sys_arch_mbox_fetch and sys_arch_sem_wait */ +#define SYS_ARCH_TIMEOUT 0xffffffffUL + +/* sys_mbox_tryfetch returns SYS_MBOX_EMPTY if appropriate. + * For now we use the same magic value, but we allow this to change in future. + */ +#define SYS_MBOX_EMPTY SYS_ARCH_TIMEOUT + +#include "lwip/err.h" +#include "arch/sys_arch.h" + +typedef void (* sys_timeout_handler)(void *arg); + +struct sys_timeo { + struct sys_timeo *next; + u32_t time; + sys_timeout_handler h; + void *arg; +}; + +struct sys_timeouts { + struct sys_timeo *next; +}; + +/* sys_init() must be called before anthing else. */ +void sys_init(void); + +/* + * sys_timeout(): + * + * Schedule a timeout a specified amount of milliseconds in the + * future. When the timeout occurs, the specified timeout handler will + * be called. The handler will be passed the "arg" argument when + * called. + * + */ +void sys_timeout(u32_t msecs, sys_timeout_handler h, void *arg); +void sys_untimeout(sys_timeout_handler h, void *arg); +struct sys_timeouts *sys_arch_timeouts(void); + +/* Semaphore functions. */ +sys_sem_t sys_sem_new(u8_t count); +void sys_sem_signal(sys_sem_t sem); +u32_t sys_arch_sem_wait(sys_sem_t sem, u32_t timeout); +void sys_sem_free(sys_sem_t sem); +void sys_sem_wait(sys_sem_t sem); +int sys_sem_wait_timeout(sys_sem_t sem, u32_t timeout); + +/* Time functions. */ +#ifndef sys_msleep +void sys_msleep(u32_t ms); /* only has a (close to) 1 jiffy resolution. */ +#endif +#ifndef sys_jiffies +u32_t sys_jiffies(void); /* since power up. */ +#endif + +/* Mailbox functions. */ +sys_mbox_t sys_mbox_new(int size); +void sys_mbox_post(sys_mbox_t mbox, void *msg); +err_t sys_mbox_trypost(sys_mbox_t mbox, void *msg); +u32_t sys_arch_mbox_fetch(sys_mbox_t mbox, void **msg, u32_t timeout); +#ifndef sys_arch_mbox_tryfetch /* Allow port to override with a macro */ +u32_t sys_arch_mbox_tryfetch(sys_mbox_t mbox, void **msg); +#endif +/* For now, we map straight to sys_arch implementation. */ +#define sys_mbox_tryfetch(mbox, msg) sys_arch_mbox_tryfetch(mbox, msg) +void sys_mbox_free(sys_mbox_t mbox); +void sys_mbox_fetch(sys_mbox_t mbox, void **msg); + +/* Thread functions. */ +sys_thread_t sys_thread_new(char *name, void (* thread)(void *arg), void *arg, int stacksize, int prio); + +#endif /* NO_SYS */ + +/** Returns the current time in milliseconds. */ +u32_t sys_now(void); + +/* Critical Region Protection */ +/* These functions must be implemented in the sys_arch.c file. + In some implementations they can provide a more light-weight protection + mechanism than using semaphores. Otherwise semaphores can be used for + implementation */ +#ifndef SYS_ARCH_PROTECT +/** SYS_LIGHTWEIGHT_PROT + * define SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection + * for certain critical regions during buffer allocation, deallocation and memory + * allocation and deallocation. + */ +#if SYS_LIGHTWEIGHT_PROT + +/** SYS_ARCH_DECL_PROTECT + * declare a protection variable. This macro will default to defining a variable of + * type sys_prot_t. If a particular port needs a different implementation, then + * this macro may be defined in sys_arch.h. + */ +#define SYS_ARCH_DECL_PROTECT(lev) sys_prot_t lev +/** SYS_ARCH_PROTECT + * Perform a "fast" protect. This could be implemented by + * disabling interrupts for an embedded system or by using a semaphore or + * mutex. The implementation should allow calling SYS_ARCH_PROTECT when + * already protected. The old protection level is returned in the variable + * "lev". This macro will default to calling the sys_arch_protect() function + * which should be implemented in sys_arch.c. If a particular port needs a + * different implementation, then this macro may be defined in sys_arch.h + */ +#define SYS_ARCH_PROTECT(lev) lev = sys_arch_protect() +/** SYS_ARCH_UNPROTECT + * Perform a "fast" set of the protection level to "lev". This could be + * implemented by setting the interrupt level to "lev" within the MACRO or by + * using a semaphore or mutex. This macro will default to calling the + * sys_arch_unprotect() function which should be implemented in + * sys_arch.c. If a particular port needs a different implementation, then + * this macro may be defined in sys_arch.h + */ +#define SYS_ARCH_UNPROTECT(lev) sys_arch_unprotect(lev) +sys_prot_t sys_arch_protect(void); +void sys_arch_unprotect(sys_prot_t pval); + +#else + +#define SYS_ARCH_DECL_PROTECT(lev) +#define SYS_ARCH_PROTECT(lev) +#define SYS_ARCH_UNPROTECT(lev) + +#endif /* SYS_LIGHTWEIGHT_PROT */ + +#endif /* SYS_ARCH_PROTECT */ + +/* + * Macros to set/get and increase/decrease variables in a thread-safe way. + * Use these for accessing variable that are used from more than one thread. + */ + +#ifndef SYS_ARCH_INC +#define SYS_ARCH_INC(var, val) do { \ + SYS_ARCH_DECL_PROTECT(old_level); \ + SYS_ARCH_PROTECT(old_level); \ + var += val; \ + SYS_ARCH_UNPROTECT(old_level); \ + } while(0) +#endif /* SYS_ARCH_INC */ + +#ifndef SYS_ARCH_DEC +#define SYS_ARCH_DEC(var, val) do { \ + SYS_ARCH_DECL_PROTECT(old_level); \ + SYS_ARCH_PROTECT(old_level); \ + var -= val; \ + SYS_ARCH_UNPROTECT(old_level); \ + } while(0) +#endif /* SYS_ARCH_DEC */ + +#ifndef SYS_ARCH_GET +#define SYS_ARCH_GET(var, ret) do { \ + SYS_ARCH_DECL_PROTECT(old_level); \ + SYS_ARCH_PROTECT(old_level); \ + ret = var; \ + SYS_ARCH_UNPROTECT(old_level); \ + } while(0) +#endif /* SYS_ARCH_GET */ + +#ifndef SYS_ARCH_SET +#define SYS_ARCH_SET(var, val) do { \ + SYS_ARCH_DECL_PROTECT(old_level); \ + SYS_ARCH_PROTECT(old_level); \ + var = val; \ + SYS_ARCH_UNPROTECT(old_level); \ + } while(0) +#endif /* SYS_ARCH_SET */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_SYS_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/tcp.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/tcp.h new file mode 100644 index 0000000..c151574 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/tcp.h @@ -0,0 +1,709 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_TCP_H__ +#define __LWIP_TCP_H__ + +#include "lwip/opt.h" + +#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/sys.h" +#include "lwip/mem.h" +#include "lwip/pbuf.h" +#include "lwip/ip.h" +#include "lwip/icmp.h" +#include "lwip/err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +struct tcp_pcb; + +/* Functions for interfacing with TCP: */ + +/* Lower layer interface to TCP: */ +#define tcp_init() /* Compatibility define, not init needed. */ +void tcp_tmr (void); /* Must be called every + TCP_TMR_INTERVAL + ms. (Typically 250 ms). */ +/* Application program's interface: */ +struct tcp_pcb * tcp_new (void); +struct tcp_pcb * tcp_alloc (u8_t prio); + +void tcp_arg (struct tcp_pcb *pcb, void *arg); +void tcp_accept (struct tcp_pcb *pcb, + err_t (* accept)(void *arg, struct tcp_pcb *newpcb, + err_t err)); +void tcp_recv (struct tcp_pcb *pcb, + err_t (* recv)(void *arg, struct tcp_pcb *tpcb, + struct pbuf *p, err_t err)); +void tcp_sent (struct tcp_pcb *pcb, + err_t (* sent)(void *arg, struct tcp_pcb *tpcb, + u16_t len)); +void tcp_poll (struct tcp_pcb *pcb, + err_t (* poll)(void *arg, struct tcp_pcb *tpcb), + u8_t interval); +void tcp_err (struct tcp_pcb *pcb, + void (* err)(void *arg, err_t err)); + +#define tcp_mss(pcb) ((pcb)->mss) +#define tcp_sndbuf(pcb) ((pcb)->snd_buf) +#define tcp_nagle_disable(pcb) ((pcb)->flags |= TF_NODELAY) +#define tcp_nagle_enable(pcb) ((pcb)->flags &= ~TF_NODELAY) +#define tcp_nagle_disabled(pcb) (((pcb)->flags & TF_NODELAY) != 0) + +#if TCP_LISTEN_BACKLOG +#define tcp_accepted(pcb) (((struct tcp_pcb_listen *)(pcb))->accepts_pending--) +#else /* TCP_LISTEN_BACKLOG */ +#define tcp_accepted(pcb) +#endif /* TCP_LISTEN_BACKLOG */ + +void tcp_recved (struct tcp_pcb *pcb, u16_t len); +err_t tcp_bind (struct tcp_pcb *pcb, struct ip_addr *ipaddr, + u16_t port); +err_t tcp_connect (struct tcp_pcb *pcb, struct ip_addr *ipaddr, + u16_t port, err_t (* connected)(void *arg, + struct tcp_pcb *tpcb, + err_t err)); + +struct tcp_pcb * tcp_listen_with_backlog(struct tcp_pcb *pcb, u8_t backlog); +#define tcp_listen(pcb) tcp_listen_with_backlog(pcb, TCP_DEFAULT_LISTEN_BACKLOG) + +void tcp_abandon (struct tcp_pcb *pcb, int reset); +#define tcp_abort(pcb) tcp_abandon((pcb), 1) +err_t tcp_close (struct tcp_pcb *pcb); + +/* Flags for "apiflags" parameter in tcp_write and tcp_enqueue */ +#define TCP_WRITE_FLAG_COPY 0x01 +#define TCP_WRITE_FLAG_MORE 0x02 + +err_t tcp_write (struct tcp_pcb *pcb, const void *dataptr, u16_t len, + u8_t apiflags); + +void tcp_setprio (struct tcp_pcb *pcb, u8_t prio); + +#define TCP_PRIO_MIN 1 +#define TCP_PRIO_NORMAL 64 +#define TCP_PRIO_MAX 127 + +/* It is also possible to call these two functions at the right + intervals (instead of calling tcp_tmr()). */ +void tcp_slowtmr (void); +void tcp_fasttmr (void); + + +/* Only used by IP to pass a TCP segment to TCP: */ +void tcp_input (struct pbuf *p, struct netif *inp); +/* Used within the TCP code only: */ +err_t tcp_send_empty_ack(struct tcp_pcb *pcb); +err_t tcp_output (struct tcp_pcb *pcb); +void tcp_rexmit (struct tcp_pcb *pcb); +void tcp_rexmit_rto (struct tcp_pcb *pcb); +void tcp_rexmit_fast (struct tcp_pcb *pcb); +u32_t tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb); + +/** + * This is the Nagle algorithm: try to combine user data to send as few TCP + * segments as possible. Only send if + * - no previously transmitted data on the connection remains unacknowledged or + * - the TF_NODELAY flag is set (nagle algorithm turned off for this pcb) or + * - the only unsent segment is at least pcb->mss bytes long (or there is more + * than one unsent segment - with lwIP, this can happen although unsent->len < mss) + * - or if we are in fast-retransmit (TF_INFR) + */ +#define tcp_do_output_nagle(tpcb) ((((tpcb)->unacked == NULL) || \ + ((tpcb)->flags & (TF_NODELAY | TF_INFR)) || \ + (((tpcb)->unsent != NULL) && (((tpcb)->unsent->next != NULL) || \ + ((tpcb)->unsent->len >= (tpcb)->mss))) \ + ) ? 1 : 0) +#define tcp_output_nagle(tpcb) (tcp_do_output_nagle(tpcb) ? tcp_output(tpcb) : ERR_OK) + + +#define TCP_SEQ_LT(a,b) ((s32_t)((a)-(b)) < 0) +#define TCP_SEQ_LEQ(a,b) ((s32_t)((a)-(b)) <= 0) +#define TCP_SEQ_GT(a,b) ((s32_t)((a)-(b)) > 0) +#define TCP_SEQ_GEQ(a,b) ((s32_t)((a)-(b)) >= 0) +/* is b<=a<=c? */ +#if 0 /* see bug #10548 */ +#define TCP_SEQ_BETWEEN(a,b,c) ((c)-(b) >= (a)-(b)) +#endif +#define TCP_SEQ_BETWEEN(a,b,c) (TCP_SEQ_GEQ(a,b) && TCP_SEQ_LEQ(a,c)) +#define TCP_FIN 0x01U +#define TCP_SYN 0x02U +#define TCP_RST 0x04U +#define TCP_PSH 0x08U +#define TCP_ACK 0x10U +#define TCP_URG 0x20U +#define TCP_ECE 0x40U +#define TCP_CWR 0x80U + +#define TCP_FLAGS 0x3fU + +/* Length of the TCP header, excluding options. */ +#define TCP_HLEN 20 + +#ifndef TCP_TMR_INTERVAL +#define TCP_TMR_INTERVAL 250 /* The TCP timer interval in milliseconds. */ +#endif /* TCP_TMR_INTERVAL */ + +#ifndef TCP_FAST_INTERVAL +#define TCP_FAST_INTERVAL TCP_TMR_INTERVAL /* the fine grained timeout in milliseconds */ +#endif /* TCP_FAST_INTERVAL */ + +#ifndef TCP_SLOW_INTERVAL +#define TCP_SLOW_INTERVAL (2*TCP_TMR_INTERVAL) /* the coarse grained timeout in milliseconds */ +#endif /* TCP_SLOW_INTERVAL */ + +#define TCP_FIN_WAIT_TIMEOUT 20000 /* milliseconds */ +#define TCP_SYN_RCVD_TIMEOUT 20000 /* milliseconds */ + +#define TCP_OOSEQ_TIMEOUT 6U /* x RTO */ + +#ifndef TCP_MSL +#define TCP_MSL 60000UL /* The maximum segment lifetime in milliseconds */ +#endif + +/* Keepalive values, compliant with RFC 1122. Don't change this unless you know what you're doing */ +#ifndef TCP_KEEPIDLE_DEFAULT +#define TCP_KEEPIDLE_DEFAULT 7200000UL /* Default KEEPALIVE timer in milliseconds */ +#endif + +#ifndef TCP_KEEPINTVL_DEFAULT +#define TCP_KEEPINTVL_DEFAULT 75000UL /* Default Time between KEEPALIVE probes in milliseconds */ +#endif + +#ifndef TCP_KEEPCNT_DEFAULT +#define TCP_KEEPCNT_DEFAULT 9U /* Default Counter for KEEPALIVE probes */ +#endif + +#define TCP_MAXIDLE TCP_KEEPCNT_DEFAULT * TCP_KEEPINTVL_DEFAULT /* Maximum KEEPALIVE probe time */ + +/* Fields are (of course) in network byte order. + * Some fields are converted to host byte order in tcp_input(). + */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct tcp_hdr { + PACK_STRUCT_FIELD(u16_t src); + PACK_STRUCT_FIELD(u16_t dest); + PACK_STRUCT_FIELD(u32_t seqno); + PACK_STRUCT_FIELD(u32_t ackno); + PACK_STRUCT_FIELD(u16_t _hdrlen_rsvd_flags); + PACK_STRUCT_FIELD(u16_t wnd); + PACK_STRUCT_FIELD(u16_t chksum); + PACK_STRUCT_FIELD(u16_t urgp); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define TCPH_OFFSET(phdr) (ntohs((phdr)->_hdrlen_rsvd_flags) >> 8) +#define TCPH_HDRLEN(phdr) (ntohs((phdr)->_hdrlen_rsvd_flags) >> 12) +#define TCPH_FLAGS(phdr) (ntohs((phdr)->_hdrlen_rsvd_flags) & TCP_FLAGS) + +#define TCPH_OFFSET_SET(phdr, offset) (phdr)->_hdrlen_rsvd_flags = htons(((offset) << 8) | TCPH_FLAGS(phdr)) +#define TCPH_HDRLEN_SET(phdr, len) (phdr)->_hdrlen_rsvd_flags = htons(((len) << 12) | TCPH_FLAGS(phdr)) +#define TCPH_FLAGS_SET(phdr, flags) (phdr)->_hdrlen_rsvd_flags = (((phdr)->_hdrlen_rsvd_flags & htons((u16_t)(~(u16_t)(TCP_FLAGS)))) | htons(flags)) +#define TCPH_SET_FLAG(phdr, flags ) (phdr)->_hdrlen_rsvd_flags = ((phdr)->_hdrlen_rsvd_flags | htons(flags)) +#define TCPH_UNSET_FLAG(phdr, flags) (phdr)->_hdrlen_rsvd_flags = htons(ntohs((phdr)->_hdrlen_rsvd_flags) | (TCPH_FLAGS(phdr) & ~(flags)) ) + +#define TCP_TCPLEN(seg) ((seg)->len + ((TCPH_FLAGS((seg)->tcphdr) & (TCP_FIN | TCP_SYN)) != 0)) + +enum tcp_state { + CLOSED = 0, + LISTEN = 1, + SYN_SENT = 2, + SYN_RCVD = 3, + ESTABLISHED = 4, + FIN_WAIT_1 = 5, + FIN_WAIT_2 = 6, + CLOSE_WAIT = 7, + CLOSING = 8, + LAST_ACK = 9, + TIME_WAIT = 10 +}; + +/** Flags used on input processing, not on pcb->flags +*/ +#define TF_RESET (u8_t)0x08U /* Connection was reset. */ +#define TF_CLOSED (u8_t)0x10U /* Connection was sucessfully closed. */ +#define TF_GOT_FIN (u8_t)0x20U /* Connection was closed by the remote end. */ + + +#if LWIP_CALLBACK_API + /* Function to call when a listener has been connected. + * @param arg user-supplied argument (tcp_pcb.callback_arg) + * @param pcb a new tcp_pcb that now is connected + * @param err an error argument (TODO: that is current always ERR_OK?) + * @return ERR_OK: accept the new connection, + * any other err_t abortsthe new connection + */ +#define DEF_ACCEPT_CALLBACK err_t (* accept)(void *arg, struct tcp_pcb *newpcb, err_t err) +#else /* LWIP_CALLBACK_API */ +#define DEF_ACCEPT_CALLBACK +#endif /* LWIP_CALLBACK_API */ + +/** + * members common to struct tcp_pcb and struct tcp_listen_pcb + */ +#define TCP_PCB_COMMON(type) \ + type *next; /* for the linked list */ \ + enum tcp_state state; /* TCP state */ \ + u8_t prio; \ + void *callback_arg; \ + /* ports are in host byte order */ \ + u16_t local_port; \ + /* the accept callback for listen- and normal pcbs, if LWIP_CALLBACK_API */ \ + DEF_ACCEPT_CALLBACK + + +/* the TCP protocol control block */ +struct tcp_pcb { +/** common PCB members */ + IP_PCB; +/** protocol specific PCB members */ + TCP_PCB_COMMON(struct tcp_pcb); + + /* ports are in host byte order */ + u16_t remote_port; + + u8_t flags; +#define TF_ACK_DELAY ((u8_t)0x01U) /* Delayed ACK. */ +#define TF_ACK_NOW ((u8_t)0x02U) /* Immediate ACK. */ +#define TF_INFR ((u8_t)0x04U) /* In fast recovery. */ +#define TF_TIMESTAMP ((u8_t)0x08U) /* Timestamp option enabled */ +#define TF_FIN ((u8_t)0x20U) /* Connection was closed locally (FIN segment enqueued). */ +#define TF_NODELAY ((u8_t)0x40U) /* Disable Nagle algorithm */ +#define TF_NAGLEMEMERR ((u8_t)0x80U) /* nagle enabled, memerr, try to output to prevent delayed ACK to happen */ + + /* the rest of the fields are in host byte order + as we have to do some math with them */ + /* receiver variables */ + u32_t rcv_nxt; /* next seqno expected */ + u16_t rcv_wnd; /* receiver window available */ + u16_t rcv_ann_wnd; /* receiver window to announce */ + u32_t rcv_ann_right_edge; /* announced right edge of window */ + + /* Timers */ + u32_t tmr; + u8_t polltmr, pollinterval; + + /* Retransmission timer. */ + s16_t rtime; + + u16_t mss; /* maximum segment size */ + + /* RTT (round trip time) estimation variables */ + u32_t rttest; /* RTT estimate in 500ms ticks */ + u32_t rtseq; /* sequence number being timed */ + s16_t sa, sv; /* @todo document this */ + + s16_t rto; /* retransmission time-out */ + u8_t nrtx; /* number of retransmissions */ + + /* fast retransmit/recovery */ + u32_t lastack; /* Highest acknowledged seqno. */ + u8_t dupacks; + + /* congestion avoidance/control variables */ + u16_t cwnd; + u16_t ssthresh; + + /* sender variables */ + u32_t snd_nxt; /* next new seqno to be sent */ + u16_t snd_wnd; /* sender window */ + u32_t snd_wl1, snd_wl2; /* Sequence and acknowledgement numbers of last + window update. */ + u32_t snd_lbb; /* Sequence number of next byte to be buffered. */ + + u16_t acked; + + u16_t snd_buf; /* Available buffer space for sending (in bytes). */ +#define TCP_SNDQUEUELEN_OVERFLOW (0xffff-3) + u16_t snd_queuelen; /* Available buffer space for sending (in tcp_segs). */ + + + /* These are ordered by sequence number: */ + struct tcp_seg *unsent; /* Unsent (queued) segments. */ + struct tcp_seg *unacked; /* Sent but unacknowledged segments. */ +#if TCP_QUEUE_OOSEQ + struct tcp_seg *ooseq; /* Received out of sequence segments. */ +#endif /* TCP_QUEUE_OOSEQ */ + + struct pbuf *refused_data; /* Data previously received but not yet taken by upper layer */ + +#if LWIP_CALLBACK_API + /* Function to be called when more send buffer space is available. + * @param arg user-supplied argument (tcp_pcb.callback_arg) + * @param pcb the tcp_pcb which has send buffer space available + * @param space the amount of bytes available + * @return ERR_OK: try to send some data by calling tcp_output + */ + err_t (* sent)(void *arg, struct tcp_pcb *pcb, u16_t space); + + /* Function to be called when (in-sequence) data has arrived. + * @param arg user-supplied argument (tcp_pcb.callback_arg) + * @param pcb the tcp_pcb for which data has arrived + * @param p the packet buffer which arrived + * @param err an error argument (TODO: that is current always ERR_OK?) + * @return ERR_OK: try to send some data by calling tcp_output + */ + err_t (* recv)(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err); + + /* Function to be called when a connection has been set up. + * @param arg user-supplied argument (tcp_pcb.callback_arg) + * @param pcb the tcp_pcb that now is connected + * @param err an error argument (TODO: that is current always ERR_OK?) + * @return value is currently ignored + */ + err_t (* connected)(void *arg, struct tcp_pcb *pcb, err_t err); + + /* Function which is called periodically. + * The period can be adjusted in multiples of the TCP slow timer interval + * by changing tcp_pcb.polltmr. + * @param arg user-supplied argument (tcp_pcb.callback_arg) + * @param pcb the tcp_pcb to poll for + * @return ERR_OK: try to send some data by calling tcp_output + */ + err_t (* poll)(void *arg, struct tcp_pcb *pcb); + + /* Function to be called whenever a fatal error occurs. + * There is no pcb parameter since most of the times, the pcb is + * already deallocated (or there is no pcb) when this function is called. + * @param arg user-supplied argument (tcp_pcb.callback_arg) + * @param err an indication why the error callback is called: + * ERR_ABRT: aborted through tcp_abort or by a TCP timer + * ERR_RST: the connection was reset by the remote host + */ + void (* errf)(void *arg, err_t err); +#endif /* LWIP_CALLBACK_API */ + +#if LWIP_TCP_TIMESTAMPS + u32_t ts_lastacksent; + u32_t ts_recent; +#endif /* LWIP_TCP_TIMESTAMPS */ + + /* idle time before KEEPALIVE is sent */ + u32_t keep_idle; +#if LWIP_TCP_KEEPALIVE + u32_t keep_intvl; + u32_t keep_cnt; +#endif /* LWIP_TCP_KEEPALIVE */ + + /* Persist timer counter */ + u32_t persist_cnt; + /* Persist timer back-off */ + u8_t persist_backoff; + + /* KEEPALIVE counter */ + u8_t keep_cnt_sent; +}; + +struct tcp_pcb_listen { +/* Common members of all PCB types */ + IP_PCB; +/* Protocol specific PCB members */ + TCP_PCB_COMMON(struct tcp_pcb_listen); + +#if TCP_LISTEN_BACKLOG + u8_t backlog; + u8_t accepts_pending; +#endif /* TCP_LISTEN_BACKLOG */ +}; + +#if LWIP_EVENT_API + +enum lwip_event { + LWIP_EVENT_ACCEPT, + LWIP_EVENT_SENT, + LWIP_EVENT_RECV, + LWIP_EVENT_CONNECTED, + LWIP_EVENT_POLL, + LWIP_EVENT_ERR +}; + +err_t lwip_tcp_event(void *arg, struct tcp_pcb *pcb, + enum lwip_event, + struct pbuf *p, + u16_t size, + err_t err); + +#define TCP_EVENT_ACCEPT(pcb,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_ACCEPT, NULL, 0, err) +#define TCP_EVENT_SENT(pcb,space,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_SENT, NULL, space, ERR_OK) +#define TCP_EVENT_RECV(pcb,p,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_RECV, (p), 0, (err)) +#define TCP_EVENT_CONNECTED(pcb,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_CONNECTED, NULL, 0, (err)) +#define TCP_EVENT_POLL(pcb,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_POLL, NULL, 0, ERR_OK) +#define TCP_EVENT_ERR(errf,arg,err) lwip_tcp_event((arg), NULL, \ + LWIP_EVENT_ERR, NULL, 0, (err)) +#else /* LWIP_EVENT_API */ + +#define TCP_EVENT_ACCEPT(pcb,err,ret) \ + do { \ + if((pcb)->accept != NULL) \ + (ret) = (pcb)->accept((pcb)->callback_arg,(pcb),(err)); \ + else (ret) = ERR_OK; \ + } while (0) + +#define TCP_EVENT_SENT(pcb,space,ret) \ + do { \ + if((pcb)->sent != NULL) \ + (ret) = (pcb)->sent((pcb)->callback_arg,(pcb),(space)); \ + else (ret) = ERR_OK; \ + } while (0) + +#define TCP_EVENT_RECV(pcb,p,err,ret) \ + do { \ + if((pcb)->recv != NULL) { \ + (ret) = (pcb)->recv((pcb)->callback_arg,(pcb),(p),(err)); \ + } else { \ + (ret) = tcp_recv_null(NULL, (pcb), (p), (err)); \ + } \ + } while (0) + +#define TCP_EVENT_CONNECTED(pcb,err,ret) \ + do { \ + if((pcb)->connected != NULL) \ + (ret) = (pcb)->connected((pcb)->callback_arg,(pcb),(err)); \ + else (ret) = ERR_OK; \ + } while (0) + +#define TCP_EVENT_POLL(pcb,ret) \ + do { \ + if((pcb)->poll != NULL) \ + (ret) = (pcb)->poll((pcb)->callback_arg,(pcb)); \ + else (ret) = ERR_OK; \ + } while (0) + +#define TCP_EVENT_ERR(errf,arg,err) \ + do { \ + if((errf) != NULL) \ + (errf)((arg),(err)); \ + } while (0) + +#endif /* LWIP_EVENT_API */ + +/* This structure represents a TCP segment on the unsent and unacked queues */ +struct tcp_seg { + struct tcp_seg *next; /* used when putting segements on a queue */ + struct pbuf *p; /* buffer containing data + TCP header */ + void *dataptr; /* pointer to the TCP data in the pbuf */ + u16_t len; /* the TCP length of this segment */ + u8_t flags; +#define TF_SEG_OPTS_MSS (u8_t)0x01U /* Include MSS option. */ +#define TF_SEG_OPTS_TS (u8_t)0x02U /* Include timestamp option. */ + struct tcp_hdr *tcphdr; /* the TCP header */ +}; + +#define LWIP_TCP_OPT_LENGTH(flags) \ + (flags & TF_SEG_OPTS_MSS ? 4 : 0) + \ + (flags & TF_SEG_OPTS_TS ? 12 : 0) + +/** This returns a TCP header option for MSS in an u32_t */ +#define TCP_BUILD_MSS_OPTION(x) (x) = htonl(((u32_t)2 << 24) | \ + ((u32_t)4 << 16) | \ + (((u32_t)TCP_MSS / 256) << 8) | \ + (TCP_MSS & 255)) + +/* Internal functions and global variables: */ +struct tcp_pcb *tcp_pcb_copy(struct tcp_pcb *pcb); +void tcp_pcb_purge(struct tcp_pcb *pcb); +void tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb); + +u8_t tcp_segs_free(struct tcp_seg *seg); +u8_t tcp_seg_free(struct tcp_seg *seg); +struct tcp_seg *tcp_seg_copy(struct tcp_seg *seg); + +#define tcp_ack(pcb) \ + do { \ + if((pcb)->flags & TF_ACK_DELAY) { \ + (pcb)->flags &= ~TF_ACK_DELAY; \ + (pcb)->flags |= TF_ACK_NOW; \ + tcp_output(pcb); \ + } \ + else { \ + (pcb)->flags |= TF_ACK_DELAY; \ + } \ + } while (0) + +#define tcp_ack_now(pcb) \ + do { \ + (pcb)->flags |= TF_ACK_NOW; \ + tcp_output(pcb); \ + } while (0) + +err_t tcp_send_ctrl(struct tcp_pcb *pcb, u8_t flags); +err_t tcp_enqueue(struct tcp_pcb *pcb, void *dataptr, u16_t len, + u8_t flags, u8_t apiflags, u8_t optflags); + +void tcp_rexmit_seg(struct tcp_pcb *pcb, struct tcp_seg *seg); + +void tcp_rst(u32_t seqno, u32_t ackno, + struct ip_addr *local_ip, struct ip_addr *remote_ip, + u16_t local_port, u16_t remote_port); + +u32_t tcp_next_iss(void); + +void tcp_keepalive(struct tcp_pcb *pcb); +void tcp_zero_window_probe(struct tcp_pcb *pcb); + +#if TCP_CALCULATE_EFF_SEND_MSS +u16_t tcp_eff_send_mss(u16_t sendmss, struct ip_addr *addr); +#endif /* TCP_CALCULATE_EFF_SEND_MSS */ + +#if LWIP_CALLBACK_API +err_t tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err); +#endif /* LWIP_CALLBACK_API */ + +extern struct tcp_pcb *tcp_input_pcb; +extern u32_t tcp_ticks; + +const char* tcp_debug_state_str(enum tcp_state s); +#if TCP_DEBUG || TCP_INPUT_DEBUG || TCP_OUTPUT_DEBUG +void tcp_debug_print(struct tcp_hdr *tcphdr); +void tcp_debug_print_flags(u8_t flags); +void tcp_debug_print_state(enum tcp_state s); +void tcp_debug_print_pcbs(void); +s16_t tcp_pcbs_sane(void); +#else +# define tcp_debug_print(tcphdr) +# define tcp_debug_print_flags(flags) +# define tcp_debug_print_state(s) +# define tcp_debug_print_pcbs() +# define tcp_pcbs_sane() 1 +#endif /* TCP_DEBUG */ + +#if NO_SYS +#define tcp_timer_needed() +#else +void tcp_timer_needed(void); +#endif + +/* The TCP PCB lists. */ +union tcp_listen_pcbs_t { /* List of all TCP PCBs in LISTEN state. */ + struct tcp_pcb_listen *listen_pcbs; + struct tcp_pcb *pcbs; +}; +extern union tcp_listen_pcbs_t tcp_listen_pcbs; +extern struct tcp_pcb *tcp_active_pcbs; /* List of all TCP PCBs that are in a + state in which they accept or send + data. */ +extern struct tcp_pcb *tcp_tw_pcbs; /* List of all TCP PCBs in TIME-WAIT. */ + +extern struct tcp_pcb *tcp_tmp_pcb; /* Only used for temporary storage. */ + +/* Axioms about the above lists: + 1) Every TCP PCB that is not CLOSED is in one of the lists. + 2) A PCB is only in one of the lists. + 3) All PCBs in the tcp_listen_pcbs list is in LISTEN state. + 4) All PCBs in the tcp_tw_pcbs list is in TIME-WAIT state. +*/ + +/* Define two macros, TCP_REG and TCP_RMV that registers a TCP PCB + with a PCB list or removes a PCB from a list, respectively. */ +#if 0 +#define TCP_REG(pcbs, npcb) do {\ + LWIP_DEBUGF(TCP_DEBUG, ("TCP_REG %p local port %d\n", npcb, npcb->local_port)); \ + for(tcp_tmp_pcb = *pcbs; \ + tcp_tmp_pcb != NULL; \ + tcp_tmp_pcb = tcp_tmp_pcb->next) { \ + LWIP_ASSERT("TCP_REG: already registered\n", tcp_tmp_pcb != npcb); \ + } \ + LWIP_ASSERT("TCP_REG: pcb->state != CLOSED", npcb->state != CLOSED); \ + npcb->next = *pcbs; \ + LWIP_ASSERT("TCP_REG: npcb->next != npcb", npcb->next != npcb); \ + *(pcbs) = npcb; \ + LWIP_ASSERT("TCP_RMV: tcp_pcbs sane", tcp_pcbs_sane()); \ + tcp_timer_needed(); \ + } while(0) +#define TCP_RMV(pcbs, npcb) do { \ + LWIP_ASSERT("TCP_RMV: pcbs != NULL", *pcbs != NULL); \ + LWIP_DEBUGF(TCP_DEBUG, ("TCP_RMV: removing %p from %p\n", npcb, *pcbs)); \ + if(*pcbs == npcb) { \ + *pcbs = (*pcbs)->next; \ + } else for(tcp_tmp_pcb = *pcbs; tcp_tmp_pcb != NULL; tcp_tmp_pcb = tcp_tmp_pcb->next) { \ + if(tcp_tmp_pcb->next == npcb) { \ + tcp_tmp_pcb->next = npcb->next; \ + break; \ + } \ + } \ + npcb->next = NULL; \ + LWIP_ASSERT("TCP_RMV: tcp_pcbs sane", tcp_pcbs_sane()); \ + LWIP_DEBUGF(TCP_DEBUG, ("TCP_RMV: removed %p from %p\n", npcb, *pcbs)); \ + } while(0) + +#else /* LWIP_DEBUG */ + +#define TCP_REG(pcbs, npcb) \ + do { \ + npcb->next = *pcbs; \ + *(pcbs) = npcb; \ + tcp_timer_needed(); \ + } while (0) + +#define TCP_RMV(pcbs, npcb) \ + do { \ + if(*(pcbs) == npcb) { \ + (*(pcbs)) = (*pcbs)->next; \ + } \ + else { \ + for(tcp_tmp_pcb = *pcbs; \ + tcp_tmp_pcb != NULL; \ + tcp_tmp_pcb = tcp_tmp_pcb->next) { \ + if(tcp_tmp_pcb->next == npcb) { \ + tcp_tmp_pcb->next = npcb->next; \ + break; \ + } \ + } \ + } \ + npcb->next = NULL; \ + } while(0) + +#endif /* LWIP_DEBUG */ + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_TCP */ + +#endif /* __LWIP_TCP_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/tcpip.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/tcpip.h new file mode 100644 index 0000000..00a3ec5 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/tcpip.h @@ -0,0 +1,143 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_TCPIP_H__ +#define __LWIP_TCPIP_H__ + +#include "lwip/opt.h" + +#if !NO_SYS /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/api_msg.h" +#include "lwip/netifapi.h" +#include "lwip/pbuf.h" +#include "lwip/api.h" +#include "lwip/sys.h" +#include "lwip/netif.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if LWIP_TCPIP_CORE_LOCKING +/** The global semaphore to lock the stack. */ +extern sys_sem_t lock_tcpip_core; +#define LOCK_TCPIP_CORE() sys_sem_wait(lock_tcpip_core) +#define UNLOCK_TCPIP_CORE() sys_sem_signal(lock_tcpip_core) +#define TCPIP_APIMSG(m) tcpip_apimsg_lock(m) +#define TCPIP_APIMSG_ACK(m) +#define TCPIP_NETIFAPI(m) tcpip_netifapi_lock(m) +#define TCPIP_NETIFAPI_ACK(m) +#else +#define LOCK_TCPIP_CORE() +#define UNLOCK_TCPIP_CORE() +#define TCPIP_APIMSG(m) tcpip_apimsg(m) +#define TCPIP_APIMSG_ACK(m) sys_sem_signal(m->conn->op_completed) +#define TCPIP_NETIFAPI(m) tcpip_netifapi(m) +#define TCPIP_NETIFAPI_ACK(m) sys_sem_signal(m->sem) +#endif /* LWIP_TCPIP_CORE_LOCKING */ + +void tcpip_init(void (* tcpip_init_done)(void *), void *arg); + +#if LWIP_NETCONN +err_t tcpip_apimsg(struct api_msg *apimsg); +#if LWIP_TCPIP_CORE_LOCKING +err_t tcpip_apimsg_lock(struct api_msg *apimsg); +#endif /* LWIP_TCPIP_CORE_LOCKING */ +#endif /* LWIP_NETCONN */ + +err_t tcpip_input(struct pbuf *p, struct netif *inp); + +#if LWIP_NETIF_API +err_t tcpip_netifapi(struct netifapi_msg *netifapimsg); +#if LWIP_TCPIP_CORE_LOCKING +err_t tcpip_netifapi_lock(struct netifapi_msg *netifapimsg); +#endif /* LWIP_TCPIP_CORE_LOCKING */ +#endif /* LWIP_NETIF_API */ + +err_t tcpip_callback_with_block(void (*f)(void *ctx), void *ctx, u8_t block); +#define tcpip_callback(f, ctx) tcpip_callback_with_block(f, ctx, 1) + +/* free pbufs or heap memory from another context without blocking */ +err_t pbuf_free_callback(struct pbuf *p); +err_t mem_free_callback(void *m); + +err_t tcpip_timeout(u32_t msecs, sys_timeout_handler h, void *arg); +err_t tcpip_untimeout(sys_timeout_handler h, void *arg); + +enum tcpip_msg_type { +#if LWIP_NETCONN + TCPIP_MSG_API, +#endif /* LWIP_NETCONN */ + TCPIP_MSG_INPKT, +#if LWIP_NETIF_API + TCPIP_MSG_NETIFAPI, +#endif /* LWIP_NETIF_API */ + TCPIP_MSG_CALLBACK, + TCPIP_MSG_TIMEOUT, + TCPIP_MSG_UNTIMEOUT +}; + +struct tcpip_msg { + enum tcpip_msg_type type; + sys_sem_t *sem; + union { +#if LWIP_NETCONN + struct api_msg *apimsg; +#endif /* LWIP_NETCONN */ +#if LWIP_NETIF_API + struct netifapi_msg *netifapimsg; +#endif /* LWIP_NETIF_API */ + struct { + struct pbuf *p; + struct netif *netif; + } inp; + struct { + void (*f)(void *ctx); + void *ctx; + } cb; + struct { + u32_t msecs; + sys_timeout_handler h; + void *arg; + } tmo; + } msg; +}; + +#ifdef __cplusplus +} +#endif + +#endif /* !NO_SYS */ + +#endif /* __LWIP_TCPIP_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/udp.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/udp.h new file mode 100644 index 0000000..1269ee1 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/lwip/udp.h @@ -0,0 +1,155 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_UDP_H__ +#define __LWIP_UDP_H__ + +#include "lwip/opt.h" + +#if LWIP_UDP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/pbuf.h" +#include "lwip/netif.h" +#include "lwip/ip_addr.h" +#include "lwip/ip.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define UDP_HLEN 8 + +/* Fields are (of course) in network byte order. */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct udp_hdr { + PACK_STRUCT_FIELD(u16_t src); + PACK_STRUCT_FIELD(u16_t dest); /* src/dest UDP ports */ + PACK_STRUCT_FIELD(u16_t len); + PACK_STRUCT_FIELD(u16_t chksum); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define UDP_FLAGS_NOCHKSUM 0x01U +#define UDP_FLAGS_UDPLITE 0x02U +#define UDP_FLAGS_CONNECTED 0x04U + +struct udp_pcb { +/* Common members of all PCB types */ + IP_PCB; + +/* Protocol specific PCB members */ + + struct udp_pcb *next; + + u8_t flags; + /* ports are in host byte order */ + u16_t local_port, remote_port; + +#if LWIP_IGMP + /* outgoing network interface for multicast packets */ + struct ip_addr multicast_ip; +#endif /* LWIP_IGMP */ + +#if LWIP_UDPLITE + /* used for UDP_LITE only */ + u16_t chksum_len_rx, chksum_len_tx; +#endif /* LWIP_UDPLITE */ + + /* receive callback function + * addr and port are in same byte order as in the pcb + * The callback is responsible for freeing the pbuf + * if it's not used any more. + * + * ATTENTION: Be aware that 'addr' points into the pbuf 'p' so freeing this pbuf + * makes 'addr' invalid, too. + * + * @param arg user supplied argument (udp_pcb.recv_arg) + * @param pcb the udp_pcb which received data + * @param p the packet buffer that was received + * @param addr the remote IP address from which the packet was received + * @param port the remote port from which the packet was received + */ + void (* recv)(void *arg, struct udp_pcb *pcb, struct pbuf *p, + struct ip_addr *addr, u16_t port); + /* user-supplied argument for the recv callback */ + void *recv_arg; +}; +/* udp_pcbs export for exernal reference (e.g. SNMP agent) */ +extern struct udp_pcb *udp_pcbs; + +/* The following functions is the application layer interface to the + UDP code. */ +struct udp_pcb * udp_new (void); +void udp_remove (struct udp_pcb *pcb); +err_t udp_bind (struct udp_pcb *pcb, struct ip_addr *ipaddr, + u16_t port); +err_t udp_connect (struct udp_pcb *pcb, struct ip_addr *ipaddr, + u16_t port); +void udp_disconnect (struct udp_pcb *pcb); +void udp_recv (struct udp_pcb *pcb, + void (* recv)(void *arg, struct udp_pcb *upcb, + struct pbuf *p, + struct ip_addr *addr, + u16_t port), + void *recv_arg); +err_t udp_sendto_if (struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *dst_ip, u16_t dst_port, struct netif *netif); +err_t udp_sendto (struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *dst_ip, u16_t dst_port); +err_t udp_send (struct udp_pcb *pcb, struct pbuf *p); + +#define udp_flags(pcb) ((pcb)->flags) +#define udp_setflags(pcb, f) ((pcb)->flags = (f)) + +/* The following functions are the lower layer interface to UDP. */ +void udp_input (struct pbuf *p, struct netif *inp); + +#define udp_init() /* Compatibility define, not init needed. */ + +#if UDP_DEBUG +void udp_debug_print(struct udp_hdr *udphdr); +#else +#define udp_debug_print(udphdr) +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_UDP */ + +#endif /* __LWIP_UDP_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/netif/etharp.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/netif/etharp.h new file mode 100644 index 0000000..fb1542a --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/netif/etharp.h @@ -0,0 +1,194 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2003 Swedish Institute of Computer Science. + * Copyright (c) 2003-2004 Leon Woestenberg + * Copyright (c) 2003-2004 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#ifndef __NETIF_ETHARP_H__ +#define __NETIF_ETHARP_H__ + +#include "lwip/opt.h" + +#if LWIP_ARP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/ip.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef ETH_PAD_SIZE +#define ETH_PAD_SIZE 0 +#endif + +#ifndef ETHARP_HWADDR_LEN +#define ETHARP_HWADDR_LEN 6 +#endif + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct eth_addr { + PACK_STRUCT_FIELD(u8_t addr[ETHARP_HWADDR_LEN]); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct eth_hdr { +#if ETH_PAD_SIZE + PACK_STRUCT_FIELD(u8_t padding[ETH_PAD_SIZE]); +#endif + PACK_STRUCT_FIELD(struct eth_addr dest); + PACK_STRUCT_FIELD(struct eth_addr src); + PACK_STRUCT_FIELD(u16_t type); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define SIZEOF_ETH_HDR (14 + ETH_PAD_SIZE) + +#if ETHARP_SUPPORT_VLAN + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct eth_vlan_hdr { + PACK_STRUCT_FIELD(u16_t tpid); + PACK_STRUCT_FIELD(u16_t prio_vid); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define SIZEOF_VLAN_HDR 4 +#define VLAN_ID(vlan_hdr) (htons((vlan_hdr)->prio_vid) & 0xFFF) + +#endif /* ETHARP_SUPPORT_VLAN */ + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +/** the ARP message */ +struct etharp_hdr { + PACK_STRUCT_FIELD(u16_t hwtype); + PACK_STRUCT_FIELD(u16_t proto); + PACK_STRUCT_FIELD(u16_t _hwlen_protolen); + PACK_STRUCT_FIELD(u16_t opcode); + PACK_STRUCT_FIELD(struct eth_addr shwaddr); + PACK_STRUCT_FIELD(struct ip_addr2 sipaddr); + PACK_STRUCT_FIELD(struct eth_addr dhwaddr); + PACK_STRUCT_FIELD(struct ip_addr2 dipaddr); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define SIZEOF_ETHARP_HDR 28 +#define SIZEOF_ETHARP_PACKET (SIZEOF_ETH_HDR + SIZEOF_ETHARP_HDR) + +/** 5 seconds period */ +#define ARP_TMR_INTERVAL 5000 + +#define ETHTYPE_ARP 0x0806 +#define ETHTYPE_IP 0x0800 +#define ETHTYPE_VLAN 0x8100 +#define ETHTYPE_PPPOEDISC 0x8863 /* PPP Over Ethernet Discovery Stage */ +#define ETHTYPE_PPPOE 0x8864 /* PPP Over Ethernet Session Stage */ + +/** ARP message types (opcodes) */ +#define ARP_REQUEST 1 +#define ARP_REPLY 2 + +#if ARP_QUEUEING +/** struct for queueing outgoing packets for unknown address + * defined here to be accessed by memp.h + */ +struct etharp_q_entry { + struct etharp_q_entry *next; + struct pbuf *p; +}; +#endif /* ARP_QUEUEING */ + +#define etharp_init() /* Compatibility define, not init needed. */ +void etharp_tmr(void); +s8_t etharp_find_addr(struct netif *netif, struct ip_addr *ipaddr, + struct eth_addr **eth_ret, struct ip_addr **ip_ret); +void etharp_ip_input(struct netif *netif, struct pbuf *p); +void etharp_arp_input(struct netif *netif, struct eth_addr *ethaddr, + struct pbuf *p); +err_t etharp_output(struct netif *netif, struct pbuf *q, struct ip_addr *ipaddr); +err_t etharp_query(struct netif *netif, struct ip_addr *ipaddr, struct pbuf *q); +err_t etharp_request(struct netif *netif, struct ip_addr *ipaddr); +/** For Ethernet network interfaces, we might want to send "gratuitous ARP"; + * this is an ARP packet sent by a node in order to spontaneously cause other + * nodes to update an entry in their ARP cache. + * From RFC 3220 "IP Mobility Support for IPv4" section 4.6. */ +#define etharp_gratuitous(netif) etharp_request((netif), &(netif)->ip_addr) + +err_t ethernet_input(struct pbuf *p, struct netif *netif); + +#if LWIP_AUTOIP +err_t etharp_raw(struct netif *netif, const struct eth_addr *ethsrc_addr, + const struct eth_addr *ethdst_addr, + const struct eth_addr *hwsrc_addr, const struct ip_addr *ipsrc_addr, + const struct eth_addr *hwdst_addr, const struct ip_addr *ipdst_addr, + const u16_t opcode); +#endif /* LWIP_AUTOIP */ + +#define eth_addr_cmp(addr1, addr2) (memcmp((addr1)->addr, (addr2)->addr, ETHARP_HWADDR_LEN) == 0) + +extern const struct eth_addr ethbroadcast, ethzero; + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_ARP */ + +#endif /* __NETIF_ARP_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/netif/loopif.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/netif/loopif.h new file mode 100644 index 0000000..3f4fa62 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/netif/loopif.h @@ -0,0 +1,55 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __NETIF_LOOPIF_H__ +#define __NETIF_LOOPIF_H__ + +#include "lwip/opt.h" +#include "lwip/netif.h" +#include "lwip/err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if !LWIP_NETIF_LOOPBACK_MULTITHREADING +#define loopif_poll netif_poll +#endif /* !LWIP_NETIF_LOOPBACK_MULTITHREADING */ + +err_t loopif_init(struct netif *netif); + +#ifdef __cplusplus +} +#endif + +#endif /* __NETIF_LOOPIF_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/netif/ppp_oe.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/netif/ppp_oe.h new file mode 100644 index 0000000..fac0a78 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/netif/ppp_oe.h @@ -0,0 +1,163 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/***************************************************************************** +* ppp_oe.h - PPP Over Ethernet implementation for lwIP. +* +* Copyright (c) 2006 by Marc Boucher, Services Informatiques (MBSI) inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 06-01-01 Marc Boucher +* Ported to lwIP. +*****************************************************************************/ + + + +/* based on NetBSD: if_pppoe.c,v 1.64 2006/01/31 23:50:15 martin Exp */ + +/*- + * Copyright (c) 2002 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Martin Husemann . + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef PPP_OE_H +#define PPP_OE_H + +#include "lwip/opt.h" + +#if PPPOE_SUPPORT > 0 + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct pppoehdr { + PACK_STRUCT_FIELD(u8_t vertype); + PACK_STRUCT_FIELD(u8_t code); + PACK_STRUCT_FIELD(u16_t session); + PACK_STRUCT_FIELD(u16_t plen); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct pppoetag { + PACK_STRUCT_FIELD(u16_t tag); + PACK_STRUCT_FIELD(u16_t len); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + + +#define PPPOE_STATE_INITIAL 0 +#define PPPOE_STATE_PADI_SENT 1 +#define PPPOE_STATE_PADR_SENT 2 +#define PPPOE_STATE_SESSION 3 +#define PPPOE_STATE_CLOSING 4 +/* passive */ +#define PPPOE_STATE_PADO_SENT 1 + +#define PPPOE_HEADERLEN sizeof(struct pppoehdr) +#define PPPOE_VERTYPE 0x11 /* VER=1, TYPE = 1 */ + +#define PPPOE_TAG_EOL 0x0000 /* end of list */ +#define PPPOE_TAG_SNAME 0x0101 /* service name */ +#define PPPOE_TAG_ACNAME 0x0102 /* access concentrator name */ +#define PPPOE_TAG_HUNIQUE 0x0103 /* host unique */ +#define PPPOE_TAG_ACCOOKIE 0x0104 /* AC cookie */ +#define PPPOE_TAG_VENDOR 0x0105 /* vendor specific */ +#define PPPOE_TAG_RELAYSID 0x0110 /* relay session id */ +#define PPPOE_TAG_SNAME_ERR 0x0201 /* service name error */ +#define PPPOE_TAG_ACSYS_ERR 0x0202 /* AC system error */ +#define PPPOE_TAG_GENERIC_ERR 0x0203 /* gerneric error */ + +#define PPPOE_CODE_PADI 0x09 /* Active Discovery Initiation */ +#define PPPOE_CODE_PADO 0x07 /* Active Discovery Offer */ +#define PPPOE_CODE_PADR 0x19 /* Active Discovery Request */ +#define PPPOE_CODE_PADS 0x65 /* Active Discovery Session confirmation */ +#define PPPOE_CODE_PADT 0xA7 /* Active Discovery Terminate */ + +#ifndef ETHERMTU +#define ETHERMTU 1500 +#endif + +/* two byte PPP protocol discriminator, then IP data */ +#define PPPOE_MAXMTU (ETHERMTU-PPPOE_HEADERLEN-2) + +struct pppoe_softc; + + +void pppoe_init(void); + +err_t pppoe_create(struct netif *ethif, int pd, void (*linkStatusCB)(int pd, int up), struct pppoe_softc **scptr); +err_t pppoe_destroy(struct netif *ifp); + +int pppoe_connect(struct pppoe_softc *sc); +void pppoe_disconnect(struct pppoe_softc *sc); + +void pppoe_disc_input(struct netif *netif, struct pbuf *p); +void pppoe_data_input(struct netif *netif, struct pbuf *p); + +err_t pppoe_xmit(struct pppoe_softc *sc, struct pbuf *pb); + +extern int pppoe_hdrlen; + +#endif /* PPPOE_SUPPORT */ + +#endif /* PPP_OE_H */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/netif/slipif.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/netif/slipif.h new file mode 100644 index 0000000..ddc2dfa --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/include/netif/slipif.h @@ -0,0 +1,53 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001, Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __NETIF_SLIPIF_H__ +#define __NETIF_SLIPIF_H__ + +#include "lwip/netif.h" + +#ifdef __cplusplus +extern "C" { +#endif + +err_t slipif_init(struct netif * netif); +void slipif_poll(struct netif *netif); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/netif/etharp.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/netif/etharp.c new file mode 100644 index 0000000..1a5d134 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/netif/etharp.c @@ -0,0 +1,1224 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Address Resolution Protocol module for IP over Ethernet + * + * Functionally, ARP is divided into two parts. The first maps an IP address + * to a physical address when sending a packet, and the second part answers + * requests from other machines for our physical address. + * + * This implementation complies with RFC 826 (Ethernet ARP). It supports + * Gratuitious ARP from RFC3220 (IP Mobility Support for IPv4) section 4.6 + * if an interface calls etharp_gratuitous(our_netif) upon address change. + */ + +/* + * Copyright (c) 2001-2003 Swedish Institute of Computer Science. + * Copyright (c) 2003-2004 Leon Woestenberg + * Copyright (c) 2003-2004 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + */ + +#include "lwip/opt.h" + +#if LWIP_ARP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/inet.h" +#include "lwip/ip.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" +#include "lwip/dhcp.h" +#include "lwip/autoip.h" +#include "netif/etharp.h" + +#if PPPOE_SUPPORT +#include "netif/ppp_oe.h" +#endif /* PPPOE_SUPPORT */ + +#include + +/** the time an ARP entry stays valid after its last update, + * for ARP_TMR_INTERVAL = 5000, this is + * (240 * 5) seconds = 20 minutes. + */ +#define ARP_MAXAGE 240 +/** the time an ARP entry stays pending after first request, + * for ARP_TMR_INTERVAL = 5000, this is + * (2 * 5) seconds = 10 seconds. + * + * @internal Keep this number at least 2, otherwise it might + * run out instantly if the timeout occurs directly after a request. + */ +#define ARP_MAXPENDING 2 + +#define HWTYPE_ETHERNET 1 + +#define ARPH_HWLEN(hdr) (ntohs((hdr)->_hwlen_protolen) >> 8) +#define ARPH_PROTOLEN(hdr) (ntohs((hdr)->_hwlen_protolen) & 0xff) + +#define ARPH_HWLEN_SET(hdr, len) (hdr)->_hwlen_protolen = htons(ARPH_PROTOLEN(hdr) | ((len) << 8)) +#define ARPH_PROTOLEN_SET(hdr, len) (hdr)->_hwlen_protolen = htons((len) | (ARPH_HWLEN(hdr) << 8)) + +enum etharp_state { + ETHARP_STATE_EMPTY = 0, + ETHARP_STATE_PENDING, + ETHARP_STATE_STABLE +}; + +struct etharp_entry { +#if ARP_QUEUEING + /** + * Pointer to queue of pending outgoing packets on this ARP entry. + */ + struct etharp_q_entry *q; +#endif + struct ip_addr ipaddr; + struct eth_addr ethaddr; + enum etharp_state state; + u8_t ctime; + struct netif *netif; +}; + +const struct eth_addr ethbroadcast = {{0xff,0xff,0xff,0xff,0xff,0xff}}; +const struct eth_addr ethzero = {{0,0,0,0,0,0}}; +static struct etharp_entry arp_table[ARP_TABLE_SIZE]; +#if !LWIP_NETIF_HWADDRHINT +static u8_t etharp_cached_entry; +#endif + +/** + * Try hard to create a new entry - we want the IP address to appear in + * the cache (even if this means removing an active entry or so). */ +#define ETHARP_TRY_HARD 1 +#define ETHARP_FIND_ONLY 2 + +#if LWIP_NETIF_HWADDRHINT +#define NETIF_SET_HINT(netif, hint) if (((netif) != NULL) && ((netif)->addr_hint != NULL)) \ + *((netif)->addr_hint) = (hint); +static s8_t find_entry(struct ip_addr *ipaddr, u8_t flags, struct netif *netif); +#else /* LWIP_NETIF_HWADDRHINT */ +static s8_t find_entry(struct ip_addr *ipaddr, u8_t flags); +#endif /* LWIP_NETIF_HWADDRHINT */ + +static err_t update_arp_entry(struct netif *netif, struct ip_addr *ipaddr, struct eth_addr *ethaddr, u8_t flags); + + +/* Some checks, instead of etharp_init(): */ +#if (LWIP_ARP && (ARP_TABLE_SIZE > 0x7f)) + #error "If you want to use ARP, ARP_TABLE_SIZE must fit in an s8_t, so, you have to reduce it in your lwipopts.h" +#endif + + +#if ARP_QUEUEING +/** + * Free a complete queue of etharp entries + * + * @param q a qeueue of etharp_q_entry's to free + */ +static void +free_etharp_q(struct etharp_q_entry *q) +{ + struct etharp_q_entry *r; + LWIP_ASSERT("q != NULL", q != NULL); + LWIP_ASSERT("q->p != NULL", q->p != NULL); + while (q) { + r = q; + q = q->next; + LWIP_ASSERT("r->p != NULL", (r->p != NULL)); + pbuf_free(r->p); + memp_free(MEMP_ARP_QUEUE, r); + } +} +#endif + +/** + * Clears expired entries in the ARP table. + * + * This function should be called every ETHARP_TMR_INTERVAL microseconds (5 seconds), + * in order to expire entries in the ARP table. + */ +void +etharp_tmr(void) +{ + u8_t i; + + LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer\n")); + /* remove expired entries from the ARP table */ + for (i = 0; i < ARP_TABLE_SIZE; ++i) { + arp_table[i].ctime++; + if (((arp_table[i].state == ETHARP_STATE_STABLE) && + (arp_table[i].ctime >= ARP_MAXAGE)) || + ((arp_table[i].state == ETHARP_STATE_PENDING) && + (arp_table[i].ctime >= ARP_MAXPENDING))) { + /* pending or stable entry has become old! */ + LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired %s entry %"U16_F".\n", + arp_table[i].state == ETHARP_STATE_STABLE ? "stable" : "pending", (u16_t)i)); + /* clean up entries that have just been expired */ + /* remove from SNMP ARP index tree */ + snmp_delete_arpidx_tree(arp_table[i].netif, &arp_table[i].ipaddr); +#if ARP_QUEUEING + /* and empty packet queue */ + if (arp_table[i].q != NULL) { + /* remove all queued packets */ + LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: freeing entry %"U16_F", packet queue %p.\n", (u16_t)i, (void *)(arp_table[i].q))); + free_etharp_q(arp_table[i].q); + arp_table[i].q = NULL; + } +#endif + /* recycle entry for re-use */ + arp_table[i].state = ETHARP_STATE_EMPTY; + } +#if ARP_QUEUEING + /* still pending entry? (not expired) */ + if (arp_table[i].state == ETHARP_STATE_PENDING) { + /* resend an ARP query here? */ + } +#endif + } +} + +/** + * Search the ARP table for a matching or new entry. + * + * If an IP address is given, return a pending or stable ARP entry that matches + * the address. If no match is found, create a new entry with this address set, + * but in state ETHARP_EMPTY. The caller must check and possibly change the + * state of the returned entry. + * + * If ipaddr is NULL, return a initialized new entry in state ETHARP_EMPTY. + * + * In all cases, attempt to create new entries from an empty entry. If no + * empty entries are available and ETHARP_TRY_HARD flag is set, recycle + * old entries. Heuristic choose the least important entry for recycling. + * + * @param ipaddr IP address to find in ARP cache, or to add if not found. + * @param flags + * - ETHARP_TRY_HARD: Try hard to create a entry by allowing recycling of + * active (stable or pending) entries. + * + * @return The ARP entry index that matched or is created, ERR_MEM if no + * entry is found or could be recycled. + */ +static s8_t +#if LWIP_NETIF_HWADDRHINT +find_entry(struct ip_addr *ipaddr, u8_t flags, struct netif *netif) +#else /* LWIP_NETIF_HWADDRHINT */ +find_entry(struct ip_addr *ipaddr, u8_t flags) +#endif /* LWIP_NETIF_HWADDRHINT */ +{ + s8_t old_pending = ARP_TABLE_SIZE, old_stable = ARP_TABLE_SIZE; + s8_t empty = ARP_TABLE_SIZE; + u8_t i = 0, age_pending = 0, age_stable = 0; +#if ARP_QUEUEING + /* oldest entry with packets on queue */ + s8_t old_queue = ARP_TABLE_SIZE; + /* its age */ + u8_t age_queue = 0; +#endif + + /* First, test if the last call to this function asked for the + * same address. If so, we're really fast! */ + if (ipaddr) { + /* ipaddr to search for was given */ +#if LWIP_NETIF_HWADDRHINT + if ((netif != NULL) && (netif->addr_hint != NULL)) { + /* per-pcb cached entry was given */ + u8_t per_pcb_cache = *(netif->addr_hint); + if ((per_pcb_cache < ARP_TABLE_SIZE) && arp_table[per_pcb_cache].state == ETHARP_STATE_STABLE) { + /* the per-pcb-cached entry is stable */ + if (ip_addr_cmp(ipaddr, &arp_table[per_pcb_cache].ipaddr)) { + /* per-pcb cached entry was the right one! */ + ETHARP_STATS_INC(etharp.cachehit); + return per_pcb_cache; + } + } + } +#else /* #if LWIP_NETIF_HWADDRHINT */ + if (arp_table[etharp_cached_entry].state == ETHARP_STATE_STABLE) { + /* the cached entry is stable */ + if (ip_addr_cmp(ipaddr, &arp_table[etharp_cached_entry].ipaddr)) { + /* cached entry was the right one! */ + ETHARP_STATS_INC(etharp.cachehit); + return etharp_cached_entry; + } + } +#endif /* #if LWIP_NETIF_HWADDRHINT */ + } + + /** + * a) do a search through the cache, remember candidates + * b) select candidate entry + * c) create new entry + */ + + /* a) in a single search sweep, do all of this + * 1) remember the first empty entry (if any) + * 2) remember the oldest stable entry (if any) + * 3) remember the oldest pending entry without queued packets (if any) + * 4) remember the oldest pending entry with queued packets (if any) + * 5) search for a matching IP entry, either pending or stable + * until 5 matches, or all entries are searched for. + */ + + for (i = 0; i < ARP_TABLE_SIZE; ++i) { + /* no empty entry found yet and now we do find one? */ + if ((empty == ARP_TABLE_SIZE) && (arp_table[i].state == ETHARP_STATE_EMPTY)) { + LWIP_DEBUGF(ETHARP_DEBUG, ("find_entry: found empty entry %"U16_F"\n", (u16_t)i)); + /* remember first empty entry */ + empty = i; + } + /* pending entry? */ + else if (arp_table[i].state == ETHARP_STATE_PENDING) { + /* if given, does IP address match IP address in ARP entry? */ + if (ipaddr && ip_addr_cmp(ipaddr, &arp_table[i].ipaddr)) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: found matching pending entry %"U16_F"\n", (u16_t)i)); + /* found exact IP address match, simply bail out */ +#if LWIP_NETIF_HWADDRHINT + NETIF_SET_HINT(netif, i); +#else /* #if LWIP_NETIF_HWADDRHINT */ + etharp_cached_entry = i; +#endif /* #if LWIP_NETIF_HWADDRHINT */ + return i; +#if ARP_QUEUEING + /* pending with queued packets? */ + } else if (arp_table[i].q != NULL) { + if (arp_table[i].ctime >= age_queue) { + old_queue = i; + age_queue = arp_table[i].ctime; + } +#endif + /* pending without queued packets? */ + } else { + if (arp_table[i].ctime >= age_pending) { + old_pending = i; + age_pending = arp_table[i].ctime; + } + } + } + /* stable entry? */ + else if (arp_table[i].state == ETHARP_STATE_STABLE) { + /* if given, does IP address match IP address in ARP entry? */ + if (ipaddr && ip_addr_cmp(ipaddr, &arp_table[i].ipaddr)) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: found matching stable entry %"U16_F"\n", (u16_t)i)); + /* found exact IP address match, simply bail out */ +#if LWIP_NETIF_HWADDRHINT + NETIF_SET_HINT(netif, i); +#else /* #if LWIP_NETIF_HWADDRHINT */ + etharp_cached_entry = i; +#endif /* #if LWIP_NETIF_HWADDRHINT */ + return i; + /* remember entry with oldest stable entry in oldest, its age in maxtime */ + } else if (arp_table[i].ctime >= age_stable) { + old_stable = i; + age_stable = arp_table[i].ctime; + } + } + } + /* { we have no match } => try to create a new entry */ + + /* no empty entry found and not allowed to recycle? */ + if (((empty == ARP_TABLE_SIZE) && ((flags & ETHARP_TRY_HARD) == 0)) + /* or don't create new entry, only search? */ + || ((flags & ETHARP_FIND_ONLY) != 0)) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: no empty entry found and not allowed to recycle\n")); + return (s8_t)ERR_MEM; + } + + /* b) choose the least destructive entry to recycle: + * 1) empty entry + * 2) oldest stable entry + * 3) oldest pending entry without queued packets + * 4) oldest pending entry with queued packets + * + * { ETHARP_TRY_HARD is set at this point } + */ + + /* 1) empty entry available? */ + if (empty < ARP_TABLE_SIZE) { + i = empty; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: selecting empty entry %"U16_F"\n", (u16_t)i)); + } + /* 2) found recyclable stable entry? */ + else if (old_stable < ARP_TABLE_SIZE) { + /* recycle oldest stable*/ + i = old_stable; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: selecting oldest stable entry %"U16_F"\n", (u16_t)i)); +#if ARP_QUEUEING + /* no queued packets should exist on stable entries */ + LWIP_ASSERT("arp_table[i].q == NULL", arp_table[i].q == NULL); +#endif + /* 3) found recyclable pending entry without queued packets? */ + } else if (old_pending < ARP_TABLE_SIZE) { + /* recycle oldest pending */ + i = old_pending; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: selecting oldest pending entry %"U16_F" (without queue)\n", (u16_t)i)); +#if ARP_QUEUEING + /* 4) found recyclable pending entry with queued packets? */ + } else if (old_queue < ARP_TABLE_SIZE) { + /* recycle oldest pending */ + i = old_queue; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: selecting oldest pending entry %"U16_F", freeing packet queue %p\n", (u16_t)i, (void *)(arp_table[i].q))); + free_etharp_q(arp_table[i].q); + arp_table[i].q = NULL; +#endif + /* no empty or recyclable entries found */ + } else { + return (s8_t)ERR_MEM; + } + + /* { empty or recyclable entry found } */ + LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE); + + if (arp_table[i].state != ETHARP_STATE_EMPTY) + { + snmp_delete_arpidx_tree(arp_table[i].netif, &arp_table[i].ipaddr); + } + /* recycle entry (no-op for an already empty entry) */ + arp_table[i].state = ETHARP_STATE_EMPTY; + + /* IP address given? */ + if (ipaddr != NULL) { + /* set IP address */ + ip_addr_set(&arp_table[i].ipaddr, ipaddr); + } + arp_table[i].ctime = 0; +#if LWIP_NETIF_HWADDRHINT + NETIF_SET_HINT(netif, i); +#else /* #if LWIP_NETIF_HWADDRHINT */ + etharp_cached_entry = i; +#endif /* #if LWIP_NETIF_HWADDRHINT */ + return (err_t)i; +} + +/** + * Send an IP packet on the network using netif->linkoutput + * The ethernet header is filled in before sending. + * + * @params netif the lwIP network interface on which to send the packet + * @params p the packet to send, p->payload pointing to the (uninitialized) ethernet header + * @params src the source MAC address to be copied into the ethernet header + * @params dst the destination MAC address to be copied into the ethernet header + * @return ERR_OK if the packet was sent, any other err_t on failure + */ +static err_t +etharp_send_ip(struct netif *netif, struct pbuf *p, struct eth_addr *src, struct eth_addr *dst) +{ + struct eth_hdr *ethhdr = p->payload; + u8_t k; + + LWIP_ASSERT("netif->hwaddr_len must be the same as ETHARP_HWADDR_LEN for etharp!", + (netif->hwaddr_len == ETHARP_HWADDR_LEN)); + k = ETHARP_HWADDR_LEN; + while(k > 0) { + k--; + ethhdr->dest.addr[k] = dst->addr[k]; + ethhdr->src.addr[k] = src->addr[k]; + } + ethhdr->type = htons(ETHTYPE_IP); + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_send_ip: sending packet %p\n", (void *)p)); + /* send the packet */ + return netif->linkoutput(netif, p); +} + +/** + * Update (or insert) a IP/MAC address pair in the ARP cache. + * + * If a pending entry is resolved, any queued packets will be sent + * at this point. + * + * @param ipaddr IP address of the inserted ARP entry. + * @param ethaddr Ethernet address of the inserted ARP entry. + * @param flags Defines behaviour: + * - ETHARP_TRY_HARD Allows ARP to insert this as a new item. If not specified, + * only existing ARP entries will be updated. + * + * @return + * - ERR_OK Succesfully updated ARP cache. + * - ERR_MEM If we could not add a new ARP entry when ETHARP_TRY_HARD was set. + * - ERR_ARG Non-unicast address given, those will not appear in ARP cache. + * + * @see pbuf_free() + */ +static err_t +update_arp_entry(struct netif *netif, struct ip_addr *ipaddr, struct eth_addr *ethaddr, u8_t flags) +{ + s8_t i; + u8_t k; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("update_arp_entry()\n")); + LWIP_ASSERT("netif->hwaddr_len == ETHARP_HWADDR_LEN", netif->hwaddr_len == ETHARP_HWADDR_LEN); + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("update_arp_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F" - %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F"\n", + ip4_addr1(ipaddr), ip4_addr2(ipaddr), ip4_addr3(ipaddr), ip4_addr4(ipaddr), + ethaddr->addr[0], ethaddr->addr[1], ethaddr->addr[2], + ethaddr->addr[3], ethaddr->addr[4], ethaddr->addr[5])); + /* non-unicast address? */ + if (ip_addr_isany(ipaddr) || + ip_addr_isbroadcast(ipaddr, netif) || + ip_addr_ismulticast(ipaddr)) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("update_arp_entry: will not add non-unicast IP address to ARP cache\n")); + return ERR_ARG; + } + /* find or create ARP entry */ +#if LWIP_NETIF_HWADDRHINT + i = find_entry(ipaddr, flags, netif); +#else /* LWIP_NETIF_HWADDRHINT */ + i = find_entry(ipaddr, flags); +#endif /* LWIP_NETIF_HWADDRHINT */ + /* bail out if no entry could be found */ + if (i < 0) + return (err_t)i; + + /* mark it stable */ + arp_table[i].state = ETHARP_STATE_STABLE; + /* record network interface */ + arp_table[i].netif = netif; + + /* insert in SNMP ARP index tree */ + snmp_insert_arpidx_tree(netif, &arp_table[i].ipaddr); + + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("update_arp_entry: updating stable entry %"S16_F"\n", (s16_t)i)); + /* update address */ + k = ETHARP_HWADDR_LEN; + while (k > 0) { + k--; + arp_table[i].ethaddr.addr[k] = ethaddr->addr[k]; + } + /* reset time stamp */ + arp_table[i].ctime = 0; +#if ARP_QUEUEING + /* this is where we will send out queued packets! */ + while (arp_table[i].q != NULL) { + struct pbuf *p; + /* remember remainder of queue */ + struct etharp_q_entry *q = arp_table[i].q; + /* pop first item off the queue */ + arp_table[i].q = q->next; + /* get the packet pointer */ + p = q->p; + /* now queue entry can be freed */ + memp_free(MEMP_ARP_QUEUE, q); + /* send the queued IP packet */ + etharp_send_ip(netif, p, (struct eth_addr*)(netif->hwaddr), ethaddr); + /* free the queued IP packet */ + pbuf_free(p); + } +#endif + return ERR_OK; +} + +/** + * Finds (stable) ethernet/IP address pair from ARP table + * using interface and IP address index. + * @note the addresses in the ARP table are in network order! + * + * @param netif points to interface index + * @param ipaddr points to the (network order) IP address index + * @param eth_ret points to return pointer + * @param ip_ret points to return pointer + * @return table index if found, -1 otherwise + */ +s8_t +etharp_find_addr(struct netif *netif, struct ip_addr *ipaddr, + struct eth_addr **eth_ret, struct ip_addr **ip_ret) +{ + s8_t i; + + LWIP_UNUSED_ARG(netif); + +#if LWIP_NETIF_HWADDRHINT + i = find_entry(ipaddr, ETHARP_FIND_ONLY, NULL); +#else /* LWIP_NETIF_HWADDRHINT */ + i = find_entry(ipaddr, ETHARP_FIND_ONLY); +#endif /* LWIP_NETIF_HWADDRHINT */ + if((i >= 0) && arp_table[i].state == ETHARP_STATE_STABLE) { + *eth_ret = &arp_table[i].ethaddr; + *ip_ret = &arp_table[i].ipaddr; + return i; + } + return -1; +} + +/** + * Updates the ARP table using the given IP packet. + * + * Uses the incoming IP packet's source address to update the + * ARP cache for the local network. The function does not alter + * or free the packet. This function must be called before the + * packet p is passed to the IP layer. + * + * @param netif The lwIP network interface on which the IP packet pbuf arrived. + * @param p The IP packet that arrived on netif. + * + * @return NULL + * + * @see pbuf_free() + */ +void +etharp_ip_input(struct netif *netif, struct pbuf *p) +{ + struct eth_hdr *ethhdr; + struct ip_hdr *iphdr; + LWIP_ERROR("netif != NULL", (netif != NULL), return;); + /* Only insert an entry if the source IP address of the + incoming IP packet comes from a host on the local network. */ + ethhdr = p->payload; + iphdr = (struct ip_hdr *)((u8_t*)ethhdr + SIZEOF_ETH_HDR); +#if ETHARP_SUPPORT_VLAN + if (ethhdr->type == ETHTYPE_VLAN) { + iphdr = (struct ip_hdr *)((u8_t*)ethhdr + SIZEOF_ETH_HDR + SIZEOF_VLAN_HDR); + } +#endif /* ETHARP_SUPPORT_VLAN */ + + /* source is not on the local network? */ + if (!ip_addr_netcmp(&(iphdr->src), &(netif->ip_addr), &(netif->netmask))) { + /* do nothing */ + return; + } + + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_ip_input: updating ETHARP table.\n")); + /* update ARP table */ + /* @todo We could use ETHARP_TRY_HARD if we think we are going to talk + * back soon (for example, if the destination IP address is ours. */ + update_arp_entry(netif, &(iphdr->src), &(ethhdr->src), 0); +} + + +/** + * Responds to ARP requests to us. Upon ARP replies to us, add entry to cache + * send out queued IP packets. Updates cache with snooped address pairs. + * + * Should be called for incoming ARP packets. The pbuf in the argument + * is freed by this function. + * + * @param netif The lwIP network interface on which the ARP packet pbuf arrived. + * @param ethaddr Ethernet address of netif. + * @param p The ARP packet that arrived on netif. Is freed by this function. + * + * @return NULL + * + * @see pbuf_free() + */ +void +etharp_arp_input(struct netif *netif, struct eth_addr *ethaddr, struct pbuf *p) +{ + struct etharp_hdr *hdr; + struct eth_hdr *ethhdr; + /* these are aligned properly, whereas the ARP header fields might not be */ + struct ip_addr sipaddr, dipaddr; + u8_t i; + u8_t for_us; +#if LWIP_AUTOIP + const u8_t * ethdst_hwaddr; +#endif /* LWIP_AUTOIP */ + + LWIP_ERROR("netif != NULL", (netif != NULL), return;); + + /* drop short ARP packets: we have to check for p->len instead of p->tot_len here + since a struct etharp_hdr is pointed to p->payload, so it musn't be chained! */ + if (p->len < SIZEOF_ETHARP_PACKET) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, + ("etharp_arp_input: packet dropped, too short (%"S16_F"/%"S16_F")\n", p->tot_len, + (s16_t)SIZEOF_ETHARP_PACKET)); + ETHARP_STATS_INC(etharp.lenerr); + ETHARP_STATS_INC(etharp.drop); + pbuf_free(p); + return; + } + + ethhdr = p->payload; + hdr = (struct etharp_hdr *)((u8_t*)ethhdr + SIZEOF_ETH_HDR); +#if ETHARP_SUPPORT_VLAN + if (ethhdr->type == ETHTYPE_VLAN) { + hdr = (struct etharp_hdr *)(((u8_t*)ethhdr) + SIZEOF_ETH_HDR + SIZEOF_VLAN_HDR); + } +#endif /* ETHARP_SUPPORT_VLAN */ + + /* RFC 826 "Packet Reception": */ + if ((hdr->hwtype != htons(HWTYPE_ETHERNET)) || + (hdr->_hwlen_protolen != htons((ETHARP_HWADDR_LEN << 8) | sizeof(struct ip_addr))) || + (hdr->proto != htons(ETHTYPE_IP)) || + (ethhdr->type != htons(ETHTYPE_ARP))) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, + ("etharp_arp_input: packet dropped, wrong hw type, hwlen, proto, protolen or ethernet type (%"U16_F"/%"U16_F"/%"U16_F"/%"U16_F"/%"U16_F")\n", + hdr->hwtype, ARPH_HWLEN(hdr), hdr->proto, ARPH_PROTOLEN(hdr), ethhdr->type)); + ETHARP_STATS_INC(etharp.proterr); + ETHARP_STATS_INC(etharp.drop); + pbuf_free(p); + return; + } + ETHARP_STATS_INC(etharp.recv); + +#if LWIP_AUTOIP + /* We have to check if a host already has configured our random + * created link local address and continously check if there is + * a host with this IP-address so we can detect collisions */ + autoip_arp_reply(netif, hdr); +#endif /* LWIP_AUTOIP */ + + /* Copy struct ip_addr2 to aligned ip_addr, to support compilers without + * structure packing (not using structure copy which breaks strict-aliasing rules). */ + SMEMCPY(&sipaddr, &hdr->sipaddr, sizeof(sipaddr)); + SMEMCPY(&dipaddr, &hdr->dipaddr, sizeof(dipaddr)); + + /* this interface is not configured? */ + if (netif->ip_addr.addr == 0) { + for_us = 0; + } else { + /* ARP packet directed to us? */ + for_us = ip_addr_cmp(&dipaddr, &(netif->ip_addr)); + } + + /* ARP message directed to us? */ + if (for_us) { + /* add IP address in ARP cache; assume requester wants to talk to us. + * can result in directly sending the queued packets for this host. */ + update_arp_entry(netif, &sipaddr, &(hdr->shwaddr), ETHARP_TRY_HARD); + /* ARP message not directed to us? */ + } else { + /* update the source IP address in the cache, if present */ + update_arp_entry(netif, &sipaddr, &(hdr->shwaddr), 0); + } + + /* now act on the message itself */ + switch (htons(hdr->opcode)) { + /* ARP request? */ + case ARP_REQUEST: + /* ARP request. If it asked for our address, we send out a + * reply. In any case, we time-stamp any existing ARP entry, + * and possiby send out an IP packet that was queued on it. */ + + LWIP_DEBUGF (ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: incoming ARP request\n")); + /* ARP request for our address? */ + if (for_us) { + + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: replying to ARP request for our IP address\n")); + /* Re-use pbuf to send ARP reply. + Since we are re-using an existing pbuf, we can't call etharp_raw since + that would allocate a new pbuf. */ + hdr->opcode = htons(ARP_REPLY); + + hdr->dipaddr = hdr->sipaddr; + SMEMCPY(&hdr->sipaddr, &netif->ip_addr, sizeof(hdr->sipaddr)); + + LWIP_ASSERT("netif->hwaddr_len must be the same as ETHARP_HWADDR_LEN for etharp!", + (netif->hwaddr_len == ETHARP_HWADDR_LEN)); + i = ETHARP_HWADDR_LEN; +#if LWIP_AUTOIP + /* If we are using Link-Local, ARP packets must be broadcast on the + * link layer. (See RFC3927 Section 2.5) */ + ethdst_hwaddr = ((netif->autoip != NULL) && (netif->autoip->state != AUTOIP_STATE_OFF)) ? (u8_t*)(ethbroadcast.addr) : hdr->shwaddr.addr; +#endif /* LWIP_AUTOIP */ + + while(i > 0) { + i--; + hdr->dhwaddr.addr[i] = hdr->shwaddr.addr[i]; +#if LWIP_AUTOIP + ethhdr->dest.addr[i] = ethdst_hwaddr[i]; +#else /* LWIP_AUTOIP */ + ethhdr->dest.addr[i] = hdr->shwaddr.addr[i]; +#endif /* LWIP_AUTOIP */ + hdr->shwaddr.addr[i] = ethaddr->addr[i]; + ethhdr->src.addr[i] = ethaddr->addr[i]; + } + + /* hwtype, hwaddr_len, proto, protolen and the type in the ethernet header + are already correct, we tested that before */ + + /* return ARP reply */ + netif->linkoutput(netif, p); + /* we are not configured? */ + } else if (netif->ip_addr.addr == 0) { + /* { for_us == 0 and netif->ip_addr.addr == 0 } */ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: we are unconfigured, ARP request ignored.\n")); + /* request was not directed to us */ + } else { + /* { for_us == 0 and netif->ip_addr.addr != 0 } */ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: ARP request was not for us.\n")); + } + break; + case ARP_REPLY: + /* ARP reply. We already updated the ARP cache earlier. */ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: incoming ARP reply\n")); +#if (LWIP_DHCP && DHCP_DOES_ARP_CHECK) + /* DHCP wants to know about ARP replies from any host with an + * IP address also offered to us by the DHCP server. We do not + * want to take a duplicate IP address on a single network. + * @todo How should we handle redundant (fail-over) interfaces? */ + dhcp_arp_reply(netif, &sipaddr); +#endif + break; + default: + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: ARP unknown opcode type %"S16_F"\n", htons(hdr->opcode))); + ETHARP_STATS_INC(etharp.err); + break; + } + /* free ARP packet */ + pbuf_free(p); +} + +/** + * Resolve and fill-in Ethernet address header for outgoing IP packet. + * + * For IP multicast and broadcast, corresponding Ethernet addresses + * are selected and the packet is transmitted on the link. + * + * For unicast addresses, the packet is submitted to etharp_query(). In + * case the IP address is outside the local network, the IP address of + * the gateway is used. + * + * @param netif The lwIP network interface which the IP packet will be sent on. + * @param q The pbuf(s) containing the IP packet to be sent. + * @param ipaddr The IP address of the packet destination. + * + * @return + * - ERR_RTE No route to destination (no gateway to external networks), + * or the return type of either etharp_query() or etharp_send_ip(). + */ +err_t +etharp_output(struct netif *netif, struct pbuf *q, struct ip_addr *ipaddr) +{ + struct eth_addr *dest, mcastaddr; + + /* make room for Ethernet header - should not fail */ + if (pbuf_header(q, sizeof(struct eth_hdr)) != 0) { + /* bail out */ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("etharp_output: could not allocate room for header.\n")); + LINK_STATS_INC(link.lenerr); + return ERR_BUF; + } + + /* assume unresolved Ethernet address */ + dest = NULL; + /* Determine on destination hardware address. Broadcasts and multicasts + * are special, other IP addresses are looked up in the ARP table. */ + + /* broadcast destination IP address? */ + if (ip_addr_isbroadcast(ipaddr, netif)) { + /* broadcast on Ethernet also */ + dest = (struct eth_addr *)ðbroadcast; + /* multicast destination IP address? */ + } else if (ip_addr_ismulticast(ipaddr)) { + /* Hash IP multicast address to MAC address.*/ + mcastaddr.addr[0] = 0x01; + mcastaddr.addr[1] = 0x00; + mcastaddr.addr[2] = 0x5e; + mcastaddr.addr[3] = ip4_addr2(ipaddr) & 0x7f; + mcastaddr.addr[4] = ip4_addr3(ipaddr); + mcastaddr.addr[5] = ip4_addr4(ipaddr); + /* destination Ethernet address is multicast */ + dest = &mcastaddr; + /* unicast destination IP address? */ + } else { + /* outside local network? */ + if (!ip_addr_netcmp(ipaddr, &(netif->ip_addr), &(netif->netmask))) { + /* interface has default gateway? */ + if (netif->gw.addr != 0) { + /* send to hardware address of default gateway IP address */ + ipaddr = &(netif->gw); + /* no default gateway available */ + } else { + /* no route to destination error (default gateway missing) */ + return ERR_RTE; + } + } + /* queue on destination Ethernet address belonging to ipaddr */ + return etharp_query(netif, ipaddr, q); + } + + /* continuation for multicast/broadcast destinations */ + /* obtain source Ethernet address of the given interface */ + /* send packet directly on the link */ + return etharp_send_ip(netif, q, (struct eth_addr*)(netif->hwaddr), dest); +} + +/** + * Send an ARP request for the given IP address and/or queue a packet. + * + * If the IP address was not yet in the cache, a pending ARP cache entry + * is added and an ARP request is sent for the given address. The packet + * is queued on this entry. + * + * If the IP address was already pending in the cache, a new ARP request + * is sent for the given address. The packet is queued on this entry. + * + * If the IP address was already stable in the cache, and a packet is + * given, it is directly sent and no ARP request is sent out. + * + * If the IP address was already stable in the cache, and no packet is + * given, an ARP request is sent out. + * + * @param netif The lwIP network interface on which ipaddr + * must be queried for. + * @param ipaddr The IP address to be resolved. + * @param q If non-NULL, a pbuf that must be delivered to the IP address. + * q is not freed by this function. + * + * @note q must only be ONE packet, not a packet queue! + * + * @return + * - ERR_BUF Could not make room for Ethernet header. + * - ERR_MEM Hardware address unknown, and no more ARP entries available + * to query for address or queue the packet. + * - ERR_MEM Could not queue packet due to memory shortage. + * - ERR_RTE No route to destination (no gateway to external networks). + * - ERR_ARG Non-unicast address given, those will not appear in ARP cache. + * + */ +err_t +etharp_query(struct netif *netif, struct ip_addr *ipaddr, struct pbuf *q) +{ + struct eth_addr * srcaddr = (struct eth_addr *)netif->hwaddr; + err_t result = ERR_MEM; + s8_t i; /* ARP entry index */ + + /* non-unicast address? */ + if (ip_addr_isbroadcast(ipaddr, netif) || + ip_addr_ismulticast(ipaddr) || + ip_addr_isany(ipaddr)) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: will not add non-unicast IP address to ARP cache\n")); + return ERR_ARG; + } + + /* find entry in ARP cache, ask to create entry if queueing packet */ +#if LWIP_NETIF_HWADDRHINT + i = find_entry(ipaddr, ETHARP_TRY_HARD, netif); +#else /* LWIP_NETIF_HWADDRHINT */ + i = find_entry(ipaddr, ETHARP_TRY_HARD); +#endif /* LWIP_NETIF_HWADDRHINT */ + + /* could not find or create entry? */ + if (i < 0) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not create ARP entry\n")); + if (q) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: packet dropped\n")); + ETHARP_STATS_INC(etharp.memerr); + } + return (err_t)i; + } + + /* mark a fresh entry as pending (we just sent a request) */ + if (arp_table[i].state == ETHARP_STATE_EMPTY) { + arp_table[i].state = ETHARP_STATE_PENDING; + } + + /* { i is either a STABLE or (new or existing) PENDING entry } */ + LWIP_ASSERT("arp_table[i].state == PENDING or STABLE", + ((arp_table[i].state == ETHARP_STATE_PENDING) || + (arp_table[i].state == ETHARP_STATE_STABLE))); + + /* do we have a pending entry? or an implicit query request? */ + if ((arp_table[i].state == ETHARP_STATE_PENDING) || (q == NULL)) { + /* try to resolve it; send out ARP request */ + result = etharp_request(netif, ipaddr); + if (result != ERR_OK) { + /* ARP request couldn't be sent */ + /* We don't re-send arp request in etharp_tmr, but we still queue packets, + since this failure could be temporary, and the next packet calling + etharp_query again could lead to sending the queued packets. */ + } + } + + /* packet given? */ + if (q != NULL) { + /* stable entry? */ + if (arp_table[i].state == ETHARP_STATE_STABLE) { + /* we have a valid IP->Ethernet address mapping */ + /* send the packet */ + result = etharp_send_ip(netif, q, srcaddr, &(arp_table[i].ethaddr)); + /* pending entry? (either just created or already pending */ + } else if (arp_table[i].state == ETHARP_STATE_PENDING) { +#if ARP_QUEUEING /* queue the given q packet */ + struct pbuf *p; + int copy_needed = 0; + /* IF q includes a PBUF_REF, PBUF_POOL or PBUF_RAM, we have no choice but + * to copy the whole queue into a new PBUF_RAM (see bug #11400) + * PBUF_ROMs can be left as they are, since ROM must not get changed. */ + p = q; + while (p) { + LWIP_ASSERT("no packet queues allowed!", (p->len != p->tot_len) || (p->next == 0)); + if(p->type != PBUF_ROM) { + copy_needed = 1; + break; + } + p = p->next; + } + if(copy_needed) { + /* copy the whole packet into new pbufs */ + p = pbuf_alloc(PBUF_RAW, p->tot_len, PBUF_RAM); + if(p != NULL) { + if (pbuf_copy(p, q) != ERR_OK) { + pbuf_free(p); + p = NULL; + } + } + } else { + /* referencing the old pbuf is enough */ + p = q; + pbuf_ref(p); + } + /* packet could be taken over? */ + if (p != NULL) { + /* queue packet ... */ + struct etharp_q_entry *new_entry; + /* allocate a new arp queue entry */ + new_entry = memp_malloc(MEMP_ARP_QUEUE); + if (new_entry != NULL) { + new_entry->next = 0; + new_entry->p = p; + if(arp_table[i].q != NULL) { + /* queue was already existent, append the new entry to the end */ + struct etharp_q_entry *r; + r = arp_table[i].q; + while (r->next != NULL) { + r = r->next; + } + r->next = new_entry; + } else { + /* queue did not exist, first item in queue */ + arp_table[i].q = new_entry; + } + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"S16_F"\n", (void *)q, (s16_t)i)); + result = ERR_OK; + } else { + /* the pool MEMP_ARP_QUEUE is empty */ + pbuf_free(p); + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q)); + /* { result == ERR_MEM } through initialization */ + } + } else { + ETHARP_STATS_INC(etharp.memerr); + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q)); + /* { result == ERR_MEM } through initialization */ + } +#else /* ARP_QUEUEING == 0 */ + /* q && state == PENDING && ARP_QUEUEING == 0 => result = ERR_MEM */ + /* { result == ERR_MEM } through initialization */ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: Ethernet destination address unknown, queueing disabled, packet %p dropped\n", (void *)q)); +#endif + } + } + return result; +} + +/** + * Send a raw ARP packet (opcode and all addresses can be modified) + * + * @param netif the lwip network interface on which to send the ARP packet + * @param ethsrc_addr the source MAC address for the ethernet header + * @param ethdst_addr the destination MAC address for the ethernet header + * @param hwsrc_addr the source MAC address for the ARP protocol header + * @param ipsrc_addr the source IP address for the ARP protocol header + * @param hwdst_addr the destination MAC address for the ARP protocol header + * @param ipdst_addr the destination IP address for the ARP protocol header + * @param opcode the type of the ARP packet + * @return ERR_OK if the ARP packet has been sent + * ERR_MEM if the ARP packet couldn't be allocated + * any other err_t on failure + */ +#if !LWIP_AUTOIP +static +#endif /* LWIP_AUTOIP */ +err_t +etharp_raw(struct netif *netif, const struct eth_addr *ethsrc_addr, + const struct eth_addr *ethdst_addr, + const struct eth_addr *hwsrc_addr, const struct ip_addr *ipsrc_addr, + const struct eth_addr *hwdst_addr, const struct ip_addr *ipdst_addr, + const u16_t opcode) +{ + struct pbuf *p; + err_t result = ERR_OK; + u8_t k; /* ARP entry index */ + struct eth_hdr *ethhdr; + struct etharp_hdr *hdr; +#if LWIP_AUTOIP + const u8_t * ethdst_hwaddr; +#endif /* LWIP_AUTOIP */ + + /* allocate a pbuf for the outgoing ARP request packet */ + p = pbuf_alloc(PBUF_RAW, SIZEOF_ETHARP_PACKET, PBUF_RAM); + /* could allocate a pbuf for an ARP request? */ + if (p == NULL) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("etharp_raw: could not allocate pbuf for ARP request.\n")); + ETHARP_STATS_INC(etharp.memerr); + return ERR_MEM; + } + LWIP_ASSERT("check that first pbuf can hold struct etharp_hdr", + (p->len >= SIZEOF_ETHARP_PACKET)); + + ethhdr = p->payload; + hdr = (struct etharp_hdr *)((u8_t*)ethhdr + SIZEOF_ETH_HDR); + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_raw: sending raw ARP packet.\n")); + hdr->opcode = htons(opcode); + + LWIP_ASSERT("netif->hwaddr_len must be the same as ETHARP_HWADDR_LEN for etharp!", + (netif->hwaddr_len == ETHARP_HWADDR_LEN)); + k = ETHARP_HWADDR_LEN; +#if LWIP_AUTOIP + /* If we are using Link-Local, ARP packets must be broadcast on the + * link layer. (See RFC3927 Section 2.5) */ + ethdst_hwaddr = ((netif->autoip != NULL) && (netif->autoip->state != AUTOIP_STATE_OFF)) ? (u8_t*)(ethbroadcast.addr) : ethdst_addr->addr; +#endif /* LWIP_AUTOIP */ + /* Write MAC-Addresses (combined loop for both headers) */ + while(k > 0) { + k--; + /* Write the ARP MAC-Addresses */ + hdr->shwaddr.addr[k] = hwsrc_addr->addr[k]; + hdr->dhwaddr.addr[k] = hwdst_addr->addr[k]; + /* Write the Ethernet MAC-Addresses */ +#if LWIP_AUTOIP + ethhdr->dest.addr[k] = ethdst_hwaddr[k]; +#else /* LWIP_AUTOIP */ + ethhdr->dest.addr[k] = ethdst_addr->addr[k]; +#endif /* LWIP_AUTOIP */ + ethhdr->src.addr[k] = ethsrc_addr->addr[k]; + } + hdr->sipaddr = *(struct ip_addr2 *)ipsrc_addr; + hdr->dipaddr = *(struct ip_addr2 *)ipdst_addr; + + hdr->hwtype = htons(HWTYPE_ETHERNET); + hdr->proto = htons(ETHTYPE_IP); + /* set hwlen and protolen together */ + hdr->_hwlen_protolen = htons((ETHARP_HWADDR_LEN << 8) | sizeof(struct ip_addr)); + + ethhdr->type = htons(ETHTYPE_ARP); + /* send ARP query */ + result = netif->linkoutput(netif, p); + ETHARP_STATS_INC(etharp.xmit); + /* free ARP query packet */ + pbuf_free(p); + p = NULL; + /* could not allocate pbuf for ARP request */ + + return result; +} + +/** + * Send an ARP request packet asking for ipaddr. + * + * @param netif the lwip network interface on which to send the request + * @param ipaddr the IP address for which to ask + * @return ERR_OK if the request has been sent + * ERR_MEM if the ARP packet couldn't be allocated + * any other err_t on failure + */ +err_t +etharp_request(struct netif *netif, struct ip_addr *ipaddr) +{ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_request: sending ARP request.\n")); + return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, ðbroadcast, + (struct eth_addr *)netif->hwaddr, &netif->ip_addr, ðzero, + ipaddr, ARP_REQUEST); +} + +/** + * Process received ethernet frames. Using this function instead of directly + * calling ip_input and passing ARP frames through etharp in ethernetif_input, + * the ARP cache is protected from concurrent access. + * + * @param p the recevied packet, p->payload pointing to the ethernet header + * @param netif the network interface on which the packet was received + */ +err_t +ethernet_input(struct pbuf *p, struct netif *netif) +{ + struct eth_hdr* ethhdr; + u16_t type; + + /* points to packet payload, which starts with an Ethernet header */ + ethhdr = p->payload; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, + ("ethernet_input: dest:%02x:%02x:%02x:%02x:%02x:%02x, src:%02x:%02x:%02x:%02x:%02x:%02x, type:%2hx\n", + (unsigned)ethhdr->dest.addr[0], (unsigned)ethhdr->dest.addr[1], (unsigned)ethhdr->dest.addr[2], + (unsigned)ethhdr->dest.addr[3], (unsigned)ethhdr->dest.addr[4], (unsigned)ethhdr->dest.addr[5], + (unsigned)ethhdr->src.addr[0], (unsigned)ethhdr->src.addr[1], (unsigned)ethhdr->src.addr[2], + (unsigned)ethhdr->src.addr[3], (unsigned)ethhdr->src.addr[4], (unsigned)ethhdr->src.addr[5], + (unsigned)htons(ethhdr->type))); + + type = htons(ethhdr->type); +#if ETHARP_SUPPORT_VLAN + if (type == ETHTYPE_VLAN) { + struct eth_vlan_hdr *vlan = (struct eth_vlan_hdr*)(((char*)ethhdr) + SIZEOF_ETH_HDR); +#ifdef ETHARP_VLAN_CHECK /* if not, allow all VLANs */ + if (VLAN_ID(vlan) != ETHARP_VLAN_CHECK) { + /* silently ignore this packet: not for our VLAN */ + pbuf_free(p); + return ERR_OK; + } +#endif /* ETHARP_VLAN_CHECK */ + type = htons(vlan->tpid); + } +#endif /* ETHARP_SUPPORT_VLAN */ + + switch (type) { + /* IP packet? */ + case ETHTYPE_IP: +#if ETHARP_TRUST_IP_MAC + /* update ARP table */ + etharp_ip_input(netif, p); +#endif /* ETHARP_TRUST_IP_MAC */ + /* skip Ethernet header */ + if(pbuf_header(p, -(s16_t)SIZEOF_ETH_HDR)) { + LWIP_ASSERT("Can't move over header in packet", 0); + pbuf_free(p); + p = NULL; + } else { + /* pass to IP layer */ + ip_input(p, netif); + } + break; + + case ETHTYPE_ARP: + /* pass p to ARP module */ + etharp_arp_input(netif, (struct eth_addr*)(netif->hwaddr), p); + break; + +#if PPPOE_SUPPORT + case ETHTYPE_PPPOEDISC: /* PPP Over Ethernet Discovery Stage */ + pppoe_disc_input(netif, p); + break; + + case ETHTYPE_PPPOE: /* PPP Over Ethernet Session Stage */ + pppoe_data_input(netif, p); + break; +#endif /* PPPOE_SUPPORT */ + + default: + ETHARP_STATS_INC(etharp.proterr); + ETHARP_STATS_INC(etharp.drop); + pbuf_free(p); + p = NULL; + break; + } + + /* This means the pbuf is freed or consumed, + so the caller doesn't have to free it again */ + return ERR_OK; +} +#endif /* LWIP_ARP */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/netif/loopif.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/netif/loopif.c new file mode 100644 index 0000000..b7d6632 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/netif/loopif.c @@ -0,0 +1,68 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * Loop Interface + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#include "lwip/opt.h" + +#if LWIP_HAVE_LOOPIF + +#include "netif/loopif.h" +#include "lwip/snmp.h" + +/** + * Initialize a lwip network interface structure for a loopback interface + * + * @param netif the lwip network interface structure for this loopif + * @return ERR_OK if the loopif is initialized + * ERR_MEM if private data couldn't be allocated + */ +err_t +loopif_init(struct netif *netif) +{ + /* initialize the snmp variables and counters inside the struct netif + * ifSpeed: no assumption can be made! + */ + NETIF_INIT_SNMP(netif, snmp_ifType_softwareLoopback, 0); + + netif->name[0] = 'l'; + netif->name[1] = 'o'; + netif->output = netif_loop_output; + return ERR_OK; +} + +#endif /* LWIP_HAVE_LOOPIF */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/if/include/arch/cc.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/if/include/arch/cc.h new file mode 100644 index 0000000..fc9c07d --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/if/include/arch/cc.h @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2001-2003 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __ARCH_CC_H__ +#define __ARCH_CC_H__ + +/* Define platform endianness */ +#ifndef BYTE_ORDER +#define BYTE_ORDER BIG_ENDIAN +#endif /* BYTE_ORDER */ + +/* Define generic types used in lwIP */ +typedef unsigned char u8_t; +typedef signed char s8_t; +typedef unsigned short u16_t; +typedef signed short s16_t; +typedef unsigned long u32_t; +typedef signed long s32_t; + +typedef u32_t mem_ptr_t; + +/* Define (sn)printf formatters for these lwIP types */ +#define U16_F "u" +#define S16_F "d" +#define X16_F "x" +#define U32_F "u" +#define S32_F "d" +#define X32_F "x" + +/* Compiler hints for packing structures */ +#define PACK_STRUCT_FIELD(x) x +#define PACK_STRUCT_STRUCT __attribute__((packed)) +#define PACK_STRUCT_BEGIN +#define PACK_STRUCT_END + +/* Plaform specific diagnostic output */ +#ifdef CONFIG_OWL +# include +# define LWIP_PLATFORM_DIAG(x) owl_printf x +# define LWIP_PLATFORM_ASSERT(x) owl_assert(x) +#else +# include +# define LWIP_PLATFORM_DIAG(x) do { printk x; } while(0) +# define LWIP_PLATFORM_ASSERT(x) do { \ + printk("Assertion \"%s\" failed at line " \ + "%d in %s\n", \ + x, __LINE__, __FILE__); while(1); \ + } while(0) +#endif + +#endif /* __ARCH_CC_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/if/include/arch/perf.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/if/include/arch/perf.h new file mode 100644 index 0000000..4991787 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/if/include/arch/perf.h @@ -0,0 +1,7 @@ +#ifndef __PERF_H__ +#define __PERF_H__ + +#define PERF_START /* null definition */ +#define PERF_STOP(x) /* null definition */ + +#endif diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/if/include/lwipopts.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/if/include/lwipopts.h new file mode 100644 index 0000000..ae4df23 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/if/include/lwipopts.h @@ -0,0 +1,426 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * + * lwIP Options Configuration + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIPOPTS_H__ +#define __LWIPOPTS_H__ + +#include "wl_api.h" + +/* + ----------------------------------------------- + ---------- Platform specific locking ---------- + ----------------------------------------------- +*/ + +/** + * NO_SYS==1: Provides VERY minimal functionality. Otherwise, + * use lwIP facilities. + */ +#define NO_SYS 1 + + +/* + ------------------------------------ + ---------- Memory options ---------- + ------------------------------------ +*/ +/** + * MEM_ALIGNMENT: should be set to the alignment of the CPU + * 4 byte alignment -> #define MEM_ALIGNMENT 4 + * 2 byte alignment -> #define MEM_ALIGNMENT 2 + */ +#define MEM_ALIGNMENT 4 + +/** + * MEM_SIZE: the size of the heap memory. If the application will send + * a lot of data that needs to be copied, this should be set high. + */ +#define MEM_SIZE 16000 + + +/* + ------------------------------------------------ + ---------- Internal Memory Pool Sizes ---------- + ------------------------------------------------ +*/ +/** + * MEMP_NUM_PBUF: the number of memp struct pbufs (used for PBUF_ROM and PBUF_REF). + * If the application sends a lot of data out of ROM (or other static memory), + * this should be set high. + */ +#define MEMP_NUM_PBUF 30 + +/** + * MEMP_NUM_RAW_PCB: Number of raw connection PCBs + * (requires the LWIP_RAW option) + */ +#define MEMP_NUM_RAW_PCB 4 + +/** + * MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One + * per active UDP "connection". + * (requires the LWIP_UDP option) + */ +#define MEMP_NUM_UDP_PCB 4 + +/** + * MEMP_NUM_TCP_PCB: the number of simulatenously active TCP connections. + * (requires the LWIP_TCP option) + */ +#define MEMP_NUM_TCP_PCB 2 + +/** + * MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP connections. + * (requires the LWIP_TCP option) + */ +#define MEMP_NUM_TCP_PCB_LISTEN 2 + +/** + * MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP segments. + * (requires the LWIP_TCP option) + */ +#define MEMP_NUM_TCP_SEG 32 + +/** + * MEMP_NUM_ARP_QUEUE: the number of simulateously queued outgoing + * packets (pbufs) that are waiting for an ARP request (to resolve + * their destination address) to finish. + * (requires the ARP_QUEUEING option) + */ +#define MEMP_NUM_ARP_QUEUE 2 + +/** + * MEMP_NUM_SYS_TIMEOUT: the number of simulateously active timeouts. + * (requires NO_SYS==0) + */ +#define MEMP_NUM_SYS_TIMEOUT 0 + +/** + * MEMP_NUM_NETBUF: the number of struct netbufs. + * (only needed if you use the sequential API, like api_lib.c) + */ +#define MEMP_NUM_NETBUF 0 + +/** + * MEMP_NUM_NETCONN: the number of struct netconns. + * (only needed if you use the sequential API, like api_lib.c) + */ +#define MEMP_NUM_NETCONN 0 + +/** + * MEMP_NUM_TCPIP_MSG_API: the number of struct tcpip_msg, which are used + * for callback/timeout API communication. + * (only needed if you use tcpip.c) + */ +#define MEMP_NUM_TCPIP_MSG_API 0 + +/** + * MEMP_NUM_TCPIP_MSG_INPKT: the number of struct tcpip_msg, which are used + * for incoming packets. + * (only needed if you use tcpip.c) + */ +#define MEMP_NUM_TCPIP_MSG_INPKT 0 + +/** + * PBUF_POOL_SIZE: the number of buffers in the pbuf pool. + */ +#define PBUF_POOL_SIZE 32 + +/* + --------------------------------- + ---------- ARP options ---------- + --------------------------------- +*/ +/** + * LWIP_ARP==1: Enable ARP functionality. + */ +#define LWIP_ARP 1 + +/* + -------------------------------- + ---------- IP options ---------- + -------------------------------- +*/ +/** + * IP_FORWARD==1: Enables the ability to forward IP packets across network + * interfaces. If you are going to run lwIP on a device with only one network + * interface, define this to 0. + */ +#define IP_FORWARD 0 + +/** + * IP_OPTIONS: Defines the behavior for IP options. + * IP_OPTIONS==0_ALLOWED: All packets with IP options are dropped. + * IP_OPTIONS==1_ALLOWED: IP options are allowed (but not parsed). + */ +#define IP_OPTIONS_ALLOWED 1 + +/** + * IP_REASSEMBLY==1: Reassemble incoming fragmented IP packets. Note that + * this option does not affect outgoing packet sizes, which can be controlled + * via IP_FRAG. + */ +#define IP_REASSEMBLY 1 + +/** + * IP_FRAG==1: Fragment outgoing IP packets if their size exceeds MTU. Note + * that this option does not affect incoming packet sizes, which can be + * controlled via IP_REASSEMBLY. + */ +#define IP_FRAG 1 + +/** + * IP_REASS_MAXAGE: Maximum time (in multiples of IP_TMR_INTERVAL - so seconds, normally) + * a fragmented IP packet waits for all fragments to arrive. If not all fragments arrived + * in this time, the whole packet is discarded. + */ +#define IP_REASS_MAXAGE 3 + +/** + * IP_REASS_MAX_PBUFS: Total maximum amount of pbufs waiting to be reassembled. + * Since the received pbufs are enqueued, be sure to configure + * PBUF_POOL_SIZE > IP_REASS_MAX_PBUFS so that the stack is still able to receive + * packets even if the maximum amount of fragments is enqueued for reassembly! + */ +#define IP_REASS_MAX_PBUFS 10 + +/** + * IP_FRAG_USES_STATIC_BUF==1: Use a static MTU-sized buffer for IP + * fragmentation. Otherwise pbufs are allocated and reference the original + * packet data to be fragmented. + */ +#define IP_FRAG_USES_STATIC_BUF 0 + +/** + * IP_DEFAULT_TTL: Default value for Time-To-Live used by transport layers. + */ +#define IP_DEFAULT_TTL 255 + +/* + ---------------------------------- + ---------- ICMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_ICMP==1: Enable ICMP module inside the IP stack. + * Be careful, disable that make your product non-compliant to RFC1122 + */ +#define LWIP_ICMP 1 + +/** + * ICMP_TTL: Default value for Time-To-Live used by ICMP packets. + */ +#define ICMP_TTL (IP_DEFAULT_TTL) + +/* + --------------------------------- + ---------- RAW options ---------- + --------------------------------- +*/ +/** + * LWIP_RAW==1: Enable application layer to hook into the IP layer itself. + */ +#define LWIP_RAW 1 + +/* + ---------------------------------- + ---------- DHCP options ---------- + ---------------------------------- +*/ +/** + * LWIP_DHCP==1: Enable DHCP module. + */ +#define LWIP_DHCP 1 + +/* + ------------------------------------ + ---------- AUTOIP options ---------- + ------------------------------------ +*/ +/** + * LWIP_AUTOIP==1: Enable AUTOIP module. + */ +#define LWIP_AUTOIP 0 + +/* + ---------------------------------- + ---------- SNMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_SNMP==1: Turn on SNMP module. UDP must be available for SNMP + * transport. + */ +#define LWIP_SNMP 0 +#define SNMP_PRIVATE_MIB 0 + +/* + ---------------------------------- + ---------- IGMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_IGMP==1: Turn on IGMP module. + */ +#define LWIP_IGMP 1 + +/* + ---------------------------------- + ---------- DNS options ----------- + ---------------------------------- +*/ +/** + * LWIP_DNS==1: Turn on DNS module. UDP must be available for DNS + * transport. + */ +#define LWIP_DNS 1 + +/* + --------------------------------- + ---------- UDP options ---------- + --------------------------------- +*/ +/** + * LWIP_UDP==1: Turn on UDP. + */ +#define LWIP_UDP 1 + +/** + * LWIP_UDPLITE==1: Turn on UDP-Lite. (Requires LWIP_UDP) + */ +#define LWIP_UDPLITE 0 + +/** + * UDP_TTL: Default Time-To-Live value. + */ +#define UDP_TTL (IP_DEFAULT_TTL) + +/* + --------------------------------- + ---------- TCP options ---------- + --------------------------------- +*/ +/** + * LWIP_TCP==1: Turn on TCP. + */ +#define LWIP_TCP 1 + +/* + ---------------------------------- + ---------- Pbuf options ---------- + ---------------------------------- +*/ +/** + * PBUF_LINK_HLEN: the number of bytes that should be allocated for a + * link level header. The default is 14, the standard value for + * Ethernet. + */ +#define PBUF_LINK_HLEN (14 + ETH_PAD_SIZE) + +/* + ------------------------------------ + ---------- LOOPIF options ---------- + ------------------------------------ +*/ +/** + * LWIP_HAVE_LOOPIF==1: Support loop interface (127.0.0.1) and loopif.c + */ +#define LWIP_HAVE_LOOPIF 1 +#define LWIP_LOOPIF_MULTITHREADING 0 + +/* + ---------------------------------------------- + ---------- Sequential layer options ---------- + ---------------------------------------------- +*/ + +/** + * LWIP_NETCONN==1: Enable Netconn API (require to use api_lib.c) + */ +#define LWIP_NETCONN 0 + +/* + ------------------------------------ + ---------- Socket options ---------- + ------------------------------------ +*/ +/** + * LWIP_SOCKET==1: Enable Socket API (require to use sockets.c) + */ +#define LWIP_SOCKET 0 + +/* + ---------------------------------------- + ---------- Statistics options ---------- + ---------------------------------------- +*/ +/** + * LWIP_STATS==1: Enable statistics collection in lwip_stats. + */ +#define LWIP_STATS 1 +#define LINK_STATS 1 + +/* Misc */ +#define LWIP_NETIF_LINK_CALLBACK 1 +#define LWIP_NETIF_STATUS_CALLBACK 1 +#define LWIP_TIMEVAL_PRIVATE 0 + +#undef DHCP_DOES_ARP_CHECK + +#if 0 +#define LWIP_DEBUG 1 +//#define NETIF_DEBUG LWIP_DBG_ON +#define DHCP_DEBUG LWIP_DBG_ON +//#define ICMP_DEBUG LWIP_DBG_ON +//#define TCP_DEBUG LWIP_DBG_ON +//#define TCP_RTO_DEBUG LWIP_DBG_ON +//#define IP_DEBUG LWIP_DBG_ON +//#define TCP_CWND_DEBUG LWIP_DBG_ON +//#define ETHARP_DEBUG LWIP_DBG_ON +//#define PBUF_DEBUG LWIP_DBG_ON +#define TCP_INPUT_DEBUG LWIP_DBG_ON +#define TCP_OUTPUT_DEBUG LWIP_DBG_ON +#endif + +#define ETH_PAD_SIZE WL_HEADER_SIZE /* size of wifiengine header */ +#define MEM_LIBC_MALLOC 1 + +#define TCP_MSS 512 +#define TCP_SND_BUF 4096 +#endif /* __LWIPOPTS_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/if/include/netif/wlif.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/if/include/netif/wlif.h new file mode 100644 index 0000000..6354e1c --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/if/include/netif/wlif.h @@ -0,0 +1,10 @@ +#ifndef __NETIF_NRWLANIF_H__ +#define __NETIF_NRWLANIF_H__ + +#include "lwip/netif.h" +#include "lwip/err.h" + +err_t wlif_init(struct netif *netif); +void wlif_poll(struct netif *netif); + +#endif diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/if/netif/wlif.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/if/netif/wlif.c new file mode 100644 index 0000000..55d5b6a --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/if/netif/wlif.c @@ -0,0 +1,386 @@ +#include "lwip/opt.h" +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/pbuf.h" +#include "lwip/stats.h" +#include "lwip/sys.h" +#include "netif/etharp.h" +#include "netif/wlif.h" +#include +#include + +#define IFNAME0 'w' +#define IFNAME1 'l' + +/* the queue size will affect the tx performance when using power save. + * A small queue will quickly become filled up if we have to wake the device + * before the actual transmission can occur. When the queue is filled up, the + * packets will be discarded and retransmission will be handled by the upper + * layers. In case of TCP, the retransmission time might be quite long. + * + * If the packets can be put in the pqueue instead, all the packets + * (if possible) will be transmitted when the device wakes up, so we don't have + * to wait for retransmission from upper layers. + */ +#define PQUEUE_SIZE 8 + +struct wlif_t { + volatile uint8_t rx_pending; + + struct { + struct pbuf* buf[PQUEUE_SIZE]; + uint8_t first; + uint8_t last; + } pqueue; +}; + +#define PQUEUE_EMPTY(q) (q.last == q.first) +#define PQUEUE_FULL(q) ((q.last + 1) % PQUEUE_SIZE == q.first) +#define PQUEUE_FIRST(q) (q.buf[q.first]) +#define PQUEUE_DEQUEUE(q) \ + ({ \ + struct pbuf* __p = PQUEUE_FIRST(q); \ + q.first = (q.first + 1) % PQUEUE_SIZE; \ + __p; \ + }) +#define PQUEUE_ENQUEUE(q, p) \ + ({ \ + q.buf[q.last] = p; \ + q.last = (q.last + 1) % PQUEUE_SIZE; \ + }) + + +static err_t process_pqueue(struct netif* netif) +{ + struct pbuf *p; + struct pbuf *q; + int status; + struct wlif_t *priv = (struct wlif_t*) netif->state; + + /* queue empty? finished */ + if (PQUEUE_EMPTY(priv->pqueue)) + return ERR_OK; + + /* get first packet in queue */ + p = PQUEUE_FIRST(priv->pqueue); + + status = wl_process_tx( + p->payload + WL_HEADER_SIZE, /* ptr to eth hdr */ + p->len - WL_HEADER_SIZE, /* input buffer len */ + p->tot_len - WL_HEADER_SIZE, /* pkt len */ + p->payload, /* ptr to WE hdr */ + 0, /* prio */ + p); /* pkt handle */ + + /* if we fail due to power save mode, leave packet in queue and + * try again when target is awake again (upon WL_RX_EVENT_WAKEUP). + */ + if (status == WL_RESOURCES) + return ERR_IF; + + /* if we fail for another reason, just discard the packet */ + if (status != WL_SUCCESS) { + PQUEUE_DEQUEUE(priv->pqueue); + pbuf_free(p); + return ERR_IF; + } + + /* Send the data from the pbuf to the interface, one pbuf at a + * time. The size of the data in each pbuf is kept in the ->len + * variable. + */ + for (q = p; q != NULL; q = q->next) + wl_tx(q->payload, q->len); + + /* remove packet from queue and dec refcnt */ + PQUEUE_DEQUEUE(priv->pqueue); + pbuf_free(p); + + LINK_STATS_INC(link.xmit); + + /* tell caller to process next packet */ + return ERR_INPROGRESS; +} + + +/** + * Called in interrupt context when we can read more data from the mac. + * + */ +static void +rx_isr(void* ctx) +{ + struct netif *netif = ctx; + struct wlif_t *priv = (struct wlif_t*) netif->state; + priv->rx_pending = 1; +} + + +/** + * In this function, the hardware should be initialized. + * Called from wlif_init(). + * + * @param netif the already initialized lwip network interface structure + * for this ethernetif + */ +static err_t +low_level_init(struct netif *netif) +{ + /* device capabilities */ + netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | + NETIF_FLAG_IGMP; + + /* NETIF_FLAG_LINK_UP must be set only when we have an wlan assoc */ + + /* set MAC hardware address length */ + netif->hwaddr_len = ETHARP_HWADDR_LEN; + + if (wl_get_mac_addr(netif->hwaddr) != WL_SUCCESS) + return ERR_IF; + + /* maximum transfer unit */ + netif->mtu = 1500; + + return ERR_OK; +} + + +/** + * This function should do the actual transmission of the packet. The packet is + * contained in the pbuf that is passed to the function. This pbuf + * might be chained. + * + * @param netif the lwip network interface structure for this ethernetif + * @param p the MAC packet to send (e.g. IP packet including MAC addresses and + * type) + * @return ERR_OK if the packet could be sent + * an err_t value if the packet couldn't be sent + * + * @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to + * strange results. You might consider waiting for space in the DMA queue + * to become availale since the stack doesn't retry to send a packet + * dropped because of memory failure (except for the TCP timers). + */ +static err_t +low_level_output(struct netif *netif, struct pbuf *p) +{ + struct wlif_t* priv = (struct wlif_t*) netif->state; + + /* must have a linear buffer containing up to and including + * the ethernet header + */ + if (p->len < sizeof(struct eth_hdr)) + return ERR_IF; + + /* queue full? drop packet */ + if (PQUEUE_FULL(priv->pqueue)) + return ERR_INPROGRESS; /* no one seems to check this anyway */ + + /* queue packet */ + PQUEUE_ENQUEUE(priv->pqueue, p); + pbuf_ref(p); + while (process_pqueue(netif) == ERR_INPROGRESS); + return ERR_OK; /* no one seems to check this anyway */ +} + +/** + * Should allocate a pbuf and transfer the bytes of the incoming + * packet from the interface into the pbuf. + * + * @param netif the lwip network interface structure for this ethernetif + * @return a pbuf filled with the received packet (including MAC header) + * NULL on memory error + */ +static struct pbuf * +low_level_input(struct netif *netif) +{ + struct pbuf *p; + struct wlif_t *priv = (struct wlif_t*) netif->state; + + char *stripped_pkt; + size_t stripped_pkt_len; + u16_t vlan; + u8_t rx_hdr_size; + int status; + u16_t len; + + /* maximum packet length from wl_rx() */ + len = WL_MAX_PKT_LEN; + + /* We allocate a continous pbuf */ + p = pbuf_alloc(PBUF_RAW, len, PBUF_RAM); + if (p == NULL) { + LWIP_DEBUGF(NETIF_DEBUG, ("low_level_input: fail to alloc " + "pbuf of len:%"S32_F"\n", len)); + return NULL; + } + + /* Read the entire msg */ + priv->rx_pending = 0; + wl_rx(p->payload, &len); + if (len == 0) { + LWIP_DEBUGF(NETIF_DEBUG, ("low_level_input: len was 0")); + return NULL; + } + + status = wl_process_rx( + p->payload, /* input buf */ + len, /* input buf length */ + &stripped_pkt, + &stripped_pkt_len, + &vlan); + + if (status == WL_ABSORBED) { + LWIP_DEBUGF(NETIF_DEBUG, ("low_level_input: absorbed")); + pbuf_free(p); + return NULL; + } + + /* Data packet, remove padding */ + rx_hdr_size = stripped_pkt - (char*) p->payload; + pbuf_realloc(p, stripped_pkt_len + rx_hdr_size); + + LINK_STATS_INC(link.recv); + return p; +} + + +/** + * This function will be called by wlif_poll() when a packet has been received + * from the mac. Then the type of the received packet is determined and + * the appropriate input function is called. + * + * @param netif the lwip network interface structure for this ethernetif + */ +static void +wlif_input(struct netif *netif) +{ + struct eth_hdr *ethhdr; + struct pbuf *p; + + /* move received packet into a new pbuf */ + p = low_level_input(netif); + + /* no packet could be read, silently ignore this */ + if (p == NULL) + return; + + /* points to packet payload, which starts with an Ethernet header */ + ethhdr = p->payload; + switch (htons(ethhdr->type)) { + /* IP or ARP packet? */ + case ETHTYPE_IP: + case ETHTYPE_ARP: +#if PPPOE_SUPPORT + /* PPPoE packet? */ + case ETHTYPE_PPPOEDISC: + case ETHTYPE_PPPOE: +#endif /* PPPOE_SUPPORT */ + /* full packet send to tcpip_thread to process */ + if (netif->input(p, netif) != ERR_OK) { + LWIP_DEBUGF(NETIF_DEBUG, + ("wlif_input: IP input error\n")); + pbuf_free(p); + p = NULL; + } + break; + + default: + pbuf_free(p); + p = NULL; + break; + } +} + +static ssize_t pkt_read_cb(char *dst, + void *src_handle, + size_t read_len, + int offset) { + ssize_t rc; + + rc = pbuf_copy_partial((struct pbuf *)src_handle, + dst, + read_len, + offset + WL_HEADER_SIZE); + if ( 0 == rc ) { + return -1; + } + + return rc; +} + +/** + * Should be called at the beginning of the program to set up the + * network interface. It calls the function low_level_init() to do the + * actual setup of the hardware. + * + * This function should be passed as a parameter to netif_add(). + * + * @param netif the lwip network interface structure for this ethernetif + * @return ERR_OK if the loopif is initialized + * ERR_MEM if private data couldn't be allocated + * any other err_t on error + */ +err_t +wlif_init(struct netif *netif) +{ + static struct wlif_t wlif; + + LWIP_ASSERT("netif != NULL", (netif != NULL)); + +#if LWIP_NETIF_HOSTNAME + /* Initialize interface hostname */ + if ( NULL == netif->hostname ) { + netif->hostname = "wlif"; + } +#endif /* LWIP_NETIF_HOSTNAME */ + + netif->state = &wlif; + netif->name[0] = IFNAME0; + netif->name[1] = IFNAME1; + + /* We directly use etharp_output() here to save a function call. + * You can instead declare your own function an call etharp_output() + * from it if you have to do some checks before sending (e.g. if link + * is available...) */ + netif->output = etharp_output; + netif->linkoutput = low_level_output; + + wl_register_rx_isr(rx_isr, netif); + wl_register_pkt_read_cb(pkt_read_cb); + + /* initialize the hardware */ + return low_level_init(netif); +} + + +/** + * + */ +void +wlif_poll(struct netif* netif) +{ + struct wlif_t* priv = NULL; + + /* wl api forward progress */ + wl_poll(); + + if (netif) + priv = (struct wlif_t*) netif->state; + + /* wlif_init() not called yet? */ + if (priv == NULL) + return; + + /* no packets pending? */ + if (!priv->rx_pending) + return; + + /* read the pending packet */ + wlif_input(netif); + + /* send any packets that was queued due to filled up target queue + * or power save mode. + */ + process_pqueue(netif); +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/readme.txt b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/readme.txt new file mode 100644 index 0000000..c95f30e --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-port-1.3.2/HD/readme.txt @@ -0,0 +1 @@ +This directory is specific to the WIFI H&D SPB104 components (\COMPONENTS\WIFI\HD_SPB104). diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.c new file mode 100644 index 0000000..09790c2 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.c @@ -0,0 +1,571 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Abstraction layer for memory interfaces. + * + * This module contains the interfaces: + * - MEM <-> USB; + * - MEM <-> RAM; + * - MEM <-> MEM. + * + * This module may be configured and expanded to support the following features: + * - write-protected globals; + * - password-protected data; + * - specific features; + * - etc. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +//_____ I N C L U D E S ____________________________________________________ + +#include "compiler.h" +#include "preprocessor.h" +#ifdef FREERTOS_USED +#include "FreeRTOS.h" +#include "semphr.h" +#endif +#include "ctrl_access.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +#ifdef FREERTOS_USED + +/*! \name LUN Access Protection Macros + */ +//! @{ + +/*! \brief Locks accesses to LUNs. + * + * \return \c TRUE if the access was successfully locked, else \c FALSE. + */ +#define Ctrl_access_lock() ctrl_access_lock() + +/*! \brief Unlocks accesses to LUNs. + */ +#define Ctrl_access_unlock() xSemaphoreGive(ctrl_access_semphr) + +//! @} + +//! Handle to the semaphore protecting accesses to LUNs. +static xSemaphoreHandle ctrl_access_semphr = NULL; + +#else + +/*! \name LUN Access Protection Macros + */ +//! @{ + +/*! \brief Locks accesses to LUNs. + * + * \return \c TRUE if the access was successfully locked, else \c FALSE. + */ +#define Ctrl_access_lock() TRUE + +/*! \brief Unlocks accesses to LUNs. + */ +#define Ctrl_access_unlock() + +//! @} + +#endif // FREERTOS_USED + + +#if MAX_LUN + +/*! \brief Initializes an entry of the LUN descriptor table. + * + * \param lun Logical Unit Number. + * + * \return LUN descriptor table entry initializer. + */ +#if ACCESS_USB == ENABLED && ACCESS_MEM_TO_RAM == ENABLED +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(Lun_, lun, _usb_read_10),\ + TPASTE3(Lun_, lun, _usb_write_10),\ + TPASTE3(Lun_, lun, _mem_2_ram),\ + TPASTE3(Lun_, lun, _ram_2_mem),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#elif ACCESS_USB == ENABLED +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(Lun_, lun, _usb_read_10),\ + TPASTE3(Lun_, lun, _usb_write_10),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#elif ACCESS_MEM_TO_RAM == ENABLED +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(Lun_, lun, _mem_2_ram),\ + TPASTE3(Lun_, lun, _ram_2_mem),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#else +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#endif + +//! LUN descriptor table. +static const struct +{ + Ctrl_status (*test_unit_ready)(void); + Ctrl_status (*read_capacity)(U32 *); + Bool (*wr_protect)(void); + Bool (*removal)(void); +#if ACCESS_USB == ENABLED + Ctrl_status (*usb_read_10)(U32, U16); + Ctrl_status (*usb_write_10)(U32, U16); +#endif +#if ACCESS_MEM_TO_RAM == ENABLED + Ctrl_status (*mem_2_ram)(U32, void *); + Ctrl_status (*ram_2_mem)(U32, const void *); +#endif + const char *name; +} lun_desc[MAX_LUN] = +{ +#if LUN_0 == ENABLE + Lun_desc_entry(0), +#endif +#if LUN_1 == ENABLE + Lun_desc_entry(1), +#endif +#if LUN_2 == ENABLE + Lun_desc_entry(2), +#endif +#if LUN_3 == ENABLE + Lun_desc_entry(3), +#endif +#if LUN_4 == ENABLE + Lun_desc_entry(4), +#endif +#if LUN_5 == ENABLE + Lun_desc_entry(5), +#endif +#if LUN_6 == ENABLE + Lun_desc_entry(6), +#endif +#if LUN_7 == ENABLE + Lun_desc_entry(7) +#endif +}; + +#endif + + +#if GLOBAL_WR_PROTECT == ENABLED +Bool g_wr_protect; +#endif + + +/*! \name Control Interface + */ +//! @{ + + +#ifdef FREERTOS_USED + +Bool ctrl_access_init(void) +{ + // If the handle to the protecting semaphore is not valid, + if (!ctrl_access_semphr) + { + // try to create the semaphore. + vSemaphoreCreateBinary(ctrl_access_semphr); + + // If the semaphore could not be created, there is no backup solution. + if (!ctrl_access_semphr) return FALSE; + } + + return TRUE; +} + + +/*! \brief Locks accesses to LUNs. + * + * \return \c TRUE if the access was successfully locked, else \c FALSE. + */ +static Bool ctrl_access_lock(void) +{ + // If the semaphore could not be created, there is no backup solution. + if (!ctrl_access_semphr) return FALSE; + + // Wait for the semaphore. + while (!xSemaphoreTake(ctrl_access_semphr, portMAX_DELAY)); + + return TRUE; +} + +#endif // FREERTOS_USED + + +U8 get_nb_lun(void) +{ +#if MEM_USB == ENABLE + U8 nb_lun; + + if (!Ctrl_access_lock()) return MAX_LUN; + + nb_lun = MAX_LUN + host_get_lun(); + + Ctrl_access_unlock(); + + return nb_lun; +#else + return MAX_LUN; +#endif +} + + +U8 get_cur_lun(void) +{ + return LUN_ID_0; +} + + +Ctrl_status mem_test_unit_ready(U8 lun) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].test_unit_ready() : +#endif +#if LUN_USB == ENABLE + Lun_usb_test_unit_ready(lun - LUN_ID_USB); +#else + CTRL_FAIL; +#endif + + Ctrl_access_unlock(); + + return status; +} + + +Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].read_capacity(u32_nb_sector) : +#endif +#if LUN_USB == ENABLE + Lun_usb_read_capacity(lun - LUN_ID_USB, u32_nb_sector); +#else + CTRL_FAIL; +#endif + + Ctrl_access_unlock(); + + return status; +} + + +U8 mem_sector_size(U8 lun) +{ + U8 sector_size; + + if (!Ctrl_access_lock()) return 0; + + sector_size = +#if MAX_LUN + (lun < MAX_LUN) ? 1 : +#endif +#if LUN_USB == ENABLE + Lun_usb_read_sector_size(lun - LUN_ID_USB); +#else + 0; +#endif + + Ctrl_access_unlock(); + + return sector_size; +} + + +Bool mem_wr_protect(U8 lun) +{ + Bool wr_protect; + + if (!Ctrl_access_lock()) return TRUE; + + wr_protect = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].wr_protect() : +#endif +#if LUN_USB == ENABLE + Lun_usb_wr_protect(lun - LUN_ID_USB); +#else + TRUE; +#endif + + Ctrl_access_unlock(); + + return wr_protect; +} + + +Bool mem_removal(U8 lun) +{ + Bool removal; + + if (!Ctrl_access_lock()) return TRUE; + + removal = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].removal() : +#endif +#if LUN_USB == ENABLE + Lun_usb_removal(); +#else + TRUE; +#endif + + Ctrl_access_unlock(); + + return removal; +} + + +const char *mem_name(U8 lun) +{ + return +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].name : +#endif +#if LUN_USB == ENABLE + LUN_USB_NAME; +#else + NULL; +#endif +} + + +//! @} + + +#if ACCESS_USB == ENABLED + +/*! \name MEM <-> USB Interface + */ +//! @{ + + +Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_read_action(nb_sector); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].usb_read_10(addr, nb_sector) : +#endif + CTRL_FAIL; + memory_stop_read_action(); + + Ctrl_access_unlock(); + + return status; +} + + +Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_write_action(nb_sector); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].usb_write_10(addr, nb_sector) : +#endif + CTRL_FAIL; + memory_stop_write_action(); + + Ctrl_access_unlock(); + + return status; +} + + +//! @} + +#endif // ACCESS_USB == ENABLED + + +#if ACCESS_MEM_TO_RAM == ENABLED + +/*! \name MEM <-> RAM Interface + */ +//! @{ + + +Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_read_action(1); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].mem_2_ram(addr, ram) : +#endif +#if LUN_USB == ENABLE + Lun_usb_mem_2_ram(addr, ram); +#else + CTRL_FAIL; +#endif + memory_stop_read_action(); + + Ctrl_access_unlock(); + + return status; +} + + +Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_write_action(1); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].ram_2_mem(addr, ram) : +#endif +#if LUN_USB == ENABLE + Lun_usb_ram_2_mem(addr, ram); +#else + CTRL_FAIL; +#endif + memory_stop_write_action(); + + Ctrl_access_unlock(); + + return status; +} + + +//! @} + +#endif // ACCESS_MEM_TO_RAM == ENABLED + + +#if ACCESS_STREAM == ENABLED + +/*! \name Streaming MEM <-> MEM Interface + */ +//! @{ + + + #if ACCESS_MEM_TO_MEM == ENABLED + +#include "fat.h" + +Ctrl_status stream_mem_to_mem(U8 src_lun, U32 src_addr, U8 dest_lun, U32 dest_addr, U16 nb_sector) +{ +#if (defined __GNUC__) && (defined __AVR32__) + __attribute__((__aligned__(4))) +#elif (defined __ICCAVR32__) + #pragma data_alignment = 4 +#endif + static U8 sector_buf[FS_512B]; + Ctrl_status status = CTRL_GOOD; + + while (nb_sector--) + { + if ((status = memory_2_ram(src_lun, src_addr++, sector_buf)) != CTRL_GOOD) break; + if ((status = ram_2_memory(dest_lun, dest_addr++, sector_buf)) != CTRL_GOOD) break; + } + + return status; +} + + #endif // ACCESS_MEM_TO_MEM == ENABLED + + +Ctrl_status stream_state(U8 id) +{ + return CTRL_GOOD; +} + + +U16 stream_stop(U8 id) +{ + return 0; +} + + +//! @} + +#endif // ACCESS_STREAM == ENABLED diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.h new file mode 100644 index 0000000..358bf65 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.h @@ -0,0 +1,369 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Abstraction layer for memory interfaces. + * + * This module contains the interfaces: + * - MEM <-> USB; + * - MEM <-> RAM; + * - MEM <-> MEM. + * + * This module may be configured and expanded to support the following features: + * - write-protected globals; + * - password-protected data; + * - specific features; + * - etc. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CTRL_ACCESS_H_ +#define _CTRL_ACCESS_H_ + +#include "compiler.h" +#include "conf_access.h" + + +//! Status returned by CTRL_ACCESS interfaces. +typedef enum +{ + CTRL_GOOD = PASS, //!< Success, memory ready. + CTRL_FAIL = FAIL, //!< An error occurred. + CTRL_NO_PRESENT = FAIL + 1, //!< Memory unplugged. + CTRL_BUSY = FAIL + 2 //!< Memory not initialized or changed. +} Ctrl_status; + + +// FYI: Each Logical Unit Number (LUN) corresponds to a memory. + +// Check LUN defines. +#ifndef LUN_0 + #error LUN_0 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_1 + #error LUN_1 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_2 + #error LUN_2 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_3 + #error LUN_3 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_4 + #error LUN_4 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_5 + #error LUN_5 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_6 + #error LUN_6 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_7 + #error LUN_7 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_USB + #error LUN_USB must be defined as ENABLE or DISABLE in conf_access.h +#endif + +/*! \name LUN IDs + */ +//! @{ +#define LUN_ID_0 (0) //!< First static LUN. +#define LUN_ID_1 (LUN_ID_0 + LUN_0) +#define LUN_ID_2 (LUN_ID_1 + LUN_1) +#define LUN_ID_3 (LUN_ID_2 + LUN_2) +#define LUN_ID_4 (LUN_ID_3 + LUN_3) +#define LUN_ID_5 (LUN_ID_4 + LUN_4) +#define LUN_ID_6 (LUN_ID_5 + LUN_5) +#define LUN_ID_7 (LUN_ID_6 + LUN_6) +#define MAX_LUN (LUN_ID_7 + LUN_7) //!< Number of static LUNs. +#define LUN_ID_USB (MAX_LUN) //!< First dynamic LUN (USB host mass storage). +//! @} + + +// Include LUN header files. +#if LUN_0 == ENABLE + #include LUN_0_INCLUDE +#endif +#if LUN_1 == ENABLE + #include LUN_1_INCLUDE +#endif +#if LUN_2 == ENABLE + #include LUN_2_INCLUDE +#endif +#if LUN_3 == ENABLE + #include LUN_3_INCLUDE +#endif +#if LUN_4 == ENABLE + #include LUN_4_INCLUDE +#endif +#if LUN_5 == ENABLE + #include LUN_5_INCLUDE +#endif +#if LUN_6 == ENABLE + #include LUN_6_INCLUDE +#endif +#if LUN_7 == ENABLE + #include LUN_7_INCLUDE +#endif +#if LUN_USB == ENABLE + #include LUN_USB_INCLUDE +#endif + + +// Check the configuration of write protection in conf_access.h. +#ifndef GLOBAL_WR_PROTECT + #error GLOBAL_WR_PROTECT must be defined as ENABLED or DISABLED in conf_access.h +#endif + + +#if GLOBAL_WR_PROTECT == ENABLED + +//! Write protect. +extern Bool g_wr_protect; + +#endif + + +/*! \name Control Interface + */ +//! @{ + +#ifdef FREERTOS_USED + +/*! \brief Initializes the LUN access locker. + * + * \return \c TRUE if the locker was successfully initialized, else \c FALSE. + */ +extern Bool ctrl_access_init(void); + +#endif // FREERTOS_USED + +/*! \brief Returns the number of LUNs. + * + * \return Number of LUNs in the system. + */ +extern U8 get_nb_lun(void); + +/*! \brief Returns the current LUN. + * + * \return Current LUN. + * + * \todo Implement. + */ +extern U8 get_cur_lun(void); + +/*! \brief Tests the memory state and initializes the memory if required. + * + * The TEST UNIT READY SCSI primary command allows an application client to poll + * a LUN until it is ready without having to allocate memory for returned data. + * + * This command may be used to check the media status of LUNs with removable + * media. + * + * \param lun Logical Unit Number. + * + * \return Status. + */ +extern Ctrl_status mem_test_unit_ready(U8 lun); + +/*! \brief Returns the address of the last valid sector (512 bytes) in the + * memory. + * + * \param lun Logical Unit Number. + * \param u32_nb_sector Pointer to the address of the last valid sector. + * + * \return Status. + */ +extern Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector); + +/*! \brief Returns the size of the physical sector. + * + * \param lun Logical Unit Number. + * + * \return Sector size (unit: 512 bytes). + */ +extern U8 mem_sector_size(U8 lun); + +/*! \brief Returns the write-protection state of the memory. + * + * \param lun Logical Unit Number. + * + * \return \c TRUE if the memory is write-protected, else \c FALSE. + * + * \note Only used by removable memories with hardware-specific write + * protection. + */ +extern Bool mem_wr_protect(U8 lun); + +/*! \brief Tells whether the memory is removable. + * + * \param lun Logical Unit Number. + * + * \return \c TRUE if the memory is removable, else \c FALSE. + */ +extern Bool mem_removal(U8 lun); + +/*! \brief Returns a pointer to the LUN name. + * + * \param lun Logical Unit Number. + * + * \return Pointer to the LUN name string. + */ +extern const char *mem_name(U8 lun); + +//! @} + + +#if ACCESS_USB == ENABLED + +/*! \name MEM <-> USB Interface + */ +//! @{ + +/*! \brief Tranfers data from the memory to USB. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to read. + * \param nb_sector Number of sectors to transfer. + * + * \return Status. + */ +extern Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector); + +/*! \brief Tranfers data from USB to the memory. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to write. + * \param nb_sector Number of sectors to transfer. + * + * \return Status. + */ +extern Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector); + +//! @} + +#endif // ACCESS_USB == ENABLED + + +#if ACCESS_MEM_TO_RAM == ENABLED + +/*! \name MEM <-> RAM Interface + */ +//! @{ + +/*! \brief Copies 1 data sector from the memory to RAM. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to read. + * \param ram Pointer to RAM buffer to write. + * + * \return Status. + */ +extern Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram); + +/*! \brief Copies 1 data sector from RAM to the memory. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to write. + * \param ram Pointer to RAM buffer to read. + * + * \return Status. + */ +extern Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram); + +//! @} + +#endif // ACCESS_MEM_TO_RAM == ENABLED + + +#if ACCESS_STREAM == ENABLED + +/*! \name Streaming MEM <-> MEM Interface + */ +//! @{ + +//! Erroneous streaming data transfer ID. +#define ID_STREAM_ERR 0xFF + + #if ACCESS_MEM_TO_MEM == ENABLED + +/*! \brief Copies data from one memory to another. + * + * \param src_lun Source Logical Unit Number. + * \param src_addr Source address of first memory sector to read. + * \param dest_lun Destination Logical Unit Number. + * \param dest_addr Destination address of first memory sector to write. + * \param nb_sector Number of sectors to copy. + * + * \return Status. + */ +extern Ctrl_status stream_mem_to_mem(U8 src_lun, U32 src_addr, U8 dest_lun, U32 dest_addr, U16 nb_sector); + + #endif // ACCESS_MEM_TO_MEM == ENABLED + +/*! \brief Returns the state of a streaming data transfer. + * + * \param id Transfer ID. + * + * \return Status. + * + * \todo Implement. + */ +extern Ctrl_status stream_state(U8 id); + +/*! \brief Stops a streaming data transfer. + * + * \param id Transfer ID. + * + * \return Number of remaining sectors. + * + * \todo Implement. + */ +extern U16 stream_stop(U8 id); + +//! @} + +#endif // ACCESS_STREAM == ENABLED + + +#endif // _CTRL_ACCESS_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.c new file mode 100644 index 0000000..c7c0a03 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.c @@ -0,0 +1,119 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Macros and functions dedicated to debug purposes. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USART module can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "compiler.h" +#include "debug.h" + + +#if (defined __GNUC__) +# include "malloc.h" + +U32 get_heap_curr_used_size( void ) +{ + struct mallinfo my_info=mallinfo(); + return my_info.uordblks; +} + +U32 get_heap_total_used_size( void ) +{ + struct mallinfo my_info=mallinfo(); + return my_info.arena; +} +#endif + +U32 get_heap_free_size( void ) +{ + U32 high_mark= AVR32_SRAM_SIZE; + U32 low_mark = 0; + U32 size ; + void* p_mem; + + size = (high_mark + low_mark)/2; + + do + { + p_mem = malloc(size); + if( p_mem != NULL) + { // Can allocate memory + free(p_mem); + low_mark = size; + } + else + { // Can not allocate memory + high_mark = size; + } + + size = (high_mark + low_mark)/2; + } + while( (high_mark-low_mark) >1 ); + + return size; +} + +static void* round_trace_pbuf; +static U32 round_trace_size; + +void uc3_round_trace_init(void* buf, U32 size) +{ + round_trace_pbuf = buf; + (*(U32*)round_trace_pbuf)=(U32)buf+4; + round_trace_size = size; +} + +void uc3_round_trace(U32 val) +{ + //Disable_global_interrupt(); + + U32* p_wr = (U32*)(*(U32*)round_trace_pbuf); + *p_wr = val; + p_wr++; + if( ((U32)p_wr % round_trace_size) ==0 ) + p_wr= (U32*)round_trace_pbuf+1; + *p_wr = 0xdeadbeef; + *(U32*)round_trace_pbuf = (U32)p_wr; + + //Enable_global_interrupt(); +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.h new file mode 100644 index 0000000..a832d7c --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.h @@ -0,0 +1,116 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Macros and functions dedicated to debug purposes. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USART module can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _DEBUG_H_ +#define _DEBUG_H_ + +#include "stringz.h" + +/*! \brief These macros are used to add traces memory. + * + * First, initialise the trace with Uc3_trace_init(pointer), giving the start address + * of the memory location where will be stored the trace. + * Use Uc3_trace(something) to store "something" into the memory. The end of the trace + * is signaled by the "0xdeadbeef" pattern. + */ +#define Uc3_trace_init(debug_addr) \ + *(U32*)(debug_addr)=debug_addr+4 + +#define Uc3_trace(debug_addr, x) \ + *(U32*)(*(U32*)(debug_addr) ) = (U32)(x) ;\ + *(U32*)(*(U32*)(debug_addr)+4) = 0xdeadbeef ;\ + *(U32*)(debug_addr ) = *(U32*)(debug_addr)+4 + +/*! \brief This macro is used to insert labels into assembly output. + * + */ +#define Insert_label(name) \ + __asm__ __volatile__ (STRINGZ(name)":"); + +#if (defined __GNUC__) +/*! \brief Returns the number of total of used bytes allocated from the HEAP. + * + * \retval total number of used bytes. + */ +U32 get_heap_total_used_size( void ); + +/*! \brief Returns the number of bytes currently used from the HEAP. + * + * \retval total number of used bytes. + */ +U32 get_heap_curr_used_size( void ); +#endif + +/*! \brief Returns the number of free bytes in the HEAP. + * + * This funtion tries to allocate the maximum number of bytes by dichotomical method. + * + * \retval number of free bytes. + */ +extern U32 get_heap_free_size( void ); + +/*! \name Traces function using a round buffer + */ +//! @{ + +/*! \brief Initialize the trace using a round buffer. + * + * \param buf Base address of the buffer used for the trace. + * \param size Size of the round buffer. Must be a power of 2. + */ +void uc3_round_trace_init(void* buf, U32 size); + +/*! \brief Trace a data in the round buffer. + * + * The end of the trace is signaled by the "0xdeadbeef" pattern. + * \param val Data to trace; + */ +void uc3_round_trace(U32 val); + +//! @} + + +#endif // _DEBUG_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.c b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.c new file mode 100644 index 0000000..99e9274 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.c @@ -0,0 +1,215 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Strings and integers print module for debug purposes. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USART module can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "compiler.h" +#include "gpio.h" +#include "usart.h" +#include "print_funcs.h" + + +//! ASCII representation of hexadecimal digits. +static const char HEX_DIGITS[16] = "0123456789ABCDEF"; + + +void init_dbg_rs232(long pba_hz) +{ + init_dbg_rs232_ex(DBG_USART_BAUDRATE, pba_hz); +} + + +void init_dbg_rs232_ex(unsigned long baudrate, long pba_hz) +{ + static const gpio_map_t DBG_USART_GPIO_MAP = + { + {DBG_USART_RX_PIN, DBG_USART_RX_FUNCTION}, + {DBG_USART_TX_PIN, DBG_USART_TX_FUNCTION} + }; + + // Options for debug USART. + usart_options_t dbg_usart_options = + { + .baudrate = baudrate, + .charlength = 8, + .paritytype = USART_NO_PARITY, + .stopbits = USART_1_STOPBIT, + .channelmode = USART_NORMAL_CHMODE + }; + + // Setup GPIO for debug USART. + gpio_enable_module(DBG_USART_GPIO_MAP, + sizeof(DBG_USART_GPIO_MAP) / sizeof(DBG_USART_GPIO_MAP[0])); + + // Initialize it in RS232 mode. + usart_init_rs232(DBG_USART, &dbg_usart_options, pba_hz); +} + + +void print_dbg(const char *str) +{ + // Redirection to the debug USART. + print(DBG_USART, str); +} + + +void print_dbg_char(int c) +{ + // Redirection to the debug USART. + print_char(DBG_USART, c); +} + + +void print_dbg_ulong(unsigned long n) +{ + // Redirection to the debug USART. + print_ulong(DBG_USART, n); +} + + +void print_dbg_char_hex(unsigned char n) +{ + // Redirection to the debug USART. + print_char_hex(DBG_USART, n); +} + + +void print_dbg_short_hex(unsigned short n) +{ + // Redirection to the debug USART. + print_short_hex(DBG_USART, n); +} + + +void print_dbg_hex(unsigned long n) +{ + // Redirection to the debug USART. + print_hex(DBG_USART, n); +} + + +void print(volatile avr32_usart_t *usart, const char *str) +{ + // Invoke the USART driver to transmit the input string with the given USART. + usart_write_line(usart, str); +} + + +void print_char(volatile avr32_usart_t *usart, int c) +{ + // Invoke the USART driver to transmit the input character with the given USART. + usart_putchar(usart, c); +} + + +void print_ulong(volatile avr32_usart_t *usart, unsigned long n) +{ + char tmp[11]; + int i = sizeof(tmp) - 1; + + // Convert the given number to an ASCII decimal representation. + tmp[i] = '\0'; + do + { + tmp[--i] = '0' + n % 10; + n /= 10; + } while (n); + + // Transmit the resulting string with the given USART. + print(usart, tmp + i); +} + + +void print_char_hex(volatile avr32_usart_t *usart, unsigned char n) +{ + char tmp[3]; + int i; + + // Convert the given number to an ASCII hexadecimal representation. + tmp[2] = '\0'; + for (i = 1; i >= 0; i--) + { + tmp[i] = HEX_DIGITS[n & 0xF]; + n >>= 4; + } + + // Transmit the resulting string with the given USART. + print(usart, tmp); +} + + +void print_short_hex(volatile avr32_usart_t *usart, unsigned short n) +{ + char tmp[5]; + int i; + + // Convert the given number to an ASCII hexadecimal representation. + tmp[4] = '\0'; + for (i = 3; i >= 0; i--) + { + tmp[i] = HEX_DIGITS[n & 0xF]; + n >>= 4; + } + + // Transmit the resulting string with the given USART. + print(usart, tmp); +} + + +void print_hex(volatile avr32_usart_t *usart, unsigned long n) +{ + char tmp[9]; + int i; + + // Convert the given number to an ASCII hexadecimal representation. + tmp[8] = '\0'; + for (i = 7; i >= 0; i--) + { + tmp[i] = HEX_DIGITS[n & 0xF]; + n >>= 4; + } + + // Transmit the resulting string with the given USART. + print(usart, tmp); +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.h new file mode 100644 index 0000000..38f931d --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.h @@ -0,0 +1,294 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Strings and integers print module for debug purposes. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USART module can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _PRINT_FUNCS_H_ +#define _PRINT_FUNCS_H_ + +#include +#include "board.h" + + +/*! \name USART Settings for the Debug Module + */ +//! @{ +#if BOARD == EVK1100 +# define DBG_USART (&AVR32_USART1) +# define DBG_USART_RX_PIN AVR32_USART1_RXD_0_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART1_TXD_0_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION +# define DBG_USART_BAUDRATE 57600 +#elif BOARD == EVK1101 +# define DBG_USART (&AVR32_USART1) +# define DBG_USART_RX_PIN AVR32_USART1_RXD_0_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART1_TXD_0_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION +# define DBG_USART_BAUDRATE 57600 +#elif BOARD == UC3C_EK +# define DBG_USART (&AVR32_USART2) +# define DBG_USART_RX_PIN AVR32_USART2_RXD_0_1_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART2_RXD_0_1_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART2_TXD_0_1_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART2_TXD_0_1_FUNCTION +# define DBG_USART_BAUDRATE 57600 +#elif BOARD == EVK1104 +# define DBG_USART (&AVR32_USART1) +# define DBG_USART_RX_PIN AVR32_USART1_RXD_0_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART1_TXD_0_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION +# define DBG_USART_BAUDRATE 57600 +#elif BOARD == EVK1105 +# define DBG_USART (&AVR32_USART0) +# define DBG_USART_RX_PIN AVR32_USART0_RXD_0_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART0_RXD_0_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART0_TXD_0_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART0_TXD_0_0_FUNCTION +# define DBG_USART_BAUDRATE 57600 +#elif BOARD == STK1000 +# define DBG_USART (&AVR32_USART1) +# define DBG_USART_RX_PIN AVR32_USART1_RXD_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART1_TXD_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_FUNCTION +# define DBG_USART_BAUDRATE 115200 +#elif BOARD == NGW100 +# define DBG_USART (&AVR32_USART1) +# define DBG_USART_RX_PIN AVR32_USART1_RXD_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART1_TXD_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_FUNCTION +# define DBG_USART_BAUDRATE 115200 +#elif BOARD == STK600_RCUC3L0 +# define DBG_USART (&AVR32_USART1) +# define DBG_USART_RX_PIN AVR32_USART1_RXD_0_1_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_1_FUNCTION +// For the RX pin, connect STK600.PORTE.PE3 to STK600.RS232 SPARE.RXD +# define DBG_USART_TX_PIN AVR32_USART1_TXD_0_1_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_1_FUNCTION +// For the TX pin, connect STK600.PORTE.PE2 to STK600.RS232 SPARE.TXD +# define DBG_USART_BAUDRATE 57600 +# define DBG_USART_CLOCK_MASK AVR32_USART1_CLK_PBA +#elif BOARD == UC3L_EK +# define DBG_USART (&AVR32_USART3) +# define DBG_USART_RX_PIN AVR32_USART3_RXD_0_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART3_RXD_0_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART3_TXD_0_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART3_TXD_0_0_FUNCTION +# define DBG_USART_BAUDRATE 57600 +# define DBG_USART_CLOCK_MASK AVR32_USART3_CLK_PBA +#elif BOARD == ARDUINO +# define DBG_USART (&AVR32_USART1) +# define DBG_USART_RX_PIN AVR32_USART1_RXD_0_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART1_TXD_0_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION +# define DBG_USART_BAUDRATE 57600 +# define DBG_USART_CLOCK_MASK AVR32_USART1_CLK_PBA +#endif + +#if !defined(DBG_USART) || \ + !defined(DBG_USART_RX_PIN) || \ + !defined(DBG_USART_RX_FUNCTION) || \ + !defined(DBG_USART_TX_PIN) || \ + !defined(DBG_USART_TX_FUNCTION) || \ + !defined(DBG_USART_BAUDRATE) +# error The USART configuration to use for debug on your board is missing +#endif +//! @} + +/*! \name VT100 Common Commands + */ +//! @{ +#define CLEARSCR "\x1B[2J\x1B[;H" //!< Clear screen. +#define CLEAREOL "\x1B[K" //!< Clear end of line. +#define CLEAREOS "\x1B[J" //!< Clear end of screen. +#define CLEARLCR "\x1B[0K" //!< Clear line cursor right. +#define CLEARLCL "\x1B[1K" //!< Clear line cursor left. +#define CLEARELN "\x1B[2K" //!< Clear entire line. +#define CLEARCDW "\x1B[0J" //!< Clear cursor down. +#define CLEARCUP "\x1B[1J" //!< Clear cursor up. +#define GOTOYX "\x1B[%.2d;%.2dH" //!< Set cursor to (y, x). +#define INSERTMOD "\x1B[4h" //!< Insert mode. +#define OVERWRITEMOD "\x1B[4l" //!< Overwrite mode. +#define DELAFCURSOR "\x1B[K" //!< Erase from cursor to end of line. +#define CRLF "\r\n" //!< Carriage Return + Line Feed. +//! @} + +/*! \name VT100 Cursor Commands + */ +//! @{ +#define CURSON "\x1B[?25h" //!< Show cursor. +#define CURSOFF "\x1B[?25l" //!< Hide cursor. +//! @} + +/*! \name VT100 Character Commands + */ +//! @{ +#define NORMAL "\x1B[0m" //!< Normal. +#define BOLD "\x1B[1m" //!< Bold. +#define UNDERLINE "\x1B[4m" //!< Underline. +#define BLINKING "\x1B[5m" //!< Blink. +#define INVVIDEO "\x1B[7m" //!< Inverse video. +//! @} + +/*! \name VT100 Color Commands + */ +//! @{ +#define CL_BLACK "\033[22;30m" //!< Black. +#define CL_RED "\033[22;31m" //!< Red. +#define CL_GREEN "\033[22;32m" //!< Green. +#define CL_BROWN "\033[22;33m" //!< Brown. +#define CL_BLUE "\033[22;34m" //!< Blue. +#define CL_MAGENTA "\033[22;35m" //!< Magenta. +#define CL_CYAN "\033[22;36m" //!< Cyan. +#define CL_GRAY "\033[22;37m" //!< Gray. +#define CL_DARKGRAY "\033[01;30m" //!< Dark gray. +#define CL_LIGHTRED "\033[01;31m" //!< Light red. +#define CL_LIGHTGREEN "\033[01;32m" //!< Light green. +#define CL_YELLOW "\033[01;33m" //!< Yellow. +#define CL_LIGHTBLUE "\033[01;34m" //!< Light blue. +#define CL_LIGHTMAGENTA "\033[01;35m" //!< Light magenta. +#define CL_LIGHTCYAN "\033[01;36m" //!< Light cyan. +#define CL_WHITE "\033[01;37m" //!< White. +//! @} + + +/*! \brief Sets up DBG_USART with 8N1 at DBG_USART_BAUDRATE. + * + * \param pba_hz PBA clock frequency (Hz). + */ +extern void init_dbg_rs232(long pba_hz); + +/*! \brief Sets up DBG_USART with 8N1 at a given baud rate. + * + * \param baudrate Baud rate to set DBG_USART to. + * \param pba_hz PBA clock frequency (Hz). + */ +extern void init_dbg_rs232_ex(unsigned long baudrate, long pba_hz); + +/*! \brief Prints a string of characters to DBG_USART. + * + * \param str The string of characters to print. + */ +extern void print_dbg(const char *str); + +/*! \brief Prints a character to DBG_USART. + * + * \param c The character to print. + */ +extern void print_dbg_char(int c); + +/*! \brief Prints an integer to DBG_USART in a decimal representation. + * + * \param n The integer to print. + */ +extern void print_dbg_ulong(unsigned long n); + +/*! \brief Prints a char to DBG_USART in an hexadecimal representation. + * + * \param n The char to print. + */ +extern void print_dbg_char_hex(unsigned char n); + +/*! \brief Prints a short integer to DBG_USART in an hexadecimal representation. + * + * \param n The short integer to print. + */ +extern void print_dbg_short_hex(unsigned short n); + +/*! \brief Prints an integer to DBG_USART in an hexadecimal representation. + * + * \param n The integer to print. + */ +extern void print_dbg_hex(unsigned long n); + +/*! \brief Prints a string of characters to a given USART. + * + * \param usart Base address of the USART instance to print to. + * \param str The string of characters to print. + */ +extern void print(volatile avr32_usart_t *usart, const char *str); + +/*! \brief Prints a character to a given USART. + * + * \param usart Base address of the USART instance to print to. + * \param c The character to print. + */ +extern void print_char(volatile avr32_usart_t *usart, int c); + +/*! \brief Prints an integer to a given USART in a decimal representation. + * + * \param usart Base address of the USART instance to print to. + * \param n The integer to print. + */ +extern void print_ulong(volatile avr32_usart_t *usart, unsigned long n); + +/*! \brief Prints a char to a given USART in an hexadecimal representation. + * + * \param usart Base address of the USART instance to print to. + * \param n The char to print. + */ +extern void print_char_hex(volatile avr32_usart_t *usart, unsigned char n); + +/*! \brief Prints a short integer to a given USART in an hexadecimal + * representation. + * + * \param usart Base address of the USART instance to print to. + * \param n The short integer to print. + */ +extern void print_short_hex(volatile avr32_usart_t *usart, unsigned short n); + +/*! \brief Prints an integer to a given USART in an hexadecimal representation. + * + * \param usart Base address of the USART instance to print to. + * \param n The integer to print. + */ +extern void print_hex(volatile avr32_usart_t *usart, unsigned long n); + + +#endif // _PRINT_FUNCS_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_cpu.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_cpu.h new file mode 100644 index 0000000..e3ebea7 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_cpu.h @@ -0,0 +1,63 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief NEWLIB_ADDONS CPU include file for AVR32. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef __AVR32_NEWLIB_ADDONS_CPU_H__ +#define __AVR32_NEWLIB_ADDONS_CPU_H__ + +#include <_ansi.h> + +_BEGIN_STD_C + +#define CPU_HZ get_cpu_hz() + +void udelay(unsigned long usec); +void set_cpu_hz(unsigned int clk_hz); +unsigned int get_cpu_hz(); + +_END_STD_C + +#endif diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_exceptions.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_exceptions.h new file mode 100644 index 0000000..31caf13 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_exceptions.h @@ -0,0 +1,120 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief NEWLIB_ADDONS exceptions include file for AVR32. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef __AVR32_NEWLIB_ADDONS_EXCEPTIONS_H__ +#define __AVR32_NEWLIB_ADDONS_EXCEPTIONS_H__ + +#include <_ansi.h> + +_BEGIN_STD_C + +/* + Exception vector offsets +*/ +#define EVBA_UNRECOVERABLE 0x000 +#define EVBA_TLB_MULTIPLE 0x004 +#define EVBA_BUS_ERROR_DATA 0x008 +#define EVBA_BUS_ERROR_INSTR 0x00C +#define EVBA_NMI 0x010 +#define EVBA_INSTR_ADDR 0x014 +#define EVBA_ITLB_MISS 0x050 +#define EVBA_ITLB_PROT 0x018 +#define EVBA_BREAKPOINT 0x01C +#define EVBA_ILLEGAL_OPCODE 0x020 +#define EVBA_UNIMPLEMENTED 0x024 +#define EVBA_PRIVILEGE_VIOL 0x028 +#define EVBA_FLOATING_POINT 0x02C +#define EVBA_COP_ABSENT 0x030 +#define EVBA_SCALL 0x100 +#define EVBA_DATA_ADDR_R 0x034 +#define EVBA_DATA_ADDR_W 0x038 +#define EVBA_DTLB_MISS_R 0x060 +#define EVBA_DTLB_MISS_W 0x070 +#define EVBA_DTLB_PROT_R 0x03C +#define EVBA_DTLB_PROT_W 0x040 +#define EVBA_DTLB_MODIFIED 0x044 + + +/* + Define the form of the function used when registering exceptions. + The function should return the address which the exception should + return to after the exception processing. +*/ + +typedef unsigned int (*__exception_handler)(int /*evba_offset*/, int /*return address*/); + +/* + Define the form of the function used when registering a scall handler. +*/ + +typedef void (*__scall_handler)(int /*code*/, int /*p1*/, int /*p2*/ + , int /*p3*/, int /*p4*/); + +/* + Function for registering an exception handler for the exception with + offset given by evba_offset. +*/ +void _register_exception_handler(__exception_handler handler, int evba_offset); + +/* + Function for registering a scall handler which can be a arbirary + function which uses r8-r12 for parameters. +*/ +void _register_scall_handler(__scall_handler handler); + +/* + Initialize exceptions. Must be called before registering exception handlers + and needed to enable exceptions. 'evba' is the pointer to the exception + vector. 'handler_table' is a pointer to an array where the pointers to + the exception handlers are stored. This array must be at least 0x104 bytes + and word aligned. +*/ +void init_exceptions(void *evba, void *handler_table); + +_END_STD_C + +#endif diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_interrupts.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_interrupts.h new file mode 100644 index 0000000..76d81f7 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_interrupts.h @@ -0,0 +1,82 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief NEWLIB_ADDONS interrupts include file for AVR32. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef __AVR32_NEWLIB_ADDONS_INTERRUPTS_H__ +#define __AVR32_NEWLIB_ADDONS_INTERRUPTS_H__ + +#include <_ansi.h> + +_BEGIN_STD_C + +#define INT_GRPS 64 +#define INT_LINES 32 +#define INTPR_BASE (__intc_base__ + 0x0000) +#define INTREQ_BASE (__intc_base__ + 64*4) +#define INTCAUSE_BASE (__intc_base__ + 2*64*4) + +//Register offsets +#define INTLEVEL 30 +#define AUTOVECTOR 0 +#define AUTOVECTOR_BITS 14 + +//Priorities +#define INT0 0 +#define INT1 1 +#define INT2 2 +#define INT3 3 + + +typedef void (*__newlib_int_handler)(int /* int_grp*/, void */*user_handle*/); + +__newlib_int_handler register_interrupt(__newlib_int_handler handler, int int_grp, int line, int priority, + .../* void *user_handle*/); +void init_interrupts(); +void set_interrupts_base(void *base); + +_END_STD_C + +#endif diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_io.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_io.h new file mode 100644 index 0000000..a725769 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_io.h @@ -0,0 +1,174 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief NEWLIB_ADDONS miscellaneous macros include file for AVR32. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef __AVR32_NEWLIB_ADDONS_IO_H__ +#define __AVR32_NEWLIB_ADDONS_IO_H__ + +#include <_ansi.h> + +_BEGIN_STD_C + +typedef char u8; +typedef unsigned int u32; + +#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v)) +#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) +#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v)) + +#define __raw_readb(a) (*(volatile unsigned char *)(a)) +#define __raw_readw(a) (*(volatile unsigned short *)(a)) +#define __raw_readl(a) (*(volatile unsigned int *)(a)) + +/* As long as I/O is only performed in P4 (or possibly P3), we're safe */ +#define writeb(v,a) __raw_writeb(v,a) +#define writew(v,a) __raw_writew(v,a) +#define writel(v,a) __raw_writel(v,a) + +#define readb(a) __raw_readb(a) +#define readw(a) __raw_readw(a) +#define readl(a) __raw_readl(a) + +/* Memory segments when segmentation is enabled */ +#define P0SEG 0x00000000 +#define P1SEG 0x80000000 +#define P2SEG 0xa0000000 +#define P3SEG 0xc0000000 +#define P4SEG 0xe0000000 + +/* Returns the privileged segment base of a given address */ +#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) + +/* Returns the physical address of a PnSEG (n=1,2) address */ +#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) + +/* + * Map an address to a certain privileged segment + */ +#define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG)) +#define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG)) +#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG)) +#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG)) + + +#define cached(addr) P1SEGADDR(addr) +#define uncached(addr) P2SEGADDR(addr) +#define physaddr(addr) PHYSADDR(addr) + +#define BF(field, value) \ + ({ union { \ + struct { \ + unsigned : 32 - field ## _OFFSET - field ## _SIZE ; \ + unsigned long __val: field ## _SIZE ; \ + }; \ + unsigned long __ul; \ + } __tmp; \ + __tmp.__ul = 0; \ + __tmp.__val = value; \ + __tmp.__ul;}) + +#define BF_D(field, value) \ + ({ union { \ + struct { \ + unsigned long long : 64 - field ## _OFFSET - field ## _SIZE ; \ + unsigned long long __val: field ## _SIZE ; \ + }; \ + unsigned long long __ul; \ + } __tmp; \ + __tmp.__ul = 0; \ + __tmp.__val = value; \ + __tmp.__ul;}) + +#define BFINS(var, field, value) \ + { union {\ + struct { \ + unsigned : 32 - field ## _OFFSET - field ## _SIZE ; \ + unsigned long __val: field ## _SIZE ; \ + }; \ + unsigned long __ul; \ + } __tmp; \ + __tmp.__ul = var; \ + __tmp.__val = value; \ + var = __tmp.__ul;} + +#define BFEXT(var, field) \ + ({ union {\ + struct { \ + unsigned : 32 - field ## _OFFSET - field ## _SIZE ; \ + unsigned long __val: field ## _SIZE ; \ + }; \ + unsigned long __ul; \ + } __tmp; \ + __tmp.__ul = var; \ + __tmp.__val; }) + +#define BFINS_D(var, field, value) \ + { union {\ + struct { \ + unsigned long long : 64 - field ## _OFFSET - field ## _SIZE ; \ + unsigned long long __val: field ## _SIZE ; \ + }; \ + unsigned long long __ul; \ + } __tmp; \ + __tmp.__ul = var; \ + __tmp.__val = value; \ + var = __tmp.__ul;} + +#define BFEXT_D(var, field) \ + ({ union {\ + struct { \ + unsigned long long : 64 - field ## _OFFSET - field ## _SIZE ; \ + unsigned long long __val: field ## _SIZE ; \ + }; \ + unsigned long long __ul; \ + } __tmp; \ + __tmp.__ul = var; \ + __tmp.__val; }) + + +_END_STD_C + +#endif diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_usart.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_usart.h new file mode 100644 index 0000000..6c4697d --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_usart.h @@ -0,0 +1,208 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief NEWLIB_ADDONS USART include file for AVR32. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef __AVR32_NEWLIB_ADDONS_USART_H__ +#define __AVR32_NEWLIB_ADDONS_USART_H__ + +#include <_ansi.h> + +#include "nlao_io.h" + +_BEGIN_STD_C + +struct usart3 { + volatile u32 us_cr; + volatile u32 us_mr; + volatile u32 us_ier; + volatile u32 us_idr; + volatile u32 us_imr; + volatile u32 us_csr; + volatile u32 us_rhr; + volatile u32 us_thr; + volatile u32 us_brgr; + volatile u32 us_rtor; + volatile u32 us_ttgr; + volatile u32 us_reserved[5]; + volatile u32 us_fidi; + volatile u32 us_ner; + volatile u32 us_xxr; + volatile u32 us_if; +}; + +/* Register offsets */ +#define US_CR 0x0000 +#define US_MR 0x0004 +#define US_IER 0x0008 +#define US_IDR 0x000c +#define US_IMR 0x0010 +#define US_CSR 0x0014 +#define US_RHR 0x0018 +#define US_THR 0x001c +#define US_BRGR 0x0020 +#define US_RTOR 0x0024 +#define US_TTGR 0x0028 + +#define US_FIDI 0x0040 +#define US_NER 0x0044 +#define US_XXR 0x0048 +#define US_IF 0x004c + +#define US_RPR 0x0100 +#define US_RCR 0x0104 +#define US_TPR 0x0108 +#define US_TCR 0x010c +#define US_RNPR 0x0110 +#define US_RNCR 0x0114 +#define US_TNPR 0x0118 +#define US_TNCR 0x011c +#define US_PTCR 0x0120 +#define US_PTSR 0x0124 + + + + +/* USART3 Control Register */ +#define US_CR_RSTRX (1 << 2) +#define US_CR_RSTTX (1 << 3) +#define US_CR_RXEN (1 << 4) +#define US_CR_RXDIS (1 << 5) +#define US_CR_TXEN (1 << 6) +#define US_CR_TXDIS (1 << 7) +#define US_CR_RSTSTA (1 << 8) +#define US_CR_STTBRK (1 << 9) +#define US_CR_STPBRK (1 << 10) + +#define US_CR_DTREN (1 << 16) +#define US_CR_DTRDIS (1 << 17) +#define US_CR_RTSEN (1 << 18) +#define US_CR_RTSDIS (1 << 19) + +/* USART3 Mode Register */ +#define US_MR_MODE (15 << 0) +#define US_MR_MODE_NORMAL ( 0 << 0) +#define US_MR_MODE_HWFLOW ( 2 << 0) +#define US_MR_CLKS ( 3 << 4) +#define US_MR_CLKS_CLOCK ( 0 << 4) +#define US_MR_CLKS_FDIV1 ( 1 << 4) +#define US_MR_CLKS_SLOW ( 2 << 4) +#define US_MR_CLKS_EXT ( 3 << 4) +#define US_MR_CHRL_5BITS ( 0 << 6) +#define US_MR_CHRL_6BITS ( 1 << 6) +#define US_MR_CHRL_7BITS ( 2 << 6) +#define US_MR_CHRL_8BITS ( 3 << 6) +#define US_MR_SYNC ( 1 << 8) +#define US_MR_PAR_EVEN ( 0 << 9) +#define US_MR_PAR_ODD ( 1 << 9) +#define US_MR_PAR_SPACE ( 2 << 9) +#define US_MR_PAR_MARK ( 3 << 9) +#define US_MR_PAR_NONE ( 4 << 9) +#define US_MR_PAR_MDROP ( 6 << 9) +#define US_MR_NBSTOP_1BIT ( 0 << 12) +#define US_MR_NBSTOP_1_5BIT ( 1 << 12) +#define US_MR_NBSTOP_2BITS ( 2 << 12) +#define US_MR_OVER ( 1 << 19) +#define US_MR_OVER_X16 ( 0 << 19) +#define US_MR_OVER_X8 ( 1 << 19) + +/* USART3 Channel Status Register */ +#define US_CSR_RXRDY (1 << 0) +#define US_CSR_TXRDY (1 << 1) +#define US_CSR_RXBRK (1 << 2) +#define US_CSR_ENDRX (1 << 3) +#define US_CSR_ENDTX (1 << 4) + + +#define US_CSR_OVRE (1 << 5) +#define US_CSR_FRAME (1 << 6) +#define US_CSR_PARE (1 << 7) + +#define US_CSR_TXEMPTY (1 << 9) + +#define US_CSR_TXBUFE (1 << 11) +#define US_CSR_RXBUFF (1 << 12) +#define US_CSR_RIIC (1 << 16) +#define US_CSR_DSRIC (1 << 17) +#define US_CSR_DCDIC (1 << 18) +#define US_CSR_CTSIC (1 << 19) +#define US_CSR_RI (1 << 20) +#define US_CSR_DSR (1 << 21) +#define US_CSR_DCD (1 << 22) +#define US_CSR_CTS (1 << 23) + +/* USART3 Baud Rate Generator Register */ +#define US_BRGR_CD_OFFSET 0 +#define US_BRGR_FP_OFFSET 16 + +#define US_BRGR_CD_SIZE 16 +#define US_BRGR_FP_SIZE 3 + +#define US_BRGR_CD (0xFFFF << 0) +#define US_BRGR_FP ( 7 << 16) + +/*USART3 PDC Transfer Control Register */ +#define US_PTCR_RXTEN (1 << 0) +#define US_PTCR_RXTDIS (1 << 1) +#define US_PTCR_TXTEN (1 << 8) +#define US_PTCR_TXTDIS (1 << 9) + +/*USART3 PDC Transfer Status Register */ +#define US_PTSR_RXTEN (1 << 0) +#define US_PTSR_TXTEN (1 << 8) + + +int usart_init(int baudrate); +void usart_putc(char c); +void usart_puts(const char *s); +int usart_getc(void); +int usart_tstc(void); +void usart_setbrg(int baudrate, int cpu_clock); +void set_usart_base(void *usart_base); + + +_END_STD_C + +#endif /* MERLIN_USART3_H */ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/libnewlib_addons-at32ucr2-speed_opt.a b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/libnewlib_addons-at32ucr2-speed_opt.a new file mode 100644 index 0000000..aa673ec Binary files /dev/null and b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/libnewlib_addons-at32ucr2-speed_opt.a differ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds new file mode 100644 index 0000000..59152ac --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds @@ -0,0 +1,266 @@ +/****************************************************************************** + * AVR32 AT32UC3A0512 GNU LD script file. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: AVR32 AT32UC3A0512 + * + * - author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") + +OUTPUT_ARCH(avr32:uc) + +ENTRY(_start) + +MEMORY +{ + FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00080000 + INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC + USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200 +} + +PHDRS +{ + FLASH PT_LOAD; + INTRAM_ALIGN PT_NULL; + INTRAM_AT_FLASH PT_LOAD; + INTRAM PT_NULL; + USERPAGE PT_LOAD; +} + +SECTIONS +{ + /* If this heap size is selected, all the INTRAM space from the end of the + data area to the beginning of the stack will be allocated for the heap. */ + __max_heap_size__ = -1; + + /* Use a default heap size if heap size was not defined. */ + __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__; + + /* Use a default stack size if stack size was not defined. */ + __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K; + + /* Read-only sections, merged into text segment: */ + PROVIDE (__executable_start = 0x80000000); . = 0x80000000; + .interp : { *(.interp) } >FLASH AT>FLASH :FLASH + .reset : { *(.reset) } >FLASH AT>FLASH :FLASH + .hash : { *(.hash) } >FLASH AT>FLASH :FLASH + .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH + .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH + .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH + .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH + .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH + .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH + .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH + .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH + .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH + .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH + .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH + .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH + .rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH + .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH + .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH + .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH + .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH + .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH + .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH + .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH + .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH + .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH + .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH + .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH + .rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH + .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH + .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH + .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH + .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH + .init : + { + KEEP (*(.init)) + } >FLASH AT>FLASH :FLASH =0xd703d703 + .plt : { *(.plt) } >FLASH AT>FLASH :FLASH + .text : + { + *(.text .stub .text.* .gnu.linkonce.t.*) + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + } >FLASH AT>FLASH :FLASH =0xd703d703 + .fini : + { + KEEP (*(.fini)) + } >FLASH AT>FLASH :FLASH =0xd703d703 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH + .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH + .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH + .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH + . = ORIGIN(INTRAM); + .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM_ALIGN + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + /* Ensure the __preinit_array_start label is properly aligned. We + could instead move the label definition inside the section, but + the linker would then create the section even if it turns out to + be empty, which isn't pretty. */ + PROVIDE (__preinit_array_start = ALIGN(32 / 8)); + .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__fini_array_end = .); + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin*.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .dtors : + { + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .ramtext : { *(.ramtext .ramtext.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .ddalign : { . = ALIGN(8); } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data : + { + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data1 : { *(.data1) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .balign : { . = ALIGN(8); PROVIDE(_edata = .); } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (edata = .); + __bss_start = .; + .bss : + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. */ + . = ALIGN(8); + } >INTRAM AT>INTRAM :INTRAM + . = ALIGN(8); + _end = .; + PROVIDE (end = .); + __heap_start__ = ALIGN(8); + .heap : + { + *(.heap) + . = (__heap_size__ == __max_heap_size__) ? + ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) : + __heap_size__; + } >INTRAM AT>INTRAM :INTRAM + __heap_end__ = .; + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ : + { + _stack = .; + *(.stack) + . = __stack_size__; + _estack = .; + } >INTRAM AT>INTRAM :INTRAM + .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/GCC/link_uc3a1256.lds b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/GCC/link_uc3a1256.lds new file mode 100644 index 0000000..a5926d8 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/GCC/link_uc3a1256.lds @@ -0,0 +1,266 @@ +/****************************************************************************** + * AVR32 AT32UC3A1256 GNU LD script file. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: AVR32 AT32UC3A1256 + * + * - author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") + +OUTPUT_ARCH(avr32:uc) + +ENTRY(_start) + +MEMORY +{ + FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000 + INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC + USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200 +} + +PHDRS +{ + FLASH PT_LOAD; + INTRAM_ALIGN PT_NULL; + INTRAM_AT_FLASH PT_LOAD; + INTRAM PT_NULL; + USERPAGE PT_LOAD; +} + +SECTIONS +{ + /* If this heap size is selected, all the INTRAM space from the end of the + data area to the beginning of the stack will be allocated for the heap. */ + __max_heap_size__ = -1; + + /* Use a default heap size if heap size was not defined. */ + __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__; + + /* Use a default stack size if stack size was not defined. */ + __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K; + + /* Read-only sections, merged into text segment: */ + PROVIDE (__executable_start = 0x80000000); . = 0x80000000; + .interp : { *(.interp) } >FLASH AT>FLASH :FLASH + .reset : { *(.reset) } >FLASH AT>FLASH :FLASH + .hash : { *(.hash) } >FLASH AT>FLASH :FLASH + .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH + .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH + .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH + .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH + .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH + .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH + .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH + .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH + .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH + .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH + .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH + .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH + .rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH + .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH + .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH + .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH + .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH + .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH + .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH + .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH + .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH + .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH + .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH + .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH + .rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH + .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH + .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH + .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH + .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH + .init : + { + KEEP (*(.init)) + } >FLASH AT>FLASH :FLASH =0xd703d703 + .plt : { *(.plt) } >FLASH AT>FLASH :FLASH + .text : + { + *(.text .stub .text.* .gnu.linkonce.t.*) + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + } >FLASH AT>FLASH :FLASH =0xd703d703 + .fini : + { + KEEP (*(.fini)) + } >FLASH AT>FLASH :FLASH =0xd703d703 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH + .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH + .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH + .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH + . = ORIGIN(INTRAM); + .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM_ALIGN + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + /* Ensure the __preinit_array_start label is properly aligned. We + could instead move the label definition inside the section, but + the linker would then create the section even if it turns out to + be empty, which isn't pretty. */ + PROVIDE (__preinit_array_start = ALIGN(32 / 8)); + .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__fini_array_end = .); + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin*.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .dtors : + { + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .ramtext : { *(.ramtext .ramtext.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .ddalign : { . = ALIGN(8); } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data : + { + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data1 : { *(.data1) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .balign : { . = ALIGN(8); PROVIDE(_edata = .); } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (edata = .); + __bss_start = .; + .bss : + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. */ + . = ALIGN(8); + } >INTRAM AT>INTRAM :INTRAM + . = ALIGN(8); + _end = .; + PROVIDE (end = .); + __heap_start__ = ALIGN(8); + .heap : + { + *(.heap) + . = (__heap_size__ == __max_heap_size__) ? + ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) : + __heap_size__; + } >INTRAM AT>INTRAM :INTRAM + __heap_end__ = .; + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ : + { + _stack = .; + *(.stack) + . = __stack_size__; + _estack = .; + } >INTRAM AT>INTRAM :INTRAM + .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/mrepeat.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/mrepeat.h new file mode 100644 index 0000000..41163b6 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/mrepeat.h @@ -0,0 +1,328 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor macro repeating utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _MREPEAT_H_ +#define _MREPEAT_H_ + +#include "preprocessor.h" + + +//! Maximal number of repetitions supported by MREPEAT. +#define MREPEAT_LIMIT 256 + +/*! \brief Macro repeat. + * + * This macro represents a horizontal repetition construct. + * + * \param count The number of repetitious calls to macro. Valid values range from 0 to MREPEAT_LIMIT. + * \param macro A binary operation of the form macro(n, data). This macro is expanded by MREPEAT with + * the current repetition number and the auxiliary data argument. + * \param data Auxiliary data passed to macro. + * + * \return macro(0, data) macro(1, data) ... macro(count - 1, data) + */ +#define MREPEAT(count, macro, data) TPASTE2(MREPEAT, count)(macro, data) + +#define MREPEAT0( macro, data) +#define MREPEAT1( macro, data) MREPEAT0( macro, data) macro( 0, data) +#define MREPEAT2( macro, data) MREPEAT1( macro, data) macro( 1, data) +#define MREPEAT3( macro, data) MREPEAT2( macro, data) macro( 2, data) +#define MREPEAT4( macro, data) MREPEAT3( macro, data) macro( 3, data) +#define MREPEAT5( macro, data) MREPEAT4( macro, data) macro( 4, data) +#define MREPEAT6( macro, data) MREPEAT5( macro, data) macro( 5, data) +#define MREPEAT7( macro, data) MREPEAT6( macro, data) macro( 6, data) +#define MREPEAT8( macro, data) MREPEAT7( macro, data) macro( 7, data) +#define MREPEAT9( macro, data) MREPEAT8( macro, data) macro( 8, data) +#define MREPEAT10( macro, data) MREPEAT9( macro, data) macro( 9, data) +#define MREPEAT11( macro, data) MREPEAT10( macro, data) macro( 10, data) +#define MREPEAT12( macro, data) MREPEAT11( macro, data) macro( 11, data) +#define MREPEAT13( macro, data) MREPEAT12( macro, data) macro( 12, data) +#define MREPEAT14( macro, data) MREPEAT13( macro, data) macro( 13, data) +#define MREPEAT15( macro, data) MREPEAT14( macro, data) macro( 14, data) +#define MREPEAT16( macro, data) MREPEAT15( macro, data) macro( 15, data) +#define MREPEAT17( macro, data) MREPEAT16( macro, data) macro( 16, data) +#define MREPEAT18( macro, data) MREPEAT17( macro, data) macro( 17, data) +#define MREPEAT19( macro, data) MREPEAT18( macro, data) macro( 18, data) +#define MREPEAT20( macro, data) MREPEAT19( macro, data) macro( 19, data) +#define MREPEAT21( macro, data) MREPEAT20( macro, data) macro( 20, data) +#define MREPEAT22( macro, data) MREPEAT21( macro, data) macro( 21, data) +#define MREPEAT23( macro, data) MREPEAT22( macro, data) macro( 22, data) +#define MREPEAT24( macro, data) MREPEAT23( macro, data) macro( 23, data) +#define MREPEAT25( macro, data) MREPEAT24( macro, data) macro( 24, data) +#define MREPEAT26( macro, data) MREPEAT25( macro, data) macro( 25, data) +#define MREPEAT27( macro, data) MREPEAT26( macro, data) macro( 26, data) +#define MREPEAT28( macro, data) MREPEAT27( macro, data) macro( 27, data) +#define MREPEAT29( macro, data) MREPEAT28( macro, data) macro( 28, data) +#define MREPEAT30( macro, data) MREPEAT29( macro, data) macro( 29, data) +#define MREPEAT31( macro, data) MREPEAT30( macro, data) macro( 30, data) +#define MREPEAT32( macro, data) MREPEAT31( macro, data) macro( 31, data) +#define MREPEAT33( macro, data) MREPEAT32( macro, data) macro( 32, data) +#define MREPEAT34( macro, data) MREPEAT33( macro, data) macro( 33, data) +#define MREPEAT35( macro, data) MREPEAT34( macro, data) macro( 34, data) +#define MREPEAT36( macro, data) MREPEAT35( macro, data) macro( 35, data) +#define MREPEAT37( macro, data) MREPEAT36( macro, data) macro( 36, data) +#define MREPEAT38( macro, data) MREPEAT37( macro, data) macro( 37, data) +#define MREPEAT39( macro, data) MREPEAT38( macro, data) macro( 38, data) +#define MREPEAT40( macro, data) MREPEAT39( macro, data) macro( 39, data) +#define MREPEAT41( macro, data) MREPEAT40( macro, data) macro( 40, data) +#define MREPEAT42( macro, data) MREPEAT41( macro, data) macro( 41, data) +#define MREPEAT43( macro, data) MREPEAT42( macro, data) macro( 42, data) +#define MREPEAT44( macro, data) MREPEAT43( macro, data) macro( 43, data) +#define MREPEAT45( macro, data) MREPEAT44( macro, data) macro( 44, data) +#define MREPEAT46( macro, data) MREPEAT45( macro, data) macro( 45, data) +#define MREPEAT47( macro, data) MREPEAT46( macro, data) macro( 46, data) +#define MREPEAT48( macro, data) MREPEAT47( macro, data) macro( 47, data) +#define MREPEAT49( macro, data) MREPEAT48( macro, data) macro( 48, data) +#define MREPEAT50( macro, data) MREPEAT49( macro, data) macro( 49, data) +#define MREPEAT51( macro, data) MREPEAT50( macro, data) macro( 50, data) +#define MREPEAT52( macro, data) MREPEAT51( macro, data) macro( 51, data) +#define MREPEAT53( macro, data) MREPEAT52( macro, data) macro( 52, data) +#define MREPEAT54( macro, data) MREPEAT53( macro, data) macro( 53, data) +#define MREPEAT55( macro, data) MREPEAT54( macro, data) macro( 54, data) +#define MREPEAT56( macro, data) MREPEAT55( macro, data) macro( 55, data) +#define MREPEAT57( macro, data) MREPEAT56( macro, data) macro( 56, data) +#define MREPEAT58( macro, data) MREPEAT57( macro, data) macro( 57, data) +#define MREPEAT59( macro, data) MREPEAT58( macro, data) macro( 58, data) +#define MREPEAT60( macro, data) MREPEAT59( macro, data) macro( 59, data) +#define MREPEAT61( macro, data) MREPEAT60( macro, data) macro( 60, data) +#define MREPEAT62( macro, data) MREPEAT61( macro, data) macro( 61, data) +#define MREPEAT63( macro, data) MREPEAT62( macro, data) macro( 62, data) +#define MREPEAT64( macro, data) MREPEAT63( macro, data) macro( 63, data) +#define MREPEAT65( macro, data) MREPEAT64( macro, data) macro( 64, data) +#define MREPEAT66( macro, data) MREPEAT65( macro, data) macro( 65, data) +#define MREPEAT67( macro, data) MREPEAT66( macro, data) macro( 66, data) +#define MREPEAT68( macro, data) MREPEAT67( macro, data) macro( 67, data) +#define MREPEAT69( macro, data) MREPEAT68( macro, data) macro( 68, data) +#define MREPEAT70( macro, data) MREPEAT69( macro, data) macro( 69, data) +#define MREPEAT71( macro, data) MREPEAT70( macro, data) macro( 70, data) +#define MREPEAT72( macro, data) MREPEAT71( macro, data) macro( 71, data) +#define MREPEAT73( macro, data) MREPEAT72( macro, data) macro( 72, data) +#define MREPEAT74( macro, data) MREPEAT73( macro, data) macro( 73, data) +#define MREPEAT75( macro, data) MREPEAT74( macro, data) macro( 74, data) +#define MREPEAT76( macro, data) MREPEAT75( macro, data) macro( 75, data) +#define MREPEAT77( macro, data) MREPEAT76( macro, data) macro( 76, data) +#define MREPEAT78( macro, data) MREPEAT77( macro, data) macro( 77, data) +#define MREPEAT79( macro, data) MREPEAT78( macro, data) macro( 78, data) +#define MREPEAT80( macro, data) MREPEAT79( macro, data) macro( 79, data) +#define MREPEAT81( macro, data) MREPEAT80( macro, data) macro( 80, data) +#define MREPEAT82( macro, data) MREPEAT81( macro, data) macro( 81, data) +#define MREPEAT83( macro, data) MREPEAT82( macro, data) macro( 82, data) +#define MREPEAT84( macro, data) MREPEAT83( macro, data) macro( 83, data) +#define MREPEAT85( macro, data) MREPEAT84( macro, data) macro( 84, data) +#define MREPEAT86( macro, data) MREPEAT85( macro, data) macro( 85, data) +#define MREPEAT87( macro, data) MREPEAT86( macro, data) macro( 86, data) +#define MREPEAT88( macro, data) MREPEAT87( macro, data) macro( 87, data) +#define MREPEAT89( macro, data) MREPEAT88( macro, data) macro( 88, data) +#define MREPEAT90( macro, data) MREPEAT89( macro, data) macro( 89, data) +#define MREPEAT91( macro, data) MREPEAT90( macro, data) macro( 90, data) +#define MREPEAT92( macro, data) MREPEAT91( macro, data) macro( 91, data) +#define MREPEAT93( macro, data) MREPEAT92( macro, data) macro( 92, data) +#define MREPEAT94( macro, data) MREPEAT93( macro, data) macro( 93, data) +#define MREPEAT95( macro, data) MREPEAT94( macro, data) macro( 94, data) +#define MREPEAT96( macro, data) MREPEAT95( macro, data) macro( 95, data) +#define MREPEAT97( macro, data) MREPEAT96( macro, data) macro( 96, data) +#define MREPEAT98( macro, data) MREPEAT97( macro, data) macro( 97, data) +#define MREPEAT99( macro, data) MREPEAT98( macro, data) macro( 98, data) +#define MREPEAT100(macro, data) MREPEAT99( macro, data) macro( 99, data) +#define MREPEAT101(macro, data) MREPEAT100(macro, data) macro(100, data) +#define MREPEAT102(macro, data) MREPEAT101(macro, data) macro(101, data) +#define MREPEAT103(macro, data) MREPEAT102(macro, data) macro(102, data) +#define MREPEAT104(macro, data) MREPEAT103(macro, data) macro(103, data) +#define MREPEAT105(macro, data) MREPEAT104(macro, data) macro(104, data) +#define MREPEAT106(macro, data) MREPEAT105(macro, data) macro(105, data) +#define MREPEAT107(macro, data) MREPEAT106(macro, data) macro(106, data) +#define MREPEAT108(macro, data) MREPEAT107(macro, data) macro(107, data) +#define MREPEAT109(macro, data) MREPEAT108(macro, data) macro(108, data) +#define MREPEAT110(macro, data) MREPEAT109(macro, data) macro(109, data) +#define MREPEAT111(macro, data) MREPEAT110(macro, data) macro(110, data) +#define MREPEAT112(macro, data) MREPEAT111(macro, data) macro(111, data) +#define MREPEAT113(macro, data) MREPEAT112(macro, data) macro(112, data) +#define MREPEAT114(macro, data) MREPEAT113(macro, data) macro(113, data) +#define MREPEAT115(macro, data) MREPEAT114(macro, data) macro(114, data) +#define MREPEAT116(macro, data) MREPEAT115(macro, data) macro(115, data) +#define MREPEAT117(macro, data) MREPEAT116(macro, data) macro(116, data) +#define MREPEAT118(macro, data) MREPEAT117(macro, data) macro(117, data) +#define MREPEAT119(macro, data) MREPEAT118(macro, data) macro(118, data) +#define MREPEAT120(macro, data) MREPEAT119(macro, data) macro(119, data) +#define MREPEAT121(macro, data) MREPEAT120(macro, data) macro(120, data) +#define MREPEAT122(macro, data) MREPEAT121(macro, data) macro(121, data) +#define MREPEAT123(macro, data) MREPEAT122(macro, data) macro(122, data) +#define MREPEAT124(macro, data) MREPEAT123(macro, data) macro(123, data) +#define MREPEAT125(macro, data) MREPEAT124(macro, data) macro(124, data) +#define MREPEAT126(macro, data) MREPEAT125(macro, data) macro(125, data) +#define MREPEAT127(macro, data) MREPEAT126(macro, data) macro(126, data) +#define MREPEAT128(macro, data) MREPEAT127(macro, data) macro(127, data) +#define MREPEAT129(macro, data) MREPEAT128(macro, data) macro(128, data) +#define MREPEAT130(macro, data) MREPEAT129(macro, data) macro(129, data) +#define MREPEAT131(macro, data) MREPEAT130(macro, data) macro(130, data) +#define MREPEAT132(macro, data) MREPEAT131(macro, data) macro(131, data) +#define MREPEAT133(macro, data) MREPEAT132(macro, data) macro(132, data) +#define MREPEAT134(macro, data) MREPEAT133(macro, data) macro(133, data) +#define MREPEAT135(macro, data) MREPEAT134(macro, data) macro(134, data) +#define MREPEAT136(macro, data) MREPEAT135(macro, data) macro(135, data) +#define MREPEAT137(macro, data) MREPEAT136(macro, data) macro(136, data) +#define MREPEAT138(macro, data) MREPEAT137(macro, data) macro(137, data) +#define MREPEAT139(macro, data) MREPEAT138(macro, data) macro(138, data) +#define MREPEAT140(macro, data) MREPEAT139(macro, data) macro(139, data) +#define MREPEAT141(macro, data) MREPEAT140(macro, data) macro(140, data) +#define MREPEAT142(macro, data) MREPEAT141(macro, data) macro(141, data) +#define MREPEAT143(macro, data) MREPEAT142(macro, data) macro(142, data) +#define MREPEAT144(macro, data) MREPEAT143(macro, data) macro(143, data) +#define MREPEAT145(macro, data) MREPEAT144(macro, data) macro(144, data) +#define MREPEAT146(macro, data) MREPEAT145(macro, data) macro(145, data) +#define MREPEAT147(macro, data) MREPEAT146(macro, data) macro(146, data) +#define MREPEAT148(macro, data) MREPEAT147(macro, data) macro(147, data) +#define MREPEAT149(macro, data) MREPEAT148(macro, data) macro(148, data) +#define MREPEAT150(macro, data) MREPEAT149(macro, data) macro(149, data) +#define MREPEAT151(macro, data) MREPEAT150(macro, data) macro(150, data) +#define MREPEAT152(macro, data) MREPEAT151(macro, data) macro(151, data) +#define MREPEAT153(macro, data) MREPEAT152(macro, data) macro(152, data) +#define MREPEAT154(macro, data) MREPEAT153(macro, data) macro(153, data) +#define MREPEAT155(macro, data) MREPEAT154(macro, data) macro(154, data) +#define MREPEAT156(macro, data) MREPEAT155(macro, data) macro(155, data) +#define MREPEAT157(macro, data) MREPEAT156(macro, data) macro(156, data) +#define MREPEAT158(macro, data) MREPEAT157(macro, data) macro(157, data) +#define MREPEAT159(macro, data) MREPEAT158(macro, data) macro(158, data) +#define MREPEAT160(macro, data) MREPEAT159(macro, data) macro(159, data) +#define MREPEAT161(macro, data) MREPEAT160(macro, data) macro(160, data) +#define MREPEAT162(macro, data) MREPEAT161(macro, data) macro(161, data) +#define MREPEAT163(macro, data) MREPEAT162(macro, data) macro(162, data) +#define MREPEAT164(macro, data) MREPEAT163(macro, data) macro(163, data) +#define MREPEAT165(macro, data) MREPEAT164(macro, data) macro(164, data) +#define MREPEAT166(macro, data) MREPEAT165(macro, data) macro(165, data) +#define MREPEAT167(macro, data) MREPEAT166(macro, data) macro(166, data) +#define MREPEAT168(macro, data) MREPEAT167(macro, data) macro(167, data) +#define MREPEAT169(macro, data) MREPEAT168(macro, data) macro(168, data) +#define MREPEAT170(macro, data) MREPEAT169(macro, data) macro(169, data) +#define MREPEAT171(macro, data) MREPEAT170(macro, data) macro(170, data) +#define MREPEAT172(macro, data) MREPEAT171(macro, data) macro(171, data) +#define MREPEAT173(macro, data) MREPEAT172(macro, data) macro(172, data) +#define MREPEAT174(macro, data) MREPEAT173(macro, data) macro(173, data) +#define MREPEAT175(macro, data) MREPEAT174(macro, data) macro(174, data) +#define MREPEAT176(macro, data) MREPEAT175(macro, data) macro(175, data) +#define MREPEAT177(macro, data) MREPEAT176(macro, data) macro(176, data) +#define MREPEAT178(macro, data) MREPEAT177(macro, data) macro(177, data) +#define MREPEAT179(macro, data) MREPEAT178(macro, data) macro(178, data) +#define MREPEAT180(macro, data) MREPEAT179(macro, data) macro(179, data) +#define MREPEAT181(macro, data) MREPEAT180(macro, data) macro(180, data) +#define MREPEAT182(macro, data) MREPEAT181(macro, data) macro(181, data) +#define MREPEAT183(macro, data) MREPEAT182(macro, data) macro(182, data) +#define MREPEAT184(macro, data) MREPEAT183(macro, data) macro(183, data) +#define MREPEAT185(macro, data) MREPEAT184(macro, data) macro(184, data) +#define MREPEAT186(macro, data) MREPEAT185(macro, data) macro(185, data) +#define MREPEAT187(macro, data) MREPEAT186(macro, data) macro(186, data) +#define MREPEAT188(macro, data) MREPEAT187(macro, data) macro(187, data) +#define MREPEAT189(macro, data) MREPEAT188(macro, data) macro(188, data) +#define MREPEAT190(macro, data) MREPEAT189(macro, data) macro(189, data) +#define MREPEAT191(macro, data) MREPEAT190(macro, data) macro(190, data) +#define MREPEAT192(macro, data) MREPEAT191(macro, data) macro(191, data) +#define MREPEAT193(macro, data) MREPEAT192(macro, data) macro(192, data) +#define MREPEAT194(macro, data) MREPEAT193(macro, data) macro(193, data) +#define MREPEAT195(macro, data) MREPEAT194(macro, data) macro(194, data) +#define MREPEAT196(macro, data) MREPEAT195(macro, data) macro(195, data) +#define MREPEAT197(macro, data) MREPEAT196(macro, data) macro(196, data) +#define MREPEAT198(macro, data) MREPEAT197(macro, data) macro(197, data) +#define MREPEAT199(macro, data) MREPEAT198(macro, data) macro(198, data) +#define MREPEAT200(macro, data) MREPEAT199(macro, data) macro(199, data) +#define MREPEAT201(macro, data) MREPEAT200(macro, data) macro(200, data) +#define MREPEAT202(macro, data) MREPEAT201(macro, data) macro(201, data) +#define MREPEAT203(macro, data) MREPEAT202(macro, data) macro(202, data) +#define MREPEAT204(macro, data) MREPEAT203(macro, data) macro(203, data) +#define MREPEAT205(macro, data) MREPEAT204(macro, data) macro(204, data) +#define MREPEAT206(macro, data) MREPEAT205(macro, data) macro(205, data) +#define MREPEAT207(macro, data) MREPEAT206(macro, data) macro(206, data) +#define MREPEAT208(macro, data) MREPEAT207(macro, data) macro(207, data) +#define MREPEAT209(macro, data) MREPEAT208(macro, data) macro(208, data) +#define MREPEAT210(macro, data) MREPEAT209(macro, data) macro(209, data) +#define MREPEAT211(macro, data) MREPEAT210(macro, data) macro(210, data) +#define MREPEAT212(macro, data) MREPEAT211(macro, data) macro(211, data) +#define MREPEAT213(macro, data) MREPEAT212(macro, data) macro(212, data) +#define MREPEAT214(macro, data) MREPEAT213(macro, data) macro(213, data) +#define MREPEAT215(macro, data) MREPEAT214(macro, data) macro(214, data) +#define MREPEAT216(macro, data) MREPEAT215(macro, data) macro(215, data) +#define MREPEAT217(macro, data) MREPEAT216(macro, data) macro(216, data) +#define MREPEAT218(macro, data) MREPEAT217(macro, data) macro(217, data) +#define MREPEAT219(macro, data) MREPEAT218(macro, data) macro(218, data) +#define MREPEAT220(macro, data) MREPEAT219(macro, data) macro(219, data) +#define MREPEAT221(macro, data) MREPEAT220(macro, data) macro(220, data) +#define MREPEAT222(macro, data) MREPEAT221(macro, data) macro(221, data) +#define MREPEAT223(macro, data) MREPEAT222(macro, data) macro(222, data) +#define MREPEAT224(macro, data) MREPEAT223(macro, data) macro(223, data) +#define MREPEAT225(macro, data) MREPEAT224(macro, data) macro(224, data) +#define MREPEAT226(macro, data) MREPEAT225(macro, data) macro(225, data) +#define MREPEAT227(macro, data) MREPEAT226(macro, data) macro(226, data) +#define MREPEAT228(macro, data) MREPEAT227(macro, data) macro(227, data) +#define MREPEAT229(macro, data) MREPEAT228(macro, data) macro(228, data) +#define MREPEAT230(macro, data) MREPEAT229(macro, data) macro(229, data) +#define MREPEAT231(macro, data) MREPEAT230(macro, data) macro(230, data) +#define MREPEAT232(macro, data) MREPEAT231(macro, data) macro(231, data) +#define MREPEAT233(macro, data) MREPEAT232(macro, data) macro(232, data) +#define MREPEAT234(macro, data) MREPEAT233(macro, data) macro(233, data) +#define MREPEAT235(macro, data) MREPEAT234(macro, data) macro(234, data) +#define MREPEAT236(macro, data) MREPEAT235(macro, data) macro(235, data) +#define MREPEAT237(macro, data) MREPEAT236(macro, data) macro(236, data) +#define MREPEAT238(macro, data) MREPEAT237(macro, data) macro(237, data) +#define MREPEAT239(macro, data) MREPEAT238(macro, data) macro(238, data) +#define MREPEAT240(macro, data) MREPEAT239(macro, data) macro(239, data) +#define MREPEAT241(macro, data) MREPEAT240(macro, data) macro(240, data) +#define MREPEAT242(macro, data) MREPEAT241(macro, data) macro(241, data) +#define MREPEAT243(macro, data) MREPEAT242(macro, data) macro(242, data) +#define MREPEAT244(macro, data) MREPEAT243(macro, data) macro(243, data) +#define MREPEAT245(macro, data) MREPEAT244(macro, data) macro(244, data) +#define MREPEAT246(macro, data) MREPEAT245(macro, data) macro(245, data) +#define MREPEAT247(macro, data) MREPEAT246(macro, data) macro(246, data) +#define MREPEAT248(macro, data) MREPEAT247(macro, data) macro(247, data) +#define MREPEAT249(macro, data) MREPEAT248(macro, data) macro(248, data) +#define MREPEAT250(macro, data) MREPEAT249(macro, data) macro(249, data) +#define MREPEAT251(macro, data) MREPEAT250(macro, data) macro(250, data) +#define MREPEAT252(macro, data) MREPEAT251(macro, data) macro(251, data) +#define MREPEAT253(macro, data) MREPEAT252(macro, data) macro(252, data) +#define MREPEAT254(macro, data) MREPEAT253(macro, data) macro(253, data) +#define MREPEAT255(macro, data) MREPEAT254(macro, data) macro(254, data) +#define MREPEAT256(macro, data) MREPEAT255(macro, data) macro(255, data) + + +#endif // _MREPEAT_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/preprocessor.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/preprocessor.h new file mode 100644 index 0000000..5b996ba --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/preprocessor.h @@ -0,0 +1,55 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _PREPROCESSOR_H_ +#define _PREPROCESSOR_H_ + +#include "tpaste.h" +#include "stringz.h" +#include "mrepeat.h" + + +#endif // _PREPROCESSOR_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/stringz.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/stringz.h new file mode 100644 index 0000000..3528ea0 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/stringz.h @@ -0,0 +1,75 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor stringizing utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _STRINGZ_H_ +#define _STRINGZ_H_ + + +/*! \brief Stringize. + * + * Stringize a preprocessing token, this token being allowed to be \#defined. + * + * May be used only within macros with the token passed as an argument if the token is \#defined. + * + * For example, writing STRINGZ(PIN) within a macro \#defined by PIN_NAME(PIN) + * and invoked as PIN_NAME(PIN0) with PIN0 \#defined as A0 is equivalent to + * writing "A0". + */ +#define STRINGZ(x) #x + +/*! \brief Absolute stringize. + * + * Stringize a preprocessing token, this token being allowed to be \#defined. + * + * No restriction of use if the token is \#defined. + * + * For example, writing ASTRINGZ(PIN0) anywhere with PIN0 \#defined as A0 is + * equivalent to writing "A0". + */ +#define ASTRINGZ(x) STRINGZ(x) + + +#endif // _STRINGZ_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/tpaste.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/tpaste.h new file mode 100644 index 0000000..a5d7bee --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/tpaste.h @@ -0,0 +1,95 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor token pasting utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _TPASTE_H_ +#define _TPASTE_H_ + + +/*! \name Token Paste + * + * Paste N preprocessing tokens together, these tokens being allowed to be \#defined. + * + * May be used only within macros with the tokens passed as arguments if the tokens are \#defined. + * + * For example, writing TPASTE2(U, WIDTH) within a macro \#defined by + * UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is + * equivalent to writing U32. + */ +//! @{ +#define TPASTE2( a, b) a##b +#define TPASTE3( a, b, c) a##b##c +#define TPASTE4( a, b, c, d) a##b##c##d +#define TPASTE5( a, b, c, d, e) a##b##c##d##e +#define TPASTE6( a, b, c, d, e, f) a##b##c##d##e##f +#define TPASTE7( a, b, c, d, e, f, g) a##b##c##d##e##f##g +#define TPASTE8( a, b, c, d, e, f, g, h) a##b##c##d##e##f##g##h +#define TPASTE9( a, b, c, d, e, f, g, h, i) a##b##c##d##e##f##g##h##i +#define TPASTE10(a, b, c, d, e, f, g, h, i, j) a##b##c##d##e##f##g##h##i##j +//! @} + +/*! \name Absolute Token Paste + * + * Paste N preprocessing tokens together, these tokens being allowed to be \#defined. + * + * No restriction of use if the tokens are \#defined. + * + * For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined + * as 32 is equivalent to writing U32. + */ +//! @{ +#define ATPASTE2( a, b) TPASTE2( a, b) +#define ATPASTE3( a, b, c) TPASTE3( a, b, c) +#define ATPASTE4( a, b, c, d) TPASTE4( a, b, c, d) +#define ATPASTE5( a, b, c, d, e) TPASTE5( a, b, c, d, e) +#define ATPASTE6( a, b, c, d, e, f) TPASTE6( a, b, c, d, e, f) +#define ATPASTE7( a, b, c, d, e, f, g) TPASTE7( a, b, c, d, e, f, g) +#define ATPASTE8( a, b, c, d, e, f, g, h) TPASTE8( a, b, c, d, e, f, g, h) +#define ATPASTE9( a, b, c, d, e, f, g, h, i) TPASTE9( a, b, c, d, e, f, g, h, i) +#define ATPASTE10(a, b, c, d, e, f, g, h, i, j) TPASTE10(a, b, c, d, e, f, g, h, i, j) +//! @} + + +#endif // _TPASTE_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/STARTUP_FILES/GCC/crt0.x b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/STARTUP_FILES/GCC/crt0.x new file mode 100644 index 0000000..23b658b --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/STARTUP_FILES/GCC/crt0.x @@ -0,0 +1,121 @@ +/* This file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AVR32UC C runtime startup file. + * + * This file has been built from the Newlib crt0.S. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32UC devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include + + +//! @{ +//! \verbatim + + + // This must be linked @ 0x80000000 if it is to be run upon reset. + .section .reset, "ax", @progbits + + + .global _start + .type _start, @function +_start: + // Jump to the C runtime startup routine. + lda.w pc, _stext + + + // _stext is placed outside the .reset section so that the program entry point + // can be changed without affecting the C runtime startup. + .section .text._stext, "ax", @progbits + + + .global _stext + .type _stext, @function +_stext: + // Set initial stack pointer. + lda.w sp, _estack + + // Set up EVBA so interrupts can be enabled. + lda.w r0, _evba + mtsr AVR32_EVBA, r0 + + // Enable the exception processing. + csrf AVR32_SR_EM_OFFSET + + // Load initialized data having a global lifetime from the data LMA. + lda.w r0, _data + lda.w r1, _edata + cp r0, r1 + brhs idata_load_loop_end + lda.w r2, _data_lma +idata_load_loop: + ld.d r4, r2++ + st.d r0++, r4 + cp r0, r1 + brlo idata_load_loop +idata_load_loop_end: + + // Clear uninitialized data having a global lifetime in the blank static storage section. + lda.w r0, __bss_start + lda.w r1, _end + cp r0, r1 + brhs udata_clear_loop_end + mov r2, 0 + mov r3, 0 +udata_clear_loop: + st.d r0++, r2 + cp r0, r1 + brlo udata_clear_loop +udata_clear_loop_end: + +#ifdef CONFIG_FRAME_POINTER + // Safety: Set the default "return" @ to the exit routine address. + lda.w lr, exit +#endif + + // Start the show. + lda.w pc, main + + +//! \endverbatim +//! @} diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/compiler.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/compiler.h new file mode 100644 index 0000000..885be7f --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/compiler.h @@ -0,0 +1,1145 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Compiler file for AVR32. + * + * This file defines commonly used types and macros. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _COMPILER_H_ +#define _COMPILER_H_ + +#if ((defined __GNUC__) && (defined __AVR32__)) || (defined __ICCAVR32__ || defined __AAVR32__) +# include +#endif +#if (defined __ICCAVR32__) +# include +#endif +#include "preprocessor.h" + +#include "parts.h" + + +//_____ D E C L A R A T I O N S ____________________________________________ + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +#include +#include + + +#if (defined __ICCAVR32__) + +/*! \name Compiler Keywords + * + * Port of some keywords from GNU GCC for AVR32 to IAR Embedded Workbench for Atmel AVR32. + */ +//! @{ +#define __asm__ asm +#define __inline__ inline +#define __volatile__ +//! @} + +#endif + + +/*! \name Usual Types + */ +//! @{ +typedef unsigned char Bool; //!< Boolean. +#ifndef __cplusplus +#if !defined(__bool_true_false_are_defined) +typedef unsigned char bool; //!< Boolean. +#endif +#endif +typedef signed char S8 ; //!< 8-bit signed integer. +typedef unsigned char U8 ; //!< 8-bit unsigned integer. +typedef signed short int S16; //!< 16-bit signed integer. +typedef unsigned short int U16; //!< 16-bit unsigned integer. +typedef signed long int S32; //!< 32-bit signed integer. +typedef unsigned long int U32; //!< 32-bit unsigned integer. +typedef signed long long int S64; //!< 64-bit signed integer. +typedef unsigned long long int U64; //!< 64-bit unsigned integer. +typedef float F32; //!< 32-bit floating-point number. +typedef double F64; //!< 64-bit floating-point number. +//! @} + + +/*! \name Status Types + */ +//! @{ +typedef Bool Status_bool_t; //!< Boolean status. +typedef U8 Status_t; //!< 8-bit-coded status. +//! @} + + +/*! \name Aliasing Aggregate Types + */ +//! @{ + +//! 16-bit union. +typedef union +{ + S16 s16 ; + U16 u16 ; + S8 s8 [2]; + U8 u8 [2]; +} Union16; + +//! 32-bit union. +typedef union +{ + S32 s32 ; + U32 u32 ; + S16 s16[2]; + U16 u16[2]; + S8 s8 [4]; + U8 u8 [4]; +} Union32; + +//! 64-bit union. +typedef union +{ + S64 s64 ; + U64 u64 ; + S32 s32[2]; + U32 u32[2]; + S16 s16[4]; + U16 u16[4]; + S8 s8 [8]; + U8 u8 [8]; +} Union64; + +//! Union of pointers to 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + S64 *s64ptr; + U64 *u64ptr; + S32 *s32ptr; + U32 *u32ptr; + S16 *s16ptr; + U16 *u16ptr; + S8 *s8ptr ; + U8 *u8ptr ; +} UnionPtr; + +//! Union of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + volatile S64 *s64ptr; + volatile U64 *u64ptr; + volatile S32 *s32ptr; + volatile U32 *u32ptr; + volatile S16 *s16ptr; + volatile U16 *u16ptr; + volatile S8 *s8ptr ; + volatile U8 *u8ptr ; +} UnionVPtr; + +//! Union of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + const S64 *s64ptr; + const U64 *u64ptr; + const S32 *s32ptr; + const U32 *u32ptr; + const S16 *s16ptr; + const U16 *u16ptr; + const S8 *s8ptr ; + const U8 *u8ptr ; +} UnionCPtr; + +//! Union of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + const volatile S64 *s64ptr; + const volatile U64 *u64ptr; + const volatile S32 *s32ptr; + const volatile U32 *u32ptr; + const volatile S16 *s16ptr; + const volatile U16 *u16ptr; + const volatile S8 *s8ptr ; + const volatile U8 *u8ptr ; +} UnionCVPtr; + +//! Structure of pointers to 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + S64 *s64ptr; + U64 *u64ptr; + S32 *s32ptr; + U32 *u32ptr; + S16 *s16ptr; + U16 *u16ptr; + S8 *s8ptr ; + U8 *u8ptr ; +} StructPtr; + +//! Structure of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + volatile S64 *s64ptr; + volatile U64 *u64ptr; + volatile S32 *s32ptr; + volatile U32 *u32ptr; + volatile S16 *s16ptr; + volatile U16 *u16ptr; + volatile S8 *s8ptr ; + volatile U8 *u8ptr ; +} StructVPtr; + +//! Structure of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + const S64 *s64ptr; + const U64 *u64ptr; + const S32 *s32ptr; + const U32 *u32ptr; + const S16 *s16ptr; + const U16 *u16ptr; + const S8 *s8ptr ; + const U8 *u8ptr ; +} StructCPtr; + +//! Structure of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + const volatile S64 *s64ptr; + const volatile U64 *u64ptr; + const volatile S32 *s32ptr; + const volatile U32 *u32ptr; + const volatile S16 *s16ptr; + const volatile U16 *u16ptr; + const volatile S8 *s8ptr ; + const volatile U8 *u8ptr ; +} StructCVPtr; + +//! @} + +#endif // __AVR32_ABI_COMPILER__ + + +//_____ M A C R O S ________________________________________________________ + +/*! \name Usual Constants + */ +//! @{ +#define DISABLE 0 +#define ENABLE 1 +#define DISABLED 0 +#define ENABLED 1 +#define OFF 0 +#define ON 1 +#define FALSE 0 +#define TRUE 1 +#ifndef __cplusplus +#if !defined(__bool_true_false_are_defined) +#define false FALSE +#define true TRUE +#endif +#endif +#define KO 0 +#define OK 1 +#define PASS 0 +#define FAIL 1 +#define LOW 0 +#define HIGH 1 +#define CLR 0 +#define SET 1 +//! @} + + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +/*! \name Bit-Field Handling + */ +//! @{ + +/*! \brief Reads the bits of a value specified by a given bit-mask. + * + * \param value Value to read bits from. + * \param mask Bit-mask indicating bits to read. + * + * \return Read bits. + */ +#define Rd_bits( value, mask) ((value) & (mask)) + +/*! \brief Writes the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue to write bits to. + * \param mask Bit-mask indicating bits to write. + * \param bits Bits to write. + * + * \return Resulting value with written bits. + */ +#define Wr_bits(lvalue, mask, bits) ((lvalue) = ((lvalue) & ~(mask)) |\ + ((bits ) & (mask))) + +/*! \brief Tests the bits of a value specified by a given bit-mask. + * + * \param value Value of which to test bits. + * \param mask Bit-mask indicating bits to test. + * + * \return \c 1 if at least one of the tested bits is set, else \c 0. + */ +#define Tst_bits( value, mask) (Rd_bits(value, mask) != 0) + +/*! \brief Clears the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to clear bits. + * \param mask Bit-mask indicating bits to clear. + * + * \return Resulting value with cleared bits. + */ +#define Clr_bits(lvalue, mask) ((lvalue) &= ~(mask)) + +/*! \brief Sets the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to set bits. + * \param mask Bit-mask indicating bits to set. + * + * \return Resulting value with set bits. + */ +#define Set_bits(lvalue, mask) ((lvalue) |= (mask)) + +/*! \brief Toggles the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to toggle bits. + * \param mask Bit-mask indicating bits to toggle. + * + * \return Resulting value with toggled bits. + */ +#define Tgl_bits(lvalue, mask) ((lvalue) ^= (mask)) + +/*! \brief Reads the bit-field of a value specified by a given bit-mask. + * + * \param value Value to read a bit-field from. + * \param mask Bit-mask indicating the bit-field to read. + * + * \return Read bit-field. + */ +#define Rd_bitfield( value, mask) (Rd_bits( value, mask) >> ctz(mask)) + +/*! \brief Writes the bit-field of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue to write a bit-field to. + * \param mask Bit-mask indicating the bit-field to write. + * \param bitfield Bit-field to write. + * + * \return Resulting value with written bit-field. + */ +#define Wr_bitfield(lvalue, mask, bitfield) (Wr_bits(lvalue, mask, (U32)(bitfield) << ctz(mask))) + +//! @} + + +/*! \brief This macro is used to test fatal errors. + * + * The macro tests if the expression is FALSE. If it is, a fatal error is + * detected and the application hangs up. + * + * \param expr Expression to evaluate and supposed to be nonzero. + */ +#ifdef _ASSERT_ENABLE_ + #define Assert(expr) \ + {\ + if (!(expr)) while (TRUE);\ + } +#else + #define Assert(expr) +#endif + + +/*! \name Zero-Bit Counting + * + * Under AVR32-GCC, __builtin_clz and __builtin_ctz behave like macros when + * applied to constant expressions (values known at compile time), so they are + * more optimized than the use of the corresponding assembly instructions and + * they can be used as constant expressions e.g. to initialize objects having + * static storage duration, and like the corresponding assembly instructions + * when applied to non-constant expressions (values unknown at compile time), so + * they are more optimized than an assembly periphrasis. Hence, clz and ctz + * ensure a possible and optimized behavior for both constant and non-constant + * expressions. + */ +//! @{ + +/*! \brief Counts the leading zero bits of the given value considered as a 32-bit integer. + * + * \param u Value of which to count the leading zero bits. + * + * \return The count of leading zero bits in \a u. + */ +#if (defined __GNUC__) + #define clz(u) __builtin_clz(u) +#elif (defined __ICCAVR32__) + #define clz(u) __count_leading_zeros(u) +#endif + +/*! \brief Counts the trailing zero bits of the given value considered as a 32-bit integer. + * + * \param u Value of which to count the trailing zero bits. + * + * \return The count of trailing zero bits in \a u. + */ +#if (defined __GNUC__) + #define ctz(u) __builtin_ctz(u) +#elif (defined __ICCAVR32__) + #define ctz(u) __count_trailing_zeros(u) +#endif + +//! @} + + +/*! \name Bit Reversing + */ +//! @{ + +/*! \brief Reverses the bits of \a u8. + * + * \param u8 U8 of which to reverse the bits. + * + * \return Value resulting from \a u8 with reversed bits. + */ +#define bit_reverse8(u8) ((U8)(bit_reverse32((U8)(u8)) >> 24)) + +/*! \brief Reverses the bits of \a u16. + * + * \param u16 U16 of which to reverse the bits. + * + * \return Value resulting from \a u16 with reversed bits. + */ +#define bit_reverse16(u16) ((U16)(bit_reverse32((U16)(u16)) >> 16)) + +/*! \brief Reverses the bits of \a u32. + * + * \param u32 U32 of which to reverse the bits. + * + * \return Value resulting from \a u32 with reversed bits. + */ +#if (defined __GNUC__) + #define bit_reverse32(u32) \ + (\ + {\ + unsigned int __value = (U32)(u32);\ + __asm__ ("brev\t%0" : "+r" (__value) : : "cc");\ + (U32)__value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define bit_reverse32(u32) ((U32)__bit_reverse((U32)(u32))) +#endif + +/*! \brief Reverses the bits of \a u64. + * + * \param u64 U64 of which to reverse the bits. + * + * \return Value resulting from \a u64 with reversed bits. + */ +#define bit_reverse64(u64) ((U64)(((U64)bit_reverse32((U64)(u64) >> 32)) |\ + ((U64)bit_reverse32((U64)(u64)) << 32))) + +//! @} + + +/*! \name Alignment + */ +//! @{ + +/*! \brief Tests alignment of the number \a val with the \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return \c 1 if the number \a val is aligned with the \a n boundary, else \c 0. + */ +#define Test_align(val, n ) (!Tst_bits( val, (n) - 1 ) ) + +/*! \brief Gets alignment of the number \a val with respect to the \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Alignment of the number \a val with respect to the \a n boundary. + */ +#define Get_align( val, n ) ( Rd_bits( val, (n) - 1 ) ) + +/*! \brief Sets alignment of the lvalue number \a lval to \a alg with respect to the \a n boundary. + * + * \param lval Input/output lvalue. + * \param n Boundary. + * \param alg Alignment. + * + * \return New value of \a lval resulting from its alignment set to \a alg with respect to the \a n boundary. + */ +#define Set_align(lval, n, alg) ( Wr_bits(lval, (n) - 1, alg) ) + +/*! \brief Aligns the number \a val with the upper \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Value resulting from the number \a val aligned with the upper \a n boundary. + */ +#define Align_up( val, n ) (((val) + ((n) - 1)) & ~((n) - 1)) + +/*! \brief Aligns the number \a val with the lower \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Value resulting from the number \a val aligned with the lower \a n boundary. + */ +#define Align_down(val, n ) ( (val) & ~((n) - 1)) + +//! @} + + +/*! \name Mathematics + * + * The same considerations as for clz and ctz apply here but AVR32-GCC does not + * provide built-in functions to access the assembly instructions abs, min and + * max and it does not produce them by itself in most cases, so two sets of + * macros are defined here: + * - Abs, Min and Max to apply to constant expressions (values known at + * compile time); + * - abs, min and max to apply to non-constant expressions (values unknown at + * compile time). + */ +//! @{ + +/*! \brief Takes the absolute value of \a a. + * + * \param a Input value. + * + * \return Absolute value of \a a. + * + * \note More optimized if only used with values known at compile time. + */ +#define Abs(a) (((a) < 0 ) ? -(a) : (a)) + +/*! \brief Takes the minimal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Minimal value of \a a and \a b. + * + * \note More optimized if only used with values known at compile time. + */ +#define Min(a, b) (((a) < (b)) ? (a) : (b)) + +/*! \brief Takes the maximal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Maximal value of \a a and \a b. + * + * \note More optimized if only used with values known at compile time. + */ +#define Max(a, b) (((a) > (b)) ? (a) : (b)) + +/*! \brief Takes the absolute value of \a a. + * + * \param a Input value. + * + * \return Absolute value of \a a. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define abs(a) \ + (\ + {\ + int __value = (a);\ + __asm__ ("abs\t%0" : "+r" (__value) : : "cc");\ + __value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define abs(a) Abs(a) +#endif + +/*! \brief Takes the minimal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Minimal value of \a a and \a b. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define min(a, b) \ + (\ + {\ + int __value, __arg_a = (a), __arg_b = (b);\ + __asm__ ("min\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\ + __value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define min(a, b) __min(a, b) +#endif + +/*! \brief Takes the maximal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Maximal value of \a a and \a b. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define max(a, b) \ + (\ + {\ + int __value, __arg_a = (a), __arg_b = (b);\ + __asm__ ("max\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\ + __value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define max(a, b) __max(a, b) +#endif + +//! @} + + +/*! \brief Calls the routine at address \a addr. + * + * It generates a long call opcode. + * + * For example, `Long_call(0x80000000)' generates a software reset on a UC3 if + * it is invoked from the CPU supervisor mode. + * + * \param addr Address of the routine to call. + * + * \note It may be used as a long jump opcode in some special cases. + */ +#define Long_call(addr) ((*(void (*)(void))(addr))()) + +/*! \brief Resets the CPU by software. + * + * \warning It shall not be called from the CPU application mode. + */ +#if (defined __GNUC__) + #define Reset_CPU() \ + (\ + {\ + __asm__ __volatile__ (\ + "lddpc r9, 3f\n\t"\ + "mfsr r8, %[SR]\n\t"\ + "bfextu r8, r8, %[SR_M_OFFSET], %[SR_M_SIZE]\n\t"\ + "cp.w r8, 0b001\n\t"\ + "breq 0f\n\t"\ + "sub r8, pc, $ - 1f\n\t"\ + "pushm r8-r9\n\t"\ + "rete\n"\ + "0:\n\t"\ + "mtsr %[SR], r9\n"\ + "1:\n\t"\ + "mov r0, 0\n\t"\ + "mov r1, 0\n\t"\ + "mov r2, 0\n\t"\ + "mov r3, 0\n\t"\ + "mov r4, 0\n\t"\ + "mov r5, 0\n\t"\ + "mov r6, 0\n\t"\ + "mov r7, 0\n\t"\ + "mov r8, 0\n\t"\ + "mov r9, 0\n\t"\ + "mov r10, 0\n\t"\ + "mov r11, 0\n\t"\ + "mov r12, 0\n\t"\ + "mov sp, 0\n\t"\ + "stdsp sp[0], sp\n\t"\ + "ldmts sp, sp\n\t"\ + "mov lr, 0\n\t"\ + "lddpc pc, 2f\n\t"\ + ".balign 4\n"\ + "2:\n\t"\ + ".word _start\n"\ + "3:\n\t"\ + ".word %[RESET_SR]"\ + :\ + : [SR] "i" (AVR32_SR),\ + [SR_M_OFFSET] "i" (AVR32_SR_M_OFFSET),\ + [SR_M_SIZE] "i" (AVR32_SR_M_SIZE),\ + [RESET_SR] "i" (AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))\ + );\ + }\ + ) +#elif (defined __ICCAVR32__) + #define Reset_CPU() \ + {\ + extern void *volatile __program_start;\ + __asm__ __volatile__ (\ + "mov r7, LWRD(__program_start)\n\t"\ + "orh r7, HWRD(__program_start)\n\t"\ + "mov r9, LWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\ + "orh r9, HWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\ + "mfsr r8, "ASTRINGZ(AVR32_SR)"\n\t"\ + "bfextu r8, r8, "ASTRINGZ(AVR32_SR_M_OFFSET)", "ASTRINGZ(AVR32_SR_M_SIZE)"\n\t"\ + "cp.w r8, 001b\n\t"\ + "breq $ + 10\n\t"\ + "sub r8, pc, -12\n\t"\ + "pushm r8-r9\n\t"\ + "rete\n\t"\ + "mtsr "ASTRINGZ(AVR32_SR)", r9\n\t"\ + "mov r0, 0\n\t"\ + "mov r1, 0\n\t"\ + "mov r2, 0\n\t"\ + "mov r3, 0\n\t"\ + "mov r4, 0\n\t"\ + "mov r5, 0\n\t"\ + "mov r6, 0\n\t"\ + "st.w r0[4], r7\n\t"\ + "mov r7, 0\n\t"\ + "mov r8, 0\n\t"\ + "mov r9, 0\n\t"\ + "mov r10, 0\n\t"\ + "mov r11, 0\n\t"\ + "mov r12, 0\n\t"\ + "mov sp, 0\n\t"\ + "stdsp sp[0], sp\n\t"\ + "ldmts sp, sp\n\t"\ + "mov lr, 0\n\t"\ + "ld.w pc, lr[4]"\ + );\ + __program_start;\ + } +#endif + + +/*! \name System Register Access + */ +//! @{ + +/*! \brief Gets the value of the \a sysreg system register. + * + * \param sysreg Address of the system register of which to get the value. + * + * \return Value of the \a sysreg system register. + */ +#if (defined __GNUC__) + #define Get_system_register(sysreg) __builtin_mfsr(sysreg) +#elif (defined __ICCAVR32__) + #define Get_system_register(sysreg) __get_system_register(sysreg) +#endif + +/*! \brief Sets the value of the \a sysreg system register to \a value. + * + * \param sysreg Address of the system register of which to set the value. + * \param value Value to set the \a sysreg system register to. + */ +#if (defined __GNUC__) + #define Set_system_register(sysreg, value) __builtin_mtsr(sysreg, value) +#elif (defined __ICCAVR32__) + #define Set_system_register(sysreg, value) __set_system_register(sysreg, value) +#endif + +//! @} + + +/*! \name CPU Status Register Access + */ +//! @{ + +/*! \brief Tells whether exceptions are globally enabled. + * + * \return \c 1 if exceptions are globally enabled, else \c 0. + */ +#define Is_global_exception_enabled() (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_EM_MASK)) + +/*! \brief Disables exceptions globally. + */ +#if (defined __GNUC__) + #define Disable_global_exception() ({__asm__ __volatile__ ("ssrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));}) +#elif (defined __ICCAVR32__) + #define Disable_global_exception() (__set_status_flag(AVR32_SR_EM_OFFSET)) +#endif + +/*! \brief Enables exceptions globally. + */ +#if (defined __GNUC__) + #define Enable_global_exception() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));}) +#elif (defined __ICCAVR32__) + #define Enable_global_exception() (__clear_status_flag(AVR32_SR_EM_OFFSET)) +#endif + +/*! \brief Tells whether interrupts are globally enabled. + * + * \return \c 1 if interrupts are globally enabled, else \c 0. + */ +#define Is_global_interrupt_enabled() (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_GM_MASK)) + +/*! \brief Disables interrupts globally. + */ +#if (defined __GNUC__) + #define Disable_global_interrupt() ({__asm__ __volatile__ ("ssrf\t%0" : : "i" (AVR32_SR_GM_OFFSET));}) +#elif (defined __ICCAVR32__) + #define Disable_global_interrupt() (__disable_interrupt()) +#endif + +/*! \brief Enables interrupts globally. + */ +#if (defined __GNUC__) + #define Enable_global_interrupt() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_GM_OFFSET));}) +#elif (defined __ICCAVR32__) + #define Enable_global_interrupt() (__enable_interrupt()) +#endif + +/*! \brief Tells whether interrupt level \a int_level is enabled. + * + * \param int_level Interrupt level (0 to 3). + * + * \return \c 1 if interrupt level \a int_level is enabled, else \c 0. + */ +#define Is_interrupt_level_enabled(int_level) (!Tst_bits(Get_system_register(AVR32_SR), TPASTE3(AVR32_SR_I, int_level, M_MASK))) + +/*! \brief Disables interrupt level \a int_level. + * + * \param int_level Interrupt level to disable (0 to 3). + */ +#if (defined __GNUC__) + #define Disable_interrupt_level(int_level) ({__asm__ __volatile__ ("ssrf\t%0" : : "i" (TPASTE3(AVR32_SR_I, int_level, M_OFFSET)));}) +#elif (defined __ICCAVR32__) + #define Disable_interrupt_level(int_level) (__set_status_flag(TPASTE3(AVR32_SR_I, int_level, M_OFFSET))) +#endif + +/*! \brief Enables interrupt level \a int_level. + * + * \param int_level Interrupt level to enable (0 to 3). + */ +#if (defined __GNUC__) + #define Enable_interrupt_level(int_level) ({__asm__ __volatile__ ("csrf\t%0" : : "i" (TPASTE3(AVR32_SR_I, int_level, M_OFFSET)));}) +#elif (defined __ICCAVR32__) + #define Enable_interrupt_level(int_level) (__clear_status_flag(TPASTE3(AVR32_SR_I, int_level, M_OFFSET))) +#endif + +/*! \brief Protects subsequent code from interrupts. + */ +#define AVR32_ENTER_CRITICAL_REGION( ) \ + { \ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); \ + Disable_global_interrupt(); // Disable the appropriate interrupts. + +/*! \brief This macro must always be used in conjunction with AVR32_ENTER_CRITICAL_REGION + * so that interrupts are enabled again. + */ +#define AVR32_LEAVE_CRITICAL_REGION( ) \ + if (global_interrupt_enabled) Enable_global_interrupt(); \ + } + +//! @} + + +/*! \name Debug Register Access + */ +//! @{ + +/*! \brief Gets the value of the \a dbgreg debug register. + * + * \param dbgreg Address of the debug register of which to get the value. + * + * \return Value of the \a dbgreg debug register. + */ +#if (defined __GNUC__) + #define Get_debug_register(dbgreg) __builtin_mfdr(dbgreg) +#elif (defined __ICCAVR32__) + #define Get_debug_register(dbgreg) __get_debug_register(dbgreg) +#endif + +/*! \brief Sets the value of the \a dbgreg debug register to \a value. + * + * \param dbgreg Address of the debug register of which to set the value. + * \param value Value to set the \a dbgreg debug register to. + */ +#if (defined __GNUC__) + #define Set_debug_register(dbgreg, value) __builtin_mtdr(dbgreg, value) +#elif (defined __ICCAVR32__) + #define Set_debug_register(dbgreg, value) __set_debug_register(dbgreg, value) +#endif + +//! @} + +#endif // __AVR32_ABI_COMPILER__ + + +//! Boolean evaluating MCU little endianism. +#if ((defined __GNUC__) && (defined __AVR32__)) || ((defined __ICCAVR32__) || (defined __AAVR32__)) + #define LITTLE_ENDIAN_MCU FALSE +#else + #error If you are here, you should check what is exactly the processor you are using... + #define LITTLE_ENDIAN_MCU FALSE +#endif + +// Check that MCU endianism is correctly defined. +#ifndef LITTLE_ENDIAN_MCU + #error YOU MUST define the MCU endianism with LITTLE_ENDIAN_MCU: either FALSE or TRUE +#endif + +//! Boolean evaluating MCU big endianism. +#define BIG_ENDIAN_MCU (!LITTLE_ENDIAN_MCU) + + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +/*! \name MCU Endianism Handling + */ +//! @{ + +#if (LITTLE_ENDIAN_MCU==TRUE) + #define LSB(u16) (((U8 *)&(u16))[0]) //!< Least significant byte of \a u16. + #define MSB(u16) (((U8 *)&(u16))[1]) //!< Most significant byte of \a u16. + + #define LSH(u32) (((U16 *)&(u32))[0]) //!< Least significant half-word of \a u32. + #define MSH(u32) (((U16 *)&(u32))[1]) //!< Most significant half-word of \a u32. + #define LSB0W(u32) (((U8 *)&(u32))[0]) //!< Least significant byte of 1st rank of \a u32. + #define LSB1W(u32) (((U8 *)&(u32))[1]) //!< Least significant byte of 2nd rank of \a u32. + #define LSB2W(u32) (((U8 *)&(u32))[2]) //!< Least significant byte of 3rd rank of \a u32. + #define LSB3W(u32) (((U8 *)&(u32))[3]) //!< Least significant byte of 4th rank of \a u32. + #define MSB3W(u32) LSB0W(u32) //!< Most significant byte of 4th rank of \a u32. + #define MSB2W(u32) LSB1W(u32) //!< Most significant byte of 3rd rank of \a u32. + #define MSB1W(u32) LSB2W(u32) //!< Most significant byte of 2nd rank of \a u32. + #define MSB0W(u32) LSB3W(u32) //!< Most significant byte of 1st rank of \a u32. + + #define LSW(u64) (((U32 *)&(u64))[0]) //!< Least significant word of \a u64. + #define MSW(u64) (((U32 *)&(u64))[1]) //!< Most significant word of \a u64. + #define LSH0(u64) (((U16 *)&(u64))[0]) //!< Least significant half-word of 1st rank of \a u64. + #define LSH1(u64) (((U16 *)&(u64))[1]) //!< Least significant half-word of 2nd rank of \a u64. + #define LSH2(u64) (((U16 *)&(u64))[2]) //!< Least significant half-word of 3rd rank of \a u64. + #define LSH3(u64) (((U16 *)&(u64))[3]) //!< Least significant half-word of 4th rank of \a u64. + #define MSH3(u64) LSH0(u64) //!< Most significant half-word of 4th rank of \a u64. + #define MSH2(u64) LSH1(u64) //!< Most significant half-word of 3rd rank of \a u64. + #define MSH1(u64) LSH2(u64) //!< Most significant half-word of 2nd rank of \a u64. + #define MSH0(u64) LSH3(u64) //!< Most significant half-word of 1st rank of \a u64. + #define LSB0D(u64) (((U8 *)&(u64))[0]) //!< Least significant byte of 1st rank of \a u64. + #define LSB1D(u64) (((U8 *)&(u64))[1]) //!< Least significant byte of 2nd rank of \a u64. + #define LSB2D(u64) (((U8 *)&(u64))[2]) //!< Least significant byte of 3rd rank of \a u64. + #define LSB3D(u64) (((U8 *)&(u64))[3]) //!< Least significant byte of 4th rank of \a u64. + #define LSB4D(u64) (((U8 *)&(u64))[4]) //!< Least significant byte of 5th rank of \a u64. + #define LSB5D(u64) (((U8 *)&(u64))[5]) //!< Least significant byte of 6th rank of \a u64. + #define LSB6D(u64) (((U8 *)&(u64))[6]) //!< Least significant byte of 7th rank of \a u64. + #define LSB7D(u64) (((U8 *)&(u64))[7]) //!< Least significant byte of 8th rank of \a u64. + #define MSB7D(u64) LSB0D(u64) //!< Most significant byte of 8th rank of \a u64. + #define MSB6D(u64) LSB1D(u64) //!< Most significant byte of 7th rank of \a u64. + #define MSB5D(u64) LSB2D(u64) //!< Most significant byte of 6th rank of \a u64. + #define MSB4D(u64) LSB3D(u64) //!< Most significant byte of 5th rank of \a u64. + #define MSB3D(u64) LSB4D(u64) //!< Most significant byte of 4th rank of \a u64. + #define MSB2D(u64) LSB5D(u64) //!< Most significant byte of 3rd rank of \a u64. + #define MSB1D(u64) LSB6D(u64) //!< Most significant byte of 2nd rank of \a u64. + #define MSB0D(u64) LSB7D(u64) //!< Most significant byte of 1st rank of \a u64. + +#elif (BIG_ENDIAN_MCU==TRUE) + #define MSB(u16) (((U8 *)&(u16))[0]) //!< Most significant byte of \a u16. + #define LSB(u16) (((U8 *)&(u16))[1]) //!< Least significant byte of \a u16. + + #define MSH(u32) (((U16 *)&(u32))[0]) //!< Most significant half-word of \a u32. + #define LSH(u32) (((U16 *)&(u32))[1]) //!< Least significant half-word of \a u32. + #define MSB0W(u32) (((U8 *)&(u32))[0]) //!< Most significant byte of 1st rank of \a u32. + #define MSB1W(u32) (((U8 *)&(u32))[1]) //!< Most significant byte of 2nd rank of \a u32. + #define MSB2W(u32) (((U8 *)&(u32))[2]) //!< Most significant byte of 3rd rank of \a u32. + #define MSB3W(u32) (((U8 *)&(u32))[3]) //!< Most significant byte of 4th rank of \a u32. + #define LSB3W(u32) MSB0W(u32) //!< Least significant byte of 4th rank of \a u32. + #define LSB2W(u32) MSB1W(u32) //!< Least significant byte of 3rd rank of \a u32. + #define LSB1W(u32) MSB2W(u32) //!< Least significant byte of 2nd rank of \a u32. + #define LSB0W(u32) MSB3W(u32) //!< Least significant byte of 1st rank of \a u32. + + #define MSW(u64) (((U32 *)&(u64))[0]) //!< Most significant word of \a u64. + #define LSW(u64) (((U32 *)&(u64))[1]) //!< Least significant word of \a u64. + #define MSH0(u64) (((U16 *)&(u64))[0]) //!< Most significant half-word of 1st rank of \a u64. + #define MSH1(u64) (((U16 *)&(u64))[1]) //!< Most significant half-word of 2nd rank of \a u64. + #define MSH2(u64) (((U16 *)&(u64))[2]) //!< Most significant half-word of 3rd rank of \a u64. + #define MSH3(u64) (((U16 *)&(u64))[3]) //!< Most significant half-word of 4th rank of \a u64. + #define LSH3(u64) MSH0(u64) //!< Least significant half-word of 4th rank of \a u64. + #define LSH2(u64) MSH1(u64) //!< Least significant half-word of 3rd rank of \a u64. + #define LSH1(u64) MSH2(u64) //!< Least significant half-word of 2nd rank of \a u64. + #define LSH0(u64) MSH3(u64) //!< Least significant half-word of 1st rank of \a u64. + #define MSB0D(u64) (((U8 *)&(u64))[0]) //!< Most significant byte of 1st rank of \a u64. + #define MSB1D(u64) (((U8 *)&(u64))[1]) //!< Most significant byte of 2nd rank of \a u64. + #define MSB2D(u64) (((U8 *)&(u64))[2]) //!< Most significant byte of 3rd rank of \a u64. + #define MSB3D(u64) (((U8 *)&(u64))[3]) //!< Most significant byte of 4th rank of \a u64. + #define MSB4D(u64) (((U8 *)&(u64))[4]) //!< Most significant byte of 5th rank of \a u64. + #define MSB5D(u64) (((U8 *)&(u64))[5]) //!< Most significant byte of 6th rank of \a u64. + #define MSB6D(u64) (((U8 *)&(u64))[6]) //!< Most significant byte of 7th rank of \a u64. + #define MSB7D(u64) (((U8 *)&(u64))[7]) //!< Most significant byte of 8th rank of \a u64. + #define LSB7D(u64) MSB0D(u64) //!< Least significant byte of 8th rank of \a u64. + #define LSB6D(u64) MSB1D(u64) //!< Least significant byte of 7th rank of \a u64. + #define LSB5D(u64) MSB2D(u64) //!< Least significant byte of 6th rank of \a u64. + #define LSB4D(u64) MSB3D(u64) //!< Least significant byte of 5th rank of \a u64. + #define LSB3D(u64) MSB4D(u64) //!< Least significant byte of 4th rank of \a u64. + #define LSB2D(u64) MSB5D(u64) //!< Least significant byte of 3rd rank of \a u64. + #define LSB1D(u64) MSB6D(u64) //!< Least significant byte of 2nd rank of \a u64. + #define LSB0D(u64) MSB7D(u64) //!< Least significant byte of 1st rank of \a u64. + +#else + #error Unknown endianism. +#endif + +//! @} + + +/*! \name Endianism Conversion + * + * The same considerations as for clz and ctz apply here but AVR32-GCC's + * __builtin_bswap_16 and __builtin_bswap_32 do not behave like macros when + * applied to constant expressions, so two sets of macros are defined here: + * - Swap16, Swap32 and Swap64 to apply to constant expressions (values known + * at compile time); + * - swap16, swap32 and swap64 to apply to non-constant expressions (values + * unknown at compile time). + */ +//! @{ + +/*! \brief Toggles the endianism of \a u16 (by swapping its bytes). + * + * \param u16 U16 of which to toggle the endianism. + * + * \return Value resulting from \a u16 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap16(u16) ((U16)(((U16)(u16) >> 8) |\ + ((U16)(u16) << 8))) + +/*! \brief Toggles the endianism of \a u32 (by swapping its bytes). + * + * \param u32 U32 of which to toggle the endianism. + * + * \return Value resulting from \a u32 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap32(u32) ((U32)(((U32)Swap16((U32)(u32) >> 16)) |\ + ((U32)Swap16((U32)(u32)) << 16))) + +/*! \brief Toggles the endianism of \a u64 (by swapping its bytes). + * + * \param u64 U64 of which to toggle the endianism. + * + * \return Value resulting from \a u64 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap64(u64) ((U64)(((U64)Swap32((U64)(u64) >> 32)) |\ + ((U64)Swap32((U64)(u64)) << 32))) + +/*! \brief Toggles the endianism of \a u16 (by swapping its bytes). + * + * \param u16 U16 of which to toggle the endianism. + * + * \return Value resulting from \a u16 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define swap16(u16) ((U16)__builtin_bswap_16((U16)(u16))) +#elif (defined __ICCAVR32__) + #define swap16(u16) ((U16)__swap_bytes_in_halfwords((U16)(u16))) +#endif + +/*! \brief Toggles the endianism of \a u32 (by swapping its bytes). + * + * \param u32 U32 of which to toggle the endianism. + * + * \return Value resulting from \a u32 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define swap32(u32) ((U32)__builtin_bswap_32((U32)(u32))) +#elif (defined __ICCAVR32__) + #define swap32(u32) ((U32)__swap_bytes((U32)(u32))) +#endif + +/*! \brief Toggles the endianism of \a u64 (by swapping its bytes). + * + * \param u64 U64 of which to toggle the endianism. + * + * \return Value resulting from \a u64 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#define swap64(u64) ((U64)(((U64)swap32((U64)(u64) >> 32)) |\ + ((U64)swap32((U64)(u64)) << 32))) + +//! @} + + +/*! \name Target Abstraction + */ +//! @{ + +#define _GLOBEXT_ extern //!< extern storage-class specifier. +#define _CONST_TYPE_ const //!< const type qualifier. +#define _MEM_TYPE_SLOW_ //!< Slow memory type. +#define _MEM_TYPE_MEDFAST_ //!< Fairly fast memory type. +#define _MEM_TYPE_FAST_ //!< Fast memory type. + +typedef U8 Byte; //!< 8-bit unsigned integer. + +#define memcmp_ram2ram memcmp //!< Target-specific memcmp of RAM to RAM. +#define memcmp_code2ram memcmp //!< Target-specific memcmp of RAM to NVRAM. +#define memcpy_ram2ram memcpy //!< Target-specific memcpy from RAM to RAM. +#define memcpy_code2ram memcpy //!< Target-specific memcpy from NVRAM to RAM. + +#define LSB0(u32) LSB0W(u32) //!< Least significant byte of 1st rank of \a u32. +#define LSB1(u32) LSB1W(u32) //!< Least significant byte of 2nd rank of \a u32. +#define LSB2(u32) LSB2W(u32) //!< Least significant byte of 3rd rank of \a u32. +#define LSB3(u32) LSB3W(u32) //!< Least significant byte of 4th rank of \a u32. +#define MSB3(u32) MSB3W(u32) //!< Most significant byte of 4th rank of \a u32. +#define MSB2(u32) MSB2W(u32) //!< Most significant byte of 3rd rank of \a u32. +#define MSB1(u32) MSB1W(u32) //!< Most significant byte of 2nd rank of \a u32. +#define MSB0(u32) MSB0W(u32) //!< Most significant byte of 1st rank of \a u32. + +//! @} + +#endif // __AVR32_ABI_COMPILER__ + + +#endif // _COMPILER_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/conf_isp.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/conf_isp.h new file mode 100644 index 0000000..ca516ee --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/conf_isp.h @@ -0,0 +1,136 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ****************************************************************** + * + * \brief ISP configuration file. + * + * This file contains the possible external configuration of the ISP. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USB module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ***************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_ISP_H_ +#define _CONF_ISP_H_ + +#include +#include "compiler.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +#define PRODUCT_MANUFACTURER_ID 0x58 +#define PRODUCT_FAMILY_ID 0x20 + +#define ISP_VERSION 0x10 +#define ISP_ID0 0x00 +#define ISP_ID1 0x00 + +#define ISP_CFG1 (*(volatile U32 *)ISP_CFG1_ADDRESS) +#define ISP_CFG1_ADDRESS (AVR32_FLASHC_USER_PAGE_ADDRESS + ISP_CFG1_OFFSET) +#define ISP_CFG1_OFFSET 0x000001FC +#define ISP_CFG1_SIZE 4 + +#define ISP_CFG1_BOOT_KEY1 16 +#define ISP_CFG1_BOOT_KEY1_MASK 0xFFFF0000 +#define ISP_CFG1_BOOT_KEY1_OFFSET 16 +#define ISP_CFG1_BOOT_KEY1_SIZE 16 +#define ISP_CFG1_BOOT_KEY1_VALUE 0xE11E + +#define ISP_CFG1_FORCE 9 +#define ISP_CFG1_FORCE_MASK 0x00000200 +#define ISP_CFG1_FORCE_OFFSET 9 +#define ISP_CFG1_FORCE_SIZE 1 + +#define ISP_CFG1_IO_COND_EN 8 +#define ISP_CFG1_IO_COND_EN_MASK 0x00000100 +#define ISP_CFG1_IO_COND_EN_OFFSET 8 +#define ISP_CFG1_IO_COND_EN_SIZE 1 + +#define ISP_CFG1_CRC8 0 +#define ISP_CFG1_CRC8_MASK 0x000000FF +#define ISP_CFG1_CRC8_OFFSET 0 +#define ISP_CFG1_CRC8_SIZE 8 +#define ISP_CFG1_CRC8_POLYNOMIAL 0x107 + +#define ISP_CFG2 (*(volatile U32 *)ISP_CFG2_ADDRESS) +#define ISP_CFG2_ADDRESS (AVR32_FLASHC_USER_PAGE_ADDRESS + ISP_CFG2_OFFSET) +#define ISP_CFG2_OFFSET 0x000001F8 +#define ISP_CFG2_SIZE 4 + +#define ISP_CFG2_BOOT_KEY 17 +#define ISP_CFG2_BOOT_KEY_MASK 0xFFFE0000 +#define ISP_CFG2_BOOT_KEY_OFFSET 17 +#define ISP_CFG2_BOOT_KEY_SIZE 15 +#define ISP_CFG2_BOOT_KEY_VALUE 0x494F + +#define ISP_CFG2_IO_COND_LEVEL 16 +#define ISP_CFG2_IO_COND_LEVEL_MASK 0x00010000 +#define ISP_CFG2_IO_COND_LEVEL_OFFSET 16 +#define ISP_CFG2_IO_COND_LEVEL_SIZE 1 + +#define ISP_CFG2_IO_COND_PIN 8 +#define ISP_CFG2_IO_COND_PIN_MASK 0x0000FF00 +#define ISP_CFG2_IO_COND_PIN_OFFSET 8 +#define ISP_CFG2_IO_COND_PIN_SIZE 8 + +#define ISP_CFG2_CRC8 0 +#define ISP_CFG2_CRC8_MASK 0x000000FF +#define ISP_CFG2_CRC8_OFFSET 0 +#define ISP_CFG2_CRC8_SIZE 8 +#define ISP_CFG2_CRC8_POLYNOMIAL 0x107 + +#define ISP_KEY (*(volatile U32 *)ISP_KEY_ADDRESS) +#define ISP_KEY_ADDRESS (AVR32_SRAM_ADDRESS + ISP_KEY_OFFSET) +#define ISP_KEY_OFFSET 0x00000000 +#define ISP_KEY_SIZE 4 +#define ISP_KEY_VALUE ('I' << 24 | 'S' << 16 | 'P' << 8 | 'K') + +#ifndef ISP_OSC + #define ISP_OSC 0 +#endif + +#define DFU_FRAME_LENGTH 2048 + +#define PROGRAM_START_ADDRESS (AVR32_FLASH_ADDRESS + PROGRAM_START_OFFSET) +#define PROGRAM_START_OFFSET 0x00002000 + + +#endif // _CONF_ISP_H_ diff --git a/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/parts.h b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/parts.h new file mode 100644 index 0000000..6637b2f --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/UTILS/parts.h @@ -0,0 +1,203 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Arch file for AVR32. + * + * This file defines common AVR32 UC3 series. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _ARCH_H_ +#define _ARCH_H_ + +// UC3 A Series +#define UC3A0 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A0128__) || \ + defined (__AVR32_UC3A0256__) || \ + defined (__AVR32_UC3A0512__) || \ + defined (__AVR32_UC3A0512ES__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A0128__) || \ + defined (__AT32UC3A0256__) || \ + defined (__AT32UC3A0512__) || \ + defined (__AT32UC3A0512ES__))) + +#define UC3A1 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A1128__) || \ + defined (__AVR32_UC3A1256__) || \ + defined (__AVR32_UC3A1512__) || \ + defined (__AVR32_UC3A1512ES__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A1128__) || \ + defined (__AT32UC3A1256__) || \ + defined (__AT32UC3A1512__) || \ + defined (__AT32UC3A1512ES__))) + +#define UC3A3 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A364__) || \ + defined (__AVR32_UC3A364S__) || \ + defined (__AVR32_UC3A3128__) || \ + defined (__AVR32_UC3A3128S__) || \ + defined (__AVR32_UC3A3256__) || \ + defined (__AVR32_UC3A3256S__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A364__) || \ + defined (__AT32UC3A364S__) || \ + defined (__AT32UC3A3128__) || \ + defined (__AT32UC3A3128S__) || \ + defined (__AT32UC3A3256__) || \ + defined (__AT32UC3A3256S__))) + +#define UC3A (UC3A0 || UC3A1 || UC3A3) + +// UC3 B Series +#define UC3B0 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3B064__) || \ + defined (__AVR32_UC3B0128__) || \ + defined (__AVR32_UC3B0256__) || \ + defined (__AVR32_UC3B0256ES__) || \ + defined (__AVR32_UC3B0512__) || \ + defined (__AVR32_UC3B0512REVC_))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3B064__) || \ + defined (__AT32UC3B0128__) || \ + defined (__AT32UC3B0256__) || \ + defined (__AT32UC3B0256ES__) || \ + defined (__AT32UC3B0512__) || \ + defined (__AT32UC3B0512REVC__))) + +#define UC3B1 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3B164__) || \ + defined (__AVR32_UC3B1128__) || \ + defined (__AVR32_UC3B1256__) || \ + defined (__AVR32_UC3B1256ES__) || \ + defined (__AVR32_UC3B1512__) || \ + defined (__AVR32_UC3B1512ES__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3B164__) || \ + defined (__AT32UC3B1128__) || \ + defined (__AT32UC3B1256__) || \ + defined (__AT32UC3B1256ES__) || \ + defined (__AT32UC3B1512__) || \ + defined (__AT32UC3B1512REVC__))) + +#define UC3B (UC3B0 || UC3B1 ) + +// UC3 C Series +#define UC3C0 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C064C__) || \ + defined (__AVR32_UC3C0128C__) || \ + defined (__AVR32_UC3C0256C__) || \ + defined (__AVR32_UC3C0512CREVC__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C064C__) || \ + defined (__AT32UC3C0128C__) || \ + defined (__AT32UC3C0256C__) || \ + defined (__AT32UC3C0512C__))) + +#define UC3C1 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C164C__) || \ + defined (__AVR32_UC3C1128C__) || \ + defined (__AVR32_UC3C1256C__) || \ + defined (__AVR32_UC3C1512CREVC__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C164C__) || \ + defined (__AT32UC3C1128C__) || \ + defined (__AT32UC3C1256C__) || \ + defined (__AT32UC3C1512C__))) + +#define UC3C2 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C264C__) || \ + defined (__AVR32_UC3C2128C__) || \ + defined (__AVR32_UC3C2256C__) || \ + defined (__AVR32_UC3C2512CREVC__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C264C__) || \ + defined (__AT32UC3C2128C__) || \ + defined (__AT32UC3C2256C__) || \ + defined (__AT32UC3C2512C__))) + +#define UC3C (UC3C0 || UC3C1 || UC3C2) + +// UC3 L Device series +#define UC3L0 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3L016__) || \ + defined (__AVR32_UC3L032__) || \ + defined (__AVR32_UC3L064__) || \ + defined (__AVR32_UC3L064REVB__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3L016__) || \ + defined (__AT32UC3L032__) || \ + defined (__AT32UC3L064__) || \ + defined (__AT32UC3L064REVB__))) + +#define UC3L1 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3L116__) || \ + defined (__AVR32_UC3L132__) || \ + defined (__AVR32_UC3L164__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3L116__) || \ + defined (__AT32UC3L132__) || \ + defined (__AT32UC3L164__))) + +#define UC3L2 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3L216__) || \ + defined (__AVR32_UC3L232__) || \ + defined (__AVR32_UC3L264__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3L216__) || \ + defined (__AT32UC3L232__) || \ + defined (__AT32UC3L264__))) + +#define UC3L3 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3L316__) || \ + defined (__AVR32_UC3L332__) || \ + defined (__AVR32_UC3L364__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3L316__) || \ + defined (__AT32UC3L332__) || \ + defined (__AT32UC3L364__))) + +#define UC3L (UC3L0 || UC3L1 || UC3L2 || UC3L3) + +#endif // _ARCH_H_ diff --git a/firmwares/wifishield/wifiHD/src/ard_spi.c b/firmwares/wifishield/wifiHD/src/ard_spi.c new file mode 100644 index 0000000..a5ef895 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/ard_spi.c @@ -0,0 +1,1750 @@ +/* + * ard_spi.c + * + * Created on: May 27, 2010 + * Author: mlf by Metodo2 srl + */ + +//#define _APP_DEBUG_ + +#include +#include "board.h" +#include "gpio.h" +#include "usart.h" +#include "ard_spi.h" +#include "ard_tcp.h" +#include "wifi_spi.h" +#include "wl_cm.h" +#include "ard_utils.h" +#include "intc.h" +#include "spi.h" +#include "debug.h" +#include "delay.h" +#include "eic.h" +#include "timer.h" +#include "lwip/dns.h" +#include + +extern const char* fwVersion; + +/*! \name USART Settings + */ +//! @{ +#if BOARD == EVK1105 +# define ARD_USART_SPI (&AVR32_USART1) +# define ARD_USART_SPI_SCK_PIN AVR32_USART1_CLK_0_PIN +# define ARD_USART_SPI_SCK_FUNCTION AVR32_USART1_CLK_0_FUNCTION +# define ARD_USART_SPI_MISO_PIN AVR32_USART1_TXD_0_0_PIN +# define ARD_USART_SPI_MISO_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION +# define ARD_USART_SPI_MOSI_PIN AVR32_USART1_RXD_0_0_PIN +# define ARD_USART_SPI_MOSI_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION +# define ARD_USART_SPI_NSS_PIN AVR32_USART1_CTS_0_0_PIN +# define ARD_USART_SPI_NSS_FUNCTION AVR32_USART1_CTS_0_0_FUNCTION +# define ARD_USART_SPI_IRQ AVR32_USART1_IRQ +#endif +#if BOARD == ARDUINO +# define ARD_SPI (&AVR32_SPI0) +#define EXT_INT_PIN_LINE1 AVR32_EIC_EXTINT_5_PIN +#define EXT_INT_FUNCTION_LINE1 AVR32_EIC_EXTINT_5_FUNCTION +#define EXT_INT_LINE1 EXT_INT5 +#define EXT_INT_IRQ_LINE1 AVR32_EIC_IRQ_5 +#define EXT_INT_NB_LINES 1 +#endif + +/* These defines should be adjusted to match the application */ +/*! \brief CPU core speed in Hz */ +#define CPUHZ 60000000 +/*! \brief Number of bytes in the receive buffer when operating in slave mode */ +#define BUFFERSIZE 64 +/*! \brief A adjustable delay avoiding multiple requests on the switches */ +//#define TIMEOUT 150000 +#define TIMEOUT CPUHZ/200 +/*! \brief Number of bits in each SPI package*/ +#define SPI_BITS 8 +/*! \brief SPI slave speed in Hz */ +#define SPI_SLAVE_SPEED 1000000 + + +#ifndef CMD_MAX_LEN +#define CMD_MAX_LEN 1024 +#endif +#ifndef REPLY_MAX_LEN +#define REPLY_MAX_LEN 1024 +#endif + +#define _BUFFERSIZE 100 + +extern void tcp_debug_print_pcbs(void); +extern bool ifStatus; +extern bool scanNetCompleted; + +static char buf[CMD_MAX_LEN]; +static char reply[REPLY_MAX_LEN]; +static uint16_t cmdCorr = 0; +static uint16_t count = 0; +static uint16_t replyCount = 0; +static cmd_spi_state_t state = SPI_CMD_IDLE; +int receivedChars = 0; +static uint8_t _receiveBuffer[_BUFFERSIZE]; +bool startReply = false; +bool end_write = false; //TODO only for debug + +// Signal indicating a new command is coming from SPI interface +static volatile Bool startRecvCmdSignal = FALSE; + +#define MAX_CMD_NUM 30 +typedef struct sCmd_spi_list{ + cmd_spi_cb_t cb; + char cmd_id; + cmd_spi_rcb_t reply_cb; + void* ctx; + char flags; +}tCmd_spi_list; + +static tCmd_spi_list cmd_spi_list[MAX_CMD_NUM] = { {0} }; + +#ifdef _SPI_STATS_ +typedef struct sStatSpi +{ + int timeoutIntErr; + int timeoutErr; + int txErr; + int rxErr; + int wrongFrame; + int frameDisalign; + int overrideFrame; + int lastCmd; + int lastError; + unsigned long status; +}tStatSpi; + +tStatSpi statSpi = {0}; + +void initStatSpi() +{ + statSpi.lastCmd = 0; + statSpi.lastError = 0; + statSpi.status= 0; + statSpi.txErr = 0; + statSpi.rxErr = 0; + statSpi.timeoutErr= 0; + statSpi.timeoutIntErr= 0; + statSpi.wrongFrame = 0; + statSpi.frameDisalign = 0; + statSpi.overrideFrame = 0; +} + +void printStatSpi() +{ + printk("lastCmd \t: 0x%x\n", statSpi.lastCmd); + printk("lastErr \t: 0x%x\n", statSpi.lastError); + printk("spiStatus\t: 0x%X\n", statSpi.status); + printk("spiTxErr \t: 0x%x\n", statSpi.txErr); + printk("spiRxErr \t: 0x%x\n", statSpi.rxErr); + printk("spiTmoErr\t: 0x%x\n", statSpi.timeoutErr); + printk("spiTmoIntErr\t: 0x%x\n", statSpi.timeoutIntErr); + printk("wrongFrame\t: 0x%x\n", statSpi.wrongFrame); + printk("disalFrame\t: 0x%x\n", statSpi.frameDisalign); + printk("overrideFrame\t: 0x%x\n", statSpi.overrideFrame); +} + +cmd_state_t +cmd_statSpi(int argc, char* argv[], void* ctx) +{ + printStatSpi(); + return CMD_DONE; +} + +cmd_state_t +cmd_resetStatSpi(int argc, char* argv[], void* ctx) +{ + initStatSpi(); + return CMD_DONE; +} +#endif + +#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0]) +#define RETURN_ERR(e) return (e==WL_SUCCESS) ? WIFI_SPI_ACK : WIFI_SPI_ERR; +#define RESET_USART_CSR(usart) usart->cr = AVR32_USART_CR_RSTSTA_MASK; + +int result = WL_CONNECT_FAILED; //Store the result of the last operation + +void* mapSockTCP[MAX_SOCK_NUM]; + +struct netif* ard_netif = NULL; + +// Network list retrived in the last scanNetwork +static struct wl_network_list_t network_list = { 0 }; + +struct ip_addr _hostIpAddr; + +static bool hostIpAddrFound = false; + +void* getTTCP(uint8_t sock) +{ + if (sock < MAX_SOCK_NUM) + return mapSockTCP[sock]; + return NULL; +} + +int getSock(void * _ttcp) +{ + if (_ttcp != NULL) + { + int i = 0; + for (; istart_time; + uint32_t bytes = ttcp->mode == TTCP_MODE_TRANSMIT ? ttcp->nbuf + * ttcp->buflen : ttcp->recved; + + if (ttcp->verbose) + printk("\n"); + + printk("TTCP [%p]: %d bytes processed, %d.%d KB/s (%s/%s)\n", ttcp, bytes, + bytes / ms, bytes % ms, ttcp->udp ? "udp" : "tcp", ttcp->mode + == TTCP_MODE_TRANSMIT ? "tx" : "rx"); +} + + +void showTTCPstatus() +{ + printk("IF status: %s\n", (ifStatus) ? "UP":"DOWN"); + printk("CONN status: %s\n", (_connected) ? "UP":"DOWN"); + + int i = 0; + for (; iaddr, _ttcp->port); + if (_ttcp->tpcb){ + printk("[tpcp-%p]-Status:%d\n", _ttcp->tpcb, _ttcp->tpcb->state); + } + if (_ttcp->lpcb){ + printk("[tlcp-%p]-Status:%d\n", _ttcp->lpcb, _ttcp->lpcb->state); + } + ard_tcp_print_stats(_ttcp); + } + } + + tcp_debug_print_pcbs(); +} + +int write_stream(volatile avr32_spi_t *spi, const char *stream, uint16_t len) +{ + uint16_t _len = 0; + unsigned short dummy=0; + bool streamExit = false; + + do { + if (*stream == END_CMD) + streamExit = true; + + //SIGN1_DN(); + if (spi_write(spi, *stream) == SPI_ERROR_TIMEOUT) + { +#ifdef _SPI_STATS_ + statSpi.timeoutErr++; + statSpi.txErr++; + statSpi.lastError = SPI_ERROR_TIMEOUT; + statSpi.status = spi_getStatus(spi); +#endif + return SPI_ERROR_TIMEOUT; + } + else + { + stream++; + _len++; + spi_read(spi,&dummy); + } + //SIGN1_UP(); + }while ((!streamExit)&&(_len <= len)); + + if (!streamExit) + { +#ifdef _SPI_STATS_ + statSpi.wrongFrame++; + statSpi.lastError = SPI_ERROR_ARGUMENT; +#endif + return SPI_ERROR_ARGUMENT; + } + return SPI_OK; +} + +void sendError() +{ + AVAIL_FOR_SPI(); + if (spi_write(&AVR32_SPI, ERR_CMD) != SPI_ERROR_TIMEOUT) + { + //Wait to empty the buffer + while(!spi_writeRegisterEmptyCheck(&AVR32_SPI)); + } + BUSY_FOR_SPI(); + WARN("Send SPI error!\n"); +} + +#define ENABLE_SPI_INT() do { \ + volatile avr32_spi_t *spi = ARD_SPI; \ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); \ + if (global_interrupt_enabled) Disable_global_interrupt(); \ + spi->IER.rdrf = 1; \ + spi->IER.rxbuff = 1; spi->IER.endrx = 1; \ + if (global_interrupt_enabled) Enable_global_interrupt(); \ +}while(0); + +#define DISABLE_SPI_INT() do { \ + volatile avr32_spi_t *spi = ARD_SPI; \ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); \ + if (global_interrupt_enabled) Disable_global_interrupt(); \ + spi->IDR.rdrf = 1; spi->IDR.rxbuff = 1; spi->IDR.endrx = 1; \ + if (global_interrupt_enabled) Enable_global_interrupt(); \ +}while(0); + +#define CLEAR_SPI_INT() do { \ + eic_clear_interrupt_line(&AVR32_EIC, AVR32_SPI0_IRQ); \ + }while(0); + +void dump(char* _buf, uint16_t _count) { + + int i; + for (i = 0; i < _count; ++i) + printk("0x%x ", _buf[i]); + printk("\n"); +} +#ifdef _APP_DEBUG_ +#define DUMP dump +#endif + +#ifdef _APP_DEBUG_ +#define DUMP_SPI_DATA(BUF, COUNT) do { \ + if (verboseDebug & INFO_SPI_FLAG) { \ + int i = 0; \ + for (; i < COUNT; ++i) \ + { \ + printk("0x%x ", BUF[i]); \ + if (i % 20 == 0) \ + printk("\n"); \ + } \ + printk("\n"); \ + } \ +}while(0); +#else +#define DUMP_SPI_DATA(BUF, COUNT) do {}while(0); +#endif + + +#ifdef _APP_DEBUG_ +#define DUMP_SPI_CMD(BUF) do { \ + if (verboseDebug & INFO_SPI_FLAG) { \ + int i = 0; \ + for (; i < CMD_MAX_LEN; ++i) \ + { \ + printk("0x%x ", BUF[i]); \ + if (BUF[i] == END_CMD) \ + break; \ + } \ + printk("\n"); \ + } \ +}while(0); +#else +#define DUMP_SPI_CMD(BUF) do {}while(0); +#endif + + + +int spi_add_cmd(char _cmd_id, cmd_spi_cb_t cb, cmd_spi_rcb_t rcb, void* ctx, + char flag) { + U32 i; + for (i = 0; i < ARRAY_SIZE(cmd_spi_list); i++) + if (!cmd_spi_list[i].cb) + break; + + if (i == ARRAY_SIZE(cmd_spi_list)) + { + printk("List Commands full!\n"); + return -1; + } + cmd_spi_list[i].cmd_id = _cmd_id; + cmd_spi_list[i].cb = cb; + cmd_spi_list[i].reply_cb = rcb; + cmd_spi_list[i].ctx = ctx; + cmd_spi_list[i].flags = flag; + return 0; +} + +int set_net_cmd_cb(int numParam, char* buf, void* ctx) { + struct wl_ssid_t ssid; + wl_err_t err = WL_FAILURE; + tParam* param = (tParam*) buf; + + if (param->paramLen < WL_SSID_MAX_LENGTH) { + memcpy(ssid.ssid, ¶m->param, param->paramLen); + ssid.len = param->paramLen; + ssid.ssid[ssid.len] = 0; + INFO_SPI("SSID:%s\n", ssid.ssid); + //dump(ssid.ssid, ssid.len); + err = wl_cm_set_network(&ssid, NULL); + if (err != 1) + WARN("err=%d\n", err); + } else { + WARN("SSID len out of range"); + } + return err; +} + +extern uint8_t ascii_to_key(char *outp, const char *inp); + +int set_key_cmd_cb(int numParam, char* buf, void* ctx) { + struct wl_ssid_t ssid; + struct wl_mac_addr_t bssid; + uint8_t idx=0, len=0; + char key[13], key_hex[27]; + char keyIdx[2]; + wl_err_t err = WL_SUCCESS; + tParam* params = (tParam*) buf; + + INFO_SPI("%s params=%d\n", __FUNCTION__, numParam); + + // SSID + memset(&ssid, 0, sizeof ssid); + + if (params->paramLen < WL_SSID_MAX_LENGTH) { + memcpy(ssid.ssid, ¶ms->param, params->paramLen); + ssid.len = params->paramLen; + INFO_SPI("%s\n", ssid.ssid); + } else { + //printk("SSID len out of range"); + RETURN_ERR(WL_FAILURE) + } + + params = (tParam*)((char*)buf+PARAM_LEN_SIZE+params->paramLen); + strncpy(keyIdx, (const char*)¶ms->param, params->paramLen); + keyIdx[(uint8_t)params->paramLen]='\0'; + + idx = (uint8_t)atoi(keyIdx); + // KEY IDX + if ((params->paramLen != 1)||(idx < 0)||(idx > 3)){ + //printk("KEY IDX out of range %d\n", idx); + RETURN_ERR(WL_FAILURE) + } + + params = (tParam*)((char*)params+PARAM_LEN_SIZE+params->paramLen); + strncpy(key_hex, (const char*)¶ms->param, params->paramLen); + key_hex[(uint8_t)params->paramLen]='\0'; + len = ascii_to_key(key, key_hex); + // KEY + if (( len != 5)&&(len != 13)) + { + //printk("KEY len out of range %d", len); + RETURN_ERR(WL_FAILURE) + } +#if 0 + printk("KEY IDX = %d\n", idx); + dump(key, len); + printk("KEY len %d\n", len); +#endif + memset(&bssid.octet, 0xff, sizeof bssid.octet); + + wl_add_wep_key(idx, len, key, &bssid); + //wl_set_auth_mode(AUTH_MODE_SHARED_KEY); + wl_set_default_wep_key(idx); + + //Connect + err = wl_cm_set_network(&ssid, NULL); + if (err != 1) + WARN("err=%d\n", err); + RETURN_ERR(err) +} + +int set_passphrase_cmd_cb(int numParam, char* buf, void* ctx) { + struct wl_network_t net; + char pass[64]; + wl_err_t err = WL_SUCCESS; + tParam* params = (tParam*) buf; + + INFO_SPI("%s params=%d\n", __FUNCTION__, numParam); + + memset(&net, 0, sizeof net); + memset(net.bssid.octet, 0xFF, sizeof net.bssid.octet); + + net.enc_type = ENC_TYPE_AUTO; + + // SSID + if (params->paramLen < WL_SSID_MAX_LENGTH) { + memcpy(net.ssid.ssid, ¶ms->param, params->paramLen); + net.ssid.len = params->paramLen; + INFO_SPI("%s %d\n", net.ssid.ssid, net.ssid.len); + } else { + //printk("SSID len out of range"); + RETURN_ERR(WL_FAILURE) + } + params = (tParam*)((char*)buf+PARAM_LEN_SIZE+params->paramLen); + // PASSPHRASE + + strncpy(pass, (const char*)¶ms->param, params->paramLen); + pass[(uint8_t)params->paramLen]='\0'; + INFO_SPI("Pass: %s %d\n", pass, params->paramLen); + + if (wl_set_passphrase(&net, + pass, + params->paramLen, + ENC_TYPE_AUTO, + AUTH_MODE_AUTO) + != WL_SUCCESS) { + WARN("%s : Failed to add passphrase\n", __func__); + + RETURN_ERR(WL_FAILURE) + } + printk("Connect to network..."); + //Connect + err = wl_cm_set_network(&net.ssid, NULL); + if (err != 1) + printk("err=%d\n", err); + else + printk("OK\n"); + RETURN_ERR(err) +} + +void set_result(wl_status_t _status) +{ + result = _status; +} + + +void set_result_cmd(int err) +{ + wl_err_t _err = (wl_err_t)err; + switch (_err) + { + case WL_SUCCESS: + set_result(WL_CONNECTED); + ERROR_LED_OFF(); + break; + default: + case WL_OOM: + case WL_INVALID_LENGTH: + case WL_NOT_SUPPORTED: + case WL_ABSORBED: + case WL_RESOURCES: + case WL_BUSY: + case WL_RETRY: + case WL_FAILURE: + set_result(WL_CONNECT_FAILED); + ERROR_LED_ON(); + break; + } + INFO_SPI("%s %d\n", __FUNCTION__, result); +} + + + +extern int ttcp_start(struct ip_addr addr, uint16_t port, void *opaque, + void *done_cb, int mode, uint16_t nbuf, uint16_t buflen, int udp, int verbose); + + +int start_server_tcp(uint16_t port, uint8_t sock) +{ + struct ip_addr addr = { 0 }; + uint16_t buflen = 1024; + uint16_t nbuf = 1024; + wl_err_t err = WL_FAILURE; + +#ifdef _APP_DEBUG_ + int verbose = 1; +#else + int verbose = 0; +#endif + int udp = 0; + int mode = 1; //RECEIVE + void* _ttcp = NULL; + + if (sock >= MAX_SOCK_NUM) + return WIFI_SPI_ERR; + + if (_connected) + { + WARN("Still connected...wait\n"); + return WIFI_SPI_ERR; + } + + if (!ifStatus) + { + WARN("IF down...wait\n"); + return WIFI_SPI_ERR; + } + + + if (ard_tcp_start(addr, port, NULL, NULL, mode, nbuf, buflen, udp, verbose, sock, &_ttcp) == 0) + { + INFO_SPI("Start Server [%d, %d] OK!\n", port, sock); + setMapSock(sock, _ttcp); + err = WL_SUCCESS; + }else{ + + WARN("Start Server [%d, %d] FAILED!\n", port, sock); + clearMapSockTcp(sock); + } + return err; +} + + +int start_server_tcp_cmd_cb(int numParam, char* buf, void* ctx) { + wl_err_t err = WL_FAILURE; + tParam* params = (tParam*) buf; + if (numParam == 2) + { + GET_PARAM_NEXT(INT, params, port); + GET_PARAM_NEXT(BYTE, params, sock); + err = start_server_tcp(port, sock); + } + return (err==WL_SUCCESS) ? WIFI_SPI_ACK : WIFI_SPI_ERR; +} + +int start_client_tcp_cmd_cb(int numParam, char* buf, void* ctx) { + wl_err_t err = WL_FAILURE; + tParam* params = (tParam*) buf; + if (numParam == 3) + { + GET_PARAM_NEXT(LONG, params, _addr); + GET_PARAM_NEXT(INT, params, port); + GET_PARAM_NEXT(BYTE, params, sock); + + INFO_SPI("Addr:0x%x, port:%d, sock:%d\n", _addr, port, sock); + + uint16_t buflen = 1024; + uint16_t nbuf = 1024; + struct ip_addr addr = { .addr = _addr}; +#ifdef _APP_DEBUG_ + int verbose = 1; +#else + int verbose = 0; +#endif + int udp = 0; + int mode = 0; //TRANSMIT + void* _ttcp = NULL; + + if (sock >= MAX_SOCK_NUM) + return WIFI_SPI_ERR; + + // Check previous connection + _ttcp = getTTCP(sock); + if (_ttcp != NULL) + { + WARN("Previous client %p not stopped !\n", _ttcp); + ard_tcp_stop(_ttcp); + clearMapSockTcp(sock); + } + + if (ard_tcp_start((struct ip_addr)addr, port, NULL, NULL, mode, nbuf, buflen, udp, verbose, sock, &_ttcp) == 0) + { + INFO_SPI("Start Client [0x%x, %d, %d] OK!\n", addr, port, sock); + setMapSock(sock, _ttcp); + err = WL_SUCCESS; + }else{ + INFO_SPI("Start Client [0x%x, %d, %d] FAILED!\n", addr, port, sock); + clearMapSockTcp(sock); + } + } + return (err==WL_SUCCESS) ? WIFI_SPI_ACK : WIFI_SPI_ERR; +} + +int stop_client_tcp_cmd_cb(int numParam, char* buf, void* ctx) { + wl_err_t err = WL_FAILURE; + tParam* params = (tParam*) buf; + void* _ttcp = NULL; + + if (numParam == 1) + { + GET_PARAM_NEXT(BYTE, params, sock); + + INFO_SPI("Stop client sock:%d\n", sock); + + if (sock < MAX_SOCK_NUM) + { + _ttcp = getTTCP(sock); + ard_tcp_stop(_ttcp); + err = WL_SUCCESS; + } + } + return (err==WL_SUCCESS) ? WIFI_SPI_ACK : WIFI_SPI_ERR; +} + +int send_data_tcp_cmd_cb(int numParam, char* buf, void* ctx) { + wl_err_t err = WL_FAILURE; + DATA_LED_ON(); + tDataParam* msg = (tDataParam*) buf; + if ((numParam == 2)&&(msg->dataLen == 1)) + { + GET_DATA_BYTE(sock, buf+2); + GET_DATA_INT(len, buf+3); + //printk("tcp:%p buf:%p len:%d\n", getTTCP(sock), (uint8_t*)(buf+5), len); + err = sendTcpData(getTTCP(sock), (uint8_t*)(buf+5), len); + } + DATA_LED_OFF(); + return (err==WL_SUCCESS) ? WIFI_SPI_ACK : WIFI_SPI_ERR; +} + +int ack_cmd_cb(int numParam, char* buf, void* ctx) { + return WIFI_SPI_ACK; +} + +int get_result_cmd_cb(int numParam, char* buf, void* ctx) { + INFO_SPI("ifStatus:%d result:%d\n", ifStatus, result); + *buf=(ifStatus)?WL_CONNECTED:result; + return WIFI_SPI_ACK; +} + +int disconnect_cmd_cb(int numParam, char* buf, void* ctx) +{ + return ((wl_disconnect()==WL_SUCCESS)? WIFI_SPI_ACK : WIFI_SPI_ERR); +} + + +cmd_spi_state_t get_reply_cb(char* recv, char* reply, void* ctx, uint16_t* count) { + + CREATE_HEADER_REPLY(reply, recv, 1); + + reply[3] = 1; // paramLen + if (ctx != NULL) { + reply[4] = (*(uint8_t*)ctx); //param + } else { + reply[4] = result; //param + } + + END_HEADER_REPLY(reply, 5, *count); + + //INFO_SPI("result:%d\n", result); + return SPI_CMD_DONE; +} + +cmd_spi_state_t ack_reply_cb(char* recv, char* reply, void* ctx, uint16_t* count) { + + CREATE_HEADER_REPLY(reply, recv, 1); + + reply[3] = 1; // paramLen + if (ctx != NULL) { + reply[4] = (*(uint8_t*) ctx != 1) ? WIFI_SPI_ERR : WIFI_SPI_ACK; //param + } else { + reply[4] = WIFI_SPI_ACK; //param + } + + END_HEADER_REPLY(reply, 5, *count); + + return SPI_CMD_DONE; +} + +cmd_spi_state_t get_reply_ipaddr_cb(char* recv, char* reply, void* ctx, uint16_t* count) { + + CHECK_ARD_NETIF(recv, reply, count); + + CREATE_HEADER_REPLY(reply, recv, 3); + + PUT_LONG_IN_BYTE_NO(ard_netif->ip_addr.addr, reply, 3); + PUT_LONG_IN_BYTE_NO(ard_netif->netmask.addr, reply, 8); + PUT_LONG_IN_BYTE_NO(ard_netif->gw.addr, reply, 13); + + END_HEADER_REPLY(reply, 18, *count); + + return SPI_CMD_DONE; +} + +void foundHostByName(const char *name, struct ip_addr *ipaddr, void *callback_arg) +{ + _hostIpAddr.addr = (ipaddr)?ipaddr->addr:0xffffffff; + INFO_SPI("foundHostByName: Found Host: name=%s ip=0x%x\n", name, _hostIpAddr.addr); + hostIpAddrFound = true; +} + +int req_reply_host_by_name_cb(int numParam, char* buf, void* ctx) { + + char hostName[DNS_MAX_NAME_LENGTH]; + tParam* params = (tParam*) buf; + + // HostName + if (params->paramLen < DNS_MAX_NAME_LENGTH) { + memcpy(hostName, ¶ms->param, params->paramLen); + hostName[params->paramLen]='\0'; + } else { + RETURN_ERR(WL_FAILURE) + } + + INFO_SPI("Looking for Host: name=%s\n", hostName); + _hostIpAddr.addr = 0; + hostIpAddrFound = false; + err_t err = dns_gethostbyname(hostName, &_hostIpAddr, foundHostByName, NULL); + if (err == ERR_OK) + { + INFO_SPI("Found Host: name=%s ip=0x%x\n", hostName, _hostIpAddr.addr); + hostIpAddrFound = true; + RETURN_ERR(WL_SUCCESS) + } + RETURN_ERR(WL_FAILURE) +} + +cmd_spi_state_t get_reply_host_by_name_cb(char* recv, char* reply, void* ctx, uint16_t* count) { + + u32_t addr = (hostIpAddrFound)?_hostIpAddr.addr : 0xffffffff; + INFO_SPI("Searching for Host: ip=0x%x found=%d\n", addr, hostIpAddrFound); + + CHECK_ARD_NETIF(recv, reply, count); + + CREATE_HEADER_REPLY(reply, recv, 1); + + PUT_LONG_IN_BYTE_NO(addr, reply, 3); + + END_HEADER_REPLY(reply, 8, *count); + + return SPI_CMD_DONE; +} + +cmd_spi_state_t get_reply_mac_cb(char* recv, char* reply, void* ctx, uint16_t* count) { + + CHECK_ARD_NETIF(recv, reply, count); + + CREATE_HEADER_REPLY(reply, recv, 1); + + reply[3] = WL_MAC_ADDR_LENGTH; + uint8_t mac[WL_MAC_ADDR_LENGTH]; + if (wl_get_mac_addr(mac) != WL_SUCCESS) { + RETURN_ERR_REPLY(recv, reply, count); + } + //rotate the byte order + reply[4]=mac[5]; + reply[5]=mac[4]; + reply[6]=mac[3]; + reply[7]=mac[2]; + reply[8]=mac[1]; + reply[9]=mac[0]; + END_HEADER_REPLY(reply, 10, *count); + + return SPI_CMD_DONE; +} + +cmd_spi_state_t get_reply_curr_net_cb(char* recv, char* reply, void* ctx, uint16_t* count) { + + uint32_t type = (uint32_t)ctx; + CHECK_ARD_NETIF(recv, reply, count); + + CREATE_HEADER_REPLY(reply, recv, 1); + + struct wl_network_t* net = wl_get_current_network(); + uint8_t len = 0; + if (net != NULL) + { + switch (type) + { + default: + case GET_CURR_SSID_CMD: + { + len = net->ssid.len; + PUT_BUFDATA_BYTE(net->ssid.ssid, len, reply, 3); + break; + } + case GET_CURR_BSSID_CMD: + { + len = WL_MAC_ADDR_LENGTH; ; + PUT_BUFDATA_BYTE_REV(net->bssid.octet, len, reply, 3); + break; + } + case GET_CURR_RSSI_CMD: + { + len=sizeof(net->rssi); + PUT_LONG_IN_BYTE_HO(net->rssi, reply, 3); + //printk("RSSI:%d", net->rssi); + break; + } + case GET_CURR_ENCT_CMD: + { + len = sizeof(net->enc_type); + PUT_DATA_BYTE(net->enc_type, reply, 3); + //printk("ENCT:%d", net->enc_type); + break; + } + } + }else{ + PUT_DATA_BYTE(0, reply, 3); + } + + END_HEADER_REPLY(reply, 3+len+1, *count); + + //dump(reply, *count); + + return SPI_CMD_DONE; +} + +cmd_spi_state_t get_reply_idx_net_cb(char* recv, char* reply, void* ctx, uint16_t* count) { + + uint32_t type = (uint32_t)ctx; + CHECK_ARD_NETIF(recv, reply, count); + + CREATE_HEADER_REPLY(reply, recv, 1); + + DUMP_SPI_CMD(recv); + + GET_DATA_BYTE(idx, recv+4); + + if (idx >= WL_NETWORKS_LIST_MAXNUM) + { + WARN("Index out of range: %d\n", idx); + return SPI_CMD_DONE; + } + uint8_t len = 0; + switch (type) + { + default: + case GET_IDX_SSID_CMD: + { + len = network_list.net[idx]->ssid.len; + PUT_BUFDATA_BYTE(network_list.net[idx]->ssid.ssid, len, reply, 3); + INFO_UTIL("SSID:%s\n", network_list.net[idx]->ssid.ssid); + break; + } + case GET_IDX_RSSI_CMD: + { + len = 4; + PUT_LONG_IN_BYTE_HO(network_list.net[idx]->rssi, reply, 3); + INFO_UTIL("RSSI:%d\n", network_list.net[idx]->rssi); + break; + } + case GET_IDX_ENCT_CMD: + { + len = 1; + PUT_DATA_BYTE(network_list.net[idx]->enc_type, reply, 3); + INFO_UTIL("ENCT:%d\n", network_list.net[idx]->enc_type); + break; + } + } + + + END_HEADER_REPLY(reply, 3+len+1, *count); + + DUMP(reply, *count); + + return SPI_CMD_DONE; +} + +static void copy_network_list(struct wl_network_list_t *dst, + struct wl_network_list_t *src) +{ + int i; + for (i = 0; i < dst->cnt; i++) + free(dst->net[i]); + free(dst->net); + + dst->cnt = 0; + + if (src->cnt == 0) + return; + dst->net = calloc(1, src->cnt * sizeof(struct wl_network_t *)); + if (dst->net == NULL) { + printk("could not allocate all gui net array\n"); + return; + } + + for (i = 0; i < src->cnt; i++) { + struct wl_network_t *net = src->net[i]; + dst->net[i] = malloc(sizeof(*net)); + if (dst->net[i] == NULL) { + printk("could not allocate all gui nets\n"); + return; + } + + memcpy(dst->net[i], net, sizeof(*net)); + dst->cnt++; + } +} + +int start_scan_net_cmd_cb(int numParam, char* buf, void* ctx) { + wl_err_t err = WL_FAILURE; + + INFO_SPI("Start Network Scan %d\n", numParam); + if (scanNetCompleted){ + scanNetCompleted = false; + err = wl_scan(); + if (err != WL_SUCCESS) + { + // May be busy scanning already, no fatal error + WARN("err=%d\n", err); + err = WL_SUCCESS; + } + } + return err; +} + +cmd_spi_state_t get_reply_scan_networks_cb(char* recv, char* reply, void* ctx, uint16_t* count) { + + const int8_t SCAN_NOT_YET_COMPLETED = 0; + + if (!scanNetCompleted) + { + //return empty list with an error to retry + CREATE_HEADER_REPLY(reply, recv, SCAN_NOT_YET_COMPLETED); + END_HEADER_REPLY(reply, 3, *count); + INFO_SPI("Scan not completed!\n"); + return SPI_CMD_DONE; + } + + int network_cnt = 0; + struct wl_network_list_t* wl_network_list; + + wl_get_network_list(&wl_network_list); + if (wl_network_list->cnt == 0) + { + CREATE_HEADER_REPLY(reply, recv, 0); + END_HEADER_REPLY(reply, 3, *count); + INFO_SPI("Networks not found!\n"); + return SPI_CMD_DONE; + } + + if (wl_network_list->cnt > WL_NETWORKS_LIST_MAXNUM) + { + network_cnt = WL_NETWORKS_LIST_MAXNUM ; + } + else{ + network_cnt = wl_network_list->cnt ; + } + + copy_network_list(&network_list, wl_network_list); + CREATE_HEADER_REPLY(reply, recv, network_cnt); + + uint8_t start = 3; + int ii = 0; + for (; ii < network_cnt; ii++) + { + uint8_t len = network_list.net[ii]->ssid.len+1; + network_list.net[ii]->ssid.ssid[network_list.net[ii]->ssid.len]=0; + PUT_BUFDATA_BYTE(network_list.net[ii]->ssid.ssid, len, reply, start); + start += len+1; + INFO_SPI("%d - %s [%d]- %d - %d - 0x%x\n",ii, network_list.net[ii]->ssid.ssid, + len, network_list.net[ii]->enc_type, + network_list.net[ii]->rssi, network_list.net[ii]->bssid); + } + + END_HEADER_REPLY(reply, start, *count); + //DUMP(reply, *count); + + return SPI_CMD_DONE; +} + +cmd_spi_state_t get_state_tcp_cmd_cb(char* recv, char* reply, void* ctx, uint16_t* count) { + + CHECK_ARD_NETIF(recv, reply, count); + + CREATE_HEADER_REPLY(reply, recv, PARAM_NUMS_1); + + uint8_t _state = CLOSED; + if ((recv[3]==1)&&(recv[4]>=0)&&(recv[4]=0)&&(recv[4] p=%p _ttcp=%p state(tpcb):%d state:%d\n", + p, ((struct ttcp*) p)->tpcb, + ((struct ttcp*) p)->tpcb->state, + _state); + }else { + _state = getStateTcp(p, 1); + INFO_SPI_VER("SER> p=%p _ttcp=%p state(tpcb):%d state(lpcb):%d state:%d\n", + p, ((struct ttcp*) p)->tpcb, + ((struct ttcp*) p)->tpcb->state, + ((struct ttcp*) p)->lpcb->state, + _state); + } + } + } + PUT_DATA_BYTE(_state, reply, 3); + END_HEADER_REPLY(reply, 5, *count); + INFO_SPI("state:%d\n", _state); + + return SPI_CMD_DONE; +} + +cmd_spi_state_t avail_data_tcp_cmd_cb(char* recv, char* reply, void* ctx, uint16_t* count) { + + CHECK_ARD_NETIF(recv, reply, count); + + CREATE_HEADER_REPLY(reply, recv, PARAM_NUMS_1); + uint8_t dataAvail = 0; + if ((recv[3]==1)&&(recv[4]>=0)&&(recv[4]=0)&&(recv[4]=0)&&(recv[4]=0)&&(recv[4]=0)&&(recv[4]<0xFF)) + { + len = recv[4]; + int i= 0; + for (; inParam, + (char*) &(spiMsg->params[0]), NULL); + }else + { + tSpiMsgData* spiMsg = (tSpiMsgData*) recv; + _result = cmd_spi_list[i].cb(spiMsg->nParam, + (char*) &(spiMsg->params[0]), NULL); + } + + if (_result != WIFI_SPI_ACK) + return REPLY_ERR_CMD; + else + return REPLY_NO_ERR; + }else{ + if (spiMsg8(cmdId)) + { + tSpiMsg* spiMsg = (tSpiMsg*) recv; + _result = cmd_spi_list[i].cb(spiMsg->nParam, + (char*) &(spiMsg->params[0]), NULL); + }else{ + tSpiMsgData* spiMsg = (tSpiMsgData*) recv; + _result = cmd_spi_list[i].cb(spiMsg->nParam, + (char*) &(spiMsg->params[0]), NULL); + } + //Send Reply for GET commands or Immediate SET apply + if (cmd_spi_list[i].flags == CMD_GET_FLAG) { + if (sendReply(i, recv, reply, cmd_spi_list[i].ctx) != SPI_OK) + return REPLY_ERR_GET; + else + return REPLY_NO_ERR; + }else if (cmd_spi_list[i].flags == CMD_IMM_SET_FLAG) + { + if (sendReply(i, recv, reply, &_result) != SPI_OK) + return REPLY_ERR_GET; + else + return REPLY_NO_ERR; + + } + } + } + } + // Command not found + if (i==ARRAY_SIZE(cmd_spi_list)) + { + WARN("Unknown cmd 0x%x\n", cmdId); + DUMP(recv, count); + return REPLY_ERR_CMD; + } + return REPLY_NO_ERR; +} + +void init_spi_cmds() { + spi_add_cmd(SET_NET_CMD, set_net_cmd_cb, ack_reply_cb, NULL, CMD_SET_FLAG); + spi_add_cmd(SET_PASSPHRASE_CMD, set_passphrase_cmd_cb, ack_reply_cb, NULL, CMD_SET_FLAG); + spi_add_cmd(SET_KEY_CMD, set_key_cmd_cb, ack_reply_cb, NULL, CMD_SET_FLAG); + spi_add_cmd(GET_CONN_STATUS_CMD, get_result_cmd_cb, get_reply_cb, NULL, CMD_GET_FLAG); + spi_add_cmd(GET_IPADDR_CMD, ack_cmd_cb, get_reply_ipaddr_cb, NULL, CMD_GET_FLAG); + spi_add_cmd(GET_MACADDR_CMD, ack_cmd_cb, get_reply_mac_cb, NULL, CMD_GET_FLAG); + spi_add_cmd(GET_CURR_SSID_CMD, ack_cmd_cb, get_reply_curr_net_cb, (void*)GET_CURR_SSID_CMD, CMD_GET_FLAG); + spi_add_cmd(GET_CURR_BSSID_CMD, ack_cmd_cb, get_reply_curr_net_cb, (void*)GET_CURR_BSSID_CMD, CMD_GET_FLAG); + spi_add_cmd(GET_CURR_RSSI_CMD, ack_cmd_cb, get_reply_curr_net_cb, (void*)GET_CURR_RSSI_CMD, CMD_GET_FLAG); + spi_add_cmd(GET_CURR_ENCT_CMD, ack_cmd_cb, get_reply_curr_net_cb, (void*)GET_CURR_ENCT_CMD, CMD_GET_FLAG); + spi_add_cmd(START_SCAN_NETWORKS, start_scan_net_cmd_cb, ack_reply_cb, NULL, CMD_SET_FLAG); + spi_add_cmd(SCAN_NETWORKS, ack_cmd_cb, get_reply_scan_networks_cb, NULL, CMD_GET_FLAG); + spi_add_cmd(DISCONNECT_CMD, disconnect_cmd_cb, ack_reply_cb, NULL, CMD_SET_FLAG); + spi_add_cmd(GET_IDX_ENCT_CMD, ack_cmd_cb, get_reply_idx_net_cb, (void*)GET_IDX_ENCT_CMD, CMD_GET_FLAG); + spi_add_cmd(GET_IDX_SSID_CMD, ack_cmd_cb, get_reply_idx_net_cb, (void*)GET_IDX_SSID_CMD, CMD_GET_FLAG); + spi_add_cmd(GET_IDX_RSSI_CMD, ack_cmd_cb, get_reply_idx_net_cb, (void*)GET_IDX_RSSI_CMD, CMD_GET_FLAG); + spi_add_cmd(REQ_HOST_BY_NAME_CMD, req_reply_host_by_name_cb, ack_reply_cb, NULL, CMD_SET_FLAG); + spi_add_cmd(GET_HOST_BY_NAME_CMD, ack_cmd_cb, get_reply_host_by_name_cb, NULL, CMD_GET_FLAG); + spi_add_cmd(START_SERVER_TCP_CMD, start_server_tcp_cmd_cb, ack_reply_cb, NULL, CMD_SET_FLAG); + spi_add_cmd(START_CLIENT_TCP_CMD, start_client_tcp_cmd_cb, ack_reply_cb, NULL, CMD_SET_FLAG); + spi_add_cmd(STOP_CLIENT_TCP_CMD, stop_client_tcp_cmd_cb, ack_reply_cb, NULL, CMD_SET_FLAG); + spi_add_cmd(GET_STATE_TCP_CMD, ack_cmd_cb, get_state_tcp_cmd_cb, NULL, CMD_GET_FLAG); + spi_add_cmd(GET_DATA_TCP_CMD, ack_cmd_cb, get_data_tcp_cmd_cb, NULL, CMD_GET_FLAG); + spi_add_cmd(AVAIL_DATA_TCP_CMD, ack_cmd_cb, avail_data_tcp_cmd_cb, NULL, CMD_GET_FLAG); + spi_add_cmd(SEND_DATA_TCP_CMD, send_data_tcp_cmd_cb, ack_reply_cb, NULL, CMD_IMM_SET_FLAG); + spi_add_cmd(DATA_SENT_TCP_CMD, ack_cmd_cb, data_sent_tcp_cmd_cb, NULL, CMD_GET_FLAG); + spi_add_cmd(GET_DATABUF_TCP_CMD, ack_cmd_cb, get_databuf_tcp_cmd_cb, NULL, CMD_GET_FLAG); + spi_add_cmd(GET_CLIENT_STATE_TCP_CMD, ack_cmd_cb, get_client_state_tcp_cmd_cb, NULL, CMD_GET_FLAG); + spi_add_cmd(GET_FW_VERSION_CMD, ack_cmd_cb, get_firmware_version_cmd_cb, NULL, CMD_GET_FLAG); + spi_add_cmd(GET_TEST_CMD, ack_cmd_cb, get_test_cmd_cb, NULL, CMD_GET_FLAG); +} + + +int checkMsgParam8(unsigned char* buf) +{ + int paramLenTot=0; + tSpiMsg* spiMsg = (tSpiMsg*)buf; + tParam *param = spiMsg->params; + int i=0; + for (; inParam; ++i) + { + uint8_t _len = param->paramLen; + paramLenTot+= _len+1; + //printk("%d) len:0x%x\n", i, _len); + param = (tParam*)((char*)(param)+_len+1); + } + return paramLenTot; +} + +int checkMsgParam16(unsigned char* buf) +{ + int paramLenTot=0; + tSpiMsgData* spiMsg = (tSpiMsgData*)buf; + tDataParam* param = (tDataParam*)spiMsg->params; + int i=0; + for (; inParam; ++i) + { + uint16_t _len = param->dataLen; + paramLenTot+= _len+sizeof(param->dataLen); + //printk("%d) len:0x%x\n", i, _len); + param = (tDataParam*)((char*)(param)+_len+sizeof(param->dataLen)); + } + return paramLenTot; +} + +bool checkMsgFormat(uint8_t* _recv, int len, int* offset) +{ + + unsigned char* recv = getStartCmdSeq(_recv, len, offset); + if ((recv == NULL)||(recv!=_recv)) + { + if ((enableDebug & INFO_WARN_FLAG)&&(len < 20)) //TODO stamp only short messages wrong + dump((char*)_recv, len); + + STATSPI_DISALIGN_ERROR(); + + if (recv == NULL) + return false; + } + tSpiMsg* spiMsg = (tSpiMsg*) recv; + if ((spiMsg->cmd == START_CMD)&&((spiMsg->tcmd & REPLY_FLAG) == 0)) + { + int paramLenTot = 0; + if (spiMsg8(spiMsg->tcmd)) + paramLenTot = checkMsgParam8(recv); + else + { + DUMP_SPI_DATA(_recv, len); + paramLenTot = checkMsgParam16(recv); + } + + //INFO_SPI("cmd:0x%x TotLen:%d\n", spiMsg->tcmd, paramLenTot); + char* p = (char*)recv + paramLenTot + sizeof(tSpiHdr); + if (*p == END_CMD) + { + return true; + }else{ + WARN("%d] Not found end cmd: 0x%x\n", cmdCorr, *p); + } + } + return false; +} + +//#define AVR32_USART_CSR_ITERATION_MASK (UNDERRUN) 0x00000400 +//#define AVR32_USART_CSR_OVRE_MASK 0x00000020 +//#define AVR32_USART_CSR_RXRDY_MASK 0x00000001 + + +void spi_poll(struct netif* netif) { + + ard_netif = netif; + + if (startReply) + { + startReply = false; + int offset = 0; + DISABLE_SPI_INT(); + if (checkMsgFormat(_receiveBuffer, receivedChars, &offset)) + { + state = SPI_CMD_INPROGRESS; + count = receivedChars-offset; + if (count >= CMD_MAX_LEN) + count = CMD_MAX_LEN; + memcpy(buf, &_receiveBuffer[offset], count); + + //mark as buffer used + _receiveBuffer[0] = 0; + + int err = call_reply_cb(buf, &reply[0]); + if (err != REPLY_NO_ERR) + { + DUMP_SPI_DATA(buf, count); + DUMP_SPI_DATA(reply, replyCount); + } + receivedChars = 0; + count = 0; + state = SPI_CMD_IDLE; + } + else + { + sendError(); + WARN("%d] Check format msg failed!\n", cmdCorr); + if (enableDebug & INFO_WARN_FLAG) + dump((char*)_receiveBuffer, receivedChars); + state = SPI_CMD_IDLE; + count=0; + //mark as buffer used + _receiveBuffer[0] = 0; + } + CLEAR_SPI_INT(); + //Enable Spi int to receive a new command + ENABLE_SPI_INT(); + //Available for receiving a new spi data + AVAIL_FOR_SPI(); + } + +#ifdef _SPI_STATS_ + if (statSpi.lastError != 0) + { + WARN("%d] Errot=0x%x spiStatus:0x%x\n", cmdCorr, statSpi.lastError, statSpi.status); + statSpi.lastError = 0; + } +#endif +} + +inline int spi_slaveReceiveInt(volatile avr32_spi_t *spi) +{ + receivedChars=0; + int index = 0; + int err = SPI_OK; + state = SPI_CMD_INPUT; + + if (_receiveBuffer[0] != 0) + { + STATSPI_OVERRIDE_ERROR(); + } + + do { + unsigned int timeout = SPI_TIMEOUT; + err = SPI_OK; + + while ((spi->sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) != + (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) { + if ((timeout--)==0) { + err=SPI_ERROR_TIMEOUT; + break; + } + } + _receiveBuffer[index] = (spi->rdr >> AVR32_SPI_RDR_RD_OFFSET) & 0x00ff; + if (err == SPI_OK) { + ++index; + ++receivedChars; + }else{ +#ifdef _SPI_STATS_ + STATSPI_TIMEOUT_ERROR(); +#endif + break; + } + + /* break on buffer overflow */ + if (receivedChars >= _BUFFERSIZE) { + err = SPI_ERROR_OVERRUN_AND_MODE_FAULT; + break; + } + } while (_receiveBuffer[index - 1] != END_CMD); + return err; +} + +#if defined (__GNUC__) +__attribute__((__interrupt__)) +#elif defined (__ICCAVR32__) +__interrupt +#endif +static void spi_int_handler(void) +{ + volatile avr32_spi_t *spi = ARD_SPI; + //DEB_PIN_DN(); + //AVAIL_FOR_SPI(); + DISABLE_SPI_INT(); + + if ((spi->sr & AVR32_SPI_SR_RDRF_MASK) != 0) + { + int err = spi_slaveReceiveInt(ARD_SPI); + if (err == SPI_OK) + { + BUSY_FOR_SPI(); + startReply=true; + ++cmdCorr; + //maintain disable interrupt to send the reply command + //DEB_PIN_UP(); + return; + } + } + ENABLE_SPI_INT(); + //DEB_PIN_UP(); +} + +inline spi_status_t spi_read8(volatile avr32_spi_t *spi, unsigned char *data) +{ + unsigned int timeout = SPI_TIMEOUT; + + while ((spi->sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) != + (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + *data = (spi->rdr >> AVR32_SPI_RDR_RD_OFFSET) & 0x00ff; + + return SPI_OK; +} + + +/*! + * \brief Interrupt handler of the External interrupt line "1". + */ +#if __GNUC__ +__attribute__((__interrupt__)) +#elif __ICCAVR32__ +__interrupt +#endif +static void eic_int_handler1(void) +{ + eic_clear_interrupt_line(&AVR32_EIC, EXT_INT_LINE1); + startRecvCmdSignal = TRUE; +} + +//! Structure holding the configuration parameters of the EIC module. +eic_options_t eic_options[EXT_INT_NB_LINES]; + +void initExtInt() +{ + // Enable edge-triggered interrupt. + eic_options[0].eic_mode = EIC_MODE_EDGE_TRIGGERED; + // Interrupt will trigger on falling edge. + eic_options[0].eic_edge = EIC_EDGE_FALLING_EDGE; + // Initialize in synchronous mode : interrupt is synchronized to the clock + eic_options[0].eic_async = EIC_SYNCH_MODE; + // Set the interrupt line number. + eic_options[0].eic_line = EXT_INT_LINE1; + + // Disable all interrupts. + Disable_global_interrupt(); + + INTC_register_interrupt(&eic_int_handler1, EXT_INT_IRQ_LINE1, AVR32_INTC_INT0); + + // Map the interrupt lines to the GPIO pins with the right peripheral functions. + gpio_enable_module_pin(EXT_INT_PIN_LINE1,EXT_INT_FUNCTION_LINE1); + + // Init the EIC controller with the options + eic_init(&AVR32_EIC, eic_options, EXT_INT_NB_LINES); + + // Enable the chosen lines and their corresponding interrupt feature. + eic_enable_line(&AVR32_EIC, eic_options[0].eic_line); + eic_enable_interrupt_line(&AVR32_EIC, eic_options[0].eic_line); + + // Enable all interrupts. + Enable_global_interrupt(); +} + +int initSpi() +{ + volatile avr32_spi_t *spi = &AVR32_SPI0; + gpio_map_t spi_piomap = { \ + {AVR32_SPI0_SCK_0_0_PIN, AVR32_SPI0_SCK_0_0_FUNCTION}, \ + {AVR32_SPI0_MISO_0_0_PIN, AVR32_SPI0_MISO_0_0_FUNCTION}, \ + {AVR32_SPI0_MOSI_0_0_PIN, AVR32_SPI0_MOSI_0_0_FUNCTION}, \ + {AVR32_SPI0_NPCS_0_0_PIN, AVR32_SPI0_NPCS_0_0_FUNCTION}, \ + }; + + INFO_INIT("SPI init...\n"); + + /* Init PIO */ + gpio_enable_module(spi_piomap, ARRAY_SIZE(spi_piomap)); + + spi_options_t spiOptions; + + spiOptions.reg = 0; + spiOptions.baudrate = SPI_SLAVE_SPEED; + spiOptions.bits = SPI_BITS; + spiOptions.spck_delay = 0; + spiOptions.trans_delay = 4; + spiOptions.stay_act = 0; + spiOptions.spi_mode = 0; + spiOptions.modfdis = 0; + + /* Initialize as slave; bits, spi_mode */ + if (spi_initSlave(spi, spiOptions.bits, spiOptions.spi_mode) != SPI_OK) + { + INFO_SPI("SPI initialization failed!"); + return 1; + } + + spi_status_t status = spi_setupChipReg(spi, &spiOptions, FPBA_HZ); + if (status == SPI_ERROR_ARGUMENT) + WARN("Error configuring SPI\n"); + + // Disable all interrupts. + Disable_global_interrupt(); + + // Register the SPI interrupt handler to the interrupt controller. + INTC_register_interrupt((__int_handler)(&spi_int_handler), AVR32_SPI0_IRQ, AVR32_INTC_INT0); + + // Enable all interrupts. + Enable_global_interrupt(); + + ENABLE_SPI_INT(); + + spi_enable(spi); +#ifdef _SPI_STATS_ + initStatSpi(); +#endif + init_spi_cmds(); + + memset(_receiveBuffer, 0, sizeof(_receiveBuffer)); + memset(buf, 0, sizeof(buf)); + memset(reply, 0, sizeof(reply)); + + initMapSockTcp(); + set_result(WL_IDLE_STATUS); + + init_pBuf(); + + return 0; +} + diff --git a/firmwares/wifishield/wifiHD/src/ard_spi.h b/firmwares/wifishield/wifiHD/src/ard_spi.h new file mode 100644 index 0000000..628f115 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/ard_spi.h @@ -0,0 +1,70 @@ +/* + * ard_spi.h + * + * Created on: May 27, 2010 + * Author: mlf by Metodo2 srl + */ + +#ifndef ARD_SPI_H_ +#define ARD_SPI_H_ + +#include "lwip/netif.h" +#include "console.h" +#include "wl_definitions.h" + + +typedef enum { + SPI_CMD_IDLE, + SPI_CMD_INPUT, + SPI_CMD_DONE, + SPI_CMD_INPROGRESS, + SPI_CMD_REPLING, + SPI_CMD_FAIL, +} cmd_spi_state_t; + +typedef enum { + REPLY_ERR_GET, + REPLY_ERR_SET, + REPLY_ERR_CMD, + REPLY_ERR_MSG, + REPLY_NO_ERR, +} reply_err_t; + + +typedef enum { + CMD_GET_FLAG = 0x01, + CMD_SET_FLAG = 0x02, + CMD_IMM_SET_FLAG = 0x04, +}cmd_flags; + +#define TIMEOUT_SPI 200 +#define SPI_ALIGN_ERROR 0xF0 +#define SPI_OVERRIDE_ERROR 0xF1 +#define DUMMY_DATA 0xFF + +typedef int (*cmd_spi_cb_t)(int numParam, char* buf, void* ctx); +typedef cmd_spi_state_t (*cmd_spi_rcb_t)(char* recv, char* reply, void* ctx, uint16_t* _count); + +void set_result_cmd(int err) ; + +void set_result(wl_status_t _status); + +int initSpi(void); + +void initExtInt(); + +void spi_poll(struct netif* netif); + +int spi_slaveReceive(volatile avr32_spi_t *spi); + +void showTTCPstatus(); + +int getSock(void * _ttcp); + +void* getTTCP(uint8_t sock); + +void clearMapSockTcp(uint8_t sock); + +int start_server_tcp(uint16_t port, uint8_t sock); + +#endif /* ARD_SPI_H_ */ diff --git a/firmwares/wifishield/wifiHD/src/ard_tcp.c b/firmwares/wifishield/wifiHD/src/ard_tcp.c new file mode 100644 index 0000000..dad1c3e --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/ard_tcp.c @@ -0,0 +1,904 @@ +/* + * ard_tcp.c + * + * Created on: May 27, 2010 + * Author: mlf by Metodo2 srl + */ + +//#define _APP_DEBUG_ +#include "lwip/opt.h" + +#include "lwip/mem.h" +#include "lwip/raw.h" +#include "lwip/icmp.h" +#include "lwip/netif.h" +#include "lwip/sys.h" +#include "lwip/sockets.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" +#include "lwip/tcp.h" +#include "lwip/udp.h" + +#include "ard_tcp.h" +#include "ard_spi.h" +#include "timer.h" +#include "util.h" + +#include "getopt.h" +#include "ard_utils.h" +#include "debug.h" + +unsigned int startTime = 0; +extern bool ifStatus; +static uint8_t tcp_poll_retries = 0; +static int isDataSentCount = 0; + +bool pending_close = false; +bool pending_accept = false; + +static err_t tcp_data_sent(void *arg, struct tcp_pcb *pcb, u16_t len); + +static void atcp_init_pend_flags() +{ + pending_close = false; + pending_accept = false; +} + +/** + * Clean up and free the ttcp structure + */ +static void ard_tcp_destroy(struct ttcp* ttcp) { + err_t err = ERR_OK; + DUMP_TCP_STATE(ttcp); + + if (getSock(ttcp)==-1) + WARN("ttcp already deallocated!\n"); + + if (ttcp->tpcb) { + tcp_arg(ttcp->tpcb, NULL); + tcp_sent(ttcp->tpcb, NULL); + tcp_recv(ttcp->tpcb, NULL); + tcp_err(ttcp->tpcb, NULL); + //TEMPORAQARY + //err = tcp_close(ttcp->tpcb); + INFO_TCP("Closing tpcb: state:0x%x err:%d\n", ttcp->tpcb->state, err); + } + + if (ttcp->lpcb) { + tcp_arg(ttcp->lpcb, NULL); + tcp_accept(ttcp->lpcb, NULL); + err = tcp_close(ttcp->lpcb); + INFO_TCP("Closing lpcb: state:0x%x err:%d\n", ttcp->lpcb->state, err); + } + + if (ttcp->upcb) { + udp_disconnect(ttcp->upcb); + udp_remove(ttcp->upcb); + } + + if (ttcp->payload) + free(ttcp->payload); + + free(ttcp); +} + +/** + * Clean up and free the ttcp structure + */ +static void ard_tcp_abort(struct ttcp* ttcp) { + + INFO_TCP("Abort ttcb:%p tpcb:%p lpcb:%p\n", ttcp, ttcp->tpcb, ttcp->lpcb); + if (ttcp->tpcb) { + tcp_arg(ttcp->tpcb, NULL); + tcp_sent(ttcp->tpcb, NULL); + tcp_recv(ttcp->tpcb, NULL); + tcp_err(ttcp->tpcb, NULL); + tcp_abort(ttcp->tpcb); + } + + if (ttcp->lpcb) { + tcp_arg(ttcp->lpcb, NULL); + tcp_accept(ttcp->lpcb, NULL); + tcp_abort(ttcp->lpcb); + } + + if (ttcp->upcb) { + udp_disconnect(ttcp->upcb); + udp_remove(ttcp->upcb); + } + + if (ttcp->payload) + free(ttcp->payload); + + free(ttcp); +} + + +/** + * Invoked when transfer is done or aborted (non-zero result). + */ +static void ard_tcp_done(struct ttcp* ttcp, int result) { +// if (result == 0) +// ard_tcp_print_stats(ttcp); + + if (ttcp->done_cb) + ttcp->done_cb(ttcp->opaque, result); + + ard_tcp_destroy(ttcp); + clearMapSockTcp(getSock(ttcp)); +} + +static void +tcp_timeout_cb(void *ctx); + +/** + * Only used in TCP mode. + * Will transmit a maximum of pbuf->tot_len bytes. + * Called upon connect and when there's space available in the TCP send window + * + */ +static void tcp_send_data(struct ttcp *ttcp) { + err_t err = ERR_OK; + uint32_t len, orig_len; + + len = ttcp->left; + ttcp->buff_sent = 0; + INFO_TCP_VER("left=%d len:%d tcp_sndbuf:%d\n", ttcp->left, len, tcp_sndbuf(ttcp->tpcb)); + + + /* don't send more than we have in the payload */ + if (len > ttcp->buflen) + len = ttcp->buflen; + + /* We cannot send more data than space available in the send + buffer. */ + if (len > tcp_sndbuf(ttcp->tpcb)) + len = tcp_sndbuf(ttcp->tpcb); + + orig_len = len; + uint8_t count = 0; + do { + startTime = timer_get_ms(); + err = tcp_write(ttcp->tpcb, ttcp->payload, len, TCP_WRITE_FLAG_COPY); + INFO_TCP_VER("%d) tcp_write %p state:%d len:%d err:%d\n", count++, ttcp->tpcb, ttcp->tpcb->state, len, err); + if (err == ERR_MEM) + { + len /= 2; + ttcp->buff_sent = 0; + }else if (err == ERR_OK){ + ttcp->buff_sent = 1; + isDataSentCount = 0; + } + } while (err == ERR_MEM && len > 1); + + if (err == ERR_OK){ + //tcp_output(ttcp->tpcb); + INFO_TCP_VER("tcp_output: left=%d new left:%d\n", + ttcp->left, ttcp->left-len); + ttcp->left -= len; + } + else + WARN("TTCP [%p-%p]: tcp_write failed err:%d origLen:%d len:%d\n", + ttcp, ttcp->tpcb, err, orig_len, len); + // + // ttcp->tid = timer_sched_timeout_cb(0, TIMEOUT_ONESHOT, + // tcp_timeout_cb, ttcp); +} + +/** + * Only used in TCP mode. + */ +static err_t tcp_connect_cb(void *arg, struct tcp_pcb *tpcb, err_t err) { + struct ttcp* ttcp = arg; + + INFO_TCP("TTCP [%p-%p]: connect %d %d\n", ttcp, tpcb, err, ttcp->tpcb->state); + + _connected = ( ttcp->tpcb->state == ESTABLISHED) ? 1 : 0; + tcp_poll_retries = 0; + + ttcp->start_time = timer_get_ms(); + + return ERR_OK; +} + +static void cleanSockState_cb(void *ctx) { + struct ttcp* ttcp = ctx; + + int sock = getSock(ttcp); + if (sock != -1) + clearMapSockTcp(sock); + INFO_TCP("TTCP [%p]: cleanSockState_cb %d\n", ttcp, sock); + _connected = false; +} + +static void cleanSockStateDelayed(void * arg) +{ + INFO_TCP("arg %p\n", arg); + timer_sched_timeout_cb(1000, TIMEOUT_ONESHOT, + cleanSockState_cb, arg); +} + +/** + * Only used in TCP mode. + */ +static void atcp_conn_err_cb(void *arg, err_t err) { + struct ttcp* _ttcp = arg; + + WARN("TTCP [%p]: connection error: %d arg:%p\n", + _ttcp, err, arg); + + if (ifStatus == false) + printk("Abort connection\n"); + cleanSockState_cb(_ttcp); + + atcp_init_pend_flags(); +} + +static void atcp_conn_cli_err_cb(void *arg, err_t err) { + struct ttcp* _ttcp = arg; + + WARN("TTCP [%p]: connection error: %d arg:%p\n", + _ttcp, err, arg); + + if (ifStatus == false) + printk("Abort connection\n"); + + if ((_ttcp)&&(err == ERR_ABRT)) + { + WARN("TTCP [%p]: free memory\n", _ttcp); + tcp_poll_retries = 0; + cleanSockState_cb(_ttcp); + if (_ttcp->payload) + free(_ttcp->payload); + free(_ttcp); + } + + atcp_init_pend_flags(); +} + + +static void close_conn(struct ttcp *_ttcp) { + tcp_arg(_ttcp->tpcb, NULL); + tcp_sent(_ttcp->tpcb, NULL); + tcp_recv(_ttcp->tpcb, NULL); + err_t err = tcp_close(_ttcp->tpcb); + INFO_TCP("Closing tpcb[%p]: state:0x%x err:%d\n",_ttcp->tpcb, _ttcp->tpcb->state, err); + + if (err == ERR_MEM) + pending_close = true; + else{ + atcp_init_pend_flags(); + WARN("----------------------\n"); + } +} + +void closeConnections() +{ + int i = 0; + for (; itpcb, _ttcp->tpcb->state, _ttcp->lpcb, _ttcp->lpcb->state); + //tcp_close(_ttcp->tpcb); + ard_tcp_destroy(_ttcp); + clearMapSockTcp(getSock(_ttcp)); + } + } +} + +/** + * Only used in TCP mode. + */ +static err_t atcp_recv_cb(void *arg, struct tcp_pcb *pcb, struct pbuf *p, + err_t err) { + struct ttcp* ttcp = arg; + + if (err == ERR_OK && p != NULL) { + INFO_TCP("pcb:%p pbuf: %p err:%d len:%d\n", pcb, p, err, p->tot_len); + DATA_LED_ON(); + /* for print_stats() */ + ttcp->recved += p->tot_len; + + if ((ttcp->verbose)||(verboseDebug & INFO_TCP_FLAG)) { + INFO_TCP("len:%d\n",p->tot_len); + DUMP_TCP(p->payload, p->tot_len); + ttcp->print_cnt++; + } + + insert_pBuf(p, ttcp->sock, (void*) pcb); + tcp_recved(pcb, p->tot_len); + pbuf_free(p); + DATA_LED_OFF(); + } + + /* p will be NULL when remote end is done */ + if (err == ERR_OK && p == NULL) { + INFO_TCP("atcp_recv_cb p=NULL\n"); + close_conn(ttcp); + } + + if (err!=ERR_OK) + WARN("err=%d p=%p\n", err, p); + return ERR_OK; +} + +void ack_recved(void* pcb, int len) { + // Comment the call because it is activated on atcp_recv_cb + //tcp_recved(pcb, len); +} + +static err_t atcp_poll(void *arg, struct tcp_pcb *pcb) { + struct ttcp* _ttcp = arg; + ++tcp_poll_retries; + + if (tcp_poll_retries > 4) { + WARN("ARD TCP [%p] arg=%p retries=%d\n", + pcb, arg, tcp_poll_retries); + tcp_poll_retries = 0; + tcp_abort(pcb); + atcp_init_pend_flags(); + return ERR_ABRT; + } + + WARN("ARD TCP [%p-%p] arg=%p retries=%d pend.close:%d\n", (_ttcp)?_ttcp->tpcb:0, pcb, arg, + tcp_poll_retries, pending_close); + if (_ttcp) tcp_send_data(_ttcp); + + if (pending_close) + { + err_t err = tcp_close(pcb); + if (err == ERR_MEM) + { + pending_close = true; + } + else + { + atcp_init_pend_flags(); + } + + INFO_TCP("ARD TCP [%p-%p] try to close pending:%d\n", pcb, (_ttcp)?_ttcp->tpcb:0, pending_close); + } + return ERR_OK; +} + +static err_t atcp_poll_conn(void *arg, struct tcp_pcb *pcb) { + struct ttcp* _ttcp = arg; + ++tcp_poll_retries; + + if (tcp_poll_retries > 8) { + WARN("ARD TCP [%p-%p] arg=%p retries=%d\n", + pcb, _ttcp->tpcb, arg, tcp_poll_retries); + tcp_poll_retries = 0; + tcp_abort(pcb); + return ERR_ABRT; + } + + WARN("ARD TCP [%p-%p] arg=%p retries=%d pend.close:%d conn:%d\n", (_ttcp)?_ttcp->tpcb:0, pcb, arg, + tcp_poll_retries, pending_close, _connected); + + if ((_ttcp)&&(_connected)) tcp_send_data(_ttcp); + + if (pending_close) + { + err_t err = tcp_close(pcb); + if (err == ERR_MEM) + { + pending_close = true; + } + else + { + cleanSockState_cb(_ttcp); + if (_ttcp->payload) + free(_ttcp->payload); + free(_ttcp); + pending_close = false; + + } + + INFO_TCP("ARD TCP [%p-%p] try to close pending:%d\n", pcb, (_ttcp)?_ttcp->tpcb:0, pending_close); + } + return ERR_OK; +} + + +/** + * Only used in TCP mode. + */ +static err_t atcp_accept_cb(void *arg, struct tcp_pcb *newpcb, err_t err) { + struct ttcp* ttcp = arg; + + INFO_TCP("ARD TCP [%p]: accept new [%p]\n", ttcp, newpcb); + INFO_TCP("local:%d remote:%d state:%d\n", newpcb->local_port, newpcb->remote_port, newpcb->state); + + if (pending_accept) + { + WARN("Accepting another connection: %p-%p\n", ttcp->tpcb, newpcb); + return ERR_OK; + } + pending_accept = true; + tcp_setprio(newpcb, TCP_PRIO_MIN); + tcp_poll_retries = 0; + ttcp->tpcb = newpcb; + tcp_recv(ttcp->tpcb, atcp_recv_cb); + tcp_err(ttcp->tpcb, atcp_conn_err_cb); + tcp_poll(ttcp->tpcb, atcp_poll, 4); + + ttcp->start_time = timer_get_ms(); + return ERR_OK; +} + +/** + * Start TCP transfer. + */ +static int atcp_start(struct ttcp* ttcp) { + err_t err = ERR_OK; + + ttcp->tpcb = tcp_new(); + if (ttcp->tpcb == NULL) { + WARN("TTCP [%p]: could not allocate pcb\n", ttcp); + return -1; + } + + ttcp->payload = malloc(ttcp->buflen); + if (ttcp->payload == NULL) { + WARN("TTCP [%p]: could not allocate payload\n", ttcp); + return -1; + } + + tcp_arg(ttcp->tpcb, ttcp); + atcp_init_pend_flags(); + + if (ttcp->mode == TTCP_MODE_TRANSMIT) { + tcp_err(ttcp->tpcb, atcp_conn_cli_err_cb); + tcp_recv(ttcp->tpcb, atcp_recv_cb); + tcp_sent(ttcp->tpcb, tcp_data_sent); + tcp_poll(ttcp->tpcb, atcp_poll_conn, 4); + _connected = false; + INFO_TCP("[tpcb]-%p payload:%p\n", ttcp->tpcb, ttcp->payload); + DUMP_TCP_STATE(ttcp); + if (tcp_connect(ttcp->tpcb, &ttcp->addr, ttcp->port, tcp_connect_cb) + != ERR_OK) { + WARN("TTCP [%p]: tcp connect failed\n", ttcp); + return -1; + } + + } else { + INFO_TCP("BEFORE BIND ttcp:%p lpcb:%p pcb:%p\n", ttcp, ttcp->lpcb, ttcp->tpcb); + INFO_TCP("[tpcb]-local:%d remote:%d state:%d\n", ttcp->tpcb->local_port, + ttcp->tpcb->remote_port, ttcp->tpcb->state); + + err = tcp_bind(ttcp->tpcb, IP_ADDR_ANY, ttcp->port); + if (err != ERR_OK){ + WARN("TTCP [%p]: bind failed err=%d Port already used\n", ttcp, err); + return -1; + } + + ttcp->lpcb = tcp_listen(ttcp->tpcb); + if (ttcp->lpcb == NULL) { + WARN("TTCP [%p]: listen failed\n", ttcp); + return -1; + } + if (ttcp->lpcb == ttcp->tpcb ) { + WARN("TTCP [%p]: listen failed tpcb [%p] in listen mode\n", ttcp, ttcp->tpcb); + return -1; + } + + DUMP_TCP_STATE(ttcp); + tcp_accept(ttcp->lpcb, atcp_accept_cb); + } + + return 0; +} + +static void +udp_send_data(struct ttcp* ttcp); + +/** + * Only used in UDP mode. Scheduled after data has been sent in udp_send_data() + * if we have more data to send. + */ +static void udp_timeout_cb(void *ctx) { + struct ttcp* ttcp = ctx; + udp_send_data(ttcp); +} + +static int udp_send_bytes(struct ttcp* ttcp, uint32_t len) { + struct pbuf* p = pbuf_alloc(PBUF_TRANSPORT, len, PBUF_RAM); + if (p == NULL) { + WARN("TTCP [%p]: could not allocate pbuf\n", ttcp); + return -1; + } + + if (udp_send(ttcp->upcb, p) != ERR_OK) { + WARN("TTCP [%p]: udp_send() failed\n", ttcp); + pbuf_free(p); + return -1; + } + + pbuf_free(p); + return 0; +} + +/** + * Only used in UDP mode. First call will send the start marker. When all + * ttcp data has been sent, a number of end markers will be sent. After + * end marker transmission, this function will complete the ttcp process. + */ +static void udp_send_data(struct ttcp* ttcp) { + /* send start marker first time */ + if (!ttcp->udp_started) { + if (udp_send_bytes(ttcp, 4) == 0) { + ttcp->udp_started = 1; + ttcp->start_time = timer_get_ms(); + } + } + + /* normal case */ + else if (ttcp->left) { + /* send data */ + if (udp_send_bytes(ttcp, ttcp->buflen) == 0) + ttcp->left -= ttcp->buflen; + } + + /* end marker? */ + else if (ttcp->left == 0 && ttcp->udp_end_marker_left) { + if (udp_send_bytes(ttcp, 4) == 0) + ttcp->udp_end_marker_left--; + } + + /* all end markers sent */ + else if (ttcp->left == 0) { + ard_tcp_done(ttcp, 0); + return; + } + + ttcp->tid + = timer_sched_timeout_cb(0, TIMEOUT_ONESHOT, udp_timeout_cb, ttcp); +} + +/** + * Only used in UDP mode. Will finalize the ttcp process when an end marker + * is seen. + */ +static void udp_recv_cb(void *arg, struct udp_pcb *upcb, struct pbuf *p, + struct ip_addr *addr, u16_t port) { + struct ttcp* ttcp = arg; + + /* got start marker? we might lose this so if we get it just reset + * the timer + */ + if (!ttcp->udp_started && p->tot_len <= 4) { + ttcp->start_time = timer_get_ms(); + ttcp->udp_started = 1; + goto out; + } + + /* after receiving at least 1 byte, check end marker + * don't check udp_started since we might have lost the start marker + */ + if (ttcp->recved && p->tot_len <= 4) { + ard_tcp_done(ttcp, 0); + goto out; + } + + /* for print_stats() */ + ttcp->recved += p->tot_len; + if (ttcp->verbose) { + printk("."); + if (ttcp->print_cnt % 80 == 0) + printk("\n"); + ttcp->print_cnt++; + } + + out: pbuf_free(p); +} + +/** + * Start UDP transfer. + */ +static int udp_start(struct ttcp* ttcp) { + ttcp->udp_end_marker_left = 5; + ttcp->upcb = udp_new(); + if (ttcp->upcb == NULL) { + printk("TTCP [%p]: could not allocate pcb\n", ttcp); + return -1; + } + + if (ttcp->mode == TTCP_MODE_TRANSMIT) { + if (udp_connect(ttcp->upcb, &ttcp->addr, ttcp->port) != ERR_OK) { + printk("TTCP [%p]: udp connect failed\n", ttcp); + return -1; + } + udp_send_data(ttcp); + } else { + udp_recv(ttcp->upcb, udp_recv_cb, ttcp); + } + + return 0; +} + +/** + * Start a new ttcp transfer. It should be possible to call this function + * multiple times in order to get multiple ttcp streams. done_cb() will be + * invoked upon completion. + * + */ +int ard_tcp_start(struct ip_addr addr, uint16_t port, void *opaque, + ard_tcp_done_cb_t *done_cb, int mode, uint16_t nbuf, uint16_t buflen, + int udp, int verbose, uint8_t sock, void** _ttcp) { + struct ttcp* ttcp; + int status; + + if (mode != TTCP_MODE_TRANSMIT && mode != TTCP_MODE_RECEIVE) { + WARN("TTCP [-]: invalid mode\n"); + return -1; + } + + if (nbuf == 0) { + WARN("TTCP [-]: invalid nbuf\n"); + return -1; + } + + if (buflen == 0) { + WARN("TTCP [-]: invalid buflen\n"); + return -1; + } + + ttcp = calloc(1, sizeof(struct ttcp)); + if (ttcp == NULL) { + WARN("TTCP [-]: could not allocate memory for ttcp\n"); + return -1; + } + + ttcp->addr = addr; + ttcp->port = port; + ttcp->nbuf = nbuf; + ttcp->mode = mode; + ttcp->left = nbuf * buflen; + ttcp->done_cb = done_cb; + ttcp->opaque = opaque; + ttcp->udp = udp; + ttcp->verbose = verbose; + ttcp->buflen = buflen; + + if (ttcp->udp) + status = udp_start(ttcp); + else + status = atcp_start(ttcp); + + if (status) { + WARN("Start server FAILED!\n"); + goto fail; + } + INFO_TCP("TTCP [%p-%p]: nbuf=%d, buflen=%d, port=%d (%s/%s)\n", ttcp, + ttcp->tpcb, ttcp->nbuf, ttcp->buflen, ttcp->port, ttcp->udp ? "udp" + : "tcp", ttcp->mode == TTCP_MODE_TRANSMIT ? "tx" : "rx"); + + *_ttcp = (void*) ttcp; + ttcp->sock = sock; + ttcp->buff_sent = 1; + + return 0; + + //fail: ard_tcp_abort(ttcp); + fail: ard_tcp_destroy(ttcp); + return -1; +} + +void ard_tcp_stop(void* ttcp) { + struct ttcp* _ttcp = (struct ttcp*) ttcp; + if (_ttcp == NULL) + { + WARN("ttcp = NULL!\n"); + return; + } + if (_ttcp->mode == TTCP_MODE_TRANSMIT) { + INFO_TCP("Destroy TCP connection...state:%d\n", _ttcp->tpcb->state); + ard_tcp_destroy(_ttcp); + clearMapSockTcp(getSock(_ttcp)); + tcp_poll_retries = 0; + }else{ + INFO_TCP("Closing connection...state:%d\n", _ttcp->tpcb->state); + DUMP_TCP_STATE(_ttcp); + if ((_ttcp)&&(_ttcp->tpcb)&&(_ttcp->tpcb->state!=LAST_ACK)&&(_ttcp->tpcb->state!=CLOSED)) + { + close_conn(_ttcp); + } + pending_accept = false; + } +} + +uint8_t getStateTcp(void* p, bool client) { + struct ttcp* _ttcp = (struct ttcp*) p; + + if (ifStatus == false) + return CLOSED; + if ((_ttcp != NULL) && (_ttcp->tpcb != NULL)) { + //DUMP_TCP_STATE(_ttcp); + if (client) + return _ttcp->tpcb->state; + else + return _ttcp->lpcb->state; + } else { + INFO_TCP_VER("TCP not initialized ttcp:%p tpcb:%p lpcb:%p\n", + _ttcp, ((_ttcp)?_ttcp->tpcb:0), ((_ttcp)?_ttcp->lpcb:0)); + } + return CLOSED; +} + +uint8_t getModeTcp(void* p) { + struct ttcp* _ttcp = (struct ttcp*) p; + + if (_ttcp != NULL) + return _ttcp->mode; + return 0; +} + +uint8_t isDataSent(void* p) { + struct ttcp *_ttcp = (struct ttcp *)p; + + if ((_ttcp)&&(!_ttcp->buff_sent)) + { + INFO_TCP_VER("%d) Wait to send data\n", ++isDataSentCount); + return 0; + } + + return 1; +} + +static err_t tcp_data_sent(void *arg, struct tcp_pcb *pcb, u16_t len) { + struct ttcp *_ttcp; + + LWIP_UNUSED_ARG(len); + + _ttcp = arg; + + tcp_poll_retries = 0; + if (_ttcp) _ttcp->buff_sent = 1; + + + INFO_TCP("Packet sent pcb:%p len:%d dur:%d left:%d count:%d\n", pcb, len, timer_get_ms() - startTime, + (_ttcp)?(_ttcp->left):0, isDataSentCount); + + isDataSentCount = 0; + + if ((_ttcp)&&(_ttcp->left > 0)) { + tcp_send_data(_ttcp); + } + + return ERR_OK; +} + +int sendTcpData(void* p, uint8_t* buf, uint16_t len) { + INFO_TCP("buf:%p len:%d\n", buf, len); + DUMP_TCP(buf,len); + + struct ttcp* _ttcp = (struct ttcp*) p; + + if (_ttcp==NULL) + { + WARN("ttcp == NULL!\n"); + return WL_FAILURE; + } + + INFO_TCP_VER("CLI> p=%p _ttcp=%p state(tpcb):%d state(lpcb):%d\n", + p, ((struct ttcp*) p)->tpcb, + ((struct ttcp*) p)->tpcb->state, + ((struct ttcp*) p)->lpcb->state); + + if ((_ttcp != NULL) && (_ttcp->tpcb != NULL) && + (buf != NULL) && (len != 0) && (_ttcp->payload != NULL)) { + if (_ttcp->tpcb->state == ESTABLISHED || + _ttcp->tpcb->state == CLOSE_WAIT || + _ttcp->tpcb->state == SYN_SENT || + _ttcp->tpcb->state == SYN_RCVD) { + + memcpy(_ttcp->payload, buf, len); + _ttcp->payload[len]='\0'; + INFO_TCP_VER("%s\n", _ttcp->payload); + _ttcp->left = len; + tcp_sent(_ttcp->tpcb, tcp_data_sent); + tcp_send_data(_ttcp); + + return WL_SUCCESS; + } + } + //printk("Write failure _ttcp=%p _ttcp->tpcb=%p buf=%p len=%d\n", _ttcp, _ttcp->tpcb, buf, len); + return WL_FAILURE; +} + +char + usage[] = + "Usage: ttcp -t/-r [-options] host\n\ + -l length of bufs written to network (default 1024)\n\ + -n number of bufs written to network (default 1024)\n\ + -p port number to send to (default 2000)\n\ + -u udp\n\ + -v verbose\n"; + +/** + * + */ +cmd_state_t cmd_ttcp(int argc, char* argv[], void* ctx) { + + int c; + int mode = TTCP_MODE_TRANSMIT; + int verbose = 0; + uint16_t buflen = 1024; + uint16_t nbuf = 1024; + uint16_t port = 2000; + int udp = 0; + struct ip_addr addr = { 0 }; + + optind = 1; + while ((c = getopt(argc, argv, "utrl:n:p:v")) != -1) { + switch (c) { + case 't': + mode = TTCP_MODE_TRANSMIT; + break; + case 'r': + mode = TTCP_MODE_RECEIVE; + break; + case 'l': + buflen = atoi(optarg); + break; + case 'v': + verbose = 1; + break; + case 'n': + nbuf = atoi(optarg); + break; + case 'u': + udp = 1; + break; + case 'p': + port = atoi(optarg); + break; + } + } + + if (mode == TTCP_MODE_TRANSMIT) { + if (optind >= argc) { + printk("%s", usage); + return CMD_DONE; + } + + addr = str2ip(argv[optind]); + if (!addr.addr) { + printk("%s", usage); + return CMD_DONE; + } + } + void* _ttcp = NULL; + if (ard_tcp_start(addr, port, NULL, NULL, mode, nbuf, buflen, udp, verbose, + 0, &_ttcp)) + return CMD_DONE; + + return CMD_DONE; +} + + +#if 0 +#include "lwip/sockets.h" + +void testlwip() +{ + int Sock; + fd_set fdsetR; + FD_ZERO(&fdsetR); + FD_SET(Sock, &fdsetR); + fd_set fdsetE = fdsetR; + + int rc; + const int cMillies = 10000; + struct timeval timeout; + timeout.tv_sec = cMillies / 1000; + timeout.tv_usec = (cMillies % 1000) * 1000; + //rc = lwip_select(Sock + 1, &fdsetR, NULL, &fdsetE, &timeout); +} +#endif diff --git a/firmwares/wifishield/wifiHD/src/ard_tcp.h b/firmwares/wifishield/wifiHD/src/ard_tcp.h new file mode 100644 index 0000000..010b976 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/ard_tcp.h @@ -0,0 +1,71 @@ +/* + * ard_tcp.h + * + * Created on: May 27, 2010 + * Author: mlf by Metodo2 srl + */ + +#ifndef ARD_TCP_H +#define ARD_TCP_H + +#include "console.h" +#include "lwip/tcp.h" + +typedef void (ard_tcp_done_cb_t)(void *opaque, int result); + +#define TTCP_MODE_TRANSMIT 0 +#define TTCP_MODE_RECEIVE 1 + +typedef struct ttcp { + + /* options */ + struct ip_addr addr; /* host */ + uint16_t port; /* -p */ + uint16_t nbuf; /* -n */ + int mode; /* -t */ + int verbose; /* -v */ + int udp; /* -u */ + uint8_t sock; + uint8_t buff_sent; + + /* common */ + uint16_t print_cnt; + uint32_t start_time; + uint32_t left; + uint32_t recved; + ard_tcp_done_cb_t* done_cb; + void* opaque; + uint32_t buflen; /* -l */ + uint32_t tid; + + /* TCP specific */ + struct tcp_pcb* tpcb; + struct tcp_pcb* lpcb; + char* payload; + + /* UDP specific */ + int udp_started; + uint16_t udp_end_marker_left; + struct udp_pcb* upcb; +}ttcp_t; + +bool _connected; + +int ard_tcp_start(struct ip_addr addr, uint16_t port, void *opaque, + ard_tcp_done_cb_t *done_cb, int mode, uint16_t nbuf, uint16_t buflen, int udp, int verbose, uint8_t sock, void** _ttcp); + +void ard_tcp_stop(void* ttcp); + +uint8_t getStateTcp(void* p, bool client ); + +uint8_t getModeTcp(void* p); + +int sendTcpData(void* p, uint8_t* buf, uint16_t len); + +uint8_t isDataSent(void* p ); + +cmd_state_t cmd_ttcp(int argc, char* argv[], void* ctx); + +void closeConnections(); + +#endif diff --git a/firmwares/wifishield/wifiHD/src/ard_utils.c b/firmwares/wifishield/wifiHD/src/ard_utils.c new file mode 100644 index 0000000..9c31f40 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/ard_utils.c @@ -0,0 +1,196 @@ +/* + * ard_utils.c + * + * Created on: Jul 4, 2010 + * Author: mlf by Metodo2 srl + */ +#undef _APP_DEBUG_ + +#include "lwip/pbuf.h" +#include "wifi_spi.h" +#include "ard_utils.h" +#include "debug.h" + +#define MAX_PBUF_STORED 30 + +tData pBufStore[MAX_PBUF_STORED][MAX_SOCK_NUM]; + +unsigned char headBuf = 0; +unsigned char tailBuf = 0; + +#define IS_BUF_AVAIL() (tailBuf!=headBuf) +#define IS_BUF_EMPTY() ((tailBuf == 0) && (headBuf == 0)) + +void init_pBuf() +{ + memset(pBufStore, 0, sizeof(pBufStore)); +} + +void insert_pBuf(struct pbuf* q, uint8_t sock, void* _pcb) +{ + if (q == NULL) + return; + + if (pBufStore[headBuf][sock].data != NULL) + { + WARN("Overwriting buffer %p idx:%d!\n", pBufStore[headBuf][sock].data, headBuf); + // to avoid memory leak free the oldest buffer + freetDataIdx(headBuf, sock); + } + + u8_t* p = (u8_t*)calloc(q->tot_len,sizeof(u8_t)); + if(p != NULL) { + if (pbuf_copy_partial(q, p, q->tot_len,0) != q->tot_len) { + WARN("pbuf_copy_partial failed: src:%p, dst:%p, len:%d\n", q, p, q->tot_len); + free(p); + p = NULL; + return; + } + + pBufStore[headBuf][sock].data = p; + pBufStore[headBuf][sock].len = q->tot_len; + pBufStore[headBuf][sock].idx = 0; + pBufStore[headBuf][sock].pcb = _pcb; + headBuf++; + + if (headBuf == MAX_PBUF_STORED) + headBuf = 0; + if (headBuf == tailBuf) + WARN("Overwriting data [%d-%d]!\n", headBuf, tailBuf); + INFO_UTIL("Insert: %p:%d-%d [%d,%d]\n", p, q->tot_len, p[0], headBuf, tailBuf); + } +} + +tData* get_pBuf(uint8_t sock) +{ + if (IS_BUF_EMPTY()) + return NULL; + + if (IS_BUF_AVAIL()) + { + tData* p = &(pBufStore[tailBuf][sock]); + INFO_UTIL_VER("%p [%d,%d]\n", p, headBuf, tailBuf); + return p; + } + return NULL; +} + +void freetData(void * buf, uint8_t sock) +{ + if (buf==NULL) + { + WARN("Buf == NULL!"); + return; + } + + pBufStore[tailBuf][sock].data = NULL; + pBufStore[tailBuf][sock].len = 0; + pBufStore[tailBuf][sock].idx = 0; + pBufStore[tailBuf][sock].pcb = 0; + + if (++tailBuf == MAX_PBUF_STORED) + tailBuf = 0; + INFO_UTIL("%p [%d,%d]\n", buf, headBuf, tailBuf); + free(buf); +} + +void freetDataIdx(uint8_t idxBuf, uint8_t sock) +{ + if (idxBuf >=MAX_PBUF_STORED) + { + WARN("idxBuf out of range: %d\n", idxBuf); + return; + } + + void * buf = pBufStore[idxBuf][sock].data; + + INFO_UTIL("%p idx:%d\n", buf, idxBuf); + + free(buf); + + pBufStore[idxBuf][sock].data = 0; + pBufStore[idxBuf][sock].len = 0; + pBufStore[idxBuf][sock].idx = 0; + pBufStore[idxBuf][sock].pcb = 0; +} + + +void ack_recved(void* pcb, int len); + +bool isAvailTcpDataByte(uint8_t sock) +{ + tData* p = get_pBuf(sock); + + if (p != NULL) + { + INFO_UTIL_VER("check:%d %d %p\n",p->idx, p->len, p->data); + if (p->idx == p->len) + { + freetData(p->data, sock); + ack_recved(p->pcb, p->len); + INFO_UTIL("Free %p other buf %d tail:%d head:%d\n", + p->data, IS_BUF_AVAIL(), tailBuf, headBuf); + return (IS_BUF_AVAIL()); + }else{ + return true; + } + } + return false; +} + + + +bool getTcpDataByte(uint8_t sock, uint8_t* payload, uint8_t peek) +{ + // ref field in struct pbuf has been used as index pointer for byte data + tData* p = get_pBuf(sock); + + if (p != NULL) + { + if (p->idx < p->len) + { + uint8_t* buf = (uint8_t*)p->data; + if (peek) + *payload = buf[p->idx]; + else + *payload = buf[p->idx++]; + INFO_UTIL_VER("get:%d %p %d\n",p->idx, p->data, *payload); + return true; + }else{ + //dealloc current buffer + INFO_UTIL("Free %p\n", p->data); + freetData(p->data, sock); + ack_recved(p->pcb, p->len); + } + } + return false; +} + +bool getTcpData(uint8_t sock, void** payload, uint16_t* len) +{ + tData* p = NULL; + p = get_pBuf(sock); + if (p != NULL) + { + *payload = p->data; + *len = p->len; + return true; + } + return false; +} + +bool freeTcpData(uint8_t sock) +{ + tData* p = NULL; + p = get_pBuf(sock); + if (p != NULL) + { + freetData(p->data, sock); + ack_recved(p->pcb, p->len); + return true; + } + return false; +} + + + diff --git a/firmwares/wifishield/wifiHD/src/ard_utils.h b/firmwares/wifishield/wifiHD/src/ard_utils.h new file mode 100644 index 0000000..4b31c46 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/ard_utils.h @@ -0,0 +1,267 @@ +/* + * ard_utils.h + * + * Created on: Jul 4, 2010 + * Author: mlf by Metodo2 srl + */ + +#ifndef ARD_UTILS_H_ +#define ARD_UTILS_H_ + +#include "gpio.h" +#include "debug.h" +#include "ARDUINO/arduino.h" +#define INIT_SIGNAL_FOR_SPI() gpio_disable_pin_pull_up(ARDUINO_HANDSHAKE_PIN); +#define BUSY_FOR_SPI() gpio_set_gpio_pin(ARDUINO_HANDSHAKE_PIN) +#define AVAIL_FOR_SPI() gpio_clr_gpio_pin(ARDUINO_HANDSHAKE_PIN) + +#define LED0_UP() gpio_set_gpio_pin(LED0_GPIO) +#define LED0_DN() gpio_clr_gpio_pin(LED0_GPIO) +#define LED0_TL() gpio_tgl_gpio_pin(LED0_GPIO) +#define LED1_UP() gpio_set_gpio_pin(LED1_GPIO) +#define LED1_DN() gpio_clr_gpio_pin(LED1_GPIO) +#define LED1_TL() gpio_tgl_gpio_pin(LED1_GPIO) +#define LED2_UP() gpio_set_gpio_pin(LED2_GPIO) +#define LED2_DN() gpio_clr_gpio_pin(LED2_GPIO) +#define LED2_TL() gpio_tgl_gpio_pin(LED2_GPIO) + +#ifdef _DEBUG_ +#define SIGN0_UP LED0_UP +#define SIGN0_DN LED0_DN +#define SIGN0_TL LED0_TL +#define SIGN1_UP LED1_UP +#define SIGN1_DN LED1_DN +#define SIGN1_TL LED1_TL +#define SIGN2_UP LED2_UP +#define SIGN2_DN LED2_DN +#define SIGN2_TL LED2_TL + +#define DEB_PIN_UP() gpio_set_gpio_pin(DEB_PIN_GPIO) +#define DEB_PIN_DN() gpio_clr_gpio_pin(DEB_PIN_GPIO) +#define DEB_PIN_ENA() gpio_enable_gpio_pin(DEB_PIN_GPIO); + +#else +#define SIGN0_UP() +#define SIGN0_DN() +#define SIGN0_TL() +#define SIGN1_UP() +#define SIGN1_DN() +#define SIGN1_TL() +#define SIGN2_UP() +#define SIGN2_DN() +#define SIGN2_TL() + +#define DEB_PIN_UP() +#define DEB_PIN_DN() +#define DEB_PIN_ENA() + +//#define TOGGLE_SIG0 +#endif + +#define DELAY_450NS asm volatile("nop") +#define DELAY_1uS DELAY_450NS; DELAY_450NS; +#define TOGGLE_SIG0() SIGN0_UP(); DELAY_450NS;SIGN0_DN(); + + +#define LINK_LED_OFF LED0_UP +#define ERROR_LED_OFF LED1_UP +#define DATA_LED_OFF LED2_UP + +#define LINK_LED_ON LED0_DN +#define ERROR_LED_ON LED1_DN +#define DATA_LED_ON LED2_DN + +#define LINK_LED_BL LED0_TL +#define ERROR_LED_BL LED1_TL +#define DATA_LED_BL LED2_TL + + +#define CREATE_HEADER_REPLY(REPLY, RECV, NUM_PARAMS)\ + REPLY[0] = RECV[0]; \ + REPLY[1] = RECV[1] | REPLY_FLAG; \ + REPLY[2] = NUM_PARAMS; + +#define CREATE_HEADER_REPLY_WAIT(REPLY, RECV, NUM_PARAMS)\ + REPLY[0] = RECV[0]; \ + REPLY[1] = RECV[1] | WAIT_FLAG; \ + REPLY[2] = NUM_PARAMS; + + +#define END_HEADER_REPLY(REPLY, TOT_LEN, COUNT)\ + REPLY[TOT_LEN] = END_CMD; \ + REPLY[TOT_LEN+1] = 0; \ + COUNT=TOT_LEN+1; + +#define RETURN_ERR_REPLY(RECV,REPLY,COUNT) \ + {uint8_t err = 0; return ack_reply_cb(RECV,REPLY,&err,COUNT);} + +#define CHECK_ARD_NETIF(RECV,REPLY,COUNT) \ + if (ard_netif == NULL) \ + { uint8_t err = 0; return ack_reply_cb(RECV,REPLY,&err,COUNT); } + +#define PUT_LONG_IN_BYTE_HO(LONG, BYTE, IDX) { \ + uint32_t _long = LONG; \ + BYTE[IDX] = 4; \ + BYTE[IDX+1] = (uint8_t)(_long & 0xff); \ + BYTE[IDX+2] = (uint8_t)((_long & 0xff00)>>8); \ + BYTE[IDX+3] = (uint8_t)((_long & 0xff0000)>>16); \ + BYTE[IDX+4] = (uint8_t)((_long & 0xff000000)>>24); \ +} + +#define PUT_LONG_IN_BYTE_NO(LONG, BYTE, IDX) { \ + uint32_t _long = LONG; \ + BYTE[IDX] = 4; \ + BYTE[IDX+4] = (uint8_t)(_long & 0xff); \ + BYTE[IDX+3] = (uint8_t)((_long & 0xff00)>>8); \ + BYTE[IDX+2] = (uint8_t)((_long & 0xff0000)>>16); \ + BYTE[IDX+1] = (uint8_t)((_long & 0xff000000)>>24); \ +} + + +#define PUT_DATA_INT(INT, BYTE, IDX) { \ + uint16_t _int = INT; \ + BYTE[IDX] = (uint8_t)((_int & 0xff00)>>8); \ + BYTE[IDX+1] = (uint8_t)(_int & 0xff); \ +} + +#define PUT_DATA_BYTE(DATA, BYTE, IDX) { \ + BYTE[IDX] = 1; \ + BYTE[IDX+1] = (uint8_t)DATA; \ +} + +#define PUT_BUFDATA_BYTE(BUF, BUFLEN, BYTE, IDX) { \ + BYTE[IDX] = (uint8_t)(BUFLEN & 0xff); \ + uint16_t i = 0; \ + for (; i>8); \ + BYTE[IDX+1] = (uint8_t)(BUFLEN & 0xff); \ + uint16_t i = 0; \ + for (; iparamLen == LEN)) + +#define NEXT_PARAM(PARAM) \ + do { \ + if (PARAM!=NULL){ \ + PARAM=(tParam*)((uint8_t*)PARAM+PARAM->paramLen+1); \ + GET_PARAM_BYTE(PARAM, end) \ + if (end == END_CMD) WARN("End of cmd params", PARAM); \ + } \ + }while(0); + +#define GET_PARAM_LONG(PARAM, LONG) \ + uint32_t LONG = 0; \ + if CHECK_PARAM_LEN(PARAM, 4) { \ + tLongParam* s = (tLongParam*)PARAM; \ + LONG = s->param; \ + } + +#define GET_PARAM_INT(PARAM, INT) \ + uint16_t INT = 0; \ + if CHECK_PARAM_LEN(PARAM, 2) { \ + tIntParam* s = (tIntParam*)PARAM; \ + INT = s->param; \ + } + +#define GET_PARAM_BYTE(PARAM, BYTE) \ + uint8_t BYTE = 0; \ + if CHECK_PARAM_LEN(PARAM, 1) { \ + tByteParam* s = (tByteParam*)PARAM; \ + BYTE = s->param; \ + } + +#define GET_PARAM_NEXT(TYPE, PARAM, DATA) \ + GET_PARAM_##TYPE(PARAM, DATA) \ + NEXT_PARAM(PARAM) + +#ifdef _SPI_STATS_ +#define STATSPI_TIMEOUT_ERROR() \ + statSpi.timeoutIntErr++; \ + statSpi.rxErr++; \ + statSpi.lastError = err; \ + statSpi.status = spi_getStatus(ARD_SPI); + +#define STATSPI_DISALIGN_ERROR() \ + statSpi.frameDisalign++; \ + statSpi.rxErr++; \ + statSpi.lastError = SPI_ALIGN_ERROR; \ + statSpi.status = spi_getStatus(ARD_SPI); + +#define STATSPI_OVERRIDE_ERROR() \ + statSpi.overrideFrame++; \ + statSpi.rxErr++; \ + statSpi.lastError = SPI_OVERRIDE_ERROR; \ + statSpi.status = spi_getStatus(ARD_SPI); + +#define STATSPI_TX_TIMEOUT_ERROR() \ + statSpi.timeoutErr++; \ + statSpi.txErr++; \ + statSpi.lastError = SPI_ERROR_TIMEOUT; \ + statSpi.status = spi_getStatus(ARD_SPI); +#else +#define STATSPI_TIMEOUT_ERROR() +#define STATSPI_TX_TIMEOUT_ERROR() +#define STATSPI_DISALIGN_ERROR() +#define STATSPI_OVERRIDE_ERROR() +#endif + +#define DUMP_TCP_STATE(TTCP) \ + INFO_TCP("ttcp:%p tpcb:%p state:%d lpcb:%p state:%d\n", \ + TTCP, TTCP->tpcb, (TTCP->tpcb)?TTCP->tpcb->state:0, \ + TTCP->lpcb, (TTCP->lpcb)?TTCP->lpcb->state:0); + + +typedef struct sData +{ + uint8_t* data; + uint16_t len; + uint16_t idx; + void* pcb; +}tData; + +struct pbuf; + +void init_pBuf(); + +void insert_pBuf(struct pbuf* q, uint8_t sock, void* _pcb); + +tData* get_pBuf(uint8_t sock); + +void freetData(void * buf, uint8_t sock); + +void freetDataIdx(uint8_t idxBuf, uint8_t sock); + +bool isBufAvail(); + +bool getTcpData(uint8_t sock, void** payload, uint16_t* len); + +bool getTcpDataByte(uint8_t sock, uint8_t* payload, uint8_t peek); + +bool isAvailTcpDataByte(uint8_t sock); + +uint8_t freeTcpData(uint8_t sock); + +#endif /* ARD_UTILS_H_ */ diff --git a/firmwares/wifishield/wifiHD/src/avr32_spi.c b/firmwares/wifishield/wifiHD/src/avr32_spi.c new file mode 100644 index 0000000..739fb28 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/avr32_spi.c @@ -0,0 +1,394 @@ +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0]) + +__attribute__((__interrupt__)) void avr32_irq_handler(void); +void owl_spi_mdelay(uint32_t ms); + +int owl_spi_init(U8 *flags) +{ +#ifdef _ASSERT_ENABLE_ /* To silence warning if Assert() macro is empty */ + volatile avr32_pm_t *pm = &AVR32_PM; +#endif + + volatile avr32_spi_t *spi = &WL_SPI; +#if WL_SPI_CS == 1 + volatile avr32_spi_csr1_t* CSR = &spi->CSR1; +#elif WL_SPI_CS == 2 + volatile avr32_spi_csr2_t* CSR = &spi->CSR2; +#elif WL_SPI_CS == 3 + volatile avr32_spi_csr3_t* CSR = &spi->CSR3; +#elif SPI_CS == 0 + volatile avr32_spi_csr0_t* CSR = &spi->CSR0; +#endif + +#ifndef WITH_NO_DMA + volatile avr32_pdca_channel_t *pdca_tx = &AVR32_PDCA.channel[0]; + volatile avr32_pdca_channel_t *pdca_rx = &AVR32_PDCA.channel[1]; +#endif + +#ifndef WL_IRQ_PIN + *flags = SPI_FLAG_POLL; +#else + *flags = 0; +#endif + + +#ifdef WL_IRQ_PIN + /* input, irq */ + gpio_enable_gpio_pin(WL_IRQ_PIN); + gpio_enable_pin_pull_up(WL_IRQ_PIN); +#endif + +//#ifdef WL_RESET_PIN +// /* reset pin */ +// gpio_enable_gpio_pin(WL_RESET_PIN); +// gpio_set_gpio_pin(WL_RESET_PIN); +//#endif + + +#ifdef WL_POWER_PIN + /* power off the device */ + gpio_enable_gpio_pin(WL_POWER_PIN); + gpio_set_gpio_pin(WL_POWER_PIN); +#endif + +#ifdef WL_SHUTDOWN_PIN + gpio_enable_gpio_pin(WL_SHUTDOWN_PIN); + +#ifdef WL_NO_INTERNAL_RESET /* never defined for SPB104/SPB105 */ + gpio_clr_gpio_pin(WL_SHUTDOWN_PIN); +#endif + +#ifdef WL_EXTERNAL_RESET + gpio_enable_gpio_pin(WL_RESET_PIN); +#endif + +#endif /* WL_SHUTDOWN_PIN */ + +#ifdef WL_POWER_PIN + /* power on the device */ + gpio_clr_gpio_pin(WL_POWER_PIN); +#endif + +#ifdef WL_SHUTDOWN_PIN + +#ifdef WL_NO_INTERNAL_RESET /* never defined for SPB104/SPB105 */ + owl_spi_mdelay(5); + gpio_set_gpio_pin(WL_SHUTDOWN_PIN); + +#elif WL_EXTERNAL_RESET + owl_spi_mdelay(5); + gpio_set_gpio_pin(WL_SHUTDOWN_PIN); + + owl_spi_mdelay(20); + //delay_ms(10); //2ms + + /* reset pin */ + gpio_set_gpio_pin(WL_RESET_PIN); + +#else + + /* The shutdown pin will go high once the device is powered */ + { +#define SHUTDOWN_TIMEOUT 350 + uint32_t shutdown_timer = 0; + while (gpio_get_pin_value(WL_SHUTDOWN_PIN) == 0) { + if (shutdown_timer > SHUTDOWN_TIMEOUT) + { + printk("Timeout WL Shutdown\n"); + return -1; + } + owl_spi_mdelay(5); + shutdown_timer += 5; + } + } +#endif /* WL_NO_INTERNAL_RESET */ + +#else + /* We need to make a guess about the time needed to power the device, + * this will depend on the hardware design. + */ + owl_spi_mdelay(5); +#endif /* WL_SHUTDOWN_PIN */ + + /* Note: SPI0 clock enabled at reset in pm->pbamask (see 13.6.3) */ + Assert(pm->pbamask & (1 << 5)); + + /* Note: GPIO clock enabled at reset in pm->pbamask (see 13.6.3) */ + Assert(pm->pbamask & (1 << 1)); +#ifdef WL_IRQ_PIN + /* 22.4.7: "In every port there are four interrupt lines + * connected to the interrupt controller. Every eigth + * interrupts in the port are ored together to form an + * interrupt line." + * + * WL_IRQ_# = (WL_IRQ_PIN / 32) * 4 + (WL_IRQ_PIN / 8) % 4 + * 62 => 1 * 4 + 3 = 7 + */ + INTC_register_interrupt(&avr32_irq_handler, WL_IRQ, AVR32_INTC_INT0); +#endif + +#ifndef WITH_NO_DMA + INTC_register_interrupt(&avr32_irq_handler, AVR32_PDCA_IRQ_0, + AVR32_INTC_INT0); + INTC_register_interrupt(&avr32_irq_handler, AVR32_PDCA_IRQ_1, + AVR32_INTC_INT0); + pdca_tx->IER.terr = 1; + pdca_rx->IER.terr = 1; +#endif + +#ifdef WL_SPI_CLOCK_DIVIDER + CSR->scbr = WL_SPI_CLOCK_DIVIDER; +#else + CSR->scbr = 2; +#endif + + /* Use max width of TDR register, 16 bit transfers */ + CSR->bits = 0x8; + + /* Make sure that we can hold CS low until transfer is completed, e.g + * LASTXFER is set in TDR. + */ + CSR->csaat = 1; + + /* NRG component requires clock polarity high */ + CSR->cpol = 1; + + +#ifdef WL_IRQ_PIN + /* make sure to clear any pending bits in ifr here. */ + gpio_clear_pin_interrupt_flag(WL_IRQ_PIN); +#endif + + return 0; +} + +#ifndef WITH_NO_DMA +static void dma_txrx(const U8* in, U8* out, U16 len) +{ + volatile avr32_pdca_channel_t *pdca_tx = &AVR32_PDCA.channel[0]; + volatile avr32_pdca_channel_t *pdca_rx = &AVR32_PDCA.channel[1]; + + /* setup tx */ + pdca_tx->mar = (U32) in; + pdca_tx->PSR.pid = WL_PDCA_PID_TX; + pdca_tx->tcr = len / 2; + pdca_tx->MR.size = 1; /* 2-byte */ + pdca_tx->IER.trc = 1; + + /* setup rx */ + pdca_rx->mar = (U32) out; + pdca_rx->PSR.pid = WL_PDCA_PID_RX; + pdca_rx->tcr = len / 2; + pdca_rx->MR.size = 1; /* 2-byte */ + pdca_rx->IER.trc = 1; + + /* start dma's. for some reason rx must be started prior to tx */ + pdca_rx->CR.ten = 1; + pdca_tx->CR.ten = 1; + + /* blocking wait until transfer is completed */ + while (!(pdca_tx->ISR.trc && pdca_rx->ISR.trc)); +} +#endif + +/* access data using byte pointers since we might get unaligned + * data from lwip. The cpu will issue a data abort if we try + * to access data which is not properly aligned. See data sheet. + * + * Note that fifo_txrx() doesn't handle the case where len is not a + * multiple of two bytes properly. + * + * However, there is no actual case where len is odd at the same time + * as the "out" pointer is non-NULL; therefore I think that in practice, + * we'll not write beyond the end of the "out" array. + * + * The extra unknown byte fetched from the in pointer will be discarded + * by the device since a length field included in the packet header will inform + * the device of the actual number of valid bytes (this implementation is + * kind of hidden inside the library). + */ +static void fifo_txrx(const U8 *in, U8* out, U16 len) +{ + volatile avr32_spi_t *spi = &WL_SPI; + UnionCPtr in_ptr; + UnionPtr out_ptr; + U32 sr; + + Assert(len); + + in_ptr.u8ptr = in; + out_ptr.u8ptr = out; + + while (len) { + U16 rdr; + union { + avr32_spi_tdr_t TDR; + U32 tdr; + } reg = { { 0 } }; + + while (!spi->SR.tdre); + while (!spi->SR.txempty); + + /* prepare tx data register contents */ + if (in_ptr.u8ptr) { + reg.TDR.td |= (in_ptr.u8ptr[0] << 8) | in_ptr.u8ptr[1]; + in_ptr.u16ptr++; + } + else + reg.TDR.td |= 0xffff; + + /* perform tx */ + spi->tdr = reg.tdr; + + /* wait until rx is ready */ + while (!spi->SR.rdrf); + + /* fetch rx data */ + rdr = spi->RDR.rd; + if (out_ptr.u8ptr) { + out_ptr.u8ptr[0] = (rdr >> 8) & 0xff; + out_ptr.u8ptr[1] = rdr & 0xff; + out_ptr.u16ptr++; + } + + if (len >= 2) + len -= 2; + else + len = 0; + } + + sr = spi->sr; + Assert(!(sr & AVR32_SPI_SR_OVRES_MASK)); + Assert(!(sr & AVR32_SPI_SR_MODF_MASK)); +} + +void owl_spi_txrx(const U8 *in, U8* out, U16 len) +{ +#ifndef WITH_NO_DMA + static uint8_t buf[MAX_BLOCK_LEN]; + + /* unaligned data or odd number of bytes, then skip dma */ + if ((U32) in % 4 || (U32) out % 4 || len % 2) { + fifo_txrx(in, out, len); + } else { + if (in == NULL) { + memset(buf, 0xff, len); + in = buf; + } else if (out == NULL) { + out = buf; + } + dma_txrx(in, out, len); + } +#else + fifo_txrx(in, out, len); +#endif +} + +void owl_spi_irq(U8 enable) +{ +#ifdef WL_IRQ_PIN + + if (enable) + gpio_enable_pin_interrupt(WL_IRQ_PIN, GPIO_PIN_CHANGE); + else + gpio_disable_pin_interrupt(WL_IRQ_PIN); +#endif +} + +void owl_spi_cs(U8 enable) +{ + volatile avr32_spi_t *spi = &WL_SPI; + + /* + * PCS = xxx0 => NPCS[3:0] = 1110 + * PCS = xx01 => NPCS[3:0] = 1101 + * PCS = x011 => NPCS[3:0] = 1011 + * PCS = 0111 => NPCS[3:0] = 0111 + * PCS = 1111 => forbidden (no peripheral is selected) + */ + + if (enable) +#if WL_SPI_CS == 2 + spi->MR.pcs = 0x3; /* cs2 */ +#elif WL_SPI_CS == 1 + spi->MR.pcs = 0x1; /* cs1 */ +#elif WL_SPI_CS == 3 + spi->MR.pcs = 0x7; /* cs3 */ +#elif WL_SPI_CS == 0 + spi->MR.pcs = 0x0; /* cs0 */ +#endif + else + spi->MR.pcs = 0xf; +} + +void owl_spi_mdelay(uint32_t ms) +{ + volatile int a = 0; + int i; + for (i = 0; i < ms * 5000; i++) + a++; +} + +__attribute__((__interrupt__)) void avr32_irq_handler(void) +{ +#ifndef WITH_NO_DMA + volatile avr32_pdca_channel_t *pdca_tx = &AVR32_PDCA.channel[0]; + volatile avr32_pdca_channel_t *pdca_rx = &AVR32_PDCA.channel[1]; + + /* tx xfer complete */ + if (pdca_tx->IMR.trc && pdca_tx->ISR.trc) { + pdca_tx->IDR.trc = 1; + pdca_tx->CR.tdis = 1; /* disable tx xfer */ + } + + /* rx xfer complete */ + if (pdca_rx->IMR.trc && pdca_rx->ISR.trc) { + pdca_rx->IDR.trc = 1; + pdca_rx->CR.tdis = 1; /* disable rx xfer */ + } +#endif + +#ifdef WL_IRQ_PIN + if (gpio_get_pin_interrupt_flag(WL_IRQ_PIN)) { + gpio_clear_pin_interrupt_flag(WL_IRQ_PIN); + wl_spi_irq(); + } +#endif + +} diff --git a/firmwares/wifishield/wifiHD/src/board_init.c b/firmwares/wifishield/wifiHD/src/board_init.c new file mode 100644 index 0000000..a2a191e --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/board_init.c @@ -0,0 +1,297 @@ +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#ifdef WITH_SDRAM + #include +#endif +#include +#include + +#ifndef NO_SERIAL /* The bootloader does not want serial port + * code */ +#include + +int board_putchar(char c) +{ + int timeout = USART_DEFAULT_TIMEOUT; + if (c == '\n') { + do { + if (!timeout--) + return USART_FAILURE; + } while (usart_write_char(&CONFIG_CONSOLE_PORT, '\r') != + USART_SUCCESS); + + timeout = USART_DEFAULT_TIMEOUT; + } + + do { + if (!timeout--) + return USART_FAILURE; + } while (usart_write_char(&CONFIG_CONSOLE_PORT, c) != USART_SUCCESS); + + return USART_SUCCESS; +} +#endif /* NO_SERIAL */ +/** + * Initializes the MCU system clocks. + */ +static void +init_sys_clocks(void) +{ + + /* if we don't run on OSC0 don't switch to it since we don't know + * what kind of oscillator we have here + */ + +#if OSC == 0 + /* switch to OSC0 to speed up the booting */ + pm_switch_to_osc0(&AVR32_PM, FOSC0, OSC0_STARTUP); +#endif + + +#ifndef USE_PLL + return; +#endif + + /* For audio, ee have to use OSC1 on to generate the correct clockrate + * for the SSC + */ +#if OSC == 1 + /* start oscillator1 */ + pm_enable_osc1_crystal(&AVR32_PM, FOSC1); + pm_enable_clk1(&AVR32_PM, OSC1_STARTUP); +#endif + + /* configure pll multipliers */ + pm_pll_setup(&AVR32_PM, + 0, /* pll */ + PLL_MUL, /* mul */ + 1, /* div */ + OSC, /* osc */ + 16); /* lockcount */ + + /* set PLL operating range and divider (fpll = fvco/2) + * this gives PLL output = 66 MHz (62.0928 MHz for EVK1105/OSC1) + */ + pm_pll_set_option(&AVR32_PM, + 0, /* pll */ + 1, /* pll_freq */ + 1, /* pll_div2 */ + 0); /* pll_wbwdisable. */ + + + /* start PLL0 and wait for the lock */ + pm_pll_enable(&AVR32_PM, 0); + pm_wait_for_pll0_locked(&AVR32_PM); + + /* Set all peripheral clocks torun at master clock rate */ + pm_cksel(&AVR32_PM, + 0, /* pbadiv */ + 0, /* pbasel */ + 0, /* pbbdiv */ + 0, /* pbbsel */ + 0, /* hsbdiv */ + 0); /* hsbsel */ + + /* Set one waitstate for the flash */ + flashc_set_wait_state(1); + + /* Switch to PLL0 as the master clock */ + pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0); +} + +static void init_exceptions(void) +{ + extern void _evba; + Set_system_register(AVR32_EVBA, (int)&_evba); + Enable_global_exception(); +} + +static void init_hmatrix(void) +{ + union { + unsigned long scfg; + avr32_hmatrix_scfg_t SCFG; + } u_avr32_hmatrix_scfg = { + AVR32_HMATRIX.scfg[AVR32_HMATRIX_SLAVE_FLASH] + }; + u_avr32_hmatrix_scfg.SCFG.defmstr_type = + AVR32_HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT; + AVR32_HMATRIX.scfg[AVR32_HMATRIX_SLAVE_FLASH] = + u_avr32_hmatrix_scfg.scfg; +} + +static void init_interrupts(void) +{ + INTC_init_interrupts(); + Enable_global_interrupt(); +} + +static void init_spi(void) +{ +#if defined(WL_SPI) + int i; +#endif + + +#if defined(AT45DBX_SPI) + static const gpio_map_t AT45DBX_SPI_GPIO_MAP = { + { AT45DBX_SPI_SCK_PIN, AT45DBX_SPI_SCK_FUNCTION }, + { AT45DBX_SPI_MISO_PIN, AT45DBX_SPI_MISO_FUNCTION }, + { AT45DBX_SPI_MOSI_PIN, AT45DBX_SPI_MOSI_FUNCTION }, + { AT45DBX_SPI_NPCS2_PIN, AT45DBX_SPI_NPCS2_FUNCTION }, + }; +#endif + + +#if defined(WL_SPI) + const gpio_map_t WL_SPI_GPIO_MAP = { +#if defined(WL_SPI_NPCS0) + WL_SPI_NPCS0, +#endif + WL_SPI_NPCS, WL_SPI_MISO, WL_SPI_MOSI, WL_SPI_SCK + }; +#endif + +#if defined(WL_SPI) || defined(AT45DBX_SPI) + spi_options_t spiOptions = { + .modfdis = 1 /* only param used by spi_initMaster() */ + }; +#endif + +#if defined(AT45DBX_SPI) + gpio_enable_module(AT45DBX_SPI_GPIO_MAP, + sizeof(AT45DBX_SPI_GPIO_MAP) / + sizeof(AT45DBX_SPI_GPIO_MAP[0])); + spi_initMaster(AT45DBX_SPI, &spiOptions); + spi_selectionMode(AT45DBX_SPI, 0, 0, 0); +#endif + +#if defined(WL_SPI) + /* same pins might be initialized twice here */ + gpio_enable_module(WL_SPI_GPIO_MAP, + sizeof(WL_SPI_GPIO_MAP) / + sizeof(WL_SPI_GPIO_MAP[0])); + for (i = 0; i < sizeof(WL_SPI_GPIO_MAP)/sizeof(WL_SPI_GPIO_MAP[0]); i++) + gpio_enable_pin_pull_up(WL_SPI_GPIO_MAP[i].pin); + + /* same SPI controller might be initialized again */ + spi_initMaster(&WL_SPI, &spiOptions); + spi_selectionMode(&WL_SPI, 0, 0, 0); +#endif + +#if defined(AT45DBX_SPI) + spi_enable(AT45DBX_SPI); + + /* put up flash reset pin */ + gpio_set_gpio_pin(AT45DBX_CHIP_RESET); +#endif + +#if defined(WL_SPI) + spi_enable(&WL_SPI); +#endif +} + + +static void init_rs232(void) +{ +#ifndef NO_SERIAL +#if defined(BOARD_RS232_0) + const gpio_map_t BOARD_RS232_0_GPIO_MAP = { + BOARD_RS232_0_TX, + BOARD_RS232_0_RX, +#if defined(BOARD_RS232_0_RTS) && defined (BOARD_RS232_0_CTS) + BOARD_RS232_0_RTS, + BOARD_RS232_0_CTS +#endif + + }; +#endif + +#if defined(BOARD_RS232_1) + const gpio_map_t BOARD_RS232_1_GPIO_MAP = { + BOARD_RS232_1_TX, + BOARD_RS232_1_RX +#if defined(BOARD_RS232_1_RTS) && defined (BOARD_RS232_1_CTS) + BOARD_RS232_1_RTS, + BOARD_RS232_1_CTS +#endif + }; +#endif + +#if defined(BOARD_RS232_0) + gpio_enable_module(BOARD_RS232_0_GPIO_MAP, + sizeof(BOARD_RS232_0_GPIO_MAP) / + sizeof(BOARD_RS232_0_GPIO_MAP[0])); +#endif + +#if defined(BOARD_RS232_1) + gpio_enable_module(BOARD_RS232_1_GPIO_MAP, + sizeof(BOARD_RS232_1_GPIO_MAP) / + sizeof(BOARD_RS232_1_GPIO_MAP[0])); +#endif +#endif /* NO_SERIAL */ +} + +static void init_printk(void) +{ +#ifndef NO_SERIAL +#if defined(CONFIG_CONSOLE_PORT) + const usart_options_t usart_options = { + .baudrate = 57600, + .charlength = 8, + .paritytype = USART_NO_PARITY, + .stopbits = USART_1_STOPBIT, + .channelmode = USART_NORMAL_CHMODE + }; + usart_init_rs232(&CONFIG_CONSOLE_PORT, &usart_options, FPBA_HZ); +#endif +#endif /* NO_SERIAL */ +} + +void board_init(void) +{ + + init_exceptions(); + init_hmatrix(); + init_sys_clocks(); + init_interrupts(); + + init_rs232(); + init_printk(); + +#ifdef WITH_SDRAM + sdramc_init(FHSB_HZ); +#endif + init_spi(); +} diff --git a/firmwares/wifishield/wifiHD/src/board_init.h b/firmwares/wifishield/wifiHD/src/board_init.h new file mode 100644 index 0000000..05a6609 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/board_init.h @@ -0,0 +1,313 @@ +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef STARTUP_H +#define STARTUP_H + +#include +#include /* defines SPB104, SPB105 */ + +void board_init(void); + + + +/* + * + * EVK1100 + * --------------------------------------------------------------------------- + * + */ +#if BOARD == EVK1100 + +/* USART0 physical assignment */ +#define BOARD_RS232_0 AVR32_USART1 +#define BOARD_RS232_0_TX \ + { AVR32_USART1_TXD_0_0_PIN, AVR32_USART1_TXD_0_0_FUNCTION } +#define BOARD_RS232_0_RX \ + { AVR32_USART1_RXD_0_0_PIN, AVR32_USART1_RXD_0_0_FUNCTION } + +/* USART1 physical assignment */ +#define BOARD_RS232_1 AVR32_USART0 +#define BOARD_RS232_1_TX \ + { AVR32_USART0_TXD_0_0_PIN, AVR32_USART0_TXD_0_0_FUNCTION } +#define BOARD_RS232_1_RX \ + { AVR32_USART0_RXD_0_0_PIN, AVR32_USART0_RXD_0_0_FUNCTION }, + +/* Clocks */ +#define USE_PLL +#define OSC 0 +#define PLL_MUL 10 + +/* Wifi (SPB104 only) */ +#if defined(EXT_BOARD) +#if EXT_BOARD == SPB104 +#define WL_SPI AVR32_SPI1 /* Pin 8 NC, so no irq support if using SD-slot */ +#define WL_SPI_CLOCK_DIVIDER 3 /* due to adapter */ +#define WL_PDCA_PID_TX AVR32_PDCA_PID_SPI1_TX +#define WL_PDCA_PID_RX AVR32_PDCA_PID_SPI1_RX +#define WL_SPI_CS 1 +#define WL_SPI_NPCS0 { AVR32_SPI1_NPCS_0_0_PIN, AVR32_SPI1_NPCS_0_0_FUNCTION } +#define WL_SPI_NPCS { AVR32_SPI1_NPCS_1_0_PIN, AVR32_SPI1_NPCS_1_0_FUNCTION } +#define WL_SPI_MISO { AVR32_SPI1_MISO_0_0_PIN, AVR32_SPI1_MISO_0_0_FUNCTION } +#define WL_SPI_MOSI { AVR32_SPI1_MOSI_0_0_PIN, AVR32_SPI1_MOSI_0_0_FUNCTION } +#define WL_SPI_SCK { AVR32_SPI1_SCK_0_0_PIN, AVR32_SPI1_SCK_0_0_FUNCTION } +#endif +#endif /* EXT_BOARD */ + + + + + + +/* + * + * EVK1101 + * --------------------------------------------------------------------------- + * + */ +#elif BOARD == EVK1101 + +/* USART0 physical assignment */ +#define BOARD_RS232_0 AVR32_USART1 +#define BOARD_RS232_0_TX \ + { AVR32_USART1_TXD_0_0_PIN, AVR32_USART1_TXD_0_0_FUNCTION } +#define BOARD_RS232_0_RX \ + { AVR32_USART1_RXD_0_0_PIN, AVR32_USART1_RXD_0_0_FUNCTION } + +/* Clocks */ +#define USE_PLL +#define OSC 0 +#define PLL_MUL 9 + +/* Wifi (SPB104 only) */ +#if defined(EXT_BOARD) +#if EXT_BOARD == SPB104 /* Pin 8 NC, so no irq support if using SD-slot */ +#define WL_SPI AVR32_SPI +#define WL_SPI_CLOCK_DIVIDER 3 /* due to adapter */ +#define WL_PDCA_PID_TX AVR32_PDCA_PID_SPI_TX +#define WL_PDCA_PID_RX AVR32_PDCA_PID_SPI_RX +#define WL_SPI_CS 1 +#if EXT_BOARD == SPB105 + #define WL_SHUTDOWN_PIN AVR32_PIN_PA06 + #define WL_POWER_PIN AVR32_PIN_PA30 +#endif +#define WL_SPI_NPCS0 { AVR32_SPI_NPCS_0_0_PIN, AVR32_SPI_NPCS_0_0_FUNCTION } +#define WL_SPI_NPCS { AVR32_SPI_NPCS_1_0_PIN, AVR32_SPI_NPCS_1_0_FUNCTION } +#define WL_SPI_MISO { AVR32_SPI_MISO_0_0_PIN, AVR32_SPI_MISO_0_0_FUNCTION } +#define WL_SPI_MOSI { AVR32_SPI_MOSI_0_0_PIN, AVR32_SPI_MOSI_0_0_FUNCTION } +#define WL_SPI_SCK { AVR32_SPI_SCK_0_0_PIN, AVR32_SPI_SCK_0_0_FUNCTION } +#endif +#endif /* EXT_BOARD */ + + + + + + + +/* + * + * EVK1104 + * --------------------------------------------------------------------------- + * + */ +#elif BOARD == EVK1104 /* EVK1104 */ + +/* USART0 physical assignment */ +#define BOARD_RS232_0 AVR32_USART1 +#define BOARD_RS232_0_TX \ + { AVR32_USART1_TXD_0_0_PIN, AVR32_USART1_TXD_0_0_FUNCTION } +#define BOARD_RS232_0_RX \ + { AVR32_USART1_RXD_0_0_PIN, AVR32_USART1_RXD_0_0_FUNCTION } + +/* Clocks */ +#define USE_PLL +#define OSC 0 +#define PLL_MUL 9 /* for some reason we cant use 66 MHz */ + +/* Wifi (SDIO: SPB104 only; SPI: SPB105 only) */ +#if defined(EXT_BOARD) +#if EXT_BOARD == SPB105 + #define WL_SPI AVR32_SPI0 + #define WL_PDCA_PID_TX AVR32_PDCA_PID_SPI0_TX + #define WL_PDCA_PID_RX AVR32_PDCA_PID_SPI0_RX + #define WL_SPI_CLOCK_DIVIDER 3 /* due to adapter */ + #define WL_SHUTDOWN_PIN AVR32_PIN_PA17 /* Pin 8 on RF-head -> Pin 4 on wifi */ + #define WL_IRQ_PIN AVR32_PIN_PA18 /* Pin 6 on RF-head -> Pin 3 on wifi */ + #define WL_IRQ AVR32_GPIO_IRQ_2 + #define WL_SPI_CS 3 + #define WL_SPI_NPCS { AVR32_SPI0_NPCS_3_1_PIN, AVR32_SPI0_NPCS_3_1_FUNCTION } + #define WL_SPI_MISO { AVR32_SPI0_MISO_0_0_PIN, AVR32_SPI0_MISO_0_0_FUNCTION } + #define WL_SPI_MOSI { AVR32_SPI0_MOSI_0_0_PIN, AVR32_SPI0_MOSI_0_0_FUNCTION } + #define WL_SPI_SCK { AVR32_SPI0_SCK_0_0_PIN, AVR32_SPI0_SCK_0_0_FUNCTION } +#elif EXT_BOARD == SPB104 + #ifdef SDIO_SLOT_A + #define WL_SDIO_CLK { AVR32_MCI_CLK_0_PIN, AVR32_MCI_CLK_0_FUNCTION } + #define WL_SDIO_CMD { AVR32_MCI_CMD_0_PIN, AVR32_MCI_CMD_0_FUNCTION } + #define WL_SDIO_DAT0 { AVR32_MCI_DATA_0_PIN, AVR32_MCI_DATA_0_FUNCTION } + #define WL_SDIO_DAT1 { AVR32_MCI_DATA_1_PIN, AVR32_MCI_DATA_1_FUNCTION } + #define WL_SDIO_DAT2 { AVR32_MCI_DATA_2_PIN, AVR32_MCI_DATA_2_FUNCTION } + #define WL_SDIO_DAT3 { AVR32_MCI_DATA_3_PIN, AVR32_MCI_DATA_3_FUNCTION } + #else + #define WL_SDIO_CLK { AVR32_MCI_CLK_0_PIN, AVR32_MCI_CLK_0_FUNCTION } + #define WL_SDIO_CMD { AVR32_MCI_CMD_1_0_PIN, AVR32_MCI_CMD_1_0_FUNCTION } + #define WL_SDIO_DAT0 { AVR32_MCI_DATA_8_0_PIN, AVR32_MCI_DATA_8_0_FUNCTION } + #define WL_SDIO_DAT1 { AVR32_MCI_DATA_9_0_PIN, AVR32_MCI_DATA_9_0_FUNCTION } + #define WL_SDIO_DAT2 { AVR32_MCI_DATA_10_0_PIN, AVR32_MCI_DATA_10_0_FUNCTION } + #define WL_SDIO_DAT3 { AVR32_MCI_DATA_11_0_PIN, AVR32_MCI_DATA_11_0_FUNCTION } + #endif +#endif +#endif /* EXT_BOARD */ + + + + + + + +/* + * + * EVK1105 + * --------------------------------------------------------------------------- + * + */ +#elif BOARD == EVK1105 /* EVK1105 */ + + +/* USART0 physical assignment */ +#define BOARD_RS232_0 AVR32_USART0 +#define BOARD_RS232_0_TX \ + { AVR32_USART0_TXD_0_0_PIN, AVR32_USART0_TXD_0_0_FUNCTION } +#define BOARD_RS232_0_RX \ + { AVR32_USART0_RXD_0_0_PIN, AVR32_USART0_RXD_0_0_FUNCTION } + +/* Clocks */ +#define USE_PLL +#define OSC 1 +#define PLL_MUL 10 + +/* Wifi SPB104/SPB105 */ +#if defined(EXT_BOARD) + #define WL_SPI AVR32_SPI0 + #define WL_PDCA_PID_TX AVR32_PDCA_PID_SPI0_TX + #define WL_PDCA_PID_RX AVR32_PDCA_PID_SPI0_RX + #if EXT_BOARD == SPB105 + #define WL_SPI_CLOCK_DIVIDER 3 /* due to adapter */ + #define WL_SHUTDOWN_PIN AVR32_PIN_PB31 /* Pin 8 on RF-head -> Pin 4 on wifi */ + #define WL_IRQ_PIN AVR32_PIN_PB30 /* Pin 6 on RF-head -> Pin 3 on wifi */ + #define WL_IRQ AVR32_GPIO_IRQ_7 + #define WL_SPI_CS 2 + #elif EXT_BOARD == SPB104 + #define WL_SPI_CLOCK_DIVIDER 3 /* due to adapter */ + #define WL_SPI_CS 1 + #endif + #define WL_SPI_NPCS0 { AVR32_SPI0_NPCS_0_0_PIN, AVR32_SPI0_NPCS_0_0_FUNCTION } + #if WL_SPI_CS == 1 + #define WL_SPI_NPCS { AVR32_SPI0_NPCS_1_0_PIN, AVR32_SPI0_NPCS_1_0_FUNCTION } + #elif WL_SPI_CS == 2 + #define WL_SPI_NPCS { AVR32_SPI0_NPCS_2_0_PIN, AVR32_SPI0_NPCS_2_0_FUNCTION } + #endif + #define WL_SPI_MISO { AVR32_SPI0_MISO_0_0_PIN, AVR32_SPI0_MISO_0_0_FUNCTION } + #define WL_SPI_MOSI { AVR32_SPI0_MOSI_0_0_PIN, AVR32_SPI0_MOSI_0_0_FUNCTION } + #define WL_SPI_SCK { AVR32_SPI0_SCK_0_0_PIN, AVR32_SPI0_SCK_0_0_FUNCTION } +#endif /* EXT_BOARD */ + +/* + * + * ARDUINO + * --------------------------------------------------------------------------- + * + */ +#elif BOARD == ARDUINO /* ARDUINO */ + + +/* USART0 physical assignment */ +#define BOARD_RS232_1 AVR32_USART1 +#define BOARD_RS232_1_TX \ + { AVR32_USART1_TXD_0_0_PIN, AVR32_USART1_TXD_0_0_FUNCTION } +#define BOARD_RS232_1_RX \ + { AVR32_USART1_RXD_0_0_PIN, AVR32_USART1_RXD_0_0_FUNCTION } + +/* Clocks */ +#define USE_PLL +#define OSC 0 +#define PLL_MUL 8 + +#define WL_SPI AVR32_SPI1 +#define WL_PDCA_PID_TX AVR32_PDCA_PID_SPI1_TX +#define WL_PDCA_PID_RX AVR32_PDCA_PID_SPI1_RX + +#define WL_SHUTDOWN_PIN AVR32_PIN_PA09 +#define WL_IRQ_PIN AVR32_PIN_PA03 +/* +* WL_IRQ_# = (WL_IRQ_PIN / 32) * 4 + (WL_IRQ_PIN / 8) % 4 + * 3 => 0 * 4 + 0 = 0 +*/ +#define WL_IRQ AVR32_GPIO_IRQ_0 +#define WL_SPI_CS 0 +#define WL_RESET_PIN AVR32_PIN_PA07 +#define WL_EXTERNAL_RESET 1 + + +#define WL_SPI_NPCS { AVR32_SPI1_NPCS_0_0_PIN, AVR32_SPI1_NPCS_0_0_FUNCTION } +#define WL_SPI_MISO { AVR32_SPI1_MISO_0_0_PIN, AVR32_SPI1_MISO_0_0_FUNCTION } +#define WL_SPI_MOSI { AVR32_SPI1_MOSI_0_0_PIN, AVR32_SPI1_MOSI_0_0_FUNCTION } +#define WL_SPI_SCK { AVR32_SPI1_SCK_0_0_PIN, AVR32_SPI1_SCK_0_0_FUNCTION } + +#endif /* EVKxxxx */ + + + + + + + + + +#if OSC == 0 +# define FOSC FOSC0 /* 12 MHz */ +#else +# define FOSC FOSC1 /* 11.2896 MHz */ +#endif + +#ifdef USE_PLL +# define FMCK_HZ ((FOSC * (PLL_MUL + 1)) / 2) +#else +# define FMCK_HZ FOSC +#endif + +#define FCPU_HZ FMCK_HZ +#define FHSB_HZ FCPU_HZ +#define FPBB_HZ FMCK_HZ +#define FPBA_HZ FMCK_HZ + + +#ifndef CONFIG_CONSOLE_PORT +#define CONFIG_CONSOLE_PORT BOARD_RS232_1 +#endif + +#endif diff --git a/firmwares/wifishield/wifiHD/src/cmd_wl.c b/firmwares/wifishield/wifiHD/src/cmd_wl.c new file mode 100644 index 0000000..61634ef --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/cmd_wl.c @@ -0,0 +1,635 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#include +#include +#include +#include + +#include + +#include +#include +#include +#include + +#include "lwip/netif.h" +#include "lwip/dns.h" +#include "debug.h" +#include "ard_spi.h" + +extern void showTTCPstatus(); + +#define ENABLE_DEBUG_LEVEL 1 +#define VERBOSE_DEBUG_LEVEL 2 + +#define CHECK_ENA_DEBUG(LEVEL, FLAG) \ + do{ \ + if (LEVEL >= ENABLE_DEBUG_LEVEL) enableDebug |= FLAG; \ + else enableDebug &= ~FLAG; \ + }while(0); + +#define CHECK_VERB_DEBUG(LEVEL, FLAG) \ + do{ \ + if (LEVEL >= VERBOSE_DEBUG_LEVEL) verboseDebug |= FLAG; \ + else verboseDebug &= ~FLAG; \ + }while(0); + +#define _DNS_CMD_ + +/** + * + */ +cmd_state_t +cmd_scan(int argc, char* argv[], void* ctx) +{ + /* Note that the scan results presented will + * be from the last scan, not this one. + */ + wl_scan(); + print_network_list(); + return CMD_DONE; +} + +cmd_state_t +cmd_debug_toggle(int argc, char* argv[], void* ctx) +{ + extern uint8_t tr_data_trace; + if ( argc != 2 ) { + printk("usage: dt <1|0>\n"); + return CMD_DONE; + } + if ( '0' == argv[1][0] ) { + tr_data_trace = 0; + } + if ( '1' == argv[1][0] ) { + tr_data_trace = 1; + } + return CMD_DONE; +} + +/** + * + */ +cmd_state_t +cmd_connect(int argc, char* argv[], void* ctx) +{ + struct wl_ssid_t ssid; + char desired_ssid[WL_SSID_MAX_LENGTH]; + int len = 0; + + if (argc < 2) { + printk("usage: connect \n"); + return CMD_DONE; + } + + len = join_argv(desired_ssid, sizeof desired_ssid, argc - 1, argv + 1); + if (0 == len) { + return CMD_DONE; + } + + memcpy(ssid.ssid, desired_ssid, len); + ssid.len = len; + /* Start connection manager */ + wl_cm_set_network(&ssid, NULL); + wl_cm_start(); + return CMD_DONE; +} + +#ifdef WFE_6_12 +cmd_state_t +cmd_ibss(int argc, char* argv[], void* ctx) +{ + struct wl_ssid_t ssid; + char desired_ssid[WL_SSID_MAX_LENGTH]; + uint8_t channel; + enum wl_auth_mode amode; + int len = 0; + wl_err_t ret; + + if ( 2 == argc && ! strncmp(argv[1], "none", 4) ) { + printk("Disconnecting\n"); + wl_disconnect(); + wl_cm_stop(); + return CMD_DONE; + } + if (argc < 4) { + printk("usage: ibss \n"); + printk(" ibss none\n"); + return CMD_DONE; + } + + channel = atoi(argv[argc - 2]); + if ( *argv[argc - 1] == '0' ) { + amode = AUTH_MODE_OPEN_SYSTEM; + } else { + amode = AUTH_MODE_SHARED_KEY; + } + len = join_argv(desired_ssid, sizeof desired_ssid, argc - 3, argv + 1); + if (0 == len) { + return CMD_DONE; + } + if ( channel > 14 ) { + printk("Invalid channel %d\n", (int)channel); + return CMD_DONE; + } + printk("%s : Start with ssid \"%s\", channel %d\n", __func__, + desired_ssid, channel); + memcpy(ssid.ssid, desired_ssid, len); + ssid.len = len; + /* Stop the connection manager */ + wl_cm_stop(); + + ret = wl_start_adhoc_net(ssid, channel, amode); + switch (ret) { + case WL_BUSY: + printk("Driver is busy. Already connected?\n"); + break; + case WL_RETRY: + printk("Driver is busy. Retry operation\n"); + break; + case WL_OOM: + printk("Out of memory\n"); + break; + case WL_INVALID_ARGS: + printk("Invalid argument\n"); + break; + case WL_SUCCESS: + break; + default: + printk("Unknown error %d\n", ret); + break; + } + return CMD_DONE; +} +#endif +/** + * + */ +cmd_state_t +cmd_set_ip(int argc, char* argv[], void* ctx) +{ + struct net_cfg *ncfg = ctx; + struct ip_addr lwip_addr; + struct netif *nif = ncfg->netif; + + if (argc == 2 && + (strncmp(argv[1], "none", 4) == 0)) { + ncfg->dhcp_enabled = 1; + + return CMD_DONE; + } + else if (argc != 4 ) { + printk("usage: ip \n"); + printk(" or : ip none (to enable DHCP)\n"); + return CMD_DONE; + } + /* IP address */ + lwip_addr = str2ip(argv[1]); + netif_set_ipaddr(nif, &lwip_addr); + /* Netmask */ + lwip_addr = str2ip(argv[2]); + netif_set_netmask(nif, &lwip_addr); + /* Default Gateway address */ + lwip_addr = str2ip(argv[3]); + netif_set_gw(nif, &lwip_addr); + /* Disable DHCP */ + ncfg->dhcp_enabled = 0; + + return CMD_DONE; +} + +#ifdef WITH_WPA + +/** + * + */ +cmd_state_t +cmd_delpass(int argc, char* argv[], void* ctx) +{ + const char *usage = "usage: dpass \n"; + struct wl_network_t net; + char desired_ssid[WL_SSID_MAX_LENGTH]; + int len = 0; + + if (argc != 2) { + printk(usage); + return CMD_DONE; + } + + memset(&net, 0, sizeof net); + memset(net.bssid.octet, 0xFF, sizeof net.bssid.octet); + + len = join_argv(desired_ssid, sizeof desired_ssid, argc - 1, argv + 1); + if (0 == len) { + return CMD_DONE; + } + memcpy(net.ssid.ssid, desired_ssid, len); + net.ssid.len = len; + net.enc_type = ENC_TYPE_AUTO; + if (wl_clear_passphrase(&net) != WL_SUCCESS) { + printk("%s : Failed to delete passphrase\n", __func__); + } + + return CMD_DONE; +} + + +/** + * + */ +cmd_state_t +cmd_setpass(int argc, char* argv[], void* ctx) +{ + const char *usage = "usage: wpass \n"; + struct wl_network_t net; + char desired_ssid[WL_SSID_MAX_LENGTH]; + int len = 0; + + if (argc < 3) { + printk(usage); + return CMD_DONE; + } + /* Not really kosher, an ssid may legally contain 0-bytes but + * the console interface does not deal with that. + */ + memset(&net, 0, sizeof net); + memset(net.bssid.octet, 0xFF, sizeof net.bssid.octet); + + len = join_argv(desired_ssid, sizeof desired_ssid, argc - 2, argv + 1); + if (0 == len) { + return CMD_DONE; + } + + memcpy(net.ssid.ssid, desired_ssid, len); + net.ssid.len = len; + net.enc_type = ENC_TYPE_AUTO; + if (wl_set_passphrase(&net, + argv[argc - 1], + strlen(argv[argc - 1]), + ENC_TYPE_AUTO, + AUTH_MODE_AUTO) + != WL_SUCCESS) { + printk("%s : Failed to add passphrase\n", __func__); + } + + return CMD_DONE; +} +#endif + +#ifdef _DNS_CMD_ +void foundHost(const char *name, struct ip_addr *ipaddr, void *callback_arg) +{ + printk("Found Host: name=%s ip=0x%x\n", name, ipaddr->addr); +} + +/** + * + */ +cmd_state_t +cmd_gethostbyname(int argc, char* argv[], void* ctx) +{ + const char *usage = "usage: getHost \n"; + char hostname[DNS_MAX_NAME_LENGTH]; + struct ip_addr _addr; + int len = 0; + + if (argc < 2) { + printk(usage); + return CMD_DONE; + } + + len = join_argv(hostname, sizeof hostname, argc - 1, argv + 1); + if (0 == len) { + return CMD_DONE; + } + err_t err = dns_gethostbyname(hostname, &_addr, foundHost, NULL); + if (err == ERR_OK) + { + printk("Found Host: name=%s ip=0x%x\n", hostname, _addr.addr); + } + + return CMD_DONE; +} + +/** + * + */ +cmd_state_t +cmd_setDnsServer(int argc, char* argv[], void* ctx) +{ + const char *usage = "usage: setdns [1-2] aaa.bbb.ccc.ddd\n"; + struct ip_addr dnsIp; + int dnsIdx = 0; + + if (argc < 3) { + printk(usage); + return CMD_DONE; + } + + /* DNS IDX */ + dnsIdx = atoi(argv[1])-1; + /* IP address */ + dnsIp = str2ip(argv[2]); + + printk("Set DNS server %d to %s\n", dnsIdx, ip2str(dnsIp)); + dns_setserver(dnsIdx, &dnsIp); + struct ip_addr addr1 = dns_getserver(0); + struct ip_addr addr2 = dns_getserver(1); + + printk("==> DNS1: %s\n", ip2str(addr1), addr1); + printk("==> DNS2: %s\n", ip2str(addr2), addr2); + + return CMD_DONE; +} + +/** + * + */ +cmd_state_t +cmd_startTcpSrv(int argc, char* argv[], void* ctx) +{ + const char *usage = "usage: startTcpSrv \n"; + + int port = 0; + int sock = 0; + + if (argc < 3) { + printk(usage); + return CMD_DONE; + } + + /* TCP port */ + port = atoi(argv[1]); + /* socket index */ + sock = atoi(argv[2]); + + printk("Start TCP server on port %d sock %d\n", port, sock); + if (start_server_tcp(port, sock) != -1) + { + printk("Start TCP server on port %d sock %d FAILED\n", port, sock); + } + return CMD_DONE; +} + + +#endif + + +/** + * + */ +cmd_state_t +cmd_status(int argc, char* argv[], void* ctx) +{ + struct net_cfg *ncfg = ctx; + struct wl_network_t* net; + uint8_t mac[WL_MAC_ADDR_LENGTH]; + + printk("wl_api version " WL_API_RELEASE_NAME "\n"); + /* print mac address */ + if (wl_get_mac_addr(mac) != WL_SUCCESS) { + printk("failed to get mac address\n"); + }else{ + printk("hw addr: %s\n", mac2str(mac)); + } + + /* print network info */ + net = wl_get_current_network(); + printk("link status: "); + if (!net) { + printk("down\n"); + + }else{ + print_network(net); + } + + /* print ip address */ + if (netif_is_up(netif_default)) + printk("ip addr: %s\n", ip2str(netif_default->ip_addr)); + else + printk("ip interface is down\n"); + printk("dhcp : "); + if (ncfg->dhcp_enabled) { + printk("enabled\n"); + } + else { + printk("disabled\n"); + } + struct ip_addr addr1 = dns_getserver(0); + struct ip_addr addr2 = dns_getserver(1); + + printk("==> DNS1: %s\n", ip2str(addr1), addr1); + printk("==> DNS2: %s\n", ip2str(addr2), addr2); + + showTTCPstatus(); + return CMD_DONE; +} + +#ifdef ADD_CMDS +/** + * + */ +cmd_state_t +cmd_power(int argc, char* argv[], void* ctx) +{ + const char *usage = "usage: powersave \n"; + + if (argc < 2) { + printk(usage); + return CMD_DONE; + } + + if (!strcmp(argv[1], "on")) { + if (wl_enable_ps() != WL_SUCCESS) { + printk("could not enable power save\n"); + return CMD_DONE; + } + return CMD_DONE; + } + else if(!strcmp(argv[1], "off")) { + if (wl_disable_ps() != WL_SUCCESS) { + printk("could not disable power save\n"); + return CMD_DONE; + } + return CMD_DONE; + } + + printk(usage); + return CMD_DONE; +} +#endif + +#ifdef ADD_CMDS +/** + * + */ +cmd_state_t +cmd_psconf(int argc, char* argv[], void* ctx) +{ + const char *usage = + "usage: psconf (0/1 default 0)\n" \ + " ([ms] default 10)\n" \ + " ([ms] default 5000)\n"\ + " (0/1 default 1)\n"\ + " ([beacons] default 20)\n"; + + uint8_t use_ps_poll; + uint32_t traffic_timeout; + uint32_t ps_delay; + uint8_t rx_all_dtim; + uint16_t listen_interval; + + if (argc < 6) { + printk(usage); + return CMD_DONE; + } + + use_ps_poll = atoi(argv[1]); + traffic_timeout = atoi(argv[2]); + ps_delay = atoi(argv[3]); + rx_all_dtim = atoi(argv[4]); + listen_interval = atoi(argv[5]); + + if (use_ps_poll > 1) { + printk(usage); + return CMD_DONE; + } + + if (rx_all_dtim > 1) { + printk(usage); + return CMD_DONE; + } + + if (wl_conf_ps(use_ps_poll, traffic_timeout, ps_delay, + rx_all_dtim, listen_interval) != WL_SUCCESS) + printk("configuration failed\n"); + + return CMD_DONE; +} +#endif + +/** + * + */ +cmd_state_t +cmd_setkey(int argc, char* argv[], void* ctx) +{ + int idx, len; + char key[13]; + struct wl_mac_addr_t bssid; + const char *usage = "usage: setkey \n\t "\ + "or: setkey none\n"; + + memset(&bssid.octet, 0xff, sizeof bssid.octet); + if (argc == 2 && strcmp(argv[1], "none") == 0) { + printk("Deleting WEP keys\n"); + wl_delete_wep_key(0, &bssid); + wl_delete_wep_key(1, &bssid); + wl_delete_wep_key(2, &bssid); + wl_delete_wep_key(3, &bssid); + return CMD_DONE; + } + if (argc < 3) { + printk(usage); + return CMD_DONE; + } + idx = atoi(argv[1]); + len = strlen(argv[2]); + /* Pass phrase? */ + if ( 5 == len || 13 == len ) { + strncpy(key, argv[2], len); + } + /* Otherwise it's a hex string */ + else { + len = ascii_to_key(key, argv[2]); + if (0 == len || idx > 3 || idx < 0 || (idx == 0 && *argv[1] != '0')) { + printk(usage); + return CMD_DONE; + } + if (len != 5 && len != 13) { + printk(" WEP key must be 10 (WEP-40) or 26 (WEP-104) digits\n"); + return CMD_DONE; + } + } + wl_add_wep_key(idx, len, key, &bssid); + wl_set_default_wep_key(idx); + + return CMD_DONE; +} + +cmd_state_t +cmd_debug(int argc, char* argv[], void* ctx) +{ + int level; + const char *usage = "usage: debug
\n\t"\ + "section: init, cm, spi, tcp , util, warn\n\t" + "level : 0 (off), 1 (on), 2 (verbose)\n\t" + "or: debug print/on/off\n"; + + if (argc == 2 && strcmp(argv[1], "off") == 0) { + printk("Debug OFF\n"); + enableDebug = DEFAULT_INFO_FLAG; + verboseDebug = 0; + return CMD_DONE; + }else if (argc == 2 && strcmp(argv[1], "print") == 0) { + printk("Debug enabled: 0x%x\n", enableDebug); + printk("Verbose enabled: 0x%x\n", verboseDebug); + return CMD_DONE; + }else if (argc == 2 && strcmp(argv[1], "on") == 0) { + printk("Debug ON\n"); + enableDebug = 0xff; + return CMD_DONE; + } + if (argc < 3) { + printk(usage); + return CMD_DONE; + } + level = atoi(argv[2]); + if (argc == 3 && strcmp(argv[1], "init") == 0) { + CHECK_ENA_DEBUG(level, INFO_INIT_FLAG); + CHECK_VERB_DEBUG(level, INFO_INIT_FLAG); + }else if (argc == 3 && strcmp(argv[1], "spi") == 0) { + CHECK_ENA_DEBUG(level, INFO_SPI_FLAG); + CHECK_VERB_DEBUG(level, INFO_SPI_FLAG); + }else if (argc == 3 && strcmp(argv[1], "tcp") == 0) { + CHECK_ENA_DEBUG(level, INFO_TCP_FLAG); + CHECK_VERB_DEBUG(level, INFO_TCP_FLAG); + }else if (argc == 3 && strcmp(argv[1], "cm") == 0) { + CHECK_ENA_DEBUG(level, INFO_CM_FLAG); + CHECK_VERB_DEBUG(level, INFO_CM_FLAG); + }else if (argc == 3 && strcmp(argv[1], "util") == 0) { + CHECK_ENA_DEBUG(level, INFO_UTIL_FLAG); + CHECK_VERB_DEBUG(level, INFO_UTIL_FLAG); + }else if (argc == 3 && strcmp(argv[1], "warn") == 0) { + CHECK_ENA_DEBUG(level, INFO_WARN_FLAG); + CHECK_VERB_DEBUG(level, INFO_WARN_FLAG); + } + return CMD_DONE; +} diff --git a/firmwares/wifishield/wifiHD/src/cmd_wl.h b/firmwares/wifishield/wifiHD/src/cmd_wl.h new file mode 100644 index 0000000..3953b95 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/cmd_wl.h @@ -0,0 +1,63 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef CMD_CM_H +#define CMD_CM_H + +#include +#include "netif/wlif.h" + +/*! A pointer to a struct of type "struct net_cfg" should be passed as + * the ctx pointer in the callbacks below. The struct must have a + * single instance per netif. + */ +#define _DNS_CMD_ + +cmd_state_t cmd_scan(int argc, char* argv[], void* ctx); +cmd_state_t cmd_connect(int argc, char* argv[], void* ctx); +cmd_state_t cmd_set_ip(int argc, char* argv[], void* ctx); +cmd_state_t cmd_setkey(int argc, char* argv[], void* ctx); +cmd_state_t cmd_status(int argc, char* argv[], void* ctx); +cmd_state_t cmd_power(int argc, char* argv[], void* ctx); +cmd_state_t cmd_psconf(int argc, char* argv[], void* ctx); +cmd_state_t cmd_setpass(int argc, char* argv[], void* ctx); +cmd_state_t cmd_delpass(int argc, char* argv[], void* ctx); +cmd_state_t cmd_debug(int argc, char* argv[], void* ctx); +cmd_state_t cmd_debug_toggle(int argc, char* argv[], void* ctx); +cmd_state_t cmd_statSpi(int argc, char* argv[], void* ctx); +cmd_state_t cmd_resetStatSpi(int argc, char* argv[], void* ctx); +cmd_state_t cmd_gethostbyname(int argc, char* argv[], void* ctx); +cmd_state_t cmd_setDnsServer(int argc, char* argv[], void* ctx); +cmd_state_t cmd_startTcpSrv(int argc, char* argv[], void* ctx); +#ifdef WFE_6_12 +cmd_state_t cmd_ibss(int argc, char* argv[], void* ctx); +#endif + + +#endif diff --git a/firmwares/wifishield/wifiHD/src/console.c b/firmwares/wifishield/wifiHD/src/console.c new file mode 100644 index 0000000..5ead91e --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/console.c @@ -0,0 +1,212 @@ +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_CMD_CONSOLE_NUM 12 +struct { + cmd_cb_t cb; + const char* str; + void* ctx; +} cmd_list[MAX_CMD_CONSOLE_NUM] = { { 0 } }; + +#ifndef CMD_MAX_LEN +#define CMD_MAX_LEN 80 +#endif +extern int board_putchar(char c); +int io_getc(char *c) +{ + int ci; + int status; + status = usart_read_char(&CONFIG_CONSOLE_PORT, &ci); + if (status == USART_RX_EMPTY) + return 1; + + if (status == USART_RX_ERROR) { + CONFIG_CONSOLE_PORT.cr = AVR32_USART_CR_RSTSTA_MASK; + return 1; + } + + if (ci == '\r') { + board_putchar('\n'); + /* Echo char. */ + } else if (ci == '\b') { + board_putchar(ci); + board_putchar(' '); + board_putchar(ci); + } else + board_putchar(ci); + + + *c = ci; + return 0; +} + +static uint8_t is_initialized = 0; + +char* console_gets() +{ + static char buf[CMD_MAX_LEN]; + static int pos = 0; + char c; + + for (;;) { + if (io_getc(&c)) + return NULL; + + if (c == '\r' || c == '\n') { + buf[pos] = 0; + pos = 0; + return buf; + } + if (c == '\b') { + pos -= 1; + if (pos < 0) pos = 0; + buf[pos] = 0; + } + else + buf[pos++] = c; + if (pos == sizeof(buf)) + pos = 0; + } + return NULL; +} + +int console_add_cmd(const char* str, cmd_cb_t cb, void* ctx) +{ + uint32_t i; + for (i = 0; i < ARRAY_SIZE(cmd_list); i++) + if (!cmd_list[i].cb) + break; + + if (i == ARRAY_SIZE(cmd_list)) + return -1; + + cmd_list[i].str = str; + cmd_list[i].cb = cb; + cmd_list[i].ctx = ctx; + return 0; +} + +void console_init(void) +{ + printk("\n$ "); + is_initialized = 1; +} + +void console_init_silent(void) { + is_initialized = 1; +} + +int console_schedule_cmd(char *cmd, int interactive) { +#define MAX_ARGS 16 + static int argc, i; + static char* argv[MAX_ARGS]; + static char *buf; + static enum { INPUT, RUN } state = INPUT; + + switch (state) { + case INPUT: { + char* token; + if (NULL == cmd) { + return 0; + } + buf = strdup(cmd); + if (!buf) + return 0; + if (!strlen(buf)) { + interactive ? printk("$ ") : 0; + free(buf); + return 0; + } +#ifdef WIFI_DEBUG_ON + printk("%s : Scheduling command \"%s\"\n", + __func__, + buf); +#endif + for (i = 0; i < ARRAY_SIZE(cmd_list); i++) + if(cmd_list[i].str && !strncmp(cmd_list[i].str, buf, min(strlen(cmd_list[i].str), strlen(buf)))) + break; + + if (ARRAY_SIZE(cmd_list) == 0) { + printk("No commands available. Is the WiFi card responding?\n"); + } + if (i == ARRAY_SIZE(cmd_list)) { + if (interactive) { + printk("available commands:\n"); + for (i = 0; i < ARRAY_SIZE(cmd_list); i++) + if (cmd_list[i].cb) + printk(" %s\n", cmd_list[i].str); + printk("$ "); + } + free(buf); + return 0; + } + + for (token = strtok(buf, " "); token != NULL; + token = strtok(NULL, " ")) { + argv[argc] = token; + argc++; + if (argc == MAX_ARGS) + break; + } + + state = RUN; + } /* fall through */ + + case RUN: { + cmd_state_t s = cmd_list[i].cb(argc, argv, cmd_list[i].ctx); + if (s == CMD_INPROGRESS) + return 1; + + interactive ? printk("$ ") : 0; + + argc = 0; + memset(argv, 0, sizeof argv); + free(buf); + state = INPUT; + } + } + + return 1; +} + + +void console_poll(void) +{ + char *buf; + buf = console_gets(); + console_schedule_cmd(buf, 1); +} diff --git a/firmwares/wifishield/wifiHD/src/console.h b/firmwares/wifishield/wifiHD/src/console.h new file mode 100644 index 0000000..79bfedb --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/console.h @@ -0,0 +1,46 @@ +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef CONSOLE_H +#define CONSOLE_H + + +typedef enum { + CMD_DONE, + CMD_INPROGRESS +} cmd_state_t; + +typedef cmd_state_t (*cmd_cb_t)(int argc, char* argv[], void* ctx); + +void console_init(void); +void console_init_silent(void); +char* console_gets(void); +int console_add_cmd(const char* str, cmd_cb_t cb, void* ctx); +int console_schedule_cmd(char *cmd, int interactive); +void console_poll(void); + +#endif diff --git a/firmwares/wifishield/wifiHD/src/debug.h b/firmwares/wifishield/wifiHD/src/debug.h new file mode 100644 index 0000000..18608ff --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/debug.h @@ -0,0 +1,109 @@ +//*********************************************/ +// +// File: debug.h +// +// Author: Domenico La Fauci +// +//********************************************/ + + +#ifndef Debug_H +#define Debug_H + +#include +#include + +#define INFO_INIT_FLAG 1 +#define INFO_TCP_FLAG 2 +#define INFO_SPI_FLAG 4 +#define INFO_CM_FLAG 8 +#define INFO_UTIL_FLAG 16 +#define INFO_5 32 +#define INFO_D (1<<0xD) // Debug +#define INFO_E (1<<0xE) // Error +#define INFO_WARN_FLAG (1<<0xF) // Warning +#define DEFAULT_INFO_FLAG 0 //INFO_WARN_FLAG + +extern uint16_t enableDebug; +extern uint16_t verboseDebug; + +#ifdef _INFO_DEBUG_ +#define INFO_INIT(msg, args...) do { \ +if (enableDebug & INFO_INIT_FLAG) printk("I-[%s] " msg , __func__ , ##args ); \ +} while (0) + +#define INFO_TCP(msg, args...) do { \ +if (enableDebug & INFO_TCP_FLAG) printk("I-[%s] " msg , __func__ , ##args ); \ +} while (0) + +#define INFO_TCP_VER(msg, args...) do { \ +if ((enableDebug & INFO_TCP_FLAG)&&(verboseDebug & INFO_TCP_FLAG)) \ + printk("I-[%s] " msg , __func__ , ##args ); \ +} while (0) + + +#define INFO_SPI(msg, args...) do { \ +if (enableDebug & INFO_SPI_FLAG) printk("I-[%s] " msg , __func__ , ##args ); \ +} while (0) + +#define INFO_SPI_VER(msg, args...) do { \ +if ((enableDebug & INFO_SPI_FLAG)&&(verboseDebug & INFO_SPI_FLAG)) \ + printk("I-[%s] " msg , __func__ , ##args ); \ +} while (0) + + +#define INFO_UTIL(msg, args...) do { \ +if (enableDebug & INFO_UTIL_FLAG) printk("I-[%s] " msg , __func__ , ##args ); \ +} while (0) + +#define INFO_UTIL_VER(msg, args...) do { \ +if ((enableDebug & INFO_UTIL_FLAG)&&(verboseDebug & INFO_UTIL_FLAG)) \ + printk("I-[%s] " msg , __func__ , ##args ); \ +} while (0) + + +#else +#define INFO_INIT(msg, args...) do {}while(0); +#define INFO_TCP(msg, args...) do {}while(0); +#define INFO_TCP_VER(msg, args...) do { }while(0); +#define INFO_SPI(msg, args...) do {}while(0); +#define INFO_SPI_VER(msg, args...) do { }while(0); +#define INFO_UTIL(msg, args...) do {}while(0); +#define INFO_UTIL_VER(msg, args...) do { }while(0); +#endif + +#ifdef _APP_DEBUG_ +#define INFO(msg, args...) do { \ +printk("I-[%s] " msg , __func__ , ##args ); \ +} while (0) + +#else /* !defined(_DEBUG_) */ +//#define INFO(msg, args...) do {} while (0) +#endif /* !defined(_DEBUG_) */ + +#if 1 +#define WARN(msg, args...) do { \ + if (enableDebug & INFO_WARN_FLAG) printk("W-[%s] " msg , __func__ , ##args ); \ + } while (0) +#else +#define WARN(msg, args...) do { } while (0) +#endif + +extern void dump(char* _buf, uint16_t _count); + +#ifdef _APP_DEBUG_ +#define DUMP(BUF, COUNT) do { \ + printk("[%s]\n", __func__); \ + dump((char*)BUF, COUNT); \ + } while (0) +#else +#define DUMP(BUF, COUNT) do {} while (0) +#endif +#endif + +#define DUMP_TCP(BUF, COUNT) do { \ + if (verboseDebug & INFO_TCP_FLAG) { \ + printk("[%s]\n", __func__); \ + dump((char*)BUF, COUNT); \ + }} while (0) + diff --git a/firmwares/wifishield/wifiHD/src/fw_download.h b/firmwares/wifishield/wifiHD/src/fw_download.h new file mode 100644 index 0000000..e36214f --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/fw_download.h @@ -0,0 +1,38 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef FW_DOWNLOAD_H +#define FW_DOWNLOAD_H + +#include +#include + +int fw_download_init(void); +size_t fw_read_cb(void *ctx, const uint8_t** buf, size_t offset, size_t len); +#endif diff --git a/firmwares/wifishield/wifiHD/src/fw_download_extflash.c b/firmwares/wifishield/wifiHD/src/fw_download_extflash.c new file mode 100644 index 0000000..d679271 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/fw_download_extflash.c @@ -0,0 +1,82 @@ +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#include +#include +#include +#include +#include + +int fw_download_init(void) +{ + nvram_init(); + return 0; +} + +#define BUF_SIZE 512 + + +size_t fw_read_cb(void* ctx, + const uint8_t** buf, + size_t offset, + size_t len) +{ + static uint8_t* fw_buf = NULL; + size_t rlen; + /* when firmware download is completed, this function will be + * invoked one additional time with buf set to NULL. we can + * free the firmware buffer at this time since it's no longer + * needed. + */ + if (NULL == buf) { + if (fw_buf) { + free(fw_buf); + fw_buf = NULL; + } + return 0; + } + + /* first call? then initialize flash and allocate a buffer to hold + * firmware data. + */ + if (fw_buf == NULL) { + fw_buf = malloc(BUF_SIZE); + + if (fw_buf == NULL) { + printk("could not allocate firmware buffer\n"); + return 0; + } + } + /* read at most a full buffer */ + rlen = len > BUF_SIZE ? BUF_SIZE : len; + + /* read data and update output parameters */ + nvram_read(offset, fw_buf, rlen); + *buf = fw_buf; + + return rlen; +} diff --git a/firmwares/wifishield/wifiHD/src/license.txt b/firmwares/wifishield/wifiHD/src/license.txt new file mode 100644 index 0000000..e57439f --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/license.txt @@ -0,0 +1,42 @@ + Copyright (C) 2009, H&D Wireless AB All rights reserved. + + The license to use this software in whole and in part and to + redistribute it in any form follows with the WiFi HW module from H&D + Wireless and is granted under the following restrictions: + + 1. Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + 3. The name of H&D Wireless AB may not be used to endorse or promote + products derived from this software without specific prior written + permission. + + 4. The software may only be used together with hardware from H&D + Wireless all other use is prohibited. + + 5. The license to use and redistribute the software is granted + together with the purchase of a hardware platform on a one to one + basis + + 6. The binary code may not be reversed engineered or by other means + copied to circumvent this license. + + THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY + EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + PURPOSE ARE EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT + SHALL HD WIRELESS AB BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + OF THE POSSIBILITY OF SUCH DAMAGE. + + For more information regarding this software license Contact H&D + Wireless AB (support@hd-wireless.se). diff --git a/firmwares/wifishield/wifiHD/src/lwip_setup.c b/firmwares/wifishield/wifiHD/src/lwip_setup.c new file mode 100644 index 0000000..bfa8c09 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/lwip_setup.c @@ -0,0 +1,145 @@ +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/*! + * \file lwIP setup code + * + * \brief Collects the lwIP setup code that an application has to + * execute in a standalone environment. + * + * \author H&D Wireless AB \n + * + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "lwip_setup.h" +#include "lwip/dns.h" + + +/** + * + */ +static void +tcp_tmr_cb(void *ctx) +{ + tcp_tmr(); +} + +/** + * + */ +static void +ip_tmr_cb(void *ctx) +{ + ip_reass_tmr(); +} + +/** + * + */ +static void +dns_tmr_cb(void *ctx) +{ + dns_tmr(); +} + +/** + * + */ +static void +etharp_tmr_cb(void *ctx) +{ + etharp_tmr(); +} + + +/** + * + */ +static void +dhcp_fine_tmr_cb(void *ctx) +{ + dhcp_fine_tmr(); +} + +/** + * + */ +static void +dhcp_coarse_tmr_cb(void *ctx) +{ + dhcp_coarse_tmr(); +} + +int start_ip_stack(struct net_cfg *cfg, + struct ip_addr ipaddr, + struct ip_addr netmask, + struct ip_addr gw) { + + if (cfg->dhcp_enabled) { + IP4_ADDR(&gw, 0,0,0,0); + IP4_ADDR(&ipaddr, 0,0,0,0); + IP4_ADDR(&netmask, 0,0,0,0); + } + + /* add wl to lwip interface list and set as default */ + cfg->netif = netif_add(cfg->netif, + &ipaddr, + &netmask, + &gw, + NULL, + wlif_init, /* init */ + ethernet_input /* handles ARP and IP packets */); + + if (cfg->netif == NULL) + return -1; + netif_set_default(cfg->netif); + + /* register lwip timer callbacks for tcp, arp and dhcp protocols */ + timer_sched_timeout_cb(5000, TIMEOUT_PERIODIC, + etharp_tmr_cb, NULL); + timer_sched_timeout_cb(TCP_TMR_INTERVAL, TIMEOUT_PERIODIC, + tcp_tmr_cb, NULL); + timer_sched_timeout_cb(DHCP_FINE_TIMER_MSECS, TIMEOUT_PERIODIC, + dhcp_fine_tmr_cb, NULL); + timer_sched_timeout_cb(DHCP_COARSE_TIMER_MSECS, TIMEOUT_PERIODIC, + dhcp_coarse_tmr_cb, NULL); + timer_sched_timeout_cb(IP_TMR_INTERVAL, TIMEOUT_PERIODIC, + ip_tmr_cb, NULL); + timer_sched_timeout_cb(DNS_TMR_INTERVAL, TIMEOUT_PERIODIC, + dns_tmr_cb, NULL); + + return 1; +} diff --git a/firmwares/wifishield/wifiHD/src/lwip_setup.h b/firmwares/wifishield/wifiHD/src/lwip_setup.h new file mode 100644 index 0000000..7a3ec6f --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/lwip_setup.h @@ -0,0 +1,21 @@ +#ifndef _LWIP_SETUP_H +#define _LWIP_SETUP_H + +struct net_cfg { + struct netif *netif; /* lwip network interface */ + uint8_t dhcp_enabled; + uint8_t dhcp_running; +}; + +/*! Start the IP stack. + * If cfg->netif must have been allocated and lwip_init() + * must have been called before this function is called + * (since the IP stack may have to be polled before this + * function can be called). + */ +int start_ip_stack(struct net_cfg *cfg, + struct ip_addr ipaddr, + struct ip_addr netmask, + struct ip_addr gw); + +#endif /* _LWIP_SETUP_H */ diff --git a/firmwares/wifishield/wifiHD/src/lwipopts.h b/firmwares/wifishield/wifiHD/src/lwipopts.h new file mode 100644 index 0000000..64965bf --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/lwipopts.h @@ -0,0 +1,450 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/** + * @file + * + * lwIP Options Configuration + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIPOPTS_H__ +#define __LWIPOPTS_H__ + +#include "wl_api.h" +#include + +#ifndef BOARD +#error "BOARD must be defined" +#endif + +/* + ----------------------------------------------- + ---------- Platform specific locking ---------- + ----------------------------------------------- +*/ + +/** + * NO_SYS==1: Provides VERY minimal functionality. Otherwise, + * use lwIP facilities. + */ +#define NO_SYS 1 + + +/* + ------------------------------------ + ---------- Memory options ---------- + ------------------------------------ +*/ +/** + * MEM_ALIGNMENT: should be set to the alignment of the CPU + * 4 byte alignment -> #define MEM_ALIGNMENT 4 + * 2 byte alignment -> #define MEM_ALIGNMENT 2 + */ +#define MEM_ALIGNMENT 4 + +/** + * MEM_SIZE: the size of the heap memory. If the application will send + * a lot of data that needs to be copied, this should be set high. + */ +#define MEM_SIZE 16000 + + +/* + ------------------------------------------------ + ---------- Internal Memory Pool Sizes ---------- + ------------------------------------------------ +*/ +/** + * MEMP_NUM_PBUF: the number of memp struct pbufs (used for PBUF_ROM and PBUF_REF). + * If the application sends a lot of data out of ROM (or other static memory), + * this should be set high. + */ +#if BOARD == EVK1101 /* Reduced RAM */ + #define MEMP_NUM_PBUF 4 +#else + #define MEMP_NUM_PBUF 30 +#endif +/** + * MEMP_NUM_RAW_PCB: Number of raw connection PCBs + * (requires the LWIP_RAW option) + */ +#define MEMP_NUM_RAW_PCB 4 + +/** + * MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One + * per active UDP "connection". + * (requires the LWIP_UDP option) + */ +#define MEMP_NUM_UDP_PCB 4 + +/** + * MEMP_NUM_TCP_PCB: the number of simulatenously active TCP connections. + * (requires the LWIP_TCP option) + */ +#define MEMP_NUM_TCP_PCB 2 + +/** + * MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP connections. + * (requires the LWIP_TCP option) + */ +#define MEMP_NUM_TCP_PCB_LISTEN 2 + +/** + * MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP segments. + * (requires the LWIP_TCP option) + */ +#if BOARD == EVK1101 /* Reduced RAM */ + #define MEMP_NUM_TCP_SEG 2 +#else + #define MEMP_NUM_TCP_SEG 32 +#endif + +/** + * MEMP_NUM_ARP_QUEUE: the number of simulateously queued outgoing + * packets (pbufs) that are waiting for an ARP request (to resolve + * their destination address) to finish. + * (requires the ARP_QUEUEING option) + */ +#define MEMP_NUM_ARP_QUEUE 2 + +/** + * MEMP_NUM_SYS_TIMEOUT: the number of simulateously active timeouts. + * (requires NO_SYS==0) + */ +#define MEMP_NUM_SYS_TIMEOUT 0 + +/** + * MEMP_NUM_NETBUF: the number of struct netbufs. + * (only needed if you use the sequential API, like api_lib.c) + */ +#define MEMP_NUM_NETBUF 0 + +/** + * MEMP_NUM_NETCONN: the number of struct netconns. + * (only needed if you use the sequential API, like api_lib.c) + */ +#define MEMP_NUM_NETCONN 0 + +/** + * MEMP_NUM_TCPIP_MSG_API: the number of struct tcpip_msg, which are used + * for callback/timeout API communication. + * (only needed if you use tcpip.c) + */ +#define MEMP_NUM_TCPIP_MSG_API 0 + +/** + * MEMP_NUM_TCPIP_MSG_INPKT: the number of struct tcpip_msg, which are used + * for incoming packets. + * (only needed if you use tcpip.c) + */ +#define MEMP_NUM_TCPIP_MSG_INPKT 0 + +/** + * PBUF_POOL_SIZE: the number of buffers in the pbuf pool. + */ +#if BOARD == EVK1101 /* Reduced RAM */ + #define PBUF_POOL_SIZE 2 +#else + #define PBUF_POOL_SIZE 32 +#endif +/* + --------------------------------- + ---------- ARP options ---------- + --------------------------------- +*/ +/** + * LWIP_ARP==1: Enable ARP functionality. + */ +#define LWIP_ARP 1 + +/* + -------------------------------- + ---------- IP options ---------- + -------------------------------- +*/ +/** + * IP_FORWARD==1: Enables the ability to forward IP packets across network + * interfaces. If you are going to run lwIP on a device with only one network + * interface, define this to 0. + */ +#define IP_FORWARD 0 + +/** + * IP_OPTIONS: Defines the behavior for IP options. + * IP_OPTIONS==0_ALLOWED: All packets with IP options are dropped. + * IP_OPTIONS==1_ALLOWED: IP options are allowed (but not parsed). + */ +#define IP_OPTIONS_ALLOWED 1 + +/** + * IP_REASSEMBLY==1: Reassemble incoming fragmented IP packets. Note that + * this option does not affect outgoing packet sizes, which can be controlled + * via IP_FRAG. + */ +#define IP_REASSEMBLY 1 + +/** + * IP_FRAG==1: Fragment outgoing IP packets if their size exceeds MTU. Note + * that this option does not affect incoming packet sizes, which can be + * controlled via IP_REASSEMBLY. + */ +#define IP_FRAG 1 + +/** + * IP_REASS_MAXAGE: Maximum time (in multiples of IP_TMR_INTERVAL - so seconds, normally) + * a fragmented IP packet waits for all fragments to arrive. If not all fragments arrived + * in this time, the whole packet is discarded. + */ +#define IP_REASS_MAXAGE 3 + +/** + * IP_REASS_MAX_PBUFS: Total maximum amount of pbufs waiting to be reassembled. + * Since the received pbufs are enqueued, be sure to configure + * PBUF_POOL_SIZE > IP_REASS_MAX_PBUFS so that the stack is still able to receive + * packets even if the maximum amount of fragments is enqueued for reassembly! + */ +#if BOARD == EVK1101 /* Reduced RAM */ + #define IP_REASS_MAX_PBUFS PBUF_POOL_SIZE + #define MEMP_NUM_REASSDATA PBUF_POOL_SIZE-1 +#else + #define IP_REASS_MAX_PBUFS 10 +#endif + +/** + * IP_FRAG_USES_STATIC_BUF==1: Use a static MTU-sized buffer for IP + * fragmentation. Otherwise pbufs are allocated and reference the original + * packet data to be fragmented. + */ +#define IP_FRAG_USES_STATIC_BUF 0 + +/** + * IP_DEFAULT_TTL: Default value for Time-To-Live used by transport layers. + */ +#define IP_DEFAULT_TTL 255 + +/* + ---------------------------------- + ---------- ICMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_ICMP==1: Enable ICMP module inside the IP stack. + * Be careful, disable that make your product non-compliant to RFC1122 + */ +#define LWIP_ICMP 1 + +/** + * ICMP_TTL: Default value for Time-To-Live used by ICMP packets. + */ +#define ICMP_TTL (IP_DEFAULT_TTL) + +/* + --------------------------------- + ---------- RAW options ---------- + --------------------------------- +*/ +/** + * LWIP_RAW==1: Enable application layer to hook into the IP layer itself. + */ +#define LWIP_RAW 1 + +/* + ---------------------------------- + ---------- DHCP options ---------- + ---------------------------------- +*/ +/** + * LWIP_DHCP==1: Enable DHCP module. + */ +#define LWIP_DHCP 1 + +/* + ------------------------------------ + ---------- AUTOIP options ---------- + ------------------------------------ +*/ +/** + * LWIP_AUTOIP==1: Enable AUTOIP module. + */ +#define LWIP_AUTOIP 0 + +/* + ---------------------------------- + ---------- SNMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_SNMP==1: Turn on SNMP module. UDP must be available for SNMP + * transport. + */ +#define LWIP_SNMP 0 +#define SNMP_PRIVATE_MIB 0 + +/* + ---------------------------------- + ---------- IGMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_IGMP==1: Turn on IGMP module. + */ +#define LWIP_IGMP 0 + +/* + ---------------------------------- + ---------- DNS options ----------- + ---------------------------------- +*/ +/** + * LWIP_DNS==1: Turn on DNS module. UDP must be available for DNS + * transport. + */ +#define LWIP_DNS 1 + +/* + --------------------------------- + ---------- UDP options ---------- + --------------------------------- +*/ +/** + * LWIP_UDP==1: Turn on UDP. + */ +#define LWIP_UDP 1 + +/** + * LWIP_UDPLITE==1: Turn on UDP-Lite. (Requires LWIP_UDP) + */ +#define LWIP_UDPLITE 0 + +/** + * UDP_TTL: Default Time-To-Live value. + */ +#define UDP_TTL (IP_DEFAULT_TTL) + +/* + --------------------------------- + ---------- TCP options ---------- + --------------------------------- +*/ +/** + * LWIP_TCP==1: Turn on TCP. + */ +#define LWIP_TCP 1 + +/* + ---------------------------------- + ---------- Pbuf options ---------- + ---------------------------------- +*/ +/** + * PBUF_LINK_HLEN: the number of bytes that should be allocated for a + * link level header. The default is 14, the standard value for + * Ethernet. + */ +#define PBUF_LINK_HLEN (14 + ETH_PAD_SIZE) + +/* + ------------------------------------ + ---------- LOOPIF options ---------- + ------------------------------------ +*/ +/** + * LWIP_HAVE_LOOPIF==1: Support loop interface (127.0.0.1) and loopif.c + */ +#define LWIP_HAVE_LOOPIF 1 +#define LWIP_LOOPIF_MULTITHREADING 0 + +/* + ---------------------------------------------- + ---------- Sequential layer options ---------- + ---------------------------------------------- +*/ + +/** + * LWIP_NETCONN==1: Enable Netconn API (require to use api_lib.c) + */ +#define LWIP_NETCONN 0 + +/* + ------------------------------------ + ---------- Socket options ---------- + ------------------------------------ +*/ +/** + * LWIP_SOCKET==1: Enable Socket API (require to use sockets.c) + */ +#define LWIP_SOCKET 0 + +/* + ---------------------------------------- + ---------- Statistics options ---------- + ---------------------------------------- +*/ +/** + * LWIP_STATS==1: Enable statistics collection in lwip_stats. + */ +#define LWIP_STATS 1 +#define LINK_STATS 1 + +/* Misc */ +#define LWIP_NETIF_LINK_CALLBACK 1 +#define LWIP_NETIF_STATUS_CALLBACK 1 +#define LWIP_TIMEVAL_PRIVATE 0 + +#undef DHCP_DOES_ARP_CHECK + +#if 0 +#define LWIP_DEBUG 1 +//#define NETIF_DEBUG LWIP_DBG_ON +//#define DHCP_DEBUG LWIP_DBG_ON +//#define ICMP_DEBUG LWIP_DBG_ON +//#define TCP_DEBUG LWIP_DBG_ON +//#define TCP_RTO_DEBUG LWIP_DBG_ON +//#define IP_DEBUG LWIP_DBG_ON +//#define TCP_CWND_DEBUG LWIP_DBG_ON +//#define ETHARP_DEBUG LWIP_DBG_ON +#define PBUF_DEBUG LWIP_DBG_ON +//#define TCP_INPUT_DEBUG LWIP_DBG_ON +//#define TCP_OUTPUT_DEBUG LWIP_DBG_ON +#endif + +#define ETH_PAD_SIZE WL_HEADER_SIZE /* size of wifiengine header */ +#define MEM_LIBC_MALLOC 1 + +#define TCP_MSS 512 +#if BOARD == EVK1101 /* Reduced RAM */ + #define TCP_SND_BUF (1460*1) /* MTU (1500) - IP - TCP hdrs == 1460 */ +#else + #define TCP_SND_BUF 4096 +#endif +#endif /* __LWIPOPTS_H__ */ diff --git a/firmwares/wifishield/wifiHD/src/main.c b/firmwares/wifishield/wifiHD/src/main.c new file mode 100644 index 0000000..8961e35 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/main.c @@ -0,0 +1,455 @@ +/* + * main.c + * + * Created on: May 27, 2010 + * Author: mlf by Metodo2 srl + */ + +//#define _TEST_SPI_ + +#include +#include "board.h" +#include "gpio.h" + +#include +#include "wl_api.h" +#include "wl_cm.h" + +#include "lwip/init.h" +#include "lwip/dhcp.h" +#include "lwip/dns.h" +#include "lwip/tcp.h" +#include "netif/etharp.h" +#include "netif/wlif.h" + +#include "board_init.h" +#include "trace.h" + +#include "timer.h" +#include "util.h" +#include "cmd_wl.h" +#include "ping.h" +#include "ard_tcp.h" +#include "spi.h" +#include "ard_spi.h" +#include "delay.h" +#include "tc.h" +#include "debug.h" +#include "ard_utils.h" +#include + +/* FIRMWARE version */ +const char* fwVersion = "1.0.0"; + +#if BOARD == ARDUINO +#if !defined(DATAFLASH) +#include "wl_fw.h" + +int fw_download_init(void) { return 0;} +void fw_download_cb(void* ctx, uint8_t** buf, uint32_t* len) +{ + //printk("Fw download not available!\n"); + /* remember accross different calls */ + static uint8_t* _fw_buf = (uint8_t*)&fw_buf[0]; + static uint32_t offset = 0; + + /* when firmware download is completed, this function will be invoked + * on additional time with the input value of len set to 0. we can free + * the firmware buffer at this time since it's no longer needed. + */ + if (*len == 0) { + return; + } + + /* decide how much to read. we know *len bytes remains, but we only have + * room for SECTOR_SIEZ bytes in our buffer (fw_buf) + */ + uint32_t fw_len = *len; + + *buf = (_fw_buf+offset); + *len = fw_len; + + /* we need to know where to start reading upon next call */ + offset += fw_len; + +} +#else +#include "fw_download.h" +#endif +#endif + +struct ctx_server { + struct net_cfg net_cfg; + uint8_t wl_init_complete; +}; + +bool ifStatus = false; +bool scanNetCompleted = false; + +static bool initSpiComplete = false; + +// variable used as enable flag for debug prints +#ifdef _DEBUG_ +uint16_t enableDebug = DEFAULT_INFO_FLAG | INFO_WARN_FLAG;// | INFO_SPI_FLAG; +uint16_t verboseDebug = 0; +#else +uint16_t enableDebug = DEFAULT_INFO_FLAG; +uint16_t verboseDebug = 0; +#endif + + +/** + * + */ +static void +wl_cm_scan_cb(void* ctx) +{ + INFO_INIT("Scan Completed!\n"); + scanNetCompleted=true; +} + +/** + * + */ +static void +wl_cm_conn_cb(struct wl_network_t* net, void* ctx) +{ + struct ctx_server* hs = ctx; + + LINK_LED_ON(); + + INFO_INIT("Connection cb...\n"); + + printk("link up, connected to \"%s\"\n", ssid2str(&net->ssid)); + if ( hs->net_cfg.dhcp_enabled ) { + INFO_INIT("Start DHCP...\n"); + printk("requesting dhcp ... "); + int8_t result = dhcp_start(hs->net_cfg.netif); + printk((result==ERR_OK)?"OK\n":"FAILED\n"); + hs->net_cfg.dhcp_running = 1; + } + else { + netif_set_up(hs->net_cfg.netif); + } + + INFO_INIT("Start DNS...\n"); + dns_init(); +} + + +/** + * + */ +static void +wl_cm_disconn_cb(void* ctx) +{ + struct ctx_server* hs = ctx; + + LINK_LED_OFF(); + INFO_INIT("Disconnection cb...\n"); + + if (hs->net_cfg.dhcp_running) { + printk("link down, release dhcp\n"); + dhcp_release(hs->net_cfg.netif); + dhcp_stop(hs->net_cfg.netif); + hs->net_cfg.dhcp_running = 0; + } else { + printk("link down\n"); + netif_set_down(hs->net_cfg.netif); + } + + set_result_cmd(WL_FAILURE); +} + +#if 0 +static void wl_cm_err_cb(void* ctx) +{ + int err = *(int*)ctx; + WARN("Error: %d\n", err); + set_result_cmd(err); +} +#endif + +/** + * + */ +static void +ip_status_cb(struct netif* netif) +{ + INFO_INIT("IP status cb...\n"); + if (netif_is_up(netif)) { + set_result_cmd(WL_SUCCESS); + printk("bound to %s\n", ip2str(netif->ip_addr)); + ifStatus = true; + }else{ + ifStatus = false; + closeConnections(); + WARN("Interface not up!\n"); + } +} + + +/** + * + */ +void +led_init(void) +{ + gpio_enable_gpio_pin(LED0_GPIO); + gpio_enable_gpio_pin(LED1_GPIO); + gpio_enable_gpio_pin(LED2_GPIO); + LINK_LED_OFF(); + ERROR_LED_OFF(); + DATA_LED_OFF(); +} + + +void tc_init(void) +{ + // The timer/counter instance and channel number are used in several functions. + // It's defined as local variable for ease-of-use causes and readability. + volatile avr32_tc_t *tc = WIFI_TC; + + // Options for waveform genration. + tc_waveform_opt_t waveform_opt = + { + .channel = WIFI_TC_CHANNEL_ID, // Channel selection. + + .bswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOB. + .beevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOB. + .bcpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOB. + .bcpb = TC_EVT_EFFECT_NOOP, // RB compare effect on TIOB. + + .aswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOA. + .aeevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOA. + .acpc = TC_EVT_EFFECT_TOGGLE, // RC compare effect on TIOA: toggle. + .acpa = TC_EVT_EFFECT_TOGGLE, // RA compare effect on TIOA: toggle (other possibilities are none, set and clear). + + .wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,// Waveform selection: Up mode with automatic trigger(reset) on RC compare. + .enetrg = FALSE, // External event trigger enable. + .eevt = TC_EXT_EVENT_SEL_TIOB_INPUT, // External event selection. + .eevtedg = TC_SEL_NO_EDGE, // External event edge selection. + .cpcdis = FALSE, // Counter disable when RC compare. + .cpcstop = FALSE, // Counter clock stopped with RC compare. + + .burst = TC_BURST_NOT_GATED, // Burst signal selection. + .clki = TC_CLOCK_RISING_EDGE, // Clock inversion. + .tcclks = TC_CLOCK_SOURCE_TC2 // Internal source clock 3, connected to fPBA / 2. + }; + + // Assign I/O to timer/counter channel pin & function. + gpio_enable_module_pin(WIFI_TC_CHANNEL_PIN, WIFI_TC_CHANNEL_FUNCTION); + + // Initialize the timer/counter. + tc_init_waveform(tc, &waveform_opt); // Initialize the timer/counter waveform. + + // Set the compare triggers. + tc_write_ra(tc, WIFI_TC_CHANNEL_ID, 0x01A4); // Set RA value. + tc_write_rc(tc, WIFI_TC_CHANNEL_ID, 0x0348); // Set RC value. + + // Start the timer/counter. + tc_start(tc, WIFI_TC_CHANNEL_ID); + +} + +/** + * + */ +void +poll(struct ctx_server* hs) +{ + /* this will trigger any scheduled timer callbacks */ + timer_poll(); + + /* handle console input */ + console_poll(); + + /* wl api 'tick' */ + wl_tick(timer_get_ms()); + + /* lwip driver poll */ + wlif_poll(hs->net_cfg.netif); + + if (initSpiComplete) spi_poll(hs->net_cfg.netif); + +#ifdef WITH_GUI + gui_exec(timer_get_ms()); +#endif +} + +void initShell() +{ + /* initialize shell */ + INFO_INIT("Shell init...\n"); + console_init(); + console_add_cmd("scan", cmd_scan, NULL); + console_add_cmd("connect", cmd_connect, NULL); + console_add_cmd("setkey", cmd_setkey, NULL); + console_add_cmd("status", cmd_status, NULL); + console_add_cmd("debug", cmd_debug, NULL); + +#ifdef ADD_CMDS + console_add_cmd("powersave", cmd_power, NULL); + console_add_cmd("psconf", cmd_psconf, NULL); +#endif +#ifdef PING_CMD + console_add_cmd("ping", cmd_ping, NULL); +#endif + console_add_cmd("ttcp", cmd_ttcp, NULL); +#ifdef WITH_WPA + console_add_cmd("wpass", cmd_setpass, NULL); + console_add_cmd("dpass", cmd_delpass, NULL); +#endif +#ifdef _SPI_STATS_ + console_add_cmd("spiStat", cmd_statSpi, NULL); + console_add_cmd("resetSpiStat", cmd_resetStatSpi, NULL); +#endif +#ifdef _DNS_CMD_ + console_add_cmd("getHost", cmd_gethostbyname, NULL); + console_add_cmd("setDNS", cmd_setDnsServer, NULL); + console_add_cmd("startTcpSrv", cmd_startTcpSrv, NULL); +#endif +} + +/** + * + */ +void +wl_init_complete_cb(void* ctx) +{ + struct ctx_server *hs = ctx; + struct ip_addr ipaddr, netmask, gw; + wl_err_t wl_status; + + IP4_ADDR(&gw, 0,0,0,0); + IP4_ADDR(&ipaddr, 0,0,0,0); + IP4_ADDR(&netmask, 0,0,0,0); + + /* default is dhcp enabled */ + hs->net_cfg.dhcp_enabled = 1; + start_ip_stack(&hs->net_cfg, + ipaddr, + netmask, + gw); + netif_set_status_callback(hs->net_cfg.netif, ip_status_cb); + + INFO_INIT("Starting CM...\n"); + /* start connection manager */ + wl_status = wl_cm_init(wl_cm_scan_cb, wl_cm_conn_cb, wl_cm_disconn_cb, hs); + ASSERT(wl_status == WL_SUCCESS, "failed to init wl conn mgr"); + wl_cm_start(); + + wl_scan(); + + if (initSpi()){ + WARN("Spi not initialized\n"); + }else + { + initSpiComplete = true; + AVAIL_FOR_SPI(); + } + + hs->wl_init_complete = 1; +} + +void startup_init(void) +{ + INIT_SIGNAL_FOR_SPI(); + BUSY_FOR_SPI(); + + // if DEBUG enabled use DEB_PIN_GPIO for debug purposes + DEB_PIN_ENA(); + DEB_PIN_UP(); +} + +/** + * + */ +int +main(void) +{ + wl_err_t wl_status; + int status; + struct ctx_server *hs; + enum wl_host_attention_mode mode; + + startup_init(); + + board_init(); + + led_init(); + + tc_init(); + + initShell(); + + delay_init(FOSC0); + +#ifdef _TEST_SPI_ + for (;;) + { + /* handle console input */ + + console_poll(); + + spi_poll(NULL); + + } +#else + printk("Arduino Wifi Startup... [%s]\n", __TIMESTAMP__); + + size_t size_ctx_server = sizeof(struct ctx_server); + hs = calloc(1, size_ctx_server); + ASSERT(hs, "out of memory"); + + size_t size_netif = sizeof(struct netif); + hs->net_cfg.netif = calloc(1, size_netif); + ASSERT(hs->net_cfg.netif, "out of memory"); + + INFO_INIT("hs:%p size:0x%x netif:%p size:0x%x\n", hs, size_ctx_server, + hs->net_cfg.netif, size_netif); + + timer_init(NULL, NULL); + lwip_init(); + + status = fw_download_init(); + ASSERT(status == 0, "failed to prepare for firmware download\n"); + + wl_status = wl_transport_init(fw_read_cb, hs, &mode); + if (wl_status != WL_SUCCESS) + goto err; + INFO_INIT("Mode: 0x%x\n", mode); + wl_status = wl_init(hs, wl_init_complete_cb, mode); + if (wl_status != WL_SUCCESS) + goto err; + + /* start main loop */ + for (;;) + poll(hs); + + +err: + /* show error message on console and display if wlan initialization fails */ + +#define WL_CARD_FAILURE_STR "Could not detect wl device, aborting\n" +#define WL_FIRMWARE_INVALID_STR "Invalid firmware data, aborting\n" +#define WL_OTHER_FAILURE_STR "Failed to start wl initialization\n" + + switch (wl_status) { + case WL_CARD_FAILURE: + printk(WL_CARD_FAILURE_STR); + break; + + case WL_FIRMWARE_INVALID: + printk(WL_FIRMWARE_INVALID_STR); + break; + + default: + printk(WL_OTHER_FAILURE_STR); + break; + } + for (;;) { + timer_poll(); + } +#endif +} diff --git a/firmwares/wifishield/wifiHD/src/nvram.c b/firmwares/wifishield/wifiHD/src/nvram.c new file mode 100644 index 0000000..2c61c5f --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/nvram.c @@ -0,0 +1,153 @@ +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#include + +#include "compiler.h" +#include "preprocessor.h" +#include "board.h" +#include "power_clocks_lib.h" +#include "gpio.h" +#include "spi.h" +#include "conf_at45dbx.h" +#include "at45dbx.h" +#include +#include + + +static struct nvram { + uint8_t read; + void *data; + uint32_t len; + uint16_t off; +} PRIV; + +int nvram_init(void) +{ + spi_options_t spiOptions = { + .reg = AT45DBX_SPI_FIRST_NPCS, + .baudrate = AT45DBX_SPI_MASTER_SPEED, + .bits = AT45DBX_SPI_BITS, + .spck_delay = 0, + .trans_delay = 0, + .stay_act = 1, + .spi_mode = 0, + .modfdis = 1 + }; + + at45dbx_init(spiOptions, FPBA_HZ); + return 0; +} + + +/** + * Invoked by at45dbx driver + * + */ +void at45dbx_read_multiple_sector_callback(const void *psector) +{ + struct nvram *priv = &PRIV; + const uint8_t *buf = psector; + + if (!priv->read) + return; + + memcpy(priv->data, buf + priv->off, priv->len); +} + + +/** + * Invoked by at45dbx driver + * + */ +void at45dbx_write_multiple_sector_callback(void *psector) +{ + struct nvram *priv = &PRIV; + uint8_t *buf = psector; + memcpy(buf + priv->off, priv->data, priv->len); +} + + +/** + * Write/read any number bytes into any offset of nor flash by taking care + * of cases where the length is not aligned to the sector size or where + * the addr is not aligned to the sector offsets. + * + */ +static int nvram_rw(uint32_t addr, void *data, uint16_t len, int write) +{ + struct nvram *priv = &PRIV; + priv->read = write ? 0 : 1; + + while (len) { + uint32_t sector = addr / AT45DBX_SECTOR_SIZE; + priv->data = data; + priv->off = addr % AT45DBX_SECTOR_SIZE; + priv->len = AT45DBX_SECTOR_SIZE; + + if (len < AT45DBX_SECTOR_SIZE) + priv->len = len; + + if (priv->len > AT45DBX_SECTOR_SIZE - priv->off) + priv->len = AT45DBX_SECTOR_SIZE - priv->off; + + at45dbx_read_open(sector); + at45dbx_read_multiple_sector(1); + at45dbx_read_close(); + + if (write) { + at45dbx_write_open(sector); + at45dbx_write_multiple_sector(1); + at45dbx_write_close(); + } + + data += priv->len; + len -= priv->len; + addr += priv->len; + } + + return 0; +} + +/** + * Write any number bytes into any offset of nor flash. + * + */ +int nvram_write(uint32_t addr, const void *data, uint32_t len) +{ + return nvram_rw(addr, (void *) data, len, 1); +} + + +/** + * Read any number bytes into any offset of nor flash. + * + */ +int nvram_read(uint32_t addr, void *data, uint32_t len) +{ + return nvram_rw(addr, data, len, 0); +} diff --git a/firmwares/wifishield/wifiHD/src/nvram.h b/firmwares/wifishield/wifiHD/src/nvram.h new file mode 100644 index 0000000..8882749 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/nvram.h @@ -0,0 +1,10 @@ +#ifndef NVRAM_H +#define NVRAM_H + +#include + +int nvram_init(void); +int nvram_read(uint32_t addr, void *data, uint32_t len); +int nvram_write(uint32_t addr, const void *data, uint32_t len); + +#endif diff --git a/firmwares/wifishield/wifiHD/src/owl_os.c b/firmwares/wifishield/wifiHD/src/owl_os.c new file mode 100644 index 0000000..d17d8ce --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/owl_os.c @@ -0,0 +1,140 @@ +#include +#include +#include +#include + +#include + +void *owl_os_alloc(size_t size) +{ + return malloc(size); +} + +void *owl_os_realloc(void *ptr, size_t size) +{ + return realloc(ptr, size); +} + +void owl_os_free(void *p) +{ + free(p); +} + +void *owl_os_memcpy(void *dst, const void *src, size_t n) +{ + return memcpy(dst, src, n); +} + +void *owl_os_memset(void *s, int c, size_t n) +{ + return memset(s, c, n); +} + +void *owl_os_memmove(void *dst, const void *src, size_t n) +{ + return memmove(dst, src, n); +} + +size_t owl_os_strlen(char *s) +{ + return strlen(s); +} + +char *owl_os_strncpy(char *dst, const char *src, size_t n) +{ + return strncpy(dst, src, n); +} + +int owl_os_strncmp(const char *s1, const char *s2, size_t n) +{ + return strncmp(s1, s2, n); +} + +int owl_os_strcmp(const char *s1, const char *s2) +{ + return strcmp(s1, s2); +} + +char *owl_os_strcpy(char *dst, const char *src) +{ + return strcpy(dst, src); +} + +char *owl_os_strdup(const char *s) +{ + return strdup(s); +} + +char *owl_os_strndup(const char *s, size_t n) +{ + return strndup(s, n); +} + +int owl_os_memcmp(const void *s1, const void *s2, size_t n) +{ + return memcmp(s1, s2, n); +} + +long int owl_os_strtol(const char *nptr, char **endptr, int base) +{ + return strtol(nptr, endptr, base); +} + +char *owl_os_strchr(const char *s, int c) +{ + return strchr(s, c); +} + +char *owl_os_strrchr(const char *s, int c) +{ + return strrchr(s, c); +} + +int owl_os_strcasecmp(const char *s1, const char *s2) +{ + return strcasecmp(s1, s2); +} + +char *owl_os_strstr(const char *haystack, const char *needle) +{ + return strstr(haystack, needle); +} + +int owl_os_snprintf(char *str, size_t size, const char *format, ...) +{ + int ret; + va_list ap; + va_start(ap, format); + ret = vsniprintf(str, size, format, ap); + va_end(ap); + return ret; +} + +/* for debugging only, never called if wl_api was built without debug */ +#ifdef CONFIG_OWL +#include "owl_env.h" +int owl_os_printf(const char *fmt, ...) +{ + char *str = NULL; + va_list args; + int len; + char *iter; + + va_start(args, fmt); + + if ((str = malloc(160)) == NULL) + return -1; + + if ((len = vsniprintf(str, 160, fmt, args)) < 0) { + free(str); + return -1; + } + + iter = str; + while (*iter) + owl_putc(*iter++); + + free(str); + return len; +} +#endif diff --git a/firmwares/wifishield/wifiHD/src/ping.c b/firmwares/wifishield/wifiHD/src/ping.c new file mode 100644 index 0000000..aba97db --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/ping.c @@ -0,0 +1,340 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2003 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is derived from a part of the lwIP TCP/IP stack. + * + */ +#ifdef PING_CMD +#include "lwip/opt.h" + +#include "lwip/mem.h" +#include "lwip/raw.h" +#include "lwip/icmp.h" +#include "lwip/netif.h" +#include "lwip/sys.h" +#include "lwip/sockets.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" + +#include "ping.h" +#include "timer.h" +#include "util.h" + +#include "getopt.h" + +#define PING_ID 0xAFAF + +struct ping_info_t { + struct ip_addr destination; + uint32_t deadline; /* -w (in seconds) */ + uint32_t interval; /* -i (in ms) */ + uint32_t timeout; /* ms */ + uint32_t data_size; /* -s */ + uint32_t count; /* -c, 0 means continous ping */ + uint32_t size; + uint32_t first_tx_tm; + uint32_t last_tx_tm; + uint32_t last_rx_tm; + uint32_t num_tx; + uint32_t num_rx; + uint32_t flags; + uint16_t seq_num; + Bool quiet; /* -q */ + ping_complete_cb_t complete_cb; + void *ctx; +#define PING_REPLY (1 << 0) +}; + +static struct ping_info_t INFO; + +/** Prepare a echo ICMP request */ +static void ping_prepare_echo(struct icmp_echo_hdr *iecho, + struct ping_info_t* ping_info) +{ + int i; + + ICMPH_TYPE_SET(iecho,ICMP_ECHO); + ICMPH_CODE_SET(iecho, 0); + iecho->chksum = 0; + iecho->id = PING_ID; + iecho->seqno = htons(++ping_info->seq_num); + iecho->chksum = 0; + + /* fill the additional data buffer with some data */ + for(i = 0; i < ping_info->data_size; i++) { + ((char*)iecho)[sizeof(struct icmp_echo_hdr) + i] = i; + } + + iecho->chksum = inet_chksum(iecho, ping_info->size); +} + +/* Ping using the raw ip */ +static u8_t ping_recv(void *arg, struct raw_pcb *pcb, struct pbuf *p, + struct ip_addr *addr) +{ + struct icmp_echo_hdr *iecho; + struct ip_hdr *ip = p->payload; + struct ping_info_t* ping_info = (struct ping_info_t*) arg; + uint32_t us; + + if (pbuf_header( p, -PBUF_IP_HLEN)==0) { + iecho = p->payload; + + if ((iecho->id == PING_ID) && + (iecho->seqno == htons(ping_info->seq_num))) { + ping_info->last_rx_tm = timer_get_ms(); + ping_info->num_rx++; + us = 1000 * + (ping_info->last_rx_tm - ping_info->last_tx_tm); + + if (!ping_info->quiet) + printk("%d bytes from %s: icmp_seq=%d ttl=%d " \ + "time=%d.%03d ms\n", + p->tot_len, ip2str(ip->src), + iecho->seqno, + IPH_TTL(ip), + us / 1000, us % 1000); + + /* do some ping result processing */ + ping_info->flags |= PING_REPLY; + } + } + + pbuf_free(p); + return 1; /* eat the event */ +} + +static void ping_send(struct raw_pcb *raw, struct ping_info_t* ping_info) +{ + struct pbuf *p; + struct icmp_echo_hdr *iecho; + + if (!(p = pbuf_alloc(PBUF_IP, ping_info->size, PBUF_RAM))) { + return; + } + if ((p->len == p->tot_len) && (p->next == NULL)) { + iecho = p->payload; + + ping_prepare_echo(iecho, ping_info); + raw_sendto(raw, p, &ping_info->destination); + + if (!ping_info->first_tx_tm) + ping_info->first_tx_tm = timer_get_ms(); + ping_info->last_tx_tm = timer_get_ms(); + ping_info->num_tx++; + } + pbuf_free(p); +} + +void ping_set_callback(ping_complete_cb_t cb, void *ctx) { + INFO.complete_cb = cb; + INFO.ctx = ctx; +} + +void ping_stop(uint32_t *tx_cnt, uint32_t *rx_cnt) { + struct ping_info_t *ping_info = &INFO; + + *tx_cnt = ping_info->num_tx; + *rx_cnt = ping_info->num_rx; + ping_info->count = ping_info->num_tx; + if ( 0 == ping_info->count ) { + ping_info->count = 1; + } +} + +static int init_ping_info(int argc, char* argv[], struct ping_info_t* ping_info) +{ + int c; + ping_complete_cb_t cb; + void *ctx; + + cb = ping_info->complete_cb; + ctx = ping_info->ctx; + memset(ping_info, 0, sizeof(struct ping_info_t)); + ping_info->complete_cb = cb; + ping_info->ctx = ctx; + + ping_info->deadline = 0; + ping_info->interval = 1000; + ping_info->timeout = 3000; + ping_info->data_size = 32; + ping_info->count = 3; + ping_info->destination = + netif_default ? netif_default->gw : ip_addr_any; + + optind = 1; + while ((c = getopt(argc, argv, "c:i:s:w:q")) != -1) { + switch (c) { + case 'c': + ping_info->count = atoi(optarg); + break; + + case 'i': + ping_info->interval = atoi(optarg); + break; + + case 's': + ping_info->data_size = atoi(optarg); + break; + + case 'q': + ping_info->quiet = TRUE; + break; + + case 'w': + ping_info->deadline = atoi(optarg); + break; + } + } + + ping_info->size = sizeof(struct icmp_echo_hdr) + ping_info->data_size; + + if (optind >= argc) + return -1; + + ping_info->destination = str2ip(argv[optind]); + if (!ping_info->destination.addr) + return -1; + + + ping_info->last_rx_tm = timer_get_ms(); + + return 0; +} + +static void print_stats(struct ping_info_t* ping_info) +{ + printk("\n--- %s ping statistics ---\n", + ip2str(ping_info->destination)); + printk("%d packets transmitted, %d received, %d%% packet loss, "\ + "time %dms\n\n", + ping_info->num_tx, ping_info->num_rx, + 100 * (ping_info->num_tx - ping_info->num_rx) / + ping_info->num_tx, + timer_get_ms() - ping_info->first_tx_tm); +} + +static void ping_finalize(struct ping_info_t* ping_info) { + print_stats(ping_info); + if (ping_info->complete_cb) { + ping_info->complete_cb(ping_info->num_tx, ping_info->num_rx, ping_info->ctx); + } +} + +cmd_state_t cmd_ping(int argc, char* argv[], void* ctx) +{ + static enum { + INIT, + PING, + WAIT_REPLY + } state = INIT; + + struct ping_info_t *ping_info = &INFO; + static struct raw_pcb *pcb; + + switch (state) { + case INIT: + if (init_ping_info(argc, argv, ping_info) != 0) { + printk("Usage: ping [-c count] [-i interval] " \ + "[-s packetsize]\n " \ + "[-w deadline] [-q] destination\n"); + return CMD_DONE; + } + + if (!(pcb = raw_new(IP_PROTO_ICMP))) { + printk("could not allocate pcb\n"); + state = INIT; + return CMD_DONE; + } + raw_recv(pcb, ping_recv, ping_info); + raw_bind(pcb, IP_ADDR_ANY); + + printk("PING %s %d(%d) bytes of data\n", + ip2str(ping_info->destination), + ping_info->data_size, + ping_info->size); + state = PING; + /* fall through */ + + case PING: + if (!netif_is_up(netif_default)) { + printk("netif is down\n"); + raw_remove(pcb); + state = INIT; + return CMD_DONE; + } + + if (ping_info->count && ping_info->num_tx == ping_info->count) { + ping_finalize(ping_info); + raw_remove(pcb); + state = INIT; + return CMD_DONE; + } + + + if (timer_get_ms() < ping_info->last_rx_tm + ping_info->interval) { + return CMD_INPROGRESS; + } + ping_send(pcb, ping_info); + + state = WAIT_REPLY; + return CMD_INPROGRESS; + + case WAIT_REPLY: + if (ping_info->flags & PING_REPLY) { + ping_info->flags &= (~PING_REPLY); + state = PING; + return CMD_INPROGRESS; + } + + if (timer_get_ms() > + ping_info->last_tx_tm + ping_info->timeout) { + if (!ping_info->quiet) + printk("timeout from %s\n", + ip2str(ping_info->destination)); + state = PING; + return CMD_INPROGRESS; + } + + if (ping_info->deadline && + timer_get_ms() > + ping_info->first_tx_tm + ping_info->deadline * 1000) { + ping_finalize(ping_info); + raw_remove(pcb); + state = INIT; + return CMD_DONE; + } + + return CMD_INPROGRESS; + } + + /* unreachable */ + Assert(0); + return CMD_DONE; +} +#endif diff --git a/firmwares/wifishield/wifiHD/src/ping.h b/firmwares/wifishield/wifiHD/src/ping.h new file mode 100644 index 0000000..47d409d --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/ping.h @@ -0,0 +1,45 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* + * Copyright (c) 2001-2003 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is derived from a part of the lwIP TCP/IP stack. + * + */ +#ifndef PING_H +#define PING_H + +#include "console.h" + +typedef void (*ping_complete_cb_t)(uint32_t tx_pkt_cnt, uint32_t rx_pkt_cnt, void *ctx); + +void ping_set_callback(ping_complete_cb_t cb, void *ctx); + +void ping_stop(uint32_t *tx_cnt, uint32_t *rx_cnt); + +cmd_state_t cmd_ping(int argc, char* argv[], void* ctx); + +#endif diff --git a/firmwares/wifishield/wifiHD/src/printf-stdarg.c b/firmwares/wifishield/wifiHD/src/printf-stdarg.c new file mode 100644 index 0000000..92eb217 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/printf-stdarg.c @@ -0,0 +1,323 @@ +/* This source file is part of the ATMEL AVR32-SoftwareFramework-AT32UC3A-1.4.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief sprintf functions to replace newlib for AVR32 UC3. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (C) 2006-2008, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + Copyright 2001, 2002 Georges Menie (www.menie.org) + stdarg version contributed by Christian Ettinger + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU Lesser General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +/* + putchar is the only external dependency for this file, + if you have a working putchar, leave it commented out. + If not, uncomment the define below and + replace outbyte(c) by your own function call. + +*/ + + +#include + +static void printchar(char **str, int c) +{ + extern int board_putchar(char c); + + if (str) { + **str = c; + ++(*str); + } + else (void) board_putchar(c); +} + +#define PAD_RIGHT 1 +#define PAD_ZERO 2 + +static int prints(char **out, const char *string, int width, int pad) +{ + register int pc = 0, padchar = ' '; + + if (width > 0) { + register int len = 0; + register const char *ptr; + for (ptr = string; *ptr; ++ptr) ++len; + if (len >= width) width = 0; + else width -= len; + if (pad & PAD_ZERO) padchar = '0'; + } + if (!(pad & PAD_RIGHT)) { + for ( ; width > 0; --width) { + printchar (out, padchar); + ++pc; + } + } + for ( ; *string ; ++string) { + printchar (out, *string); + ++pc; + } + for ( ; width > 0; --width) { + printchar (out, padchar); + ++pc; + } + + return pc; +} + +/* the following should be enough for 32 bit int */ +#define PRINT_BUF_LEN 12 + +static int printi(char **out, int i, int b, int sg, int width, int pad, int letbase) +{ + char print_buf[PRINT_BUF_LEN]; + register char *s; + register int t, neg = 0, pc = 0; + register unsigned int u = i; + + if (i == 0) { + print_buf[0] = '0'; + print_buf[1] = '\0'; + return prints (out, print_buf, width, pad); + } + + if (sg && b == 10 && i < 0) { + neg = 1; + u = -i; + } + + s = print_buf + PRINT_BUF_LEN-1; + *s = '\0'; + + while (u) { + t = u % b; + if( t >= 10 ) + t += letbase - '0' - 10; + *--s = t + '0'; + u /= b; + } + + if (neg) { + if( width && (pad & PAD_ZERO) ) { + printchar (out, '-'); + ++pc; + --width; + } + else { + *--s = '-'; + } + } + + return pc + prints (out, s, width, pad); +} + +#if 0 +int fprintf(__FILE *stream, const char *format, ...) +{ +return 0; +} +#endif + +int printk_va(char **out, const char *format, va_list args ) +{ + register int width, pad; + register int pc = 0; + char scr[2]; + + for (; *format != 0; ++format) { + if (*format == '%') { + ++format; + width = pad = 0; + if (*format == '\0') break; + if (*format == '%') goto out; + if (*format == '-') { + ++format; + pad = PAD_RIGHT; + } + while (*format == '0') { + ++format; + pad |= PAD_ZERO; + } + for ( ; *format >= '0' && *format <= '9'; ++format) { + width *= 10; + width += *format - '0'; + } + if( *format == 's' ) { + register char *s = (char *)va_arg( args, int ); + pc += prints (out, s?s:"(null)", width, pad); + continue; + } + if( *format == 'd' ) { + pc += printi (out, va_arg( args, int ), 10, 1, width, pad, 'a'); + continue; + } + if( *format == 'p' ) { + pad = 8; + pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'a'); + continue; + } + if( *format == 'x' ) { + pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'a'); + continue; + } + if( *format == 'X' ) { + pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'A'); + continue; + } + if( *format == 'u' ) { + pc += printi (out, va_arg( args, int ), 10, 0, width, pad, 'a'); + continue; + } + if( *format == 'c' ) { + /* char are converted to int then pushed on the stack */ + scr[0] = (char)va_arg( args, int ); + scr[1] = '\0'; + pc += prints (out, scr, width, pad); + continue; + } + } + else { + out: + printchar (out, *format); + ++pc; + } + } + if (out) **out = '\0'; + va_end( args ); + return pc; +} + +int printk(const char *format, ...) +{ + va_list args; + + va_start( args, format ); + return printk_va( 0, format, args ); +} + +#ifndef __ARM__ +int sprintf(char *out, const char *format, ...) +{ + va_list args; + + va_start( args, format ); + return printk_va( &out, format, args ); +} +#endif + +#ifdef TEST_PRINTF +int main(void) +{ + char *ptr = "Hello world!"; + char *np = 0; + int i = 5; + unsigned int bs = sizeof(int)*8; + int mi; + char buf[80]; + + mi = (1 << (bs-1)) + 1; + printf("%s\n", ptr); + printf("printf test\n"); + printf("%s is null pointer\n", np); + printf("%d = 5\n", i); + printf("%d = - max int\n", mi); + printf("char %c = 'a'\n", 'a'); + printf("hex %x = ff\n", 0xff); + printf("hex %02x = 00\n", 0); + printf("signed %d = unsigned %u = hex %x\n", -3, -3, -3); + printf("%d %s(s)%", 0, "message"); + printf("\n"); + printf("%d %s(s) with %%\n", 0, "message"); + sprintf(buf, "justif: \"%-10s\"\n", "left"); printf("%s", buf); + sprintf(buf, "justif: \"%10s\"\n", "right"); printf("%s", buf); + sprintf(buf, " 3: %04d zero padded\n", 3); printf("%s", buf); + sprintf(buf, " 3: %-4d left justif.\n", 3); printf("%s", buf); + sprintf(buf, " 3: %4d right justif.\n", 3); printf("%s", buf); + sprintf(buf, "-3: %04d zero padded\n", -3); printf("%s", buf); + sprintf(buf, "-3: %-4d left justif.\n", -3); printf("%s", buf); + sprintf(buf, "-3: %4d right justif.\n", -3); printf("%s", buf); + + return 0; +} + +/* + * if you compile this file with + * gcc -Wall $(YOUR_C_OPTIONS) -DTEST_PRINTF -c printf.c + * you will get a normal warning: + * printf.c:214: warning: spurious trailing `%' in format + * this line is testing an invalid % at the end of the format string. + * + * this should display (on 32bit int machine) : + * + * Hello world! + * printf test + * (null) is null pointer + * 5 = 5 + * -2147483647 = - max int + * char a = 'a' + * hex ff = ff + * hex 00 = 00 + * signed -3 = unsigned 4294967293 = hex fffffffd + * 0 message(s) + * 0 message(s) with % + * justif: "left " + * justif: " right" + * 3: 0003 zero padded + * 3: 3 left justif. + * 3: 3 right justif. + * -3: -003 zero padded + * -3: -3 left justif. + * -3: -3 right justif. + */ + +#endif diff --git a/firmwares/wifishield/wifiHD/src/printf-stdarg.h b/firmwares/wifishield/wifiHD/src/printf-stdarg.h new file mode 100644 index 0000000..bce38b6 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/printf-stdarg.h @@ -0,0 +1,34 @@ +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef PRINTF_STDARG_H +#define PRINTF_STDARG_H +#include + +int printk(const char *format, ...); +int printk_va(char **out, const char *format, va_list args ); +#endif diff --git a/firmwares/wifishield/wifiHD/src/timer.c b/firmwares/wifishield/wifiHD/src/timer.c new file mode 100644 index 0000000..6ffba63 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/timer.c @@ -0,0 +1,232 @@ +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#ifdef FREERTOS_USED +#include "FreeRTOS.h" +#include "task.h" +#endif + +#define TIMER_HZ 4 + + +struct timeout_t { + U32 tick; + U32 expire_at_tick; + Bool expired; + U8 type; + void (*cb)(void* ctx); + void* ctx; +}; + +struct timer_t { + volatile U32 tick; + struct timeout_t timeout[10]; + void (*tick_isr) (void* ctx); + const U32 MS_PER_TICK; + void *ctx; +}; + +#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0]) + + +static struct timer_t TIMER = { + .tick = 0, +#ifdef FREERTOS_USED + .MS_PER_TICK = 1 / portTICK_RATE_MS, +#else + .MS_PER_TICK = TIMER_HZ, +#endif + .timeout = { { 0 } }, +}; + +#ifdef FREERTOS_USED /* Use TICK-hook */ + +void vApplicationTickHook( void ) { + struct timer_t* priv = &TIMER; + priv->tick++; + if(priv->tick_isr) { + priv->tick_isr(priv->ctx); + } +} + +#else /* Use interrupt directly */ + +static __attribute__((__interrupt__)) void irq_handler(void) +{ + volatile avr32_rtc_t *rtc = &AVR32_RTC; + struct timer_t* priv = &TIMER; + priv->tick++; + + if(priv->tick_isr) + priv->tick_isr(priv->ctx); + + rtc->icr = AVR32_RTC_ICR_TOPI_MASK; + rtc->isr; +} + +#endif + +void timer_init(void (*tick_isr) (void* ctx), void* ctx) +{ + struct timer_t* priv = &TIMER; + uint8_t id; + +#ifndef FREERTOS_USED + INTC_register_interrupt(&irq_handler, AVR32_RTC_IRQ, AVR32_INTC_INT0); + if (!rtc_init(&AVR32_RTC, RTC_OSC_RC, 0)) + Assert(0); + + rtc_set_top_value(&AVR32_RTC, 115 * priv->MS_PER_TICK / 2); + rtc_enable_interrupt(&AVR32_RTC); + rtc_enable(&AVR32_RTC); +#else + /* With FreeRTOS we use the OS tick instead */ +#endif + priv->tick_isr = tick_isr; + priv->ctx = ctx; + + for (id = 0; id < ARRAY_SIZE(priv->timeout); id++) + priv->timeout[id].expired = TRUE; +} + + +U32 timer_get_ms(void) +{ + struct timer_t* priv = &TIMER; + return priv->tick * priv->MS_PER_TICK; +} + +void timer_delay(U32 ms) +{ + struct timer_t* priv = &TIMER; + U32 expire_at_tick = priv->tick + ms / priv->MS_PER_TICK; + while (priv->tick < expire_at_tick); +} + +/** + * Called from application main loop to invoke any scheduled timeout cbs. + * This function might be called as often as possible rather than at each tick + * to support the timeout value '0', e.g a timeout within less than one tick. + * + */ +void timer_poll(void) +{ + struct timer_t* priv = &TIMER; + U8 i; + + for (i = 0; i < ARRAY_SIZE(priv->timeout); i++) { + struct timeout_t* tmo = &priv->timeout[i]; + if (tmo->expired) + continue; + + if (tmo->expire_at_tick > priv->tick) + continue; + + if (tmo->cb) + tmo->cb(tmo->ctx); + + if (tmo->type == TIMEOUT_PERIODIC) + tmo->expire_at_tick = priv->tick + tmo->tick; + else + tmo->expired = TRUE; + } +} + +static U32 timer_sched_timeout(U32 ms, U8 type) +{ + struct timer_t* priv = &TIMER; + struct timeout_t* tmo; + U8 id; + + Assert(type == TIMEOUT_ONESHOT || type == TIMEOUT_PERIODIC); + + for (id = 0; id < ARRAY_SIZE(priv->timeout); id++) { + tmo = &priv->timeout[id]; + if (tmo->expired) + break; + } + + Assert(id != ARRAY_SIZE(priv->timeout)); + + tmo->tick = ms / priv->MS_PER_TICK; + tmo->expire_at_tick = priv->tick + tmo->tick; + tmo->type = type; + tmo->expired = FALSE; + return id; +} + +U32 timer_sched_timeout_cb(U32 ms, U8 type, void (*cb)(void *ctx), void* ctx) +{ + struct timer_t* priv = &TIMER; + struct timeout_t* tmo; + U8 id; + + Assert(cb); + id = timer_sched_timeout(ms, type); + tmo = &priv->timeout[id]; + + tmo->cb = cb; + tmo->ctx = ctx; + return id; +} + + +U32 timer_mod(U32 id, U32 ms, U8 type, void (*cb)(void *ctx), void* ctx) +{ + struct timer_t* priv = &TIMER; + + if (id != INVALID_TIMER_ID && !priv->timeout[id].expired) + timer_cancel_timeout(id); + + return timer_sched_timeout_cb(ms, type, cb, ctx); +} + +void timer_cancel_timeout(U32 id) +{ + struct timer_t* priv = &TIMER; + struct timeout_t* tmo; + + tmo = &priv->timeout[id]; + tmo->expired = TRUE; +} + +int timer_interval_passed(U32 old, U32 new, U32 diff) { + /* New did not wrap */ + if (new > old && new - old > diff) { + return 1; + } + /* New did wrap */ + else if (new < old && ( ( (U32)(-1) - old ) + new ) > diff ) { + return 1; + } + return 0; +} diff --git a/firmwares/wifishield/wifiHD/src/timer.h b/firmwares/wifishield/wifiHD/src/timer.h new file mode 100644 index 0000000..6614fbc --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/timer.h @@ -0,0 +1,51 @@ +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef TIMER_H +#define TIMER_H +#include + +enum { + TIMEOUT_ONESHOT, + TIMEOUT_PERIODIC +}; + +#define INVALID_TIMER_ID 0xFFFFFFFF + +/* Handle timer overflows. Return 1 if the interval has passed. */ +int timer_interval_passed(uint32_t old, uint32_t new, uint32_t diff); + +void timer_tick(); +void timer_init(void (*tick_isr) (void* ctx), void* ctx); +void timer_poll(void); +void timer_delay(uint32_t ms); +uint32_t timer_sched_timeout_cb(uint32_t ms, uint8_t type, void (*cb)(void *ctx), void* ctx); +uint32_t timer_mod(uint32_t id, uint32_t ms, uint8_t type, void (*cb)(void *ctx), void* ctx); +void timer_cancel_timeout(uint32_t id); +uint32_t timer_get_ms(void); + +#endif diff --git a/firmwares/wifishield/wifiHD/src/top_defs.h b/firmwares/wifishield/wifiHD/src/top_defs.h new file mode 100644 index 0000000..09f7c3e --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/top_defs.h @@ -0,0 +1,120 @@ +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef _TOP_DEFS_H +#define _TOP_DEFS_H + +#include +#include + +#define ARRAY_SIZE(a) sizeof(a) / sizeof((a)[0]) + +#ifndef UNREF +#define UNREF(x) x = x +#endif + +#if __GNUC__ +#ifdef __KERNEL__ +#define WEAK_DECL +#else +#define WEAK_DECL __attribute__ ((__weak__)) +#endif +#define PACKED __attribute__ ((__packed__)) +#define USED __attribute__ ((__used__)) +#else + #error "Unsupported compiler" +#endif + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + + +#if 0 +#include +/* + * These functions should _NOT_ be used, call iprintf, sniprintf, iscanf, siscanf etc + * instead. Those functions do not have support for floating point formats. + * Not using these functions saves 27kB of code. + */ +extern int printf(const char *format, ...) __attribute__ ((deprecated)); +extern int sprintf(char *str, const char *format, ...) __attribute__ ((deprecated)); +extern int snprintf(char *str, size_t size, const char *format, ...) __attribute__ ((deprecated)); + +int vprintf(const char *format, va_list ap) __attribute__ ((deprecated)); +int vfprintf(FILE *stream, const char *format, va_list ap) __attribute__ ((deprecated)); +int vsprintf(char *str, const char *format, va_list ap) __attribute__ ((deprecated)); +int vsnprintf(char *str, size_t size, const char *format, va_list ap) __attribute__ ((deprecated)); + +int scanf(const char *format, ...) __attribute__ ((deprecated)); +int fscanf(FILE *stream, const char *format, ...) __attribute__ ((deprecated)); +int sscanf(const char *str, const char *format, ...) __attribute__ ((deprecated)); + +int vscanf(const char *format, va_list ap) __attribute__ ((deprecated)); +int vsscanf(const char *str, const char *format, va_list ap) __attribute__ ((deprecated)); +int vfscanf(FILE *stream, const char *format, va_list ap) __attribute__ ((deprecated)); +#endif + +#endif + + + +#if defined(__linux__) || defined(__APPLE__) + #include + #include + #define sniprintf snprintf + #define asiprintf asprintf + #define printk printf + #define siscanf sscanf + + #define WL_ASSERT(x) assert(x) + #define WL_DEBUG(args...) printf(args) + + #ifdef NO_LWIP + /* IP address representation from lwIP */ + struct ip_addr { + uint32_t addr; + } PACKED; + #endif + + #define FEAT_SOCKETS + +#else + #define WL_ASSERT(cond) do { \ + if (!(cond)) { \ + printk("%s:%d\n", __FILE__, __LINE__); \ + for(;;); \ + } \ + } while(0) + #define WL_DEBUG(args...) printk(args) + + +#endif diff --git a/firmwares/wifishield/wifiHD/src/trace.h b/firmwares/wifishield/wifiHD/src/trace.h new file mode 100644 index 0000000..984262a --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/trace.h @@ -0,0 +1,44 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef TRACE_H +#define TRACE_H + +#include +#include "printf-stdarg.h" + +#define ASSERT(cond, str) do { \ + if (!(cond)) { \ + printk("%s\n", str); \ + Assert(0); \ + } \ + } while(0) + + +#endif diff --git a/firmwares/wifishield/wifiHD/src/util.c b/firmwares/wifishield/wifiHD/src/util.c new file mode 100644 index 0000000..c01edeb --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/util.c @@ -0,0 +1,260 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +const char* ip2str(struct ip_addr addr) +{ + static char buf[16]; + +#if BYTE_ORDER == LITTLE_ENDIAN + sniprintf(buf, sizeof(buf), "%lu.%lu.%lu.%lu", + addr.addr & 0xff, + (addr.addr >> 8) & 0xff, + (addr.addr >> 16) & 0xff, + (addr.addr >> 24) & 0xff); + return buf; +#else + sniprintf(buf, sizeof(buf), "%lu.%lu.%lu.%lu", + (addr.addr >> 24) & 0xff, + (addr.addr >> 16) & 0xff, + (addr.addr >> 8) & 0xff, + (addr.addr) & 0xff); + return buf; +#endif +} + +struct ip_addr str2ip(const char* str) +{ + int a,b,c,d; + uint32_t ip = 0; + struct ip_addr addr; + + if (siscanf(str,"%d.%d.%d.%d",&a,&b,&c,&d) != 4) + goto out; + + if (a < 0 || a > 255 || b < 0 || b > 255 || + c < 0 || c > 255 || d < 0 || d > 255) { + goto out; + } + +#if BYTE_ORDER == LITTLE_ENDIAN + ip = (d << 24) | (c << 16) | (b << 8) | a; +#else + ip = (a << 24) | (b << 16) | (c << 8) | d; +#endif + + out: + addr.addr = ip; + return addr; +} + +uint8_t ascii_to_key(char *outp, const char *inp) { + char buf[3]; + int len; + buf[2] = '\0'; + len = strlen(inp); + if (len % 2) { + printk("Invalid length\n"); + } + len = 0; + while (*inp) { + if (! isxdigit(*inp) || ! isxdigit(*(inp+1)) || + len > WL_MAX_PASS_LEN) { + return 0; + } + buf[0] = *inp++; + buf[1] = *inp++; + *outp++ = strtol(buf, NULL, 16); + len++; + } + return len; +} + + + +void printbuf(const char *prefix, const void *data, size_t len) +{ + const unsigned char *s = data; + int i, j; + + for (i = 0; i < len; i += 16) + { + printk("%s ", prefix); + for(j = 0; j < 16; j++) { + if(i + j >= len) + printk(" "); + else + printk("%02X ", (uint16_t)s[i + j]); + } + printk(": "); + for(j = 0; j < 16; j++) { + if(i + j >= len) + break; + if(s[i+j] >= 32 && s[i+j] < 127) + printk("%c", s[i + j]); + else + printk("."); + } + printk("\n"); + } +} + + +void print_network(struct wl_network_t* wl_network) +{ + printk("%s ", mac2str(wl_network->bssid.octet)); + printk("\"%s\"", ssid2str(&wl_network->ssid)); + printk(" RSSI %d dBm ", wl_network->rssi); + switch(wl_network->net_type) { + case WL_CONN_TYPE_ADHOC: + printk(" Ad-Hoc "); + break; + default : + break; + } + switch (wl_network->enc_type) { + case ENC_TYPE_WEP : + printk(" (WEP encryption)"); + break; + case ENC_TYPE_TKIP : + printk(" (TKIP encryption)"); + break; + case ENC_TYPE_CCMP : + printk(" (CCMP encryption)"); + break; + case ENC_TYPE_NONE : + break; + } + printk("\n"); + +} + +void print_network_list(void) +{ + struct wl_network_list_t* wl_network_list; + uint8_t i; + + wl_get_network_list(&wl_network_list); + + if (wl_network_list->cnt == 0) + printk("no nets found\n"); + + for (i = 0; i < wl_network_list->cnt; i++) + print_network(wl_network_list->net[i]); +} + +int join_argv(char *dst, size_t dst_len, int argc, char* argv[]) { + char *p = dst; + int i; + int len = 0; + + /* Not really kosher, an ssid may legally contain 0-bytes but + * the console interface does not deal with that. + */ + for (i = 0; i < argc; i++) { + len += strlen(argv[i]); + if (len > dst_len) { + printk("ssid too long (max %d)\n", (int) dst_len); + return 0; + } + p += sniprintf(p, + dst_len - (p - dst), + "%s ", + argv[i]); + } + if (p == dst) { + return 0; + } + p--; + *p = '\0'; /* Delete last space */ + + return p - dst; +} + +const char* ssid2str(struct wl_ssid_t *ssid) { + static char buf[WL_SSID_MAX_LENGTH + 1]; + + memset(buf, 0, sizeof buf); + memcpy(buf, ssid->ssid, ssid->len); + + return buf; +} + + +const char* mac2str(uint8_t* mac) +{ + static char buf[18]; + sniprintf(buf, sizeof(buf), "%02x-%02x-%02x-%02x-%02x-%02x", + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + return buf; +} + + +char* enc_type2str(enum wl_enc_type enc_type) +{ + switch(enc_type) { + case ENC_TYPE_WEP: + return "WEP"; + case ENC_TYPE_CCMP: + return "CCMP"; + case ENC_TYPE_TKIP: + return "TKIP"; + default: + return ""; + }; +} + +int equal_ssid(const struct wl_ssid_t* ssid1, + const struct wl_ssid_t* ssid2) { + if (ssid1->len == ssid2->len && + (memcmp(ssid1->ssid, ssid2->ssid, ssid1->len) == 0)) { + return 1; + } + return 0; +} + +int equal_bssid(const struct wl_mac_addr_t* bssid1, + const struct wl_mac_addr_t* bssid2) { + if (memcmp(bssid1, bssid2, sizeof *bssid1) == 0) { + return 1; + } + return 0; +} + + diff --git a/firmwares/wifishield/wifiHD/src/util.h b/firmwares/wifishield/wifiHD/src/util.h new file mode 100644 index 0000000..2b3f74f --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/util.h @@ -0,0 +1,71 @@ +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef _UTIL_H +#define _UTIL_H +#include +#include +#include +#include "lwip/ip.h" +#include + +const char* ip2str(struct ip_addr addr); + +struct ip_addr str2ip(const char* str); + +uint8_t ascii_to_key(char *outp, const char *inp); + +void print_network(struct wl_network_t* wl_network); + +void print_network_list(void); + +int join_argv(char *dst, size_t dst_len, int argc, char* argv[]); + +void printbuf(const char *prefix, const void *data, size_t len); + +const char* ssid2str(struct wl_ssid_t *ssid); + +const char* mac2str(uint8_t mac[6]); + +char* enc_type2str(enum wl_enc_type enc_type); + +int equal_ssid(const struct wl_ssid_t* ssid1, + const struct wl_ssid_t* ssid2); + +int equal_bssid(const struct wl_mac_addr_t* bssid1, + const struct wl_mac_addr_t* bssid2); + +#define NET_SET_SSID(net, xssid, ssid_len) do { \ + DE_MEMCPY((net)->ssid.ssid, (xssid), (ssid_len)); \ + (net)->ssid.len = (ssid_len); \ + } while (0) + +#define NET_SET_BSSID(net, xbssid) do { \ + DE_MEMCPY(&(net)->bssid, &(xbssid), sizeof (xbssid)); \ + } while (0) + +#endif /* _UTIL_H */ diff --git a/firmwares/wifishield/wifiHD/src/wifi_spi.h b/firmwares/wifishield/wifiHD/src/wifi_spi.h new file mode 100644 index 0000000..6e6b4bb --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/wifi_spi.h @@ -0,0 +1,152 @@ +/* + * wifi_spi.h + * + * Created on: Jul 4, 2010 + * Author: mlf by Metodo2 srl + */ +#ifndef WiFi_Spi_h +#define WiFi_Spi_h + +#include "wl_definitions.h" + +#define CMD_FLAG 0 +#define REPLY_FLAG 1<<7 +#define DATA_FLAG 0x40 + +#define WIFI_SPI_ACK 1 +#define WIFI_SPI_ERR 0xFF + +#define TIMEOUT_CHAR 1000 + +//#define MAX_SOCK_NUM 4 /**< Maxmium number of socket */ +#define NO_SOCKET_AVAIL 255 + +#define START_CMD 0xE0 +#define END_CMD 0xEE +#define ERR_CMD 0xEF + +enum { + SET_NET_CMD = 0x10, + SET_PASSPHRASE_CMD = 0x11, + SET_KEY_CMD = 0x12, + TEST_CMD = 0x13, + + GET_CONN_STATUS_CMD = 0x20, + GET_IPADDR_CMD = 0x21, + GET_MACADDR_CMD = 0x22, + GET_CURR_SSID_CMD = 0x23, + GET_CURR_BSSID_CMD = 0x24, + GET_CURR_RSSI_CMD = 0x25, + GET_CURR_ENCT_CMD = 0x26, + SCAN_NETWORKS = 0x27, + START_SERVER_TCP_CMD= 0x28, + GET_STATE_TCP_CMD = 0x29, + DATA_SENT_TCP_CMD = 0x2A, + AVAIL_DATA_TCP_CMD = 0x2B, + GET_DATA_TCP_CMD = 0x2C, + START_CLIENT_TCP_CMD= 0x2D, + STOP_CLIENT_TCP_CMD = 0x2E, + GET_CLIENT_STATE_TCP_CMD = 0x2F, + DISCONNECT_CMD = 0x30, + GET_IDX_SSID_CMD = 0x31, + GET_IDX_RSSI_CMD = 0x32, + GET_IDX_ENCT_CMD = 0x33, + REQ_HOST_BY_NAME_CMD= 0x34, + GET_HOST_BY_NAME_CMD= 0x35, + START_SCAN_NETWORKS = 0x36, + GET_FW_VERSION_CMD = 0x37, + GET_TEST_CMD = 0x38, + + // All command with DATA_FLAG 0x40 send a 16bit Len + + SEND_DATA_TCP_CMD = 0x44, + GET_DATABUF_TCP_CMD = 0x45, + +}; + +#if 0 +enum wl_tcp_state { + CLOSED = 0, + LISTEN = 1, + SYN_SENT = 2, + SYN_RCVD = 3, + ESTABLISHED = 4, + FIN_WAIT_1 = 5, + FIN_WAIT_2 = 6, + CLOSE_WAIT = 7, + CLOSING = 8, + LAST_ACK = 9, + TIME_WAIT = 10 +}; +#endif + +enum numParams{ + PARAM_NUMS_0, + PARAM_NUMS_1, + PARAM_NUMS_2, + PARAM_NUMS_3, + PARAM_NUMS_4, + PARAM_NUMS_5, + MAX_PARAM_NUMS +}; + +#define MAX_PARAMS MAX_PARAM_NUMS-1 +#define PARAM_LEN_SIZE 1 + +typedef struct __attribute__((__packed__)) +{ + uint8_t paramLen; + char* param; +}tParam; + +typedef struct __attribute__((__packed__)) +{ + uint16_t dataLen; + char* data; +}tDataParam; + + +typedef struct __attribute__((__packed__)) +{ + unsigned char cmd; + unsigned char tcmd; + unsigned char nParam; + tParam params[MAX_PARAMS]; +}tSpiMsg; + +typedef struct __attribute__((__packed__)) +{ + unsigned char cmd; + unsigned char tcmd; + unsigned char nParam; + tDataParam params[MAX_PARAMS]; +}tSpiMsgData; + + +typedef struct __attribute__((__packed__)) +{ + unsigned char cmd; + unsigned char tcmd; + //unsigned char totLen; + unsigned char nParam; +}tSpiHdr; + +typedef struct __attribute__((__packed__)) +{ + uint8_t paramLen; + uint32_t param; +}tLongParam; + +typedef struct __attribute__((__packed__)) +{ + uint8_t paramLen; + uint16_t param; +}tIntParam; + +typedef struct __attribute__((__packed__)) +{ + uint8_t paramLen; + uint8_t param; +}tByteParam; + +#endif diff --git a/firmwares/wifishield/wifiHD/src/wl_cm.c b/firmwares/wifishield/wifiHD/src/wl_cm.c new file mode 100644 index 0000000..bef1afc --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/wl_cm.c @@ -0,0 +1,437 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#include "wl_cm.h" +#include "util.h" +#include +#include "debug.h" + +/** Roaming configuration parameters **/ + +/*! The ROAMING_RSSI_THRESHOLD setting defines how bad the current + * signal strength should be before we'll consider roaming to an AP + * with better signal strength. The objective is to stay on the + * current AP as long as the RSSI is decent, even if there are other + * APs in the same BSS with better RSSI available. + * If ROAMING_RSSI_THRESHOLD is too high we might roam unecessarily. + * If ROAMING_RSSI_THRESHOLD is too low we might not roam in time to + * avoid packet loss. This also impacts power consumption, staying + * too long with an AP with poor RSSI will consume more power. + * Unit is dBm. + */ +#define ROAMING_RSSI_THRESHOLD -65 + +/*! The ROAMING_RSSI_DIFF setting defines how much better + * than the currently associated AP a new AP must be before + * we'll attempt to roam over to the new AP. + * If ROAMING_RSSI_DIFF is too high it might be too hard + * to roam (important if the STA is expected to move + * quickly through different AP coverage areas). + * If ROAMING_RSSI_DIFF is too low we might bounce between + * two APs with similar signal strengths. + * Unit is dBm. + */ +#define ROAMING_RSSI_DIFF 10 + + +#if 1 +# include "printf-stdarg.h" +#include "ard_utils.h" +# define CM_DPRINTF(fmt...) if (enableDebug & INFO_CM_FLAG) printk(fmt) +#else +# define CM_DPRINTF(fmt...) +#endif + + +/** \defgroup wl_cm Connection Manager + * + * These functions are used to configure and control the WiFi connetion + * manager. + * + * + * @{ + */ + +struct cm_candidate { + struct wl_ssid_t ssid; + struct wl_mac_addr_t bssid; +}; + +struct cm { + cm_scan_cb_t *scan_cb; + cm_conn_cb_t *conn_cb; + cm_disconn_cb_t *disconn_cb; + void* ctx; + uint8_t enabled; + struct cm_candidate candidate; +}; + + +/** + * This function can be modified to pick a network based on + * application specific criteria. + * + * If the SSID can not be found in the scan list it will be + * assumed to be a hidden SSID and the wl_connect() command + * will be called to attempt to probe for the network and + * connect to it. + */ +static struct wl_network_t* +find_best_candidate(struct cm* cm) +{ + struct wl_network_list_t* netlist; + struct wl_network_t *best_net = NULL; + uint8_t i; + + if (wl_get_network_list(&netlist) != WL_SUCCESS) + return NULL; + + if (netlist->cnt == 0) + return NULL; + + for (i = 0; i < netlist->cnt; i++) { + /* match on ssid */ + if (cm->candidate.ssid.len) + if (!equal_ssid(&cm->candidate.ssid, + &netlist->net[i]->ssid)) + continue; + + /* match bssid */ + if (strncmp((char*) cm->candidate.bssid.octet, + "\xff\xff\xff\xff\xff\xff", 6)) + if (!equal_bssid(&cm->candidate.bssid, + &netlist->net[i]->bssid)) + continue; + /* check for best rssi. */ + if ( best_net && + ( best_net->rssi > netlist->net[i]->rssi) ) { + continue; + } + best_net = netlist->net[i]; + } + + return best_net; +} + + +/** + * + */ +static void +select_net(struct cm* cm) +{ + struct wl_network_t *candidate_net; + struct wl_network_t *current_net; + struct wl_ssid_t *ssid_p; + + int ret; + + /* Nothing to do */ + if (0 == cm->candidate.ssid.len) { + return; + } + + current_net = wl_get_current_network(); + candidate_net = find_best_candidate(cm); + + /* Connected to the candidate? ... */ + if ( current_net == candidate_net ) { + if ( current_net ) { + /* ...yes, dont change. */ + + return; + } + } + + /* Roaming checks */ + if (current_net && candidate_net) { + /* Are we changing BSSs? */ + if ( equal_ssid(&candidate_net->ssid, + ¤t_net->ssid)) { + + /* ...no. Does the currently connected + * net have a decent RSSI?...*/ + if ( current_net->rssi > ROAMING_RSSI_THRESHOLD ) { + /* ...yes, stay with it. */ + return; + } + /* ...no. Does the candidate have + * sufficiently better RSSI to + * motivate a switch to it? */ + if ( candidate_net->rssi < current_net->rssi + + ROAMING_RSSI_DIFF) { + return; + } + /* ...yes, try to roam to candidate_net */ + CM_DPRINTF("CM: Roaming from rssi %d to %d\n", + current_net->rssi, + candidate_net->rssi); + } + } + /* a candidate is found */ + if (candidate_net) { + /* We connect to a specific bssid here because + * find_best_candidate() might have picked a + * particulare AP among many with the same SSID. + * wl_connect() would pick one of them at random. + */ + ret = wl_connect_bssid(candidate_net->bssid); + } + /* no candidate found */ + else { + CM_DPRINTF("CM: No candidate found for ssid \"%s\"\n", + ssid2str(&cm->candidate.ssid)); + /* Might be a hidden SSID so we try to connect to it. + * wl_connect() will trigger a directed scan + * for the SSID in this case. + */ + ssid_p = &cm->candidate.ssid; + ret = wl_connect(ssid_p->ssid, ssid_p->len); + } + switch (ret) { + case WL_SUCCESS : + return; + case WL_BUSY: + wl_disconnect(); + return; + case WL_RETRY: + break; + default : + CM_DPRINTF("CM: failed to connect\n"); + break; + } + + /* some operation failed or no candidate found */ + if (wl_scan() != WL_SUCCESS) + CM_DPRINTF("CM: failed to scan\n"); +} + + +/** + * + */ +static void +wl_scan_complete_cb(void* ctx) +{ + struct cm *cm = ctx; + + CM_DPRINTF("CM: scan completed\n"); + + if (cm->scan_cb) + cm->scan_cb(cm->ctx); + + if ( 0 == cm->enabled ) { + return; + } + select_net(cm); +} + +/** + * + */ +static void +wl_media_connected_cb(void* ctx) +{ + struct cm *cm = ctx; + struct wl_network_t *net = wl_get_current_network(); + CM_DPRINTF("CM: connected to %s\n", ssid2str(&net->ssid)); + LINK_LED_ON(); + ERROR_LED_OFF(); + if (cm->conn_cb) + cm->conn_cb(net, cm->ctx); +} + + +/** + * + */ +static void +wl_conn_failure_cb(void* ctx) +{ + struct cm *cm = ctx; + CM_DPRINTF("CM: connect failed, scanning\n"); + ERROR_LED_ON(); + LINK_LED_OFF(); + + if ( 0 == cm->enabled ) { + return; + } + if (wl_scan() != WL_SUCCESS) + /* should never happen */ + CM_DPRINTF("CM: could not start scan after connect fail!\n"); +} + + +/** + * + */ +static void +wl_conn_lost_cb(void* ctx) +{ + struct cm *cm = ctx; + CM_DPRINTF("CM: connection lost, scanning\n"); + LINK_LED_OFF(); + if (cm->disconn_cb) + cm->disconn_cb(cm->ctx); + + if ( 0 == cm->enabled ) { + return; + } + if (wl_scan() != WL_SUCCESS) + /* should never happen */ + CM_DPRINTF("CM: could not start scan after connect lost!\n"); +} + + +/** + * + */ +static void +wl_event_cb(struct wl_event_t event, void* ctx) +{ + struct cm *cm = ctx; + + switch (event.id) { + case WL_EVENT_MEDIA_CONNECTED: + wl_media_connected_cb(cm); + break; + + case WL_EVENT_CONN_FAILURE: + wl_conn_failure_cb(cm); + break; + + case WL_EVENT_MEDIA_DISCONNECTED: + CM_DPRINTF("CM: disconnected\n"); + wl_conn_lost_cb(cm); + break; + + case WL_EVENT_SCAN_COMPLETE: + wl_scan_complete_cb(cm); + break; + + default: + CM_DPRINTF("CM: unhandled event\n"); + }; +} + +static struct cm *cm = NULL; + + +/** + * Doesn't actually start the CM, just initializing. CM will run whenever + * an valid ssid is set through wl_cm_set_network() and wl_cm_start() + * has been called. + */ +wl_err_t +wl_cm_init(cm_scan_cb_t scan_cb, + cm_conn_cb_t conn_cb, + cm_disconn_cb_t disconn_cb, + void* ctx) +{ + if (cm != NULL) + return WL_FAILURE; + + cm = calloc(1, sizeof(struct cm)); + if (cm == NULL) { + CM_DPRINTF("CM: out of memory\n"); + return WL_FAILURE; + } + + if (wl_register_event_cb(wl_event_cb, cm) != WL_SUCCESS) { + CM_DPRINTF("CM: could not register event cb\n"); + return WL_FAILURE; + } + + cm->scan_cb = scan_cb; + cm->conn_cb = conn_cb; + cm->disconn_cb = disconn_cb; + cm->enabled = 0; + cm->ctx = ctx; + + CM_DPRINTF("CM: initialized\n"); + return WL_SUCCESS; +} + +wl_err_t +wl_cm_start(void) { + if (NULL == cm) + return WL_FAILURE; + + cm->enabled = 1; + return WL_SUCCESS; +} + +wl_err_t +wl_cm_stop(void) { + if (NULL == cm) + return WL_FAILURE; + + cm->enabled = 0; + return WL_SUCCESS; +} + + +/** + * Set the desired network which the connection manager should try to + * connect to. + * + * The ssid and bssid of the desired network should be specified. The ssid and + * bssid will be matched against the networks found during scan. If any + * parameter is null, it will always match. If both parameters are null, + * the first found network will be chosen. + * + * @param ssid The ssid of the desired network. If null, any ssid will match. + * @param bssid The bssid of the desired network. If null, any bssid will match. + * + */ +wl_err_t +wl_cm_set_network(struct wl_ssid_t *ssid, struct wl_mac_addr_t *bssid) +{ + if (cm == NULL) + return WL_FAILURE; + + if (ssid) + memcpy(&cm->candidate.ssid, ssid, sizeof(cm->candidate.ssid)); + else + cm->candidate.ssid.len = 0; + + if (bssid) + memcpy(&cm->candidate.bssid, bssid, + sizeof(cm->candidate.bssid)); + else + memset(&cm->candidate.bssid, 0xff, sizeof(cm->candidate.bssid)); + + if (cm->candidate.ssid.len) + wl_scan(); + + return WL_SUCCESS; +} +/* + * @} + */ diff --git a/firmwares/wifishield/wifiHD/src/wl_cm.h b/firmwares/wifishield/wifiHD/src/wl_cm.h new file mode 100644 index 0000000..bbb65d9 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/wl_cm.h @@ -0,0 +1,51 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef WL_CM_H +#define WL_CM_H + +#include +#include +#include + +typedef void (cm_scan_cb_t)(void* ctx); +typedef void (cm_conn_cb_t)(struct wl_network_t *net, void* ctx); +typedef void (cm_disconn_cb_t)(void* ctx); + +wl_err_t wl_cm_set_network(struct wl_ssid_t *ssid, struct wl_mac_addr_t *bssid); + +wl_err_t wl_cm_init(cm_scan_cb_t scan_cb, + cm_conn_cb_t conn_cb, + cm_disconn_cb_t disconn_cb, + void* ctx); + +wl_err_t wl_cm_start(void); +wl_err_t wl_cm_stop(void); + +#endif diff --git a/firmwares/wifishield/wifiHD/src/wl_definitions.h b/firmwares/wifishield/wifiHD/src/wl_definitions.h new file mode 100644 index 0000000..b07c203 --- /dev/null +++ b/firmwares/wifishield/wifiHD/src/wl_definitions.h @@ -0,0 +1,39 @@ +/* + * wl_definitions.h + * + * Created on: Mar 6, 2011 + * Author: mlf by Metodo2 srl + */ + +#ifndef WL_DEFINITIONS_H_ +#define WL_DEFINITIONS_H_ + +// Maximum size of a SSID +#define WL_SSID_MAX_LENGTH 32 +// Length of passphrase. Valid lengths are 8-63. +#define WL_WPA_KEY_MAX_LENGTH 63 +// Length of key in bytes. Valid values are 5 and 13. +#define WL_WEP_KEY_MAX_LENGTH 13 +// Size of a MAC-address or BSSID +#define WL_MAC_ADDR_LENGTH 6 +// Size of a MAC-address or BSSID +#define WL_IPV4_LENGTH 4 +// Maximum size of a SSID list +#define WL_NETWORKS_LIST_MAXNUM 10 +// Maxmium number of socket +#define MAX_SOCK_NUM 4 +//Maximum number of attempts to establish wifi connection +#define WL_MAX_ATTEMPT_CONNECTION 10 + +typedef enum { + WL_IDLE_STATUS, + WL_NO_SSID_AVAIL, + WL_SCAN_COMPLETED, + WL_CONNECTED, + WL_CONNECT_FAILED, + WL_CONNECTION_LOST, + WL_DISCONNECTED +} wl_status_t; + + +#endif /* WL_DEFINITIONS_H_ */ diff --git a/firmwares/wifishield/wifi_dnld/.cproject b/firmwares/wifishield/wifi_dnld/.cproject new file mode 100644 index 0000000..286dad7 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/.cproject @@ -0,0 +1,1281 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/firmwares/wifishield/wifi_dnld/.project b/firmwares/wifishield/wifi_dnld/.project new file mode 100644 index 0000000..aa3047b --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/.project @@ -0,0 +1,70 @@ + + + wifi_dnld + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/wifi_dnld/Debug} + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + + + + + + com.atmel.avr32.core.nature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/firmwares/wifishield/wifi_dnld/Release/wifi_dnld.elf b/firmwares/wifishield/wifi_dnld/Release/wifi_dnld.elf new file mode 100644 index 0000000..11ec3dd Binary files /dev/null and b/firmwares/wifishield/wifi_dnld/Release/wifi_dnld.elf differ diff --git a/firmwares/wifishield/wifi_dnld/src/CONFIG/conf_access.h b/firmwares/wifishield/wifi_dnld/src/CONFIG/conf_access.h new file mode 100644 index 0000000..23e9b34 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/CONFIG/conf_access.h @@ -0,0 +1,170 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Memory access control configuration file. + * + * This file contains the possible external configuration of the memory access + * control. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_ACCESS_H_ +#define _CONF_ACCESS_H_ + +#include "compiler.h" +#include "board.h" + + +/*! \name Activation of Logical Unit Numbers + */ +//! @{ +#define LUN_0 DISABLE //!< On-Chip Virtual Memory. +#define LUN_1 ENABLE //!< AT45DBX Data Flash. +#define LUN_2 DISABLE //!< SD/MMC Card over SPI. +#define LUN_3 DISABLE +#define LUN_4 DISABLE +#define LUN_5 DISABLE +#define LUN_6 DISABLE +#define LUN_7 DISABLE +#define LUN_USB DISABLE //!< Host Mass-Storage Memory. +//! @} + +/*! \name LUN 0 Definitions + */ +//! @{ +#define VIRTUAL_MEM LUN_0 +#define LUN_ID_VIRTUAL_MEM LUN_ID_0 +#define LUN_0_INCLUDE "virtual_mem.h" +#define Lun_0_test_unit_ready virtual_test_unit_ready +#define Lun_0_read_capacity virtual_read_capacity +#define Lun_0_wr_protect virtual_wr_protect +#define Lun_0_removal virtual_removal +#define Lun_0_usb_read_10 virtual_usb_read_10 +#define Lun_0_usb_write_10 virtual_usb_write_10 +#define Lun_0_mem_2_ram virtual_mem_2_ram +#define Lun_0_ram_2_mem virtual_ram_2_mem +#define LUN_0_NAME "\"On-Chip Virtual Memory\"" +//! @} + +/*! \name LUN 1 Definitions + */ +//! @{ +#define AT45DBX_MEM LUN_1 +#define LUN_ID_AT45DBX_MEM LUN_ID_1 +#define LUN_1_INCLUDE "at45dbx_mem.h" +#define Lun_1_test_unit_ready at45dbx_test_unit_ready +#define Lun_1_read_capacity at45dbx_read_capacity +#define Lun_1_wr_protect at45dbx_wr_protect +#define Lun_1_removal at45dbx_removal +#define Lun_1_usb_read_10 at45dbx_usb_read_10 +#define Lun_1_usb_write_10 at45dbx_usb_write_10 +#define Lun_1_mem_2_ram at45dbx_df_2_ram +#define Lun_1_ram_2_mem at45dbx_ram_2_df +#define LUN_1_NAME "\"AT45DBX Data Flash\"" +//! @} + +/*! \name LUN 2 Definitions + */ +//! @{ +#define SD_MMC_SPI_MEM LUN_2 +#define LUN_ID_SD_MMC_SPI_MEM LUN_ID_2 +#define LUN_2_INCLUDE "sd_mmc_spi_mem.h" +#define Lun_2_test_unit_ready sd_mmc_spi_test_unit_ready +#define Lun_2_read_capacity sd_mmc_spi_read_capacity +#define Lun_2_wr_protect sd_mmc_spi_wr_protect +#define Lun_2_removal sd_mmc_spi_removal +#define Lun_2_usb_read_10 sd_mmc_spi_usb_read_10 +#define Lun_2_usb_write_10 sd_mmc_spi_usb_write_10 +#define Lun_2_mem_2_ram sd_mmc_spi_mem_2_ram +#define Lun_2_ram_2_mem sd_mmc_spi_ram_2_mem +#define LUN_2_NAME "\"SD/MMC Card over SPI\"" +//! @} + +/*! \name USB LUNs Definitions + */ +//! @{ +#define MEM_USB LUN_USB +#define LUN_ID_MEM_USB LUN_ID_USB +#define LUN_USB_INCLUDE "host_mem.h" +#define Lun_usb_test_unit_ready(lun) host_test_unit_ready(lun) +#define Lun_usb_read_capacity(lun, nb_sect) host_read_capacity(lun, nb_sect) +#define Lun_usb_read_sector_size(lun) host_read_sector_size(lun) +#define Lun_usb_wr_protect(lun) host_wr_protect(lun) +#define Lun_usb_removal() host_removal() +#define Lun_usb_mem_2_ram(addr, ram) host_read_10_ram(addr, ram) +#define Lun_usb_ram_2_mem(addr, ram) host_write_10_ram(addr, ram) +#define LUN_USB_NAME "\"Host Mass-Storage Memory\"" +//! @} + +/*! \name Actions Associated with Memory Accesses + * + * Write here the action to associate with each memory access. + * + * \warning Be careful not to waste time in order not to disturb the functions. + */ +//! @{ +#define memory_start_read_action(nb_sectors) +#define memory_stop_read_action() +#define memory_start_write_action(nb_sectors) +#define memory_stop_write_action() +//! @} + +/*! \name Activation of Interface Features + */ +//! @{ +#define ACCESS_USB DISABLED //!< MEM <-> USB interface. +#define ACCESS_MEM_TO_RAM ENABLED //!< MEM <-> RAM interface. +#define ACCESS_STREAM DISABLED //!< Streaming MEM <-> MEM interface. +#define ACCESS_STREAM_RECORD DISABLED //!< Streaming MEM <-> MEM interface in record mode. +#define ACCESS_MEM_TO_MEM DISABLED //!< MEM <-> MEM interface. +#define ACCESS_CODEC DISABLED //!< Codec interface. +//! @} + +/*! \name Specific Options for Access Control + */ +//! @{ +#define GLOBAL_WR_PROTECT DISABLED //!< Management of a global write protection. +//! @} + + +#endif // _CONF_ACCESS_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/CONFIG/conf_at45dbx.h b/firmwares/wifishield/wifi_dnld/src/CONFIG/conf_at45dbx.h new file mode 100644 index 0000000..3280e4f --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/CONFIG/conf_at45dbx.h @@ -0,0 +1,83 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT45DBX configuration file. + * + * This file contains the possible external configuration of the AT45DBX. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_AT45DBX_H_ +#define _CONF_AT45DBX_H_ + + +#include "conf_access.h" + +#if AT45DBX_MEM == DISABLE + #error conf_at45dbx.h is #included although AT45DBX_MEM is disabled +#endif + + +#include "at45dbx.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +//! Size of AT45DBX data flash memories to manage. +#define AT45DBX_MEM_SIZE AT45DBX_1MB + +//! Number of AT45DBX components to manage. +#define AT45DBX_MEM_CNT 1 + +//! First chip select used by AT45DBX components on the SPI module instance. +//! AT45DBX_SPI_NPCS0_PIN always corresponds to this first NPCS, whatever it is. +#define AT45DBX_SPI_FIRST_NPCS AT45DBX_SPI_NPCS + +//! SPI master speed in Hz. +#define AT45DBX_SPI_MASTER_SPEED 12000000 + +//! Number of bits in each SPI transfer. +#define AT45DBX_SPI_BITS 8 + + +#endif // _CONF_AT45DBX_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/Doc/SPB104 product brief.pdf b/firmwares/wifishield/wifi_dnld/src/Doc/SPB104 product brief.pdf new file mode 100644 index 0000000..8705cb1 Binary files /dev/null and b/firmwares/wifishield/wifi_dnld/src/Doc/SPB104 product brief.pdf differ diff --git a/firmwares/wifishield/wifi_dnld/src/Doc/gettingstarted.pdf b/firmwares/wifishield/wifi_dnld/src/Doc/gettingstarted.pdf new file mode 100644 index 0000000..7c37693 Binary files /dev/null and b/firmwares/wifishield/wifi_dnld/src/Doc/gettingstarted.pdf differ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/ASM/trampoline.x b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/ASM/trampoline.x new file mode 100644 index 0000000..c127121 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/ASM/trampoline.x @@ -0,0 +1,74 @@ +/* This file is part of the ATMEL AVR32-SoftwareFramework-AT32UC3A-1.4.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AVR32 UC3 ISP trampoline. + * + * In order to be able to program a project with both BatchISP and JTAGICE mkII + * without having to take the general-purpose fuses into consideration, add this + * file to the project and change the program entry point to _trampoline. + * + * The pre-programmed ISP will be erased if JTAGICE mkII is used. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32UC devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (C) 2006-2008, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#include "conf_isp.h" + + +//! @{ +//! \verbatim + + + // This must be linked @ 0x80000000 if it is to be run upon reset. + .section .reset, "ax", @progbits + + + .global _trampoline + .type _trampoline, @function +_trampoline: + // Jump to program start. + rjmp program_start + + .org PROGRAM_START_OFFSET +program_start: + // Jump to the C runtime startup routine. + lda.w pc, _stext + + +//! \endverbatim +//! @} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/arduino.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/arduino.h new file mode 100644 index 0000000..fbdd466 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/arduino.h @@ -0,0 +1,234 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3A EVK1100 board header file. + * + * This file contains definitions and services related to the features of the + * EVK1100 board rev. B and C. + * + * To use this board, define BOARD=EVK1100. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3A devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _ARDUINO_H_ +#define _ARDUINO_H_ + +#include "compiler.h" + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. +# include "led.h" +#endif // __AVR32_ABI_COMPILER__ + + +/*! \name Oscillator Definitions + */ +//! @{ + +// RCOsc has no custom calibration by default. Set the following definition to +// the appropriate value if a custom RCOsc calibration has been applied to your +// part. +//#define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< RCOsc frequency: Hz. + +#define FOSC32 32768 //!< Osc32 frequency: Hz. +#define OSC32_STARTUP AVR32_PM_OSCCTRL32_STARTUP_8192_RCOSC //!< Osc32 startup time: RCOsc periods. + +#define FOSC0 12000000 //!< Osc0 frequency: Hz. +#define OSC0_STARTUP AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC //!< Osc0 startup time: RCOsc periods. + +// Osc1 crystal is not mounted by default. Set the following definitions to the +// appropriate values if a custom Osc1 crystal is mounted on your board. +//#define FOSC1 12000000 //!< Osc1 frequency: Hz. +//#define OSC1_STARTUP AVR32_PM_OSCCTRL1_STARTUP_2048_RCOSC //!< Osc1 startup time: RCOsc periods. + +//! @} + + +//! Number of LEDs. +#define LED_COUNT 3 + +/*! \name GPIO Connections of LEDs + */ +//! @{ +#define LED0_GPIO AVR32_PIN_PB19 +#define LED1_GPIO AVR32_PIN_PB20 +#define LED2_GPIO AVR32_PIN_PB21 +//! @} + +/*! \name PWM Channels of LEDs + */ +//! @{ +#define LED0_PWM 0 +#define LED1_PWM 1 +#define LED2_PWM 2 +//! @} + +/*! \name PWM Functions of LEDs + */ +//! @{ +#define LED0_PWM_FUNCTION AVR32_PWM_0_FUNCTION +#define LED1_PWM_FUNCTION AVR32_PWM_1_FUNCTION +#define LED2_PWM_FUNCTION AVR32_PWM_2_FUNCTION +//! @} + +/*! \name Color Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED_MONO0_GREEN LED0 +#define LED_MONO1_GREEN LED1 +#define LED_MONO2_GREEN LED2 +//! @} + +#if 0 +/*! \name SPI Connections of the DIP204 LCD + */ +//! @{ +#define DIP204_SPI (&AVR32_SPI1) +#define DIP204_SPI_NPCS 2 +#define DIP204_SPI_SCK_PIN AVR32_SPI1_SCK_0_0_PIN +#define DIP204_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_0_FUNCTION +#define DIP204_SPI_MISO_PIN AVR32_SPI1_MISO_0_0_PIN +#define DIP204_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_0_FUNCTION +#define DIP204_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_0_PIN +#define DIP204_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_0_FUNCTION +#define DIP204_SPI_NPCS_PIN AVR32_SPI1_NPCS_2_0_PIN +#define DIP204_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_2_0_FUNCTION +//! @} + +/*! \name GPIO and PWM Connections of the DIP204 LCD Backlight + */ +//! @{ +#define DIP204_BACKLIGHT_PIN AVR32_PIN_PB18 +#define DIP204_PWM_CHANNEL 6 +#define DIP204_PWM_PIN AVR32_PWM_6_PIN +#define DIP204_PWM_FUNCTION AVR32_PWM_6_FUNCTION +//! @} +#endif + +/*! \name SPI Connections of the AT45DBX Data Flash Memory + */ +//! @{ +#define AT45DBX_SPI (&AVR32_SPI1) +#define AT45DBX_SPI_NPCS 2 +#define AT45DBX_SPI_SCK_PIN AVR32_SPI1_SCK_0_0_PIN +#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_0_FUNCTION +#define AT45DBX_SPI_MISO_PIN AVR32_SPI1_MISO_0_0_PIN +#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_0_FUNCTION +#define AT45DBX_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_0_PIN +#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_0_FUNCTION +#define AT45DBX_SPI_NPCS2_PIN AVR32_SPI1_NPCS_2_0_PIN +#define AT45DBX_SPI_NPCS2_FUNCTION AVR32_SPI1_NPCS_2_0_FUNCTION +#define AT45DBX_CHIP_RESET AVR32_PIN_PA02 +//! @} + + +/*! \name GPIO and SPI Connections of the SD/MMC Connector + */ +//! @{ +//#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PA02 +//#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PA07 +#define SD_MMC_SPI (&AVR32_SPI1) +#define SD_MMC_SPI_NPCS 1 +#define SD_MMC_SPI_SCK_PIN AVR32_SPI1_SCK_0_0_PIN +#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_0_FUNCTION +#define SD_MMC_SPI_MISO_PIN AVR32_SPI1_MISO_0_0_PIN +#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_0_FUNCTION +#define SD_MMC_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_0_PIN +#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_0_FUNCTION +#define SD_MMC_SPI_NPCS_PIN AVR32_SPI1_NPCS_1_0_PIN +#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_1_0_FUNCTION +//! @} + +/* Timer Counter to generate clock for WiFi chip*/ +# define WIFI_TC (&AVR32_TC) +# define WIFI_TC_CHANNEL_ID 0 +# define WIFI_TC_CHANNEL_PIN AVR32_TC_A0_0_0_PIN +# define WIFI_TC_CHANNEL_FUNCTION AVR32_TC_A0_0_0_FUNCTION +// Note that TC_A0_0_0 pin is pin 6 (PB23) on AT32UC3A1512 QFP100. + +/* Pin related to WiFi chip communication */ +#ifndef USE_POLL + #define USE_POLL +#endif + #define SPI_CS 0 + #define AVR32_SPI AVR32_SPI1 + #define GPIO_IRQ_PIN AVR32_PIN_PA03 + #define GPIO_IRQ AVR32_GPIO_IRQ_7 + #define GPIO_W_RESET_PIN AVR32_PIN_PA07 + #define GPIO_W_SHUTDOWN_PIN AVR32_PIN_PA09 + +/* Pin related to shield communication */ + #define ARDUINO_HANDSHAKE_PIN AVR32_PIN_PA25 + + #define AVR32_PDCA_PID_TX AVR32_PDCA_PID_SPI1_TX + #define AVR32_PDCA_PID_RX AVR32_PDCA_PID_SPI1_RX + + +#if 0 +/*! \name TWI Connections of the Spare TWI Connector + */ +//! @{ +#define SPARE_TWI (&AVR32_TWI) +#define SPARE_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN +#define SPARE_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION +#define SPARE_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN +#define SPARE_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION +//! @} + + +/*! \name SPI Connections of the Spare SPI Connector + */ +//! @{ +#define SPARE_SPI (&AVR32_SPI0) +#define SPARE_SPI_NPCS 0 +#define SPARE_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN +#define SPARE_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION +#define SPARE_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN +#define SPARE_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION +#define SPARE_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN +#define SPARE_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION +#define SPARE_SPI_NPCS_PIN AVR32_SPI0_NPCS_0_0_PIN +#define SPARE_SPI_NPCS_FUNCTION AVR32_SPI0_NPCS_0_0_FUNCTION +//! @} +#endif + +#endif // _ARDUINO_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.c new file mode 100644 index 0000000..d7cd439 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.c @@ -0,0 +1,346 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3A EVK1100 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1100 board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3A devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "preprocessor.h" +#include "compiler.h" +#include "arduino.h" +#include "led.h" + + +//! Structure describing LED hardware connections. +typedef const struct +{ + struct + { + U32 PORT; //!< LED GPIO port. + U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port. + } GPIO; //!< LED GPIO descriptor. + struct + { + S32 CHANNEL; //!< LED PWM channel (< 0 if N/A). + S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A). + } PWM; //!< LED PWM descriptor. +} tLED_DESCRIPTOR; + + +//! Hardware descriptors of all LEDs. +static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] = +{ +#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \ + { \ + {LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\ + {LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \ + }, + MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~) +#undef INSERT_LED_DESCRIPTOR +}; + + +//! Saved state of all LEDs. +static volatile U32 LED_State = (1 << LED_COUNT) - 1; + + +U32 LED_Read_Display(void) +{ + return LED_State; +} + + +void LED_Display(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor; + volatile avr32_gpio_port_t *led_gpio_port; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + LED_State = leds; + + // For all LEDs... + for (led_descriptor = &LED_DESCRIPTOR[0]; + led_descriptor < LED_DESCRIPTOR + LED_COUNT; + led_descriptor++) + { + // Set the LED to the requested state. + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + } +} + + +U32 LED_Read_Display_Mask(U32 mask) +{ + return Rd_bits(LED_State, mask); +} + + +void LED_Display_Mask(U32 mask, U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + mask &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Wr_bits(LED_State, mask, leds); + + // While there are specified LEDs left to manage... + while (mask) + { + // Select the next specified LED and set it to the requested state. + led_shift = 1 + ctz(mask); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + leds >>= led_shift - 1; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + mask >>= led_shift; + } +} + + +Bool LED_Test(U32 leds) +{ + return Tst_bits(LED_State, leds); +} + + +void LED_Off(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Clr_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and turn it off. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_On(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Set_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and turn it on. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_Toggle(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Tgl_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and toggle it. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +U32 LED_Read_Display_Field(U32 field) +{ + return Rd_bitfield(LED_State, field); +} + + +void LED_Display_Field(U32 field, U32 leds) +{ + // Move the bit-field to the appropriate position for the bit-mask. + LED_Display_Mask(field, leds << ctz(field)); +} + + +U8 LED_Get_Intensity(U32 led) +{ + tLED_DESCRIPTOR *led_descriptor; + + // Check that the argument value is valid. + led = ctz(led); + led_descriptor = &LED_DESCRIPTOR[led]; + if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0; + + // Return the duty cycle value if the LED PWM channel is enabled, else 0. + return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ? + AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0; +} + + +void LED_Set_Intensity(U32 leds, U8 intensity) +{ + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_pwm_channel_t *led_pwm_channel; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // For each specified LED... + for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift) + { + // Select the next specified LED and check that it has a PWM channel. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + if (led_descriptor->PWM.CHANNEL < 0) continue; + + // Initialize or update the LED PWM channel. + led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL]; + if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL))) + { + led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) & + ~(AVR32_PWM_CALG_MASK | + AVR32_PWM_CPOL_MASK | + AVR32_PWM_CPD_MASK); + led_pwm_channel->cprd = 0x000000FF; + led_pwm_channel->cdty = intensity; + AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL; + } + else + { + AVR32_PWM.isr; + while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL))); + led_pwm_channel->cupd = intensity; + } + + // Switch the LED pin to its PWM function. + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (led_descriptor->PWM.FUNCTION & 0x1) + { + led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK; + } + if (led_descriptor->PWM.FUNCTION & 0x2) + { + led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK; + } +} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.h new file mode 100644 index 0000000..a577124 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/ARDUINO/led.h @@ -0,0 +1,191 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3A EVK1100 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1100 board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3A devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _LED_H_ +#define _LED_H_ + +#include "compiler.h" + + +/*! \name Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED0 0x01 +#define LED1 0x02 +#define LED2 0x04 +#define LED3 0x08 +#define LED4 0x10 +#define LED5 0x20 +#define LED6 0x40 +#define LED7 0x80 +//! @} + + +/*! \brief Gets the last state of all LEDs set through the LED API. + * + * \return State of all LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display(void); + +/*! \brief Sets the state of all LEDs. + * + * \param leds New state of all LEDs (1 bit per LED). + * + * \note The pins of all LEDs are set to GPIO output mode. + */ +extern void LED_Display(U32 leds); + +/*! \brief Gets the last state of the specified LEDs set through the LED API. + * + * \param mask LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Mask(U32 mask); + +/*! \brief Sets the state of the specified LEDs. + * + * \param mask LEDs of which to set the state (1 bit per LED). + * + * \param leds New state of the specified LEDs (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Mask(U32 mask, U32 leds); + +/*! \brief Tests the last state of the specified LEDs set through the LED API. + * + * \param leds LEDs of which to test the state (1 bit per LED). + * + * \return \c TRUE if at least one of the specified LEDs has a state on, else + * \c FALSE. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern Bool LED_Test(U32 leds); + +/*! \brief Turns off the specified LEDs. + * + * \param leds LEDs to turn off (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Off(U32 leds); + +/*! \brief Turns on the specified LEDs. + * + * \param leds LEDs to turn on (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_On(U32 leds); + +/*! \brief Toggles the specified LEDs. + * + * \param leds LEDs to toggle (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Toggle(U32 leds); + +/*! \brief Gets as a bit-field the last state of the specified LEDs set through + * the LED API. + * + * \param field LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED, beginning with the first + * specified LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Field(U32 field); + +/*! \brief Sets as a bit-field the state of the specified LEDs. + * + * \param field LEDs of which to set the state (1 bit per LED). + * \param leds New state of the specified LEDs (1 bit per LED, beginning with + * the first specified LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Field(U32 field, U32 leds); + +/*! \brief Gets the intensity of the specified LED. + * + * \param led LED of which to get the intensity (1 bit per LED; only the least + * significant set bit is used). + * + * \return Intensity of the specified LED (0x00 to 0xFF). + * + * \warning The PWM channel of the specified LED is supposed to be used only by + * this module. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U8 LED_Get_Intensity(U32 led); + +/*! \brief Sets the intensity of the specified LEDs. + * + * \param leds LEDs of which to set the intensity (1 bit per LED). + * \param intensity New intensity of the specified LEDs (0x00 to 0xFF). + * + * \warning The PWM channels of the specified LEDs are supposed to be used only + * by this module. + * + * \note The pins of the specified LEDs are set to PWM output mode. + */ +extern void LED_Set_Intensity(U32 leds, U8 intensity); + + +#endif // _LED_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/evk1105.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/evk1105.h new file mode 100644 index 0000000..edda44c --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/evk1105.h @@ -0,0 +1,433 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3A EVK1105 board header file. + * + * This file contains definitions and services related to the features of the + * EVK1105 board rev. B. + * + * To use this board, define BOARD=EVK1105. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3A devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _EVK1105_H_ +#define _EVK1105_H_ + +#ifdef EVK1105_REV3 +# include "evk1105_rev3.h" +#else + +#include "compiler.h" + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. +# include "led.h" +#endif // __AVR32_ABI_COMPILER__ + + +/*! \name Oscillator Definitions + */ +//! @{ + +// RCOsc has no custom calibration by default. Set the following definition to +// the appropriate value if a custom RCOsc calibration has been applied to your +// part. +//#define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< RCOsc frequency: Hz. + +#define FOSC32 32768 //!< Osc32 frequency: Hz. +#define OSC32_STARTUP AVR32_PM_OSCCTRL32_STARTUP_8192_RCOSC //!< Osc32 startup time: RCOsc periods. + +#define FOSC0 12000000 //!< Osc0 frequency: Hz. +#define OSC0_STARTUP AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC //!< Osc0 startup time: RCOsc periods. + +#define FOSC1 11289600 //!< Osc1 frequency: Hz +#define OSC1_STARTUP AVR32_PM_OSCCTRL1_STARTUP_2048_RCOSC //!< Osc1 startup time: RCOsc periods. + + +//! @} + + +/*! \name SDRAM Definitions + */ +//! @{ + +//! Part header file of used SDRAM(s). +#define SDRAM_PART_HDR "MT48LC16M16A2TG7E/mt48lc16m16a2tg7e.h" + +//! Data bus width to use the SDRAM(s) with (16 or 32 bits; always 16 bits on +//! UC3). +#define SDRAM_DBW 16 +//! @} + + +/*! \name USB Definitions + */ +//! @{ +//! Multiplexed pin used for USB_ID: AVR32_USBB_USB_ID_x_x. +//! To be selected according to the AVR32_USBB_USB_ID_x_x_PIN and +//! AVR32_USBB_USB_ID_x_x_FUNCTION definitions from . +#define AVR32_USBB_USB_ID_0_2_PIN 21 +#define AVR32_USBB_USB_ID_0_2_FUNCTION 2 +#define USB_ID AVR32_USBB_USB_ID_0_2 + +//! Multiplexed pin used for USB_VBOF: AVR32_USBB_USB_VBOF_x_x. +//! To be selected according to the AVR32_USBB_USB_VBOF_x_x_PIN and +//! AVR32_USBB_USB_VBOF_x_x_FUNCTION definitions from . +# define USB_VBOF AVR32_USBB_USB_VBOF_0_1 + + +//! Active level of the USB_VBOF output pin. +# define USB_VBOF_ACTIVE_LEVEL LOW + +//! USB overcurrent detection pin. +# define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PX15 + +//! @} + + +//! GPIO connection of the MAC PHY PWR_DOWN/INT signal. +# define MACB_INTERRUPT_PIN AVR32_PIN_PA26 + + + +//! Number of LEDs. +#define LED_COUNT 4 + +/*! \name GPIO Connections of LEDs + */ +//! @{ +# define LED0_GPIO AVR32_PIN_PB27 +# define LED1_GPIO AVR32_PIN_PB28 +# define LED2_GPIO AVR32_PIN_PA05 +# define LED3_GPIO AVR32_PIN_PA06 +//! @} + +/*! \name Color Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED_MONO0_GREEN LED0 +#define LED_MONO1_GREEN LED1 +#define LED_MONO2_GREEN LED2 +#define LED_MONO3_GREEN LED3 +//! @} + +/*! \name PWM Channels of LEDs + */ +//! @{ +#define LED0_PWM 4 +#define LED1_PWM 5 +#define LED2_PWM (-1) +#define LED3_PWM (-1) +//! @} + +/*! \name PWM Functions of LEDs + */ +//! @{ +/* TODO: Implement PWM functionality */ +#define LED0_PWM_FUNCTION (-1)//AVR32_PWM_0_FUNCTION +#define LED1_PWM_FUNCTION (-1)//AVR32_PWM_1_FUNCTION +#define LED2_PWM_FUNCTION (-1) +#define LED3_PWM_FUNCTION (-1) +//! @} + +//! External interrupt connection of touch sensor. +#define QT1081_EIC_EXTINT_PIN AVR32_EIC_EXTINT_1_PIN +#define QT1081_EIC_EXTINT_FUNCTION AVR32_EIC_EXTINT_1_FUNCTION +#define QT1081_EIC_EXTINT_IRQ AVR32_EIC_IRQ_1 +#define QT1081_EIC_EXTINT_INT AVR32_EIC_INT1 +/*! \name Touch sensor low power mode select + */ +#define QT1081_LP_MODE AVR32_PIN_PB29 + +/*! \name GPIO Connections of touch buttons + */ +//! @{ +#define QT1081_TOUCH_SENSOR_0 AVR32_PIN_PB22 +#define QT1081_TOUCH_SENSOR_0_PRESSED 1 +#define QT1081_TOUCH_SENSOR_1 AVR32_PIN_PB23 +#define QT1081_TOUCH_SENSOR_1_PRESSED 1 +#define QT1081_TOUCH_SENSOR_2 AVR32_PIN_PB24 +#define QT1081_TOUCH_SENSOR_2_PRESSED 1 +#define QT1081_TOUCH_SENSOR_3 AVR32_PIN_PB25 +#define QT1081_TOUCH_SENSOR_3_PRESSED 1 +#define QT1081_TOUCH_SENSOR_4 AVR32_PIN_PB26 +#define QT1081_TOUCH_SENSOR_4_PRESSED 1 + +#define QT1081_TOUCH_SENSOR_ENTER QT1081_TOUCH_SENSOR_4 +#define QT1081_TOUCH_SENSOR_ENTER_PRESSED QT1081_TOUCH_SENSOR_4_PRESSED +#define QT1081_TOUCH_SENSOR_LEFT QT1081_TOUCH_SENSOR_3 +#define QT1081_TOUCH_SENSOR_LEFT_PRESSED QT1081_TOUCH_SENSOR_3_PRESSED +#define QT1081_TOUCH_SENSOR_RIGHT QT1081_TOUCH_SENSOR_2 +#define QT1081_TOUCH_SENSOR_RIGHT_PRESSED QT1081_TOUCH_SENSOR_2_PRESSED +#define QT1081_TOUCH_SENSOR_UP QT1081_TOUCH_SENSOR_0 +#define QT1081_TOUCH_SENSOR_UP_PRESSED QT1081_TOUCH_SENSOR_0_PRESSED +#define QT1081_TOUCH_SENSOR_DOWN QT1081_TOUCH_SENSOR_1 +#define QT1081_TOUCH_SENSOR_DOWN_PRESSED QT1081_TOUCH_SENSOR_1_PRESSED +//! @} + +/*! \name SPI Connections of the AT45DBX Data Flash Memory + */ +//! @{ +#define AT45DBX_SPI (&AVR32_SPI0) +#define AT45DBX_SPI_NPCS 0 +#define AT45DBX_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN +#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION +#define AT45DBX_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN +#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION +#define AT45DBX_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN +#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION +#define AT45DBX_SPI_NPCS0_PIN AVR32_SPI0_NPCS_0_0_PIN +#define AT45DBX_SPI_NPCS0_FUNCTION AVR32_SPI0_NPCS_0_0_FUNCTION +//! @} + +/*! \name GPIO and SPI Connections of the SD/MMC Connector + */ +//! @{ +#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PA02 +#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PA18 +#define SD_MMC_SPI (&AVR32_SPI0) +#define SD_MMC_SPI_NPCS 1 +#define SD_MMC_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN +#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION +#define SD_MMC_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN +#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION +#define SD_MMC_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN +#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION +#define SD_MMC_SPI_NPCS_PIN AVR32_SPI0_NPCS_1_0_PIN +#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI0_NPCS_1_0_FUNCTION +//! @} + + +/*! \name TWI expansion + */ +//! @{ +#define EXPANSION_TWI (&AVR32_TWI) +#define EXPANSION_RESET AVR32_PIN_PX16 +#define EXPANSION_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN +#define EXPANSION_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION +#define EXPANSION_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN +#define EXPANSION_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION +//! @} + +/*! \name Wireless expansion + */ + +#define WEXPANSION_EXTINT_PIN AVR32_EIC_EXTINT_8_PIN +#define WEXPANSION_EXTINT_FUNCTION AVR32_EIC_EXTINT_8_FUNCTION +#define WEXPANSION_GPIO1 AVR32_PIN_PB30 +#define WEXPANSION_GPIO2 AVR32_PIN_PB31 + +#define WEXPANSION_SPI (&AVR32_SPI0) +#define WEXPANSION_SPI_NPCS 2 +#define WEXPANSION_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN +#define WEXPANSION_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION +#define WEXPANSION_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN +#define WEXPANSION_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION +#define WEXPANSION_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN +#define WEXPANSION_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION +#define WEXPANSION_SPI_NPCS_PIN AVR32_SPI0_NPCS_2_0_PIN +#define WEXPANSION_SPI_NPCS_FUNCTION AVR32_SPI0_NPCS_2_0_FUNCTION + +//! @} + +/*! \name ET024006DHU TFT display + */ +//! @{ + +#define ET024006DHU_TE_PIN AVR32_PIN_PX19 +#define ET024006DHU_RESET_PIN AVR32_PIN_PX22 +#define ET024006DHU_BL_PIN AVR32_PWM_6_PIN +#define ET024006DHU_BL_FUNCTION AVR32_PWM_6_FUNCTION +#define ET024006DHU_DNC_PIN AVR32_EBI_ADDR_21_1_PIN +#define ET024006DHU_DNC_FUNCTION AVR32_EBI_ADDR_21_1_FUNCTION +#define ET024006DHU_EBI_NCS_PIN AVR32_EBI_NCS_0_1_PIN +#define ET024006DHU_EBI_NCS_FUNCTION AVR32_EBI_NCS_0_1_FUNCTION + +//! @} +/*! \name Optional SPI connection to the TFT + */ +//! @{ + +#define ET024006DHU_SPI (&AVR32_SPI0) +#define ET024006DHU_SPI_NPCS 3 +#define ET024006DHU_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN +#define ET024006DHU_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION +#define ET024006DHU_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN +#define ET024006DHU_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION +#define ET024006DHU_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN +#define ET024006DHU_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION +#define ET024006DHU_SPI_NPCS_PIN AVR32_SPI1_NPCS_3_0_PIN +#define ET024006DHU_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_3_0_FUNCTION + +//! @} + + +/*! \name Audio amplifier connection to the DAC + */ +//! @{ + +#define TPA6130_ABDAC (&AVR32_ABDAC) + +#define TPA6130_DATA0_PIN AVR32_ABDAC_DATA_0_1_PIN +#define TPA6130_DATA0_FUNCTION AVR32_ABDAC_DATA_0_1_FUNCTION +#define TPA6130_DATAN0_PIN AVR32_ABDAC_DATAN_0_1_PIN +#define TPA6130_DATAN0_FUNCTION AVR32_ABDAC_DATAN_0_1_FUNCTION +#define TPA6130_DATA1_PIN AVR32_ABDAC_DATA_1_1_PIN +#define TPA6130_DATA1_FUNCTION AVR32_ABDAC_DATA_1_1_FUNCTION +#define TPA6130_DATAN1_PIN AVR32_ABDAC_DATAN_1_1_PIN +#define TPA6130_DATAN1_FUNCTION AVR32_ABDAC_DATAN_1_1_FUNCTION + +#define TPA6130_ABDAC_PDCA_PID AVR32_PDCA_PID_ABDAC_TX +#define TPA6130_ABDAC_PDCA_CHANNEL 0 +#define TPA6130_ABDAC_PDCA_IRQ AVR32_PDCA_IRQ_0 +#define TPA6130_ABDAC_PDCA_INT_LEVEL AVR32_INTC_INT3 + +#define TPA6130_TWI (&AVR32_TWI) +#define TPA6130_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN +#define TPA6130_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION +#define TPA6130_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN +#define TPA6130_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION + +//! }@ +/*! \name TI TLV320AIC23B sound chip + */ +//! @{ +#define TLV320_SSC (&AVR32_SSC) +#define TLV320_SSC_TX_CLOCK_PIN AVR32_SSC_TX_CLOCK_0_PIN +#define TLV320_SSC_TX_CLOCK_FUNCTION AVR32_SSC_TX_CLOCK_0_FUNCTION +#define TLV320_SSC_TX_DATA_PIN AVR32_SSC_TX_DATA_0_PIN +#define TLV320_SSC_TX_DATA_FUNCTION AVR32_SSC_TX_DATA_0_FUNCTION +#define TLV320_SSC_TX_FRAME_SYNC_PIN AVR32_SSC_TX_FRAME_SYNC_0_PIN +#define TLV320_SSC_TX_FRAME_SYNC_FUNCTION AVR32_SSC_TX_FRAME_SYNC_0_FUNCTION + +#define TLV320_TWI (&AVR32_TWI) +#define TLV320_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN +#define TLV320_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION +#define TLV320_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN +#define TLV320_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION + +#define TLV320_PM_GCLK_PIN AVR32_PM_GCLK_0_0_PIN +#define TLV320_PM_GCLK_FUNCTION AVR32_PM_GCLK_0_0_FUNCTION +//! @} + +////! \name SPI: Apple Authentication Chip Hardware Connections +////! @{ +#define IPOD_AUTH_CHIP_SPI (&AVR32_SPI0) +#define IPOD_AUTH_CHIP_SPI_IRQ AVR32_SPI0_IRQ +#define IPOD_AUTH_CHIP_SPI_NPCS 2 +#define IPOD_AUTH_CHIP_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN +#define IPOD_AUTH_CHIP_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION +#define IPOD_AUTH_CHIP_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN +#define IPOD_AUTH_CHIP_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION +#define IPOD_AUTH_CHIP_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN +#define IPOD_AUTH_CHIP_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION +#define IPOD_AUTH_CHIP_SPI_NPCS_PIN AVR32_SPI0_NPCS_2_0_PIN +#define IPOD_AUTH_CHIP_SPI_NPCS_FUNCTION AVR32_SPI0_NPCS_2_0_FUNCTION +#define IPOD_AUTH_CHIP_SPI_N_RESET_PIN AVR32_PIN_PB30 +#define IPOD_AUTH_CHIP_SPI_CP_READY_PIN AVR32_PIN_PB31 +//! }@ + +/*! \name Connections of the iPOD Authentication Coprocessor + */ +//! @{ + +#define IPOD_AUTH_CHIP_TWI (&AVR32_TWI) +#define IPOD_AUTH_CHIP_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN +#define IPOD_AUTH_CHIP_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION +#define IPOD_AUTH_CHIP_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN +#define IPOD_AUTH_CHIP_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION +#define IPOD_AUTH_CHIP_TWI_N_RESET_PIN AVR32_PIN_PX16 + +//! @} + +/*! \name USART connection to the UC3B board controller + */ +//! @{ + +#define USART0_RXD_PIN AVR32_USART0_RXD_0_0_PIN +#define USART0_RXD_FUNCTION AVR32_USART0_RXD_0_0_FUNCTION +#define USART0_TXD_PIN AVR32_USART0_TXD_0_0_PIN +#define USART0_TXD_FUNCTION AVR32_USART0_TXD_0_0_FUNCTION +#define USART0_RTS_PIN AVR32_USART0_RTS_0_0_PIN +#define USART0_RTS_FUNCTION AVR32_USART0_RTS_0_0_FUNCTION +#define USART0_CTS_PIN AVR32_USART0_CTS_0_0_PIN +#define USART0_CTS_FUNCTION AVR32_USART0_CTS_0_0_FUNCTION + +//! @} + +#define ADC_VEXT_PIN AVR32_ADC_AD_7_PIN +#define ADC_VEXT_FUNCTION AVR32_ADC_AD_7_FUNCTION + +/*! \name LCD Connections of the ET024006DHU display + */ +//! @{ +#define ET024006DHU_SMC_USE_NCS 0 +#define ET024006DHU_SMC_COMPONENT_CS "smc_et024006dhu.h" + +#define ET024006DHU_EBI_DATA_0 AVR32_EBI_DATA_0 +#define ET024006DHU_EBI_DATA_1 AVR32_EBI_DATA_1 +#define ET024006DHU_EBI_DATA_2 AVR32_EBI_DATA_2 +#define ET024006DHU_EBI_DATA_3 AVR32_EBI_DATA_3 +#define ET024006DHU_EBI_DATA_4 AVR32_EBI_DATA_4 +#define ET024006DHU_EBI_DATA_5 AVR32_EBI_DATA_5 +#define ET024006DHU_EBI_DATA_6 AVR32_EBI_DATA_6 +#define ET024006DHU_EBI_DATA_7 AVR32_EBI_DATA_7 +#define ET024006DHU_EBI_DATA_8 AVR32_EBI_DATA_8 +#define ET024006DHU_EBI_DATA_9 AVR32_EBI_DATA_9 +#define ET024006DHU_EBI_DATA_10 AVR32_EBI_DATA_10 +#define ET024006DHU_EBI_DATA_11 AVR32_EBI_DATA_11 +#define ET024006DHU_EBI_DATA_12 AVR32_EBI_DATA_12 +#define ET024006DHU_EBI_DATA_13 AVR32_EBI_DATA_13 +#define ET024006DHU_EBI_DATA_14 AVR32_EBI_DATA_14 +#define ET024006DHU_EBI_DATA_15 AVR32_EBI_DATA_15 + +#define ET024006DHU_EBI_ADDR_21 AVR32_EBI_ADDR_21_1 + +#define ET024006DHU_EBI_NWE AVR32_EBI_NWE0_0 +#define ET024006DHU_EBI_NRD AVR32_EBI_NRD_0 +#define ET024006DHU_EBI_NCS AVR32_EBI_NCS_0_1 +//! @} + + +#endif // !EVK1105_REVA + +#endif // _EVK1105_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.c new file mode 100644 index 0000000..561652a --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.c @@ -0,0 +1,346 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3A EVK1105 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1105 board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3A devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "preprocessor.h" +#include "compiler.h" +#include "evk1105.h" +#include "led.h" + + +//! Structure describing LED hardware connections. +typedef const struct +{ + struct + { + U32 PORT; //!< LED GPIO port. + U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port. + } GPIO; //!< LED GPIO descriptor. + struct + { + S32 CHANNEL; //!< LED PWM channel (< 0 if N/A). + S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A). + } PWM; //!< LED PWM descriptor. +} tLED_DESCRIPTOR; + + +//! Hardware descriptors of all LEDs. +static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] = +{ +#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \ + { \ + {LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\ + {LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \ + }, + MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~) +#undef INSERT_LED_DESCRIPTOR +}; + + +//! Saved state of all LEDs. +static volatile U32 LED_State = (1 << LED_COUNT) - 1; + + +U32 LED_Read_Display(void) +{ + return LED_State; +} + + +void LED_Display(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor; + volatile avr32_gpio_port_t *led_gpio_port; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + LED_State = leds; + + // For all LEDs... + for (led_descriptor = &LED_DESCRIPTOR[0]; + led_descriptor < LED_DESCRIPTOR + LED_COUNT; + led_descriptor++) + { + // Set the LED to the requested state. + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + } +} + + +U32 LED_Read_Display_Mask(U32 mask) +{ + return Rd_bits(LED_State, mask); +} + + +void LED_Display_Mask(U32 mask, U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + mask &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Wr_bits(LED_State, mask, leds); + + // While there are specified LEDs left to manage... + while (mask) + { + // Select the next specified LED and set it to the requested state. + led_shift = 1 + ctz(mask); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + leds >>= led_shift - 1; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + mask >>= led_shift; + } +} + + +Bool LED_Test(U32 leds) +{ + return Tst_bits(LED_State, leds); +} + + +void LED_Off(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Clr_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and turn it off. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_On(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Set_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and turn it on. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_Toggle(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Tgl_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and toggle it. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +U32 LED_Read_Display_Field(U32 field) +{ + return Rd_bitfield(LED_State, field); +} + + +void LED_Display_Field(U32 field, U32 leds) +{ + // Move the bit-field to the appropriate position for the bit-mask. + LED_Display_Mask(field, leds << ctz(field)); +} + + +U8 LED_Get_Intensity(U32 led) +{ + tLED_DESCRIPTOR *led_descriptor; + + // Check that the argument value is valid. + led = ctz(led); + led_descriptor = &LED_DESCRIPTOR[led]; + if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0; + + // Return the duty cycle value if the LED PWM channel is enabled, else 0. + return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ? + AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0; +} + + +void LED_Set_Intensity(U32 leds, U8 intensity) +{ + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_pwm_channel_t *led_pwm_channel; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // For each specified LED... + for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift) + { + // Select the next specified LED and check that it has a PWM channel. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + if (led_descriptor->PWM.CHANNEL < 0) continue; + + // Initialize or update the LED PWM channel. + led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL]; + if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL))) + { + led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) & + ~(AVR32_PWM_CALG_MASK | + AVR32_PWM_CPOL_MASK | + AVR32_PWM_CPD_MASK); + led_pwm_channel->cprd = 0x000000FF; + led_pwm_channel->cdty = intensity; + AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL; + } + else + { + AVR32_PWM.isr; + while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL))); + led_pwm_channel->cupd = intensity; + } + + // Switch the LED pin to its PWM function. + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (led_descriptor->PWM.FUNCTION & 0x1) + { + led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK; + } + if (led_descriptor->PWM.FUNCTION & 0x2) + { + led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK; + } +} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.h new file mode 100644 index 0000000..7766b6a --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/EVK1105/led.h @@ -0,0 +1,187 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3A EVK1105 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1105 board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3A devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _LED_H_ +#define _LED_H_ + +#include "compiler.h" + + +/*! \name Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED0 0x01 +#define LED1 0x02 +#define LED2 0x04 +#define LED3 0x08 +//! @} + + +/*! \brief Gets the last state of all LEDs set through the LED API. + * + * \return State of all LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display(void); + +/*! \brief Sets the state of all LEDs. + * + * \param leds New state of all LEDs (1 bit per LED). + * + * \note The pins of all LEDs are set to GPIO output mode. + */ +extern void LED_Display(U32 leds); + +/*! \brief Gets the last state of the specified LEDs set through the LED API. + * + * \param mask LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Mask(U32 mask); + +/*! \brief Sets the state of the specified LEDs. + * + * \param mask LEDs of which to set the state (1 bit per LED). + * + * \param leds New state of the specified LEDs (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Mask(U32 mask, U32 leds); + +/*! \brief Tests the last state of the specified LEDs set through the LED API. + * + * \param leds LEDs of which to test the state (1 bit per LED). + * + * \return \c TRUE if at least one of the specified LEDs has a state on, else + * \c FALSE. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern Bool LED_Test(U32 leds); + +/*! \brief Turns off the specified LEDs. + * + * \param leds LEDs to turn off (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Off(U32 leds); + +/*! \brief Turns on the specified LEDs. + * + * \param leds LEDs to turn on (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_On(U32 leds); + +/*! \brief Toggles the specified LEDs. + * + * \param leds LEDs to toggle (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Toggle(U32 leds); + +/*! \brief Gets as a bit-field the last state of the specified LEDs set through + * the LED API. + * + * \param field LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED, beginning with the first + * specified LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Field(U32 field); + +/*! \brief Sets as a bit-field the state of the specified LEDs. + * + * \param field LEDs of which to set the state (1 bit per LED). + * \param leds New state of the specified LEDs (1 bit per LED, beginning with + * the first specified LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Field(U32 field, U32 leds); + +/*! \brief Gets the intensity of the specified LED. + * + * \param led LED of which to get the intensity (1 bit per LED; only the least + * significant set bit is used). + * + * \return Intensity of the specified LED (0x00 to 0xFF). + * + * \warning The PWM channel of the specified LED is supposed to be used only by + * this module. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U8 LED_Get_Intensity(U32 led); + +/*! \brief Sets the intensity of the specified LEDs. + * + * \param leds LEDs of which to set the intensity (1 bit per LED). + * \param intensity New intensity of the specified LEDs (0x00 to 0xFF). + * + * \warning The PWM channels of the specified LEDs are supposed to be used only + * by this module. + * + * \note The pins of the specified LEDs are set to PWM output mode. + */ +extern void LED_Set_Intensity(U32 leds, U8 intensity); + + +#endif // _LED_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/board.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/board.h new file mode 100644 index 0000000..78ee91e --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/board.h @@ -0,0 +1,120 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Standard board header file. + * + * This file includes the appropriate board header file according to the + * defined board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +#include + +/*! \name Base Boards + */ +//! @{ +#define EVK1100 1 //!< AT32UC3A EVK1100 board. +#define EVK1101 2 //!< AT32UC3B EVK1101 board. +#define UC3C_EK 3 //!< AT32UC3C UC3C_EK board. +#define EVK1104 4 //!< AT32UC3A3 EVK1104 board. +#define EVK1105 5 //!< AT32UC3A EVK1105 board. +#define STK1000 6 //!< AT32AP7000 STK1000 board. +#define NGW100 7 //!< AT32AP7000 NGW100 board. +#define STK600_RCUC3L0 8 //!< STK600 RCUC3L0 board. +#define UC3L_EK 9 //!< AT32UC3L-EK board. +#define USER_BOARD 99 //!< User-reserved board (if any). +//! @} + +/*! \name Extension Boards + */ +//! @{ +#define EXT1102 1 //!< AT32UC3B EXT1102 board. +#define MC300 2 //!< AT32UC3 MC300 board. +#define USER_EXT_BOARD 99 //!< User-reserved extension board (if any). +//! @} + +#if BOARD == EVK1100 + #include "EVK1100/evk1100.h" +#elif BOARD == EVK1101 + #include "EVK1101/evk1101.h" +#elif BOARD == UC3C_EK + #include "UC3C_EK/uc3c_ek.h" +#elif BOARD == EVK1104 + #include "EVK1104/evk1104.h" +#elif BOARD == EVK1105 + #include "EVK1105/evk1105.h" +#elif BOARD == STK1000 + #include "STK1000/stk1000.h" +#elif BOARD == NGW100 + #include "NGW100/ngw100.h" +#elif BOARD == STK600_RCUC3L0 + #include "STK600/RCUC3L0/stk600_rcuc3l0.h" +#elif BOARD == UC3L_EK + #include "UC3L_EK/uc3l_ek.h" +#elif BOARD == ARDUINO + #include "ARDUINO/arduino.h" +#else + #error No known AVR32 board defined +#endif + +#if (defined EXT_BOARD) + #if EXT_BOARD == EXT1102 + #include "EXT1102/ext1102.h" + #elif EXT_BOARD == MC300 + #include "MC300/mc300.h" + #elif EXT_BOARD == USER_EXT_BOARD + // User-reserved area: #include the header file of your extension board here + // (if any). + #endif +#endif + + +#ifndef FRCOSC + #define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< Default RCOsc frequency. +#endif + + +#endif // _BOARD_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/board.h.ori b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/board.h.ori new file mode 100644 index 0000000..30052c8 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/BOARDS/board.h.ori @@ -0,0 +1,121 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Standard board header file. + * + * This file includes the appropriate board header file according to the + * defined board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +#include + +/*! \name Base Boards + */ +//! @{ +#define EVK1100 1 //!< AT32UC3A EVK1100 board. +#define EVK1101 2 //!< AT32UC3B EVK1101 board. +#define UC3C_EK 3 //!< AT32UC3C UC3C_EK board. +#define EVK1104 4 //!< AT32UC3A3 EVK1104 board. +#define EVK1105 5 //!< AT32UC3A EVK1105 board. +#define STK1000 6 //!< AT32AP7000 STK1000 board. +#define NGW100 7 //!< AT32AP7000 NGW100 board. +#define STK600_RCUC3L0 8 //!< STK600 RCUC3L0 board. +#define UC3L_EK 9 //!< AT32UC3L-EK board. +#define USER_BOARD 99 //!< User-reserved board (if any). +//! @} + +/*! \name Extension Boards + */ +//! @{ +#define EXT1102 1 //!< AT32UC3B EXT1102 board. +#define MC300 2 //!< AT32UC3 MC300 board. +#define USER_EXT_BOARD 99 //!< User-reserved extension board (if any). +//! @} + +#if BOARD == EVK1100 + #include "EVK1100/evk1100.h" +#elif BOARD == EVK1101 + #include "EVK1101/evk1101.h" +#elif BOARD == UC3C_EK + #include "UC3C_EK/uc3c_ek.h" +#elif BOARD == EVK1104 + #include "EVK1104/evk1104.h" +#elif BOARD == EVK1105 + #include "EVK1105/evk1105.h" +#elif BOARD == STK1000 + #include "STK1000/stk1000.h" +#elif BOARD == NGW100 + #include "NGW100/ngw100.h" +#elif BOARD == STK600_RCUC3L0 + #include "STK600/RCUC3L0/stk600_rcuc3l0.h" +#elif BOARD == UC3L_EK + #include "UC3L_EK/uc3l_ek.h" +#elif BOARD == USER_BOARD + // User-reserved area: #include the header file of your board here (if any). + #include "user_board.h" +#else + #error No known AVR32 board defined +#endif + +#if (defined EXT_BOARD) + #if EXT_BOARD == EXT1102 + #include "EXT1102/ext1102.h" + #elif EXT_BOARD == MC300 + #include "MC300/mc300.h" + #elif EXT_BOARD == USER_EXT_BOARD + // User-reserved area: #include the header file of your extension board here + // (if any). + #endif +#endif + + +#ifndef FRCOSC + #define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< Default RCOsc frequency. +#endif + + +#endif // _BOARD_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.c new file mode 100644 index 0000000..d4b1b73 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.c @@ -0,0 +1,672 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Management of the AT45DBX data flash controller through SPI. + * + * This file manages the accesses to the AT45DBX data flash components. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +//_____ I N C L U D E S ___________________________________________________ + +#include "conf_access.h" + + +#if AT45DBX_MEM == ENABLE + +#include "compiler.h" +#include "board.h" +#include "gpio.h" +#include "spi.h" +#include "conf_at45dbx.h" +#include "at45dbx.h" +#include "printf-stdarg.h" + +#if AT45DBX_MEM_CNT > 4 + #error AT45DBX_MEM_CNT must not exceed 4 +#endif + + +//_____ D E F I N I T I O N S ______________________________________________ + +/*! \name AT45DBX Group A Commands + */ +//! @{ +#define AT45DBX_CMDA_RD_PAGE 0xD2 //!< Main Memory Page Read (Serial/8-bit Mode). +#define AT45DBX_CMDA_RD_ARRAY_LEG 0xE8 //!< Continuous Array Read, Legacy Command (Serial/8-bit Mode). +#define AT45DBX_CMDA_RD_ARRAY_LF_SM 0x03 //!< Continuous Array Read, Low-Frequency Mode (Serial Mode). +#define AT45DBX_CMDA_RD_ARRAY_AF_SM 0x0B //!< Continuous Array Read, Any-Frequency Mode (Serial Mode). +#define AT45DBX_CMDA_RD_SECTOR_PROT_REG 0x32 //!< Read Sector Protection Register (Serial/8-bit Mode). +#define AT45DBX_CMDA_RD_SECTOR_LKDN_REG 0x35 //!< Read Sector Lockdown Register (Serial/8-bit Mode). +#define AT45DBX_CMDA_RD_SECURITY_REG 0x77 //!< Read Security Register (Serial/8-bit Mode). +//! @} + +/*! \name AT45DBX Group B Commands + */ +//! @{ +#define AT45DBX_CMDB_ER_PAGE 0x81 //!< Page Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_ER_BLOCK 0x50 //!< Block Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_ER_SECTOR 0x7C //!< Sector Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_ER_CHIP 0xC794809A //!< Chip Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_XFR_PAGE_TO_BUF1 0x53 //!< Main Memory Page to Buffer 1 Transfer (Serial/8-bit Mode). +#define AT45DBX_CMDB_XFR_PAGE_TO_BUF2 0x55 //!< Main Memory Page to Buffer 2 Transfer (Serial/8-bit Mode). +#define AT45DBX_CMDB_CMP_PAGE_TO_BUF1 0x60 //!< Main Memory Page to Buffer 1 Compare (Serial/8-bit Mode). +#define AT45DBX_CMDB_CMP_PAGE_TO_BUF2 0x61 //!< Main Memory Page to Buffer 2 Compare (Serial/8-bit Mode). +#define AT45DBX_CMDB_PR_BUF1_TO_PAGE_ER 0x83 //!< Buffer 1 to Main Memory Page Program with Built-in Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_PR_BUF2_TO_PAGE_ER 0x86 //!< Buffer 2 to Main Memory Page Program with Built-in Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_PR_BUF1_TO_PAGE 0x88 //!< Buffer 1 to Main Memory Page Program without Built-in Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_PR_BUF2_TO_PAGE 0x89 //!< Buffer 2 to Main Memory Page Program without Built-in Erase (Serial/8-bit Mode). +#define AT45DBX_CMDB_PR_PAGE_TH_BUF1 0x82 //!< Main Memory Page Program through Buffer 1 (Serial/8-bit Mode). +#define AT45DBX_CMDB_PR_PAGE_TH_BUF2 0x85 //!< Main Memory Page Program through Buffer 2 (Serial/8-bit Mode). +#define AT45DBX_CMDB_RWR_PAGE_TH_BUF1 0x58 //!< Auto Page Rewrite through Buffer 1 (Serial/8-bit Mode). +#define AT45DBX_CMDB_RWR_PAGE_TH_BUF2 0x59 //!< Auto Page Rewrite through Buffer 2 (Serial/8-bit Mode). +//! @} + +/*! \name AT45DBX Group C Commands + */ +//! @{ +#define AT45DBX_CMDC_RD_BUF1_LF_SM 0xD1 //!< Buffer 1 Read, Low-Frequency Mode (Serial Mode). +#define AT45DBX_CMDC_RD_BUF2_LF_SM 0xD3 //!< Buffer 2 Read, Low-Frequency Mode (Serial Mode). +#define AT45DBX_CMDC_RD_BUF1_AF_SM 0xD4 //!< Buffer 1 Read, Any-Frequency Mode (Serial Mode). +#define AT45DBX_CMDC_RD_BUF2_AF_SM 0xD6 //!< Buffer 2 Read, Any-Frequency Mode (Serial Mode). +#define AT45DBX_CMDC_RD_BUF1_AF_8M 0x54 //!< Buffer 1 Read, Any-Frequency Mode (8-bit Mode). +#define AT45DBX_CMDC_RD_BUF2_AF_8M 0x56 //!< Buffer 2 Read, Any-Frequency Mode (8-bit Mode). +#define AT45DBX_CMDC_WR_BUF1 0x84 //!< Buffer 1 Write (Serial/8-bit Mode). +#define AT45DBX_CMDC_WR_BUF2 0x87 //!< Buffer 2 Write (Serial/8-bit Mode). +#define AT45DBX_CMDC_RD_STATUS_REG 0xD7 //!< Status Register Read (Serial/8-bit Mode). +#define AT45DBX_CMDC_RD_MNFCT_DEV_ID_SM 0x9F //!< Manufacturer and Device ID Read (Serial Mode). +//! @} + +/*! \name AT45DBX Group D Commands + */ +//! @{ +#define AT45DBX_CMDD_EN_SECTOR_PROT 0x3D2A7FA9 //!< Enable Sector Protection (Serial/8-bit Mode). +#define AT45DBX_CMDD_DIS_SECTOR_PROT 0x3D2A7F9A //!< Disable Sector Protection (Serial/8-bit Mode). +#define AT45DBX_CMDD_ER_SECTOR_PROT_REG 0x3D2A7FCF //!< Erase Sector Protection Register (Serial/8-bit Mode). +#define AT45DBX_CMDD_PR_SECTOR_PROT_REG 0x3D2A7FFC //!< Program Sector Protection Register (Serial/8-bit Mode). +#define AT45DBX_CMDD_LKDN_SECTOR 0x3D2A7F30 //!< Sector Lockdown (Serial/8-bit Mode). +#define AT45DBX_CMDD_PR_SECURITY_REG 0x9B000000 //!< Program Security Register (Serial/8-bit Mode). +#define AT45DBX_CMDD_PR_CONF_REG 0x3D2A80A6 //!< Program Configuration Register (Serial/8-bit Mode). +#define AT45DBX_CMDD_DEEP_PWR_DN 0xB9 //!< Deep Power-down (Serial/8-bit Mode). +#define AT45DBX_CMDD_RSM_DEEP_PWR_DN 0xAB //!< Resume from Deep Power-down (Serial/8-bit Mode). +//! @} + + +/*! \name Bit-Masks and Values for the Status Register + */ +//! @{ +#define AT45DBX_MSK_BUSY 0x80 //!< Busy status bit-mask. +#define AT45DBX_BUSY 0x00 //!< Busy status value (0x00 when busy, 0x80 when ready). +#define AT45DBX_MSK_DENSITY 0x3C //!< Device density bit-mask. +//! @} +#if AT45DBX_MEM_SIZE == AT45DBX_1MB + +/*! \name AT45DB081 Memories + */ +//! @{ +#define AT45DB021D_DENSITY 0x14 //!< Device density value. +#define AT45DBX_DENSITY 0x24 //!< Device density value. +#define AT45DBX_BYTE_ADDR_BITS 9 //!< Address bits for byte position within buffer. + +//! @} +#elif AT45DBX_MEM_SIZE == AT45DBX_2MB +/*! \name AT45DB021D Memories + */ +//! @{ +#define AT45DBX_DENSITY 0x21 //!< Device density value. +#define AT45DBX_BYTE_ADDR_BITS 10 //!< Address bits for byte position within buffer. + +//! @} +#if 0 +/*! \name AT45DB161 Memories + */ +//! @{ +#define AT45DBX_DENSITY 0x2C //!< Device density value. +#define AT45DBX_BYTE_ADDR_BITS 10 //!< Address bits for byte position within buffer. + +//! @} +#endif + +#elif AT45DBX_MEM_SIZE == AT45DBX_4MB + +/*! \name AT45DB321 Memories + */ +//! @{ +#define AT45DBX_DENSITY 0x34 //!< Device density value. +#define AT45DBX_BYTE_ADDR_BITS 10 //!< Address bits for byte position within buffer. + +//! @} + +#elif AT45DBX_MEM_SIZE == AT45DBX_8MB + +/*! \name AT45DB642 Memories + */ +//! @{ +#define AT45DBX_DENSITY 0x3C //!< Device density value. +#define AT45DBX_BYTE_ADDR_BITS 11 //!< Address bits for byte position within buffer. + + +//! @} + +#else + #error AT45DBX_MEM_SIZE is not defined to a supported value +#endif + + + +//! Address bits for page selection. +#define AT45DBX_PAGE_ADDR_BITS (AT45DBX_MEM_SIZE - AT45DBX_PAGE_BITS) + +//! Number of bits for addresses within pages. +#define AT45DBX_PAGE_BITS (AT45DBX_BYTE_ADDR_BITS - 1) + +//! Page size in bytes. +#define AT45DBX_PAGE_SIZE (1 << AT45DBX_PAGE_BITS) + +//! Bit-mask for byte position within buffer in \ref gl_ptr_mem. +#define AT45DBX_MSK_PTR_BYTE ((1 << AT45DBX_PAGE_BITS) - 1) + +//! Bit-mask for page selection in \ref gl_ptr_mem. +#define AT45DBX_MSK_PTR_PAGE (((1 << AT45DBX_PAGE_ADDR_BITS) - 1) << AT45DBX_PAGE_BITS) + +//! Bit-mask for byte position within sector in \ref gl_ptr_mem. +#define AT45DBX_MSK_PTR_SECTOR ((1 << AT45DBX_SECTOR_BITS) - 1) + + +/*! \brief Sends a dummy byte through SPI. + */ +#define spi_write_dummy() spi_write(AT45DBX_SPI, 0xFF) + + +//! Boolean indicating whether memory is in busy state. +static Bool at45dbx_busy; + +//! Memory data pointer. +static U32 gl_ptr_mem; + +//! Sector buffer. +static U8 sector_buf[AT45DBX_SECTOR_SIZE]; + + +/*! \name Control Functions + */ +//! @{ + + +Bool at45dbx_init(spi_options_t spiOptions, unsigned int pba_hz) +{ + // Setup SPI registers according to spiOptions. + for (spiOptions.reg = AT45DBX_SPI_FIRST_NPCS; + spiOptions.reg < AT45DBX_SPI_FIRST_NPCS + AT45DBX_MEM_CNT; + spiOptions.reg++) + { + if (spi_setupChipReg(AT45DBX_SPI, &spiOptions, pba_hz) != SPI_OK) return KO; + } + + // Memory ready. + at45dbx_busy = FALSE; + + return OK; +} + + +/*! \brief Selects or unselects a DF memory. + * + * \param memidx Memory ID of DF to select or unselect. + * \param bSelect Boolean indicating whether the DF memory has to be selected. + */ +static void at45dbx_chipselect_df(U8 memidx, Bool bSelect) +{ + if (bSelect) + { + // Select SPI chip. + spi_selectChip(AT45DBX_SPI, AT45DBX_SPI_FIRST_NPCS + memidx); + } + else + { + // Unselect SPI chip. + spi_unselectChip(AT45DBX_SPI, AT45DBX_SPI_FIRST_NPCS + memidx); + } +} + + +Bool at45dbx_mem_check(void) +{ + U8 df; + U16 status = 0; + + // DF memory check. + for (df = 0; df < AT45DBX_MEM_CNT; df++) + { + // Select the DF memory to check. + at45dbx_chipselect_df(df, TRUE); + + // Send the Status Register Read command. + spi_write(AT45DBX_SPI, AT45DBX_CMDC_RD_STATUS_REG); + + // Send a dummy byte to read the status register. + spi_write_dummy(); + spi_read(AT45DBX_SPI, &status); + + // Unselect the checked DF memory. + at45dbx_chipselect_df(df, FALSE); + + // Unexpected device density value. + if ((status & AT45DBX_MSK_DENSITY) < AT45DB021D_DENSITY) + { + printk("Unexpected device density value: %d (0x%x)\n", (status & AT45DBX_MSK_DENSITY), status); + return KO; + } + } + + return OK; +} + + +/*! \brief Waits until the DF is ready. + */ +static void at45dbx_wait_ready(void) +{ + U16 status; + + // Select the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE); + + // Send the Status Register Read command. + spi_write(AT45DBX_SPI, AT45DBX_CMDC_RD_STATUS_REG); + + // Read the status register until the DF is ready. + do + { + // Send a dummy byte to read the status register. + spi_write_dummy(); + spi_read(AT45DBX_SPI, &status); + } while ((status & AT45DBX_MSK_BUSY) == AT45DBX_BUSY); + + // Unselect the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); +} + + +Bool at45dbx_read_open(U32 sector) +{ + U32 addr; + + // Set the global memory pointer to a byte address. + gl_ptr_mem = sector << AT45DBX_SECTOR_BITS; // gl_ptr_mem = sector * AT45DBX_SECTOR_SIZE. + + // If the DF memory is busy, wait until it's ready. + if (at45dbx_busy) at45dbx_wait_ready(); + at45dbx_busy = FALSE; + + // Select the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE); + + // Initiate a page read at a given sector. + + // Send the Main Memory Page Read command. + spi_write(AT45DBX_SPI, AT45DBX_CMDA_RD_PAGE); + + // Send the three address bytes, which comprise: + // - (24 - (AT45DBX_PAGE_ADDR_BITS + AT45DBX_BYTE_ADDR_BITS)) reserved bits; + // - then AT45DBX_PAGE_ADDR_BITS bits specifying the page in main memory to be read; + // - then AT45DBX_BYTE_ADDR_BITS bits specifying the starting byte address within that page. + // NOTE: The bits of gl_ptr_mem above the AT45DBX_MEM_SIZE bits are useless for the local + // DF addressing. They are used for DF discrimination when there are several DFs. + addr = (Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_PAGE) << AT45DBX_BYTE_ADDR_BITS) | + Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE); + spi_write(AT45DBX_SPI, LSB2W(addr)); + spi_write(AT45DBX_SPI, LSB1W(addr)); + spi_write(AT45DBX_SPI, LSB0W(addr)); + + // Send 32 don't care clock cycles to initialize the read operation. + spi_write_dummy(); + spi_write_dummy(); + spi_write_dummy(); + spi_write_dummy(); + + return OK; +} + + +void at45dbx_read_close(void) +{ + // Unselect the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); + + // Memory ready. + at45dbx_busy = FALSE; +} + + +Bool at45dbx_write_open(U32 sector) +{ + U32 addr; + + // Set the global memory pointer to a byte address. + gl_ptr_mem = sector << AT45DBX_SECTOR_BITS; // gl_ptr_mem = sector * AT45DBX_SECTOR_SIZE. + + // If the DF memory is busy, wait until it's ready. + if (at45dbx_busy) at45dbx_wait_ready(); + at45dbx_busy = FALSE; + +#if AT45DBX_PAGE_SIZE > AT45DBX_SECTOR_SIZE + // Select the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE); + + // Transfer the content of the current page to buffer 1. + + // Send the Main Memory Page to Buffer 1 Transfer command. + spi_write(AT45DBX_SPI, AT45DBX_CMDB_XFR_PAGE_TO_BUF1); + + // Send the three address bytes, which comprise: + // - (24 - (AT45DBX_PAGE_ADDR_BITS + AT45DBX_BYTE_ADDR_BITS)) reserved bits; + // - then AT45DBX_PAGE_ADDR_BITS bits specifying the page in main memory to be read; + // - then AT45DBX_BYTE_ADDR_BITS don't care bits. + // NOTE: The bits of gl_ptr_mem above the AT45DBX_MEM_SIZE bits are useless for the local + // DF addressing. They are used for DF discrimination when there are several DFs. + addr = Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_PAGE) << AT45DBX_BYTE_ADDR_BITS; + spi_write(AT45DBX_SPI, LSB2W(addr)); + spi_write(AT45DBX_SPI, LSB1W(addr)); + spi_write(AT45DBX_SPI, LSB0W(addr)); + + // Unselect the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); + + // Wait for end of page transfer. + at45dbx_wait_ready(); +#endif + + // Select the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE); + + // Initiate a page write at a given sector. + + // Send the Main Memory Page Program through Buffer 1 command. + spi_write(AT45DBX_SPI, AT45DBX_CMDB_PR_PAGE_TH_BUF1); + + // Send the three address bytes, which comprise: + // - (24 - (AT45DBX_PAGE_ADDR_BITS + AT45DBX_BYTE_ADDR_BITS)) reserved bits; + // - then AT45DBX_PAGE_ADDR_BITS bits specifying the page in main memory to be written; + // - then AT45DBX_BYTE_ADDR_BITS bits specifying the starting byte address within that page. + // NOTE: The bits of gl_ptr_mem above the AT45DBX_MEM_SIZE bits are useless for the local + // DF addressing. They are used for DF discrimination when there are several DFs. + addr = (Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_PAGE) << AT45DBX_BYTE_ADDR_BITS) | + Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE); + spi_write(AT45DBX_SPI, LSB2W(addr)); + spi_write(AT45DBX_SPI, LSB1W(addr)); + spi_write(AT45DBX_SPI, LSB0W(addr)); + + return OK; +} + + +void at45dbx_write_close(void) +{ + // While end of logical sector not reached, zero-fill remaining memory bytes. + while (Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_SECTOR)) + { + spi_write(AT45DBX_SPI, 0x00); + gl_ptr_mem++; + } + + // Unselect the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); + + // Memory busy. + at45dbx_busy = TRUE; +} + + +//! @} + + +/*! \name Single-Byte Access Functions + */ +//! @{ + + +U8 at45dbx_read_byte(void) +{ + U16 data; + + // Memory busy. + if (at45dbx_busy) + { + // Being here, we know that we previously finished a page read. + // => We have to access the next page. + + // Memory ready. + at45dbx_busy = FALSE; + + // Eventually select the next DF and open the next page. + // NOTE: at45dbx_read_open input parameter is a sector. + at45dbx_read_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE. + } + + // Send a dummy byte to read the next data byte. + spi_write_dummy(); + spi_read(AT45DBX_SPI, &data); + gl_ptr_mem++; + + // If end of page reached, + if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE)) + { + // unselect the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); + + // Memory busy. + at45dbx_busy = TRUE; + } + + return data; +} + + +Bool at45dbx_write_byte(U8 b) +{ + // Memory busy. + if (at45dbx_busy) + { + // Being here, we know that we previously launched a page programming. + // => We have to access the next page. + + // Eventually select the next DF and open the next page. + // NOTE: at45dbx_write_open input parameter is a sector. + at45dbx_write_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE. + } + + // Write the next data byte. + spi_write(AT45DBX_SPI, b); + gl_ptr_mem++; + + // If end of page reached, + if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE)) + { + // unselect the DF memory gl_ptr_mem points to in order to program the page. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); + + // Memory busy. + at45dbx_busy = TRUE; + } + + return OK; +} + + +//! @} + + +/*! \name Multiple-Sector Access Functions + */ +//! @{ + + +Bool at45dbx_read_multiple_sector(U16 nb_sector) +{ + while (nb_sector--) + { + // Read the next sector. + at45dbx_read_sector_2_ram(sector_buf); + at45dbx_read_multiple_sector_callback(sector_buf); + } + + return OK; +} + + +Bool at45dbx_write_multiple_sector(U16 nb_sector) +{ + while (nb_sector--) + { + // Write the next sector. + at45dbx_write_multiple_sector_callback(sector_buf); + at45dbx_write_sector_from_ram(sector_buf); + } + + return OK; +} + + +//! @} + + +/*! \name Single-Sector Access Functions + */ +//! @{ + + +Bool at45dbx_read_sector_2_ram(void *ram) +{ + U8 *_ram = ram; + U16 i; + U16 data; + + // Memory busy. + if (at45dbx_busy) + { + // Being here, we know that we previously finished a page read. + // => We have to access the next page. + + // Memory ready. + at45dbx_busy = FALSE; + + // Eventually select the next DF and open the next page. + // NOTE: at45dbx_read_open input parameter is a sector. + at45dbx_read_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE. + } + + // Read the next sector. + for (i = AT45DBX_SECTOR_SIZE; i; i--) + { + // Send a dummy byte to read the next data byte. + spi_write_dummy(); + spi_read(AT45DBX_SPI, &data); + *_ram++ = data; + } + + // Update the memory pointer. + gl_ptr_mem += AT45DBX_SECTOR_SIZE; + +#if AT45DBX_PAGE_SIZE > AT45DBX_SECTOR_SIZE + // If end of page reached, + if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE)) +#endif + { + // unselect the DF memory gl_ptr_mem points to. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); + + // Memory busy. + at45dbx_busy = TRUE; + } + + return OK; +} + + +Bool at45dbx_write_sector_from_ram(const void *ram) +{ + const U8 *_ram = ram; + U16 i; + + // Memory busy. + if (at45dbx_busy) + { + // Being here, we know that we previously launched a page programming. + // => We have to access the next page. + + // Eventually select the next DF and open the next page. + // NOTE: at45dbx_write_open input parameter is a sector. + at45dbx_write_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE. + } + + // Write the next sector. + for (i = AT45DBX_SECTOR_SIZE; i; i--) + { + // Write the next data byte. + spi_write(AT45DBX_SPI, *_ram++); + } + + // Update the memory pointer. + gl_ptr_mem += AT45DBX_SECTOR_SIZE; + +#if AT45DBX_PAGE_SIZE > AT45DBX_SECTOR_SIZE + // If end of page reached, + if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE)) +#endif + { + // unselect the DF memory gl_ptr_mem points to in order to program the page. + at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE); + + // Memory busy. + at45dbx_busy = TRUE; + } + + return OK; +} + + +//! @} + + +#endif // AT45DBX_MEM == ENABLE diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.h new file mode 100644 index 0000000..5816b61 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.h @@ -0,0 +1,269 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Management of the AT45DBX data flash controller through SPI. + * + * This file manages the accesses to the AT45DBX data flash components. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _AT45DBX_H_ +#define _AT45DBX_H_ + + +#include "conf_access.h" + +#if AT45DBX_MEM == DISABLE + #error at45dbx.h is #included although AT45DBX_MEM is disabled +#endif + + +#include "spi.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +/*! \name Available AT45DBX Sizes + * + * Number of address bits of available AT45DBX data flash memories. + * + * \note Only memories with page sizes of at least 512 bytes (sector size) are + * supported. + */ +//! @{ +#define AT45DBX_1MB 20 +#define AT45DBX_2MB 21 +#define AT45DBX_4MB 22 +#define AT45DBX_8MB 23 +//! @} + +// AT45DBX_1MB +#define AT45DBX_SECTOR_BITS 8 //! Number of bits for addresses within sectors. +// AT45DBX_2MB AT45DBX_4MB AT45DBX_8MB +//#define AT45DBX_SECTOR_BITS 9 //! Number of bits for addresses within sectors. + +//! Sector size in bytes. +#define AT45DBX_SECTOR_SIZE (1 << AT45DBX_SECTOR_BITS) + +//_____ D E C L A R A T I O N S ____________________________________________ + +/*! \name Control Functions + */ +//! @{ + +/*! \brief Initializes the data flash controller and the SPI channel by which + * the DF is controlled. + * + * \param spiOptions Initialization options of the DF SPI channel. + * \param pba_hz SPI module input clock frequency (PBA clock, Hz). + * + * \retval OK Success. + * \retval KO Failure. + */ +extern Bool at45dbx_init(spi_options_t spiOptions, unsigned int pba_hz); + +/*! \brief Performs a memory check on all DFs. + * + * \retval OK Success. + * \retval KO Failure. + */ +extern Bool at45dbx_mem_check(void); + +/*! \brief Opens a DF memory in read mode at a given sector. + * + * \param sector Start sector. + * + * \retval OK Success. + * \retval KO Failure. + * + * \note Sector may be page-unaligned (depending on the DF page size). + */ +extern Bool at45dbx_read_open(U32 sector); + +/*! \brief Unselects the current DF memory. + */ +extern void at45dbx_read_close(void); + +/*! \brief This function opens a DF memory in write mode at a given sector. + * + * \param sector Start sector. + * + * \retval OK Success. + * \retval KO Failure. + * + * \note Sector may be page-unaligned (depending on the DF page size). + * + * \note If \ref AT45DBX_PAGE_SIZE > \ref AT45DBX_SECTOR_SIZE, page content is + * first loaded in buffer to then be partially updated by write byte or + * write sector functions. + */ +extern Bool at45dbx_write_open(U32 sector); + +/*! \brief Fills the end of the current logical sector and launches page programming. + */ +extern void at45dbx_write_close(void); + +//! @} + + +/*! \name Single-Byte Access Functions + */ +//! @{ + +/*! \brief Performs a single byte read from DF memory. + * + * \return The read byte. + * + * \note First call must be preceded by a call to the \ref at45dbx_read_open + * function. + */ +extern U8 at45dbx_read_byte(void); + +/*! \brief Performs a single byte write to DF memory. + * + * \param b The byte to write. + * + * \retval OK Success. + * \retval KO Failure. + * + * \note First call must be preceded by a call to the \ref at45dbx_write_open + * function. + */ +extern Bool at45dbx_write_byte(U8 b); + +//! @} + + +/*! \name Multiple-Sector Access Functions + */ +//! @{ + +/*! \brief Reads \a nb_sector sectors from DF memory. + * + * Data flow is: DF -> callback. + * + * \param nb_sector Number of contiguous sectors to read. + * + * \retval OK Success. + * \retval KO Failure. + * + * \note First call must be preceded by a call to the \ref at45dbx_read_open + * function. + * + * \note As \ref AT45DBX_PAGE_SIZE is always a multiple of + * \ref AT45DBX_SECTOR_SIZE, there is no need to check page end for each + * byte. + */ +extern Bool at45dbx_read_multiple_sector(U16 nb_sector); + +/*! \brief Callback function invoked after each sector read during + * \ref at45dbx_read_multiple_sector. + * + * \param psector Pointer to read sector. + */ +extern void at45dbx_read_multiple_sector_callback(const void *psector); + +/*! \brief Writes \a nb_sector sectors to DF memory. + * + * Data flow is: callback -> DF. + * + * \param nb_sector Number of contiguous sectors to write. + * + * \retval OK Success. + * \retval KO Failure. + * + * \note First call must be preceded by a call to the \ref at45dbx_write_open + * function. + * + * \note As \ref AT45DBX_PAGE_SIZE is always a multiple of + * \ref AT45DBX_SECTOR_SIZE, there is no need to check page end for each + * byte. + */ +extern Bool at45dbx_write_multiple_sector(U16 nb_sector); + +/*! \brief Callback function invoked before each sector write during + * \ref at45dbx_write_multiple_sector. + * + * \param psector Pointer to sector to write. + */ +extern void at45dbx_write_multiple_sector_callback(void *psector); + +//! @} + + +/*! \name Single-Sector Access Functions + */ +//! @{ + +/*! \brief Reads 1 DF sector to a RAM buffer. + * + * Data flow is: DF -> RAM. + * + * \param ram Pointer to RAM buffer. + * + * \retval OK Success. + * \retval KO Failure. + * + * \note First call must be preceded by a call to the \ref at45dbx_read_open + * function. + */ +extern Bool at45dbx_read_sector_2_ram(void *ram); + +/*! \brief Writes 1 DF sector from a RAM buffer. + * + * Data flow is: RAM -> DF. + * + * \param ram Pointer to RAM buffer. + * + * \retval OK Success. + * \retval KO Failure. + * + * \note First call must be preceded by a call to the \ref at45dbx_write_open + * function. + */ +extern Bool at45dbx_write_sector_from_ram(const void *ram); + +//! @} + + +#endif // _AT45DBX_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.c new file mode 100644 index 0000000..4c0ace2 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.c @@ -0,0 +1,234 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief CTRL_ACCESS interface for the AT45DBX data flash controller. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +//_____ I N C L U D E S ___________________________________________________ + +#include "conf_access.h" + + +#if AT45DBX_MEM == ENABLE + +#include "conf_at45dbx.h" +#include "at45dbx.h" +#include "at45dbx_mem.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +//! Whether to detect write accesses to the memory. +#define AT45DBX_MEM_TEST_CHANGE_STATE ENABLED + + +#if (ACCESS_USB == ENABLED || ACCESS_MEM_TO_RAM == ENABLED) && AT45DBX_MEM_TEST_CHANGE_STATE == ENABLED + +//! Memory data modified flag. +static volatile Bool s_b_data_modify = FALSE; + +#endif + + +/*! \name Control Interface + */ +//! @{ + + +Ctrl_status at45dbx_test_unit_ready(void) +{ + return (at45dbx_mem_check() == OK) ? CTRL_GOOD : CTRL_NO_PRESENT; +} + + +Ctrl_status at45dbx_read_capacity(U32 *u32_nb_sector) +{ + *u32_nb_sector = (AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) - 1; + + return CTRL_GOOD; +} + + +Bool at45dbx_wr_protect(void) +{ + return FALSE; +} + + +Bool at45dbx_removal(void) +{ + return FALSE; +} + + +//! @} + + +#if ACCESS_USB == ENABLED + +#include "usb_drv.h" +#include "scsi_decoder.h" + + +/*! \name MEM <-> USB Interface + */ +//! @{ + + +Ctrl_status at45dbx_usb_read_10(U32 addr, U16 nb_sector) +{ + if (addr + nb_sector > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL; + + at45dbx_read_open(addr); + at45dbx_read_multiple_sector(nb_sector); + at45dbx_read_close(); + + return CTRL_GOOD; +} + + +void at45dbx_read_multiple_sector_callback(const void *psector) +{ + U16 data_to_transfer = AT45DBX_SECTOR_SIZE; + + // Transfer read sector to the USB interface. + while (data_to_transfer) + { + while (!Is_usb_in_ready(g_scsi_ep_ms_in)) + { + if(!Is_usb_endpoint_enabled(g_scsi_ep_ms_in)) + return; // USB Reset + } + + Usb_reset_endpoint_fifo_access(g_scsi_ep_ms_in); + data_to_transfer = usb_write_ep_txpacket(g_scsi_ep_ms_in, psector, + data_to_transfer, &psector); + Usb_ack_in_ready_send(g_scsi_ep_ms_in); + } +} + + +Ctrl_status at45dbx_usb_write_10(U32 addr, U16 nb_sector) +{ + if (addr + nb_sector > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL; + +#if AT45DBX_MEM_TEST_CHANGE_STATE == ENABLED + if (nb_sector) s_b_data_modify = TRUE; +#endif + + at45dbx_write_open(addr); + at45dbx_write_multiple_sector(nb_sector); + at45dbx_write_close(); + + return CTRL_GOOD; +} + + +void at45dbx_write_multiple_sector_callback(void *psector) +{ + U16 data_to_transfer = AT45DBX_SECTOR_SIZE; + + // Transfer sector to write from the USB interface. + while (data_to_transfer) + { + while (!Is_usb_out_received(g_scsi_ep_ms_out)) + { + if(!Is_usb_endpoint_enabled(g_scsi_ep_ms_out)) + return; // USB Reset + } + + Usb_reset_endpoint_fifo_access(g_scsi_ep_ms_out); + data_to_transfer = usb_read_ep_rxpacket(g_scsi_ep_ms_out, psector, + data_to_transfer, &psector); + Usb_ack_out_received_free(g_scsi_ep_ms_out); + } +} + + +//! @} + +#endif // ACCESS_USB == ENABLED + + +#if ACCESS_MEM_TO_RAM == ENABLED + +/*! \name MEM <-> RAM Interface + */ +//! @{ + + +Ctrl_status at45dbx_df_2_ram(U32 addr, void *ram) +{ + if (addr + 1 > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL; + + at45dbx_read_open(addr); + at45dbx_read_sector_2_ram(ram); + at45dbx_read_close(); + + return CTRL_GOOD; +} + + +Ctrl_status at45dbx_ram_2_df(U32 addr, const void *ram) +{ + if (addr + 1 > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL; + +#if AT45DBX_MEM_TEST_CHANGE_STATE == ENABLED + s_b_data_modify = TRUE; +#endif + + at45dbx_write_open(addr); + at45dbx_write_sector_from_ram(ram); + at45dbx_write_close(); + + return CTRL_GOOD; +} + + +//! @} + +#endif // ACCESS_MEM_TO_RAM == ENABLED + + +#endif // AT45DBX_MEM == ENABLE diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.h new file mode 100644 index 0000000..de24fa3 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx_mem.h @@ -0,0 +1,164 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief CTRL_ACCESS interface for the AT45DBX data flash controller. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _AT45DBX_MEM_H_ +#define _AT45DBX_MEM_H_ + + +#include "conf_access.h" + +#if AT45DBX_MEM == DISABLE + #error at45dbx_mem.h is #included although AT45DBX_MEM is disabled +#endif + + +#include "ctrl_access.h" + + +//_____ D E C L A R A T I O N S ____________________________________________ + +/*! \name Control Interface + */ +//! @{ + +/*! \brief Tests the memory state and initializes the memory if required. + * + * The TEST UNIT READY SCSI primary command allows an application client to poll + * a LUN until it is ready without having to allocate memory for returned data. + * + * This command may be used to check the media status of LUNs with removable + * media. + * + * \return Status. + */ +extern Ctrl_status at45dbx_test_unit_ready(void); + +/*! \brief Returns the address of the last valid sector in the memory. + * + * \param u32_nb_sector Pointer to the address of the last valid sector. + * + * \return Status. + */ +extern Ctrl_status at45dbx_read_capacity(U32 *u32_nb_sector); + +/*! \brief Returns the write-protection state of the memory. + * + * \return \c TRUE if the memory is write-protected, else \c FALSE. + * + * \note Only used by removable memories with hardware-specific write + * protection. + */ +extern Bool at45dbx_wr_protect(void); + +/*! \brief Tells whether the memory is removable. + * + * \return \c TRUE if the memory is removable, else \c FALSE. + */ +extern Bool at45dbx_removal(void); + +//! @} + + +#if ACCESS_USB == ENABLED + +/*! \name MEM <-> USB Interface + */ +//! @{ + +/*! \brief Tranfers data from the memory to USB. + * + * \param addr Address of first memory sector to read. + * \param nb_sector Number of sectors to transfer. + * + * \return Status. + */ +extern Ctrl_status at45dbx_usb_read_10(U32 addr, U16 nb_sector); + +/*! \brief Tranfers data from USB to the memory. + * + * \param addr Address of first memory sector to write. + * \param nb_sector Number of sectors to transfer. + * + * \return Status. + */ +extern Ctrl_status at45dbx_usb_write_10(U32 addr, U16 nb_sector); + +//! @} + +#endif + + +#if ACCESS_MEM_TO_RAM == ENABLED + +/*! \name MEM <-> RAM Interface + */ +//! @{ + +/*! \brief Copies 1 data sector from the memory to RAM. + * + * \param addr Address of first memory sector to read. + * \param ram Pointer to RAM buffer to write. + * + * \return Status. + */ +extern Ctrl_status at45dbx_df_2_ram(U32 addr, void *ram); + +/*! \brief Copies 1 data sector from RAM to the memory. + * + * \param addr Address of first memory sector to write. + * \param ram Pointer to RAM buffer to read. + * + * \return Status. + */ +extern Ctrl_status at45dbx_ram_2_df(U32 addr, const void *ram); + +//! @} + +#endif + + +#endif // _AT45DBX_MEM_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.c new file mode 100644 index 0000000..2eee15c --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.c @@ -0,0 +1,1117 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FLASHC driver for AVR32 UC3. + * + * AVR32 Flash Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a FLASHC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include +#include "compiler.h" +#include "flashc.h" + + +/*! \name FLASHC Writable Bit-Field Registers + */ +//! @{ + +typedef union +{ + unsigned long fcr; + avr32_flashc_fcr_t FCR; +} u_avr32_flashc_fcr_t; + +typedef union +{ + unsigned long fcmd; + avr32_flashc_fcmd_t FCMD; +} u_avr32_flashc_fcmd_t; + +//! @} + + +/*! \name Flash Properties + */ +//! @{ + + +unsigned int flashc_get_flash_size(void) +{ +#if (defined AVR32_FLASHC_300_H_INCLUDED) + static const unsigned int FLASH_SIZE[1 << AVR32_FLASHC_PR_FSZ_SIZE] = + { + 32 << 10, + 64 << 10, + 128 << 10, + 256 << 10, + 384 << 10, + 512 << 10, + 768 << 10, + 1024 << 10 + }; + return FLASH_SIZE[(AVR32_FLASHC.pr & AVR32_FLASHC_PR_FSZ_MASK) >> AVR32_FLASHC_PR_FSZ_OFFSET]; +#else + static const unsigned int FLASH_SIZE[1 << AVR32_FLASHC_FSR_FSZ_SIZE] = + { + 32 << 10, + 64 << 10, + 128 << 10, + 256 << 10, + 384 << 10, + 512 << 10, + 768 << 10, + 1024 << 10 + }; + return FLASH_SIZE[(AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FSZ_MASK) >> AVR32_FLASHC_FSR_FSZ_OFFSET]; +#endif +} + + +unsigned int flashc_get_page_count(void) +{ + return flashc_get_flash_size() / AVR32_FLASHC_PAGE_SIZE; +} + + +unsigned int flashc_get_page_count_per_region(void) +{ + return flashc_get_page_count() / AVR32_FLASHC_REGIONS; +} + + +unsigned int flashc_get_page_region(int page_number) +{ + return ((page_number >= 0) ? page_number : flashc_get_page_number()) / flashc_get_page_count_per_region(); +} + + +unsigned int flashc_get_region_first_page_number(unsigned int region) +{ + return region * flashc_get_page_count_per_region(); +} + + +//! @} + + +/*! \name FLASHC Control + */ +//! @{ + + +unsigned int flashc_get_wait_state(void) +{ + return (AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FWS_MASK) >> AVR32_FLASHC_FCR_FWS_OFFSET; +} + + +void flashc_set_wait_state(unsigned int wait_state) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.fws = wait_state; + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +Bool flashc_is_ready_int_enabled(void) +{ + return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FRDY_MASK) != 0); +} + + +void flashc_enable_ready_int(Bool enable) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.frdy = (enable != FALSE); + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +Bool flashc_is_lock_error_int_enabled(void) +{ + return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_LOCKE_MASK) != 0); +} + + +void flashc_enable_lock_error_int(Bool enable) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.locke = (enable != FALSE); + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +Bool flashc_is_prog_error_int_enabled(void) +{ + return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_PROGE_MASK) != 0); +} + + +void flashc_enable_prog_error_int(Bool enable) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.proge = (enable != FALSE); + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +//! @} + + +/*! \name FLASHC Status + */ +//! @{ + + +Bool flashc_is_ready(void) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FRDY_MASK) != 0); +} + + +void flashc_default_wait_until_ready(void) +{ + while (!flashc_is_ready()); +} + + +void (*volatile flashc_wait_until_ready)(void) = flashc_default_wait_until_ready; + + +/*! \brief Gets the error status of the FLASHC. + * + * \return The error status of the FLASHC built up from + * \c AVR32_FLASHC_FSR_LOCKE_MASK and \c AVR32_FLASHC_FSR_PROGE_MASK. + * + * \warning This hardware error status is cleared by all functions reading the + * Flash Status Register (FSR). This function is therefore not part of + * the driver's API which instead presents \ref flashc_is_lock_error + * and \ref flashc_is_programming_error. + */ +static unsigned int flashc_get_error_status(void) +{ + return AVR32_FLASHC.fsr & (AVR32_FLASHC_FSR_LOCKE_MASK | + AVR32_FLASHC_FSR_PROGE_MASK); +} + + +//! Sticky error status of the FLASHC. +//! This variable is updated by functions that issue FLASHC commands. It +//! contains the cumulated FLASHC error status of all the FLASHC commands issued +//! by a function. +static unsigned int flashc_error_status = 0; + + +Bool flashc_is_lock_error(void) +{ + return ((flashc_error_status & AVR32_FLASHC_FSR_LOCKE_MASK) != 0); +} + + +Bool flashc_is_programming_error(void) +{ + return ((flashc_error_status & AVR32_FLASHC_FSR_PROGE_MASK) != 0); +} + + +//! @} + + +/*! \name FLASHC Command Control + */ +//! @{ + + +unsigned int flashc_get_command(void) +{ + return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_CMD_MASK) >> AVR32_FLASHC_FCMD_CMD_OFFSET; +} + + +unsigned int flashc_get_page_number(void) +{ + return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_PAGEN_MASK) >> AVR32_FLASHC_FCMD_PAGEN_OFFSET; +} + + +void flashc_issue_command(unsigned int command, int page_number) +{ + u_avr32_flashc_fcmd_t u_avr32_flashc_fcmd; + flashc_wait_until_ready(); + u_avr32_flashc_fcmd.fcmd = AVR32_FLASHC.fcmd; + u_avr32_flashc_fcmd.FCMD.cmd = command; + if (page_number >= 0) u_avr32_flashc_fcmd.FCMD.pagen = page_number; + u_avr32_flashc_fcmd.FCMD.key = AVR32_FLASHC_FCMD_KEY_KEY; + AVR32_FLASHC.fcmd = u_avr32_flashc_fcmd.fcmd; + flashc_error_status = flashc_get_error_status(); + flashc_wait_until_ready(); +} + + +//! @} + + +/*! \name FLASHC Global Commands + */ +//! @{ + + +void flashc_no_operation(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_NOP, -1); +} + + +void flashc_erase_all(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EA, -1); +} + + +//! @} + + +/*! \name FLASHC Protection Mechanisms + */ +//! @{ + + +Bool flashc_is_security_bit_active(void) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_SECURITY_MASK) != 0); +} + + +void flashc_activate_security_bit(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_SSB, -1); +} + + +unsigned int flashc_get_bootloader_protected_size(void) +{ + unsigned int bootprot = (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 - + flashc_read_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET, + AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE); + return (bootprot) ? AVR32_FLASHC_PAGE_SIZE << bootprot : 0; +} + + +unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size) +{ + flashc_set_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET, + AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE, + (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 - + ((bootprot_size) ? + 32 - clz((((min(max(bootprot_size, AVR32_FLASHC_PAGE_SIZE << 1), + AVR32_FLASHC_PAGE_SIZE << + ((1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1)) + + AVR32_FLASHC_PAGE_SIZE - 1) / + AVR32_FLASHC_PAGE_SIZE) << 1) - 1) - 1 : + 0)); + return flashc_get_bootloader_protected_size(); +} + + +Bool flashc_is_external_privileged_fetch_locked(void) +{ + return (!flashc_read_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET)); +} + + +void flashc_lock_external_privileged_fetch(Bool lock) +{ + flashc_set_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET, !lock); +} + + +Bool flashc_is_page_region_locked(int page_number) +{ + return flashc_is_region_locked(flashc_get_page_region(page_number)); +} + + +Bool flashc_is_region_locked(unsigned int region) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_LOCK0_MASK << (region & (AVR32_FLASHC_REGIONS - 1))) != 0); +} + + +void flashc_lock_page_region(int page_number, Bool lock) +{ + flashc_issue_command((lock) ? AVR32_FLASHC_FCMD_CMD_LP : AVR32_FLASHC_FCMD_CMD_UP, page_number); +} + + +void flashc_lock_region(unsigned int region, Bool lock) +{ + flashc_lock_page_region(flashc_get_region_first_page_number(region), lock); +} + + +void flashc_lock_all_regions(Bool lock) +{ + unsigned int error_status = 0; + unsigned int region = AVR32_FLASHC_REGIONS; + while (region) + { + flashc_lock_region(--region, lock); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +//! @} + + +/*! \name Access to General-Purpose Fuses + */ +//! @{ + + +Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit) +{ + return ((flashc_read_all_gp_fuses() & 1ULL << (gp_fuse_bit & 0x3F)) != 0); +} + + +U64 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width) +{ + return flashc_read_all_gp_fuses() >> (pos & 0x3F) & ((1ULL << min(width, 64)) - 1); +} + + +U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte) +{ + return flashc_read_all_gp_fuses() >> ((gp_fuse_byte & 0x07) << 3); +} + + +U64 flashc_read_all_gp_fuses(void) +{ + return AVR32_FLASHC.fgpfrlo | (U64)AVR32_FLASHC.fgpfrhi << 32; +} + + +Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EGPB, gp_fuse_bit & 0x3F); + return (check) ? flashc_read_gp_fuse_bit(gp_fuse_bit) : TRUE; +} + + +Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_bit; + pos &= 0x3F; + width = min(width, 64); + for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++) + { + flashc_erase_gp_fuse_bit(gp_fuse_bit, FALSE); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; + return (check) ? (flashc_read_gp_fuse_bitfield(pos, width) == (1ULL << width) - 1) : TRUE; +} + + +Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check) +{ + unsigned int error_status; + unsigned int current_gp_fuse_byte; + U64 value = flashc_read_all_gp_fuses(); + flashc_erase_all_gp_fuses(FALSE); + error_status = flashc_error_status; + for (current_gp_fuse_byte = 0; current_gp_fuse_byte < 8; current_gp_fuse_byte++, value >>= 8) + { + if (current_gp_fuse_byte != gp_fuse_byte) + { + flashc_write_gp_fuse_byte(current_gp_fuse_byte, value); + error_status |= flashc_error_status; + } + } + flashc_error_status = error_status; + return (check) ? (flashc_read_gp_fuse_byte(gp_fuse_byte) == 0xFF) : TRUE; +} + + +Bool flashc_erase_all_gp_fuses(Bool check) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EAGPF, -1); + return (check) ? (flashc_read_all_gp_fuses() == 0xFFFFFFFFFFFFFFFFULL) : TRUE; +} + + +void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value) +{ + if (!value) + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WGPB, gp_fuse_bit & 0x3F); +} + + +void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_bit; + pos &= 0x3F; + width = min(width, 64); + for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1) + { + flashc_write_gp_fuse_bit(gp_fuse_bit, value & 0x01); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_PGPFB, (gp_fuse_byte & 0x07) | value << 3); +} + + +void flashc_write_all_gp_fuses(U64 value) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_byte; + for (gp_fuse_byte = 0; gp_fuse_byte < 8; gp_fuse_byte++, value >>= 8) + { + flashc_write_gp_fuse_byte(gp_fuse_byte, value); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value) +{ + if (value) + flashc_erase_gp_fuse_bit(gp_fuse_bit, FALSE); + else + flashc_write_gp_fuse_bit(gp_fuse_bit, FALSE); +} + + +void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_bit; + pos &= 0x3F; + width = min(width, 64); + for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1) + { + flashc_set_gp_fuse_bit(gp_fuse_bit, value & 0x01); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value) +{ + unsigned int error_status; + switch (value) + { + case 0xFF: + flashc_erase_gp_fuse_byte(gp_fuse_byte, FALSE); + break; + case 0x00: + flashc_write_gp_fuse_byte(gp_fuse_byte, 0x00); + break; + default: + flashc_erase_gp_fuse_byte(gp_fuse_byte, FALSE); + error_status = flashc_error_status; + flashc_write_gp_fuse_byte(gp_fuse_byte, value); + flashc_error_status |= error_status; + } +} + + +void flashc_set_all_gp_fuses(U64 value) +{ + unsigned int error_status; + switch (value) + { + case 0xFFFFFFFFFFFFFFFFULL: + flashc_erase_all_gp_fuses(FALSE); + break; + case 0x0000000000000000ULL: + flashc_write_all_gp_fuses(0x0000000000000000ULL); + break; + default: + flashc_erase_all_gp_fuses(FALSE); + error_status = flashc_error_status; + flashc_write_all_gp_fuses(value); + flashc_error_status |= error_status; + } +} + + +//! @} + + +/*! \name Access to Flash Pages + */ +//! @{ + + +void flashc_clear_page_buffer(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_CPB, -1); +} + + +Bool flashc_is_page_erased(void) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_QPRR_MASK) != 0); +} + + +Bool flashc_quick_page_read(int page_number) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPR, page_number); + return flashc_is_page_erased(); +} + + +Bool flashc_erase_page(int page_number, Bool check) +{ + Bool page_erased = TRUE; + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EP, page_number); + if (check) + { + unsigned int error_status = flashc_error_status; + page_erased = flashc_quick_page_read(-1); + flashc_error_status |= error_status; + } + return page_erased; +} + + +Bool flashc_erase_all_pages(Bool check) +{ + Bool all_pages_erased = TRUE; + unsigned int error_status = 0; + unsigned int page_number = flashc_get_page_count(); + while (page_number) + { + all_pages_erased &= flashc_erase_page(--page_number, check); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; + return all_pages_erased; +} + + +void flashc_write_page(int page_number) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WP, page_number); +} + + +Bool flashc_quick_user_page_read(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPRUP, -1); + return flashc_is_page_erased(); +} + + +Bool flashc_erase_user_page(Bool check) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EUP, -1); + return (check) ? flashc_quick_user_page_read() : TRUE; +} + + +void flashc_write_user_page(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WUP, -1); +} + + +volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase) +{ + return flashc_memset16(dst, src | (U16)src << 8, nbytes, erase); +} + + +volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase) +{ + return flashc_memset32(dst, src | (U32)src << 16, nbytes, erase); +} + + +volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase) +{ + return flashc_memset64(dst, src | (U64)src << 32, nbytes, erase); +} + + +volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase) +{ + // Use aggregated pointers to have several alignments available for a same address. + UnionCVPtr flash_array_end; + UnionVPtr dest; + Union64 source = {0}; + StructCVPtr dest_end; + UnionCVPtr flash_page_source_end; + Bool incomplete_flash_page_end; + Union64 flash_dword; + UnionVPtr tmp; + unsigned int error_status = 0; + unsigned int i; + + // Reformat arguments. + flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size(); + dest.u8ptr = dst; + for (i = (Get_align((U32)dest.u8ptr, sizeof(U64)) - 1) & (sizeof(U64) - 1); + src; i = (i - 1) & (sizeof(U64) - 1)) + { + source.u8[i] = src; + src >>= 8; + } + dest_end.u8ptr = dest.u8ptr + nbytes; + + // If destination is outside flash, go to next flash page if any. + if (dest.u8ptr < AVR32_FLASH) + { + dest.u8ptr = AVR32_FLASH; + } + else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE) + { + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + + // If end of destination is outside flash, move it to the end of the previous flash page if any. + if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE) + { + dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE; + } + else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr) + { + dest_end.u8ptr = flash_array_end.u8ptr; + } + + // Align each end of destination pointer with its natural boundary. + dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16)); + dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32)); + dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64)); + + // While end of destination is not reached... + while (dest.u8ptr < dest_end.u8ptr) + { + // Clear the page buffer in order to prepare data for a flash page write. + flashc_clear_page_buffer(); + error_status |= flashc_error_status; + + // Determine where the source data will end in the current flash page. + flash_page_source_end.u64ptr = + (U64 *)min((U32)dest_end.u64ptr, + Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE); + + // Determine if the current destination page has an incomplete end. + incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >= + Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE)); + + // Use a flash double-word buffer to manage unaligned accesses. + flash_dword.u64 = source.u64; + + // If destination does not point to the beginning of the current flash page... + if (!Test_align((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE)) + { + // Fill the beginning of the page buffer with the current flash page data. + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE); + tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + + // If destination is not 64-bit aligned... + if (!Test_align((U32)dest.u8ptr, sizeof(U64))) + { + // Fill the beginning of the flash double-word buffer with the current + // flash page data. + // This is required by the hardware, even if page erase is not + // requested, in order to be able to write successfully to erased parts + // of flash pages that have already been written to. + for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Align the destination pointer with its 64-bit boundary. + dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + + // If the current destination double-word is not the last one... + if (dest.u64ptr < dest_end.u64ptr) + { + // Write the flash double-word buffer to the page buffer and reinitialize it. + *dest.u64ptr++ = flash_dword.u64; + flash_dword.u64 = source.u64; + } + } + } + + // Write the source data to the page buffer with 64-bit alignment. + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + *dest.u64ptr++ = source.u64; + + // If the current destination page has an incomplete end... + if (incomplete_flash_page_end) + { + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + { + tmp.u8ptr = (volatile U8 *)dest_end.u8ptr; + + // If end of destination is not 64-bit aligned... + if (!Test_align((U32)dest_end.u8ptr, sizeof(U64))) + { + // Fill the end of the flash double-word buffer with the current flash page data. + for (i = Get_align((U32)dest_end.u8ptr, sizeof(U64)); i < sizeof(U64); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Write the flash double-word buffer to the page buffer. + *dest.u64ptr++ = flash_dword.u64; + } + + // Fill the end of the page buffer with the current flash page data. + for (; !Test_align((U32)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + } + } + + // If the current flash page is in the flash array... + if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE) + { + // Erase the current page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_page(-1, FALSE); + error_status |= flashc_error_status; + } + flashc_write_page(-1); + error_status |= flashc_error_status; + + // If the end of the flash array is reached, go to the User page. + if (dest.u8ptr >= flash_array_end.u8ptr) + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + // If the current flash page is the User page... + else + { + // Erase the User page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_user_page(FALSE); + error_status |= flashc_error_status; + } + flashc_write_user_page(); + error_status |= flashc_error_status; + } + } + + // Update the FLASHC error status. + flashc_error_status = error_status; + + // Return the initial destination pointer as the standard memset function does. + return dst; +} + + +volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase) +{ + // Use aggregated pointers to have several alignments available for a same address. + UnionCVPtr flash_array_end; + UnionVPtr dest; + UnionCPtr source; + StructCVPtr dest_end; + UnionCVPtr flash_page_source_end; + Bool incomplete_flash_page_end; + Union64 flash_dword; + Bool flash_dword_pending = FALSE; + UnionVPtr tmp; + unsigned int error_status = 0; + unsigned int i, j; + + // Reformat arguments. + flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size(); + dest.u8ptr = dst; + source.u8ptr = src; + dest_end.u8ptr = dest.u8ptr + nbytes; + + // If destination is outside flash, go to next flash page if any. + if (dest.u8ptr < AVR32_FLASH) + { + source.u8ptr += AVR32_FLASH - dest.u8ptr; + dest.u8ptr = AVR32_FLASH; + } + else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE) + { + source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr; + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + + // If end of destination is outside flash, move it to the end of the previous flash page if any. + if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE) + { + dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE; + } + else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr) + { + dest_end.u8ptr = flash_array_end.u8ptr; + } + + // Align each end of destination pointer with its natural boundary. + dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16)); + dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32)); + dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64)); + + // While end of destination is not reached... + while (dest.u8ptr < dest_end.u8ptr) + { + // Clear the page buffer in order to prepare data for a flash page write. + flashc_clear_page_buffer(); + error_status |= flashc_error_status; + + // Determine where the source data will end in the current flash page. + flash_page_source_end.u64ptr = + (U64 *)min((U32)dest_end.u64ptr, + Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE); + + // Determine if the current destination page has an incomplete end. + incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >= + Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE)); + + // If destination does not point to the beginning of the current flash page... + if (!Test_align((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE)) + { + // Fill the beginning of the page buffer with the current flash page data. + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE); + tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + + // If destination is not 64-bit aligned... + if (!Test_align((U32)dest.u8ptr, sizeof(U64))) + { + // Fill the beginning of the flash double-word buffer with the current + // flash page data. + // This is required by the hardware, even if page erase is not + // requested, in order to be able to write successfully to erased parts + // of flash pages that have already been written to. + for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Fill the end of the flash double-word buffer with the source data. + for (; i < sizeof(U64); i++) + flash_dword.u8[i] = *source.u8ptr++; + + // Align the destination pointer with its 64-bit boundary. + dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + + // If the current destination double-word is not the last one... + if (dest.u64ptr < dest_end.u64ptr) + { + // Write the flash double-word buffer to the page buffer. + *dest.u64ptr++ = flash_dword.u64; + } + // If the current destination double-word is the last one, the flash + // double-word buffer must be kept for later. + else flash_dword_pending = TRUE; + } + } + + // Read the source data with the maximal possible alignment and write it to + // the page buffer with 64-bit alignment. + switch (Get_align((U32)source.u8ptr, sizeof(U32))) + { + case 0: + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + *dest.u64ptr++ = *source.u64ptr++; + break; + + case sizeof(U16): + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + { + for (j = 0; j < sizeof(U64) / sizeof(U16); j++) flash_dword.u16[j] = *source.u16ptr++; + *dest.u64ptr++ = flash_dword.u64; + } + break; + + default: + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + { + for (j = 0; j < sizeof(U64); j++) flash_dword.u8[j] = *source.u8ptr++; + *dest.u64ptr++ = flash_dword.u64; + } + } + + // If the current destination page has an incomplete end... + if (incomplete_flash_page_end) + { + // If the flash double-word buffer is in use, do not initialize it. + if (flash_dword_pending) i = Get_align((U32)dest_end.u8ptr, sizeof(U64)); + // If the flash double-word buffer is free... + else + { + // Fill the beginning of the flash double-word buffer with the source data. + for (i = 0; i < Get_align((U32)dest_end.u8ptr, sizeof(U64)); i++) + flash_dword.u8[i] = *source.u8ptr++; + } + + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + { + tmp.u8ptr = (volatile U8 *)dest_end.u8ptr; + + // If end of destination is not 64-bit aligned... + if (!Test_align((U32)dest_end.u8ptr, sizeof(U64))) + { + // Fill the end of the flash double-word buffer with the current flash page data. + for (; i < sizeof(U64); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Write the flash double-word buffer to the page buffer. + *dest.u64ptr++ = flash_dword.u64; + } + + // Fill the end of the page buffer with the current flash page data. + for (; !Test_align((U32)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + } + } + + // If the current flash page is in the flash array... + if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE) + { + // Erase the current page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_page(-1, FALSE); + error_status |= flashc_error_status; + } + flashc_write_page(-1); + error_status |= flashc_error_status; + + // If the end of the flash array is reached, go to the User page. + if (dest.u8ptr >= flash_array_end.u8ptr) + { + source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr; + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + } + // If the current flash page is the User page... + else + { + // Erase the User page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_user_page(FALSE); + error_status |= flashc_error_status; + } + flashc_write_user_page(); + error_status |= flashc_error_status; + } + } + + // Update the FLASHC error status. + flashc_error_status = error_status; + + // Return the initial destination pointer as the standard memcpy function does. + return dst; +} + + +#if UC3C +void flashc_set_flash_waitstate_and_readmode(unsigned long cpu_f_hz) +{ + //! Device-specific data + #undef AVR32_FLASHC_FWS_0_MAX_FREQ + #undef AVR32_FLASHC_FWS_1_MAX_FREQ + #undef AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ + #undef AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ + #define AVR32_FLASHC_FWS_0_MAX_FREQ 33000000 + #define AVR32_FLASHC_FWS_1_MAX_FREQ 66000000 + #define AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ 33000000 + #define AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ 72000000 + // These defines are missing from or wrong in the toolchain header files uc3cxxx.h + // Put a Bugzilla + + if(cpu_f_hz > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ) // > 33MHz + { + // Set a wait-state + flashc_set_wait_state(1); + if(cpu_f_hz <= AVR32_FLASHC_FWS_1_MAX_FREQ) // <= 66MHz and >33Mhz + { + // Disable the high-speed read mode. + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); + } + else // > 66Mhz + { + // Enable the high-speed read mode. + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1); + } + } + else // <= 33 MHz + { + // Disable wait-state + flashc_set_wait_state(0); + + // Disable the high-speed read mode. + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); + + } +} +#endif // UC3C device-specific implementation + +//! @} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.h new file mode 100644 index 0000000..9f2547a --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.h @@ -0,0 +1,1002 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FLASHC driver for AVR32 UC3. + * + * AVR32 Flash Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a FLASHC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _FLASHC_H_ +#define _FLASHC_H_ + +#include +#include +#include "compiler.h" + +//! Number of flash regions defined by the FLASHC. +#define AVR32_FLASHC_REGIONS (AVR32_FLASHC_FLASH_SIZE /\ + (AVR32_FLASHC_PAGES_PR_REGION * AVR32_FLASHC_PAGE_SIZE)) + + +/*! \name Flash Properties + */ +//! @{ + +/*! \brief Gets the size of the whole flash array. + * + * \return The size of the whole flash array in bytes. + */ +extern unsigned int flashc_get_flash_size(void); + +/*! \brief Gets the total number of pages in the flash array. + * + * \return The total number of pages in the flash array. + */ +extern unsigned int flashc_get_page_count(void); + +/*! \brief Gets the number of pages in each flash region. + * + * \return The number of pages in each flash region. + */ +extern unsigned int flashc_get_page_count_per_region(void); + +/*! \brief Gets the region number of a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \return The region number of the specified page. + */ +extern unsigned int flashc_get_page_region(int page_number); + +/*! \brief Gets the number of the first page of a region. + * + * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1). + * + * \return The number of the first page of the specified region. + */ +extern unsigned int flashc_get_region_first_page_number(unsigned int region); + +//! @} + + +/*! \name FLASHC Control + */ +//! @{ + +/*! \brief Gets the number of wait states of flash read accesses. + * + * \return The number of wait states of flash read accesses. + */ +extern unsigned int flashc_get_wait_state(void); + +/*! \brief Sets the number of wait states of flash read accesses. + * + * \param wait_state The number of wait states of flash read accesses: \c 0 to + * \c 1. + */ +extern void flashc_set_wait_state(unsigned int wait_state); + +/*! \brief Tells whether the Flash Ready interrupt is enabled. + * + * \return Whether the Flash Ready interrupt is enabled. + */ +extern Bool flashc_is_ready_int_enabled(void); + +/*! \brief Enables or disables the Flash Ready interrupt. + * + * \param enable Whether to enable the Flash Ready interrupt: \c TRUE or + * \c FALSE. + */ +extern void flashc_enable_ready_int(Bool enable); + +/*! \brief Tells whether the Lock Error interrupt is enabled. + * + * \return Whether the Lock Error interrupt is enabled. + */ +extern Bool flashc_is_lock_error_int_enabled(void); + +/*! \brief Enables or disables the Lock Error interrupt. + * + * \param enable Whether to enable the Lock Error interrupt: \c TRUE or + * \c FALSE. + */ +extern void flashc_enable_lock_error_int(Bool enable); + +/*! \brief Tells whether the Programming Error interrupt is enabled. + * + * \return Whether the Programming Error interrupt is enabled. + */ +extern Bool flashc_is_prog_error_int_enabled(void); + +/*! \brief Enables or disables the Programming Error interrupt. + * + * \param enable Whether to enable the Programming Error interrupt: \c TRUE or + * \c FALSE. + */ +extern void flashc_enable_prog_error_int(Bool enable); + +//! @} + + +/*! \name FLASHC Status + */ +//! @{ + +/*! \brief Tells whether the FLASHC is ready to run a new command. + * + * \return Whether the FLASHC is ready to run a new command. + */ +extern Bool flashc_is_ready(void); + +/*! \brief Waits actively until the FLASHC is ready to run a new command. + * + * This is the default function assigned to \ref flashc_wait_until_ready. + */ +extern void flashc_default_wait_until_ready(void); + +//! Pointer to the function used by the driver when it needs to wait until the +//! FLASHC is ready to run a new command. +//! The default function is \ref flashc_default_wait_until_ready. +//! The user may change this pointer to use another implementation. +extern void (*volatile flashc_wait_until_ready)(void); + +/*! \brief Tells whether a Lock Error has occurred during the last function + * called that issued one or more FLASHC commands. + * + * \return Whether a Lock Error has occurred during the last function called + * that issued one or more FLASHC commands. + */ +extern Bool flashc_is_lock_error(void); + +/*! \brief Tells whether a Programming Error has occurred during the last + * function called that issued one or more FLASHC commands. + * + * \return Whether a Programming Error has occurred during the last function + * called that issued one or more FLASHC commands. + */ +extern Bool flashc_is_programming_error(void); + +//! @} + + +/*! \name FLASHC Command Control + */ +//! @{ + +/*! \brief Gets the last issued FLASHC command. + * + * \return The last issued FLASHC command. + */ +extern unsigned int flashc_get_command(void); + +/*! \brief Gets the current FLASHC page number. + * + * \return The current FLASHC page number. + */ +extern unsigned int flashc_get_page_number(void); + +/*! \brief Issues a FLASHC command. + * + * \param command The command: \c AVR32_FLASHC_FCMD_CMD_x. + * \param page_number The page number to apply the command to: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: use this to apply the command to the current page number + * or if the command does not apply to any page number; + * \arg this argument may have other meanings according to the command. See + * the FLASHC chapter of the MCU datasheet. + * + * \warning A Lock Error is issued if the command violates the protection + * mechanism. + * + * \warning A Programming Error is issued if the command is invalid. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_issue_command(unsigned int command, int page_number); + +//! @} + + +/*! \name FLASHC Global Commands + */ +//! @{ + +/*! \brief Issues a No Operation command to the FLASHC. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_no_operation(void); + +/*! \brief Issues an Erase All command to the FLASHC. + * + * This command erases all bits in the flash array, the general-purpose fuse + * bits and the Security bit. The User page is not erased. + * + * This command also ensures that all volatile memories, such as register file + * and RAMs, are erased before the Security bit is erased, i.e. deactivated. + * + * \warning A Lock Error is issued if at least one region is locked or the + * bootloader protection is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern void flashc_erase_all(void); + +//! @} + + +/*! \name FLASHC Protection Mechanisms + */ +//! @{ + +/*! \brief Tells whether the Security bit is active. + * + * \return Whether the Security bit is active. + */ +extern Bool flashc_is_security_bit_active(void); + +/*! \brief Activates the Security bit. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_activate_security_bit(void); + +/*! \brief Gets the bootloader protected size. + * + * \return The bootloader protected size in bytes. + */ +extern unsigned int flashc_get_bootloader_protected_size(void); + +/*! \brief Sets the bootloader protected size. + * + * \param bootprot_size The wanted bootloader protected size in bytes. If this + * size is not supported, the actual size will be the + * nearest greater available size or the maximal possible + * size if the requested size is too large. + * + * \return The actual bootloader protected size in bytes. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size); + +/*! \brief Tells whether external privileged fetch is locked. + * + * \return Whether external privileged fetch is locked. + */ +extern Bool flashc_is_external_privileged_fetch_locked(void); + +/*! \brief Locks or unlocks external privileged fetch. + * + * \param lock Whether to lock external privileged fetch: \c TRUE or \c FALSE. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_external_privileged_fetch(Bool lock); + +/*! \brief Tells whether the region of a page is locked. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \return Whether the region of the specified page is locked. + */ +extern Bool flashc_is_page_region_locked(int page_number); + +/*! \brief Tells whether a region is locked. + * + * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1). + * + * \return Whether the specified region is locked. + */ +extern Bool flashc_is_region_locked(unsigned int region); + +/*! \brief Locks or unlocks the region of a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * \param lock Whether to lock the region of the specified page: \c TRUE or + * \c FALSE. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_page_region(int page_number, Bool lock); + +/*! \brief Locks or unlocks a region. + * + * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1). + * \param lock Whether to lock the specified region: \c TRUE or \c FALSE. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_region(unsigned int region, Bool lock); + +/*! \brief Locks or unlocks all regions. + * + * \param lock Whether to lock the regions: \c TRUE or \c FALSE. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_all_regions(Bool lock); + +//! @} + + +/*! \name Access to General-Purpose Fuses + */ +//! @{ + +/*! \brief Reads a general-purpose fuse bit. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * + * \return The value of the specified general-purpose fuse bit. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit); + +/*! \brief Reads a general-purpose fuse bit-field. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * + * \return The value of the specified general-purpose fuse bit-field. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern U64 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width); + +/*! \brief Reads a general-purpose fuse byte. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * + * \return The value of the specified general-purpose fuse byte. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte); + +/*! \brief Reads all general-purpose fuses. + * + * \return The value of all general-purpose fuses as a word. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern U64 flashc_read_all_gp_fuses(void); + +/*! \brief Erases a general-purpose fuse bit. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * \param check Whether to check erase: \c TRUE or \c FALSE. + * + * \return Whether the erase succeeded or always \c TRUE if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check); + +/*! \brief Erases a general-purpose fuse bit-field. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * \param check Whether to check erase: \c TRUE or \c FALSE. + * + * \return Whether the erase succeeded or always \c TRUE if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check); + +/*! \brief Erases a general-purpose fuse byte. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * \param check Whether to check erase: \c TRUE or \c FALSE. + * + * \return Whether the erase succeeded or always \c TRUE if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check); + +/*! \brief Erases all general-purpose fuses. + * + * \param check Whether to check erase: \c TRUE or \c FALSE. + * + * \return Whether the erase succeeded or always \c TRUE if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_all_gp_fuses(Bool check); + +/*! \brief Writes a general-purpose fuse bit. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * \param value The value of the specified general-purpose fuse bit. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value); + +/*! \brief Writes a general-purpose fuse bit-field. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * \param value The value of the specified general-purpose fuse bit-field. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value); + +/*! \brief Writes a general-purpose fuse byte. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * \param value The value of the specified general-purpose fuse byte. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value); + +/*! \brief Writes all general-purpose fuses. + * + * \param value The value of all general-purpose fuses as a word. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_all_gp_fuses(U64 value); + +/*! \brief Sets a general-purpose fuse bit with the appropriate erase and write + * operations. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * \param value The value of the specified general-purpose fuse bit. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value); + +/*! \brief Sets a general-purpose fuse bit-field with the appropriate erase and + * write operations. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * \param value The value of the specified general-purpose fuse bit-field. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value); + +/*! \brief Sets a general-purpose fuse byte with the appropriate erase and write + * operations. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * \param value The value of the specified general-purpose fuse byte. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value); + +/*! \brief Sets all general-purpose fuses with the appropriate erase and write + * operations. + * + * \param value The value of all general-purpose fuses as a word. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_all_gp_fuses(U64 value); + +//! @} + + +/*! \name Access to Flash Pages + */ +//! @{ + +/*! \brief Clears the page buffer. + * + * This command resets all bits in the page buffer to one. Write accesses to the + * page buffer can only change page buffer bits from one to zero. + * + * \warning The page buffer is not automatically reset after a page write. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_clear_page_buffer(void); + +/*! \brief Tells whether the page to which the last Quick Page Read or Quick + * Page Read User Page command was applied was erased. + * + * \return Whether the page to which the last Quick Page Read or Quick Page Read + * User Page command was applied was erased. + */ +extern Bool flashc_is_page_erased(void); + +/*! \brief Applies the Quick Page Read command to a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \return Whether the specified page is erased. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern Bool flashc_quick_page_read(int page_number); + +/*! \brief Erases a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * \param check Whether to check erase: \c TRUE or \c FALSE. + * + * \return Whether the erase succeeded or always \c TRUE if erase check was not + * requested. + * + * \warning A Lock Error is issued if the command is applied to a page belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern Bool flashc_erase_page(int page_number, Bool check); + +/*! \brief Erases all pages within the flash array. + * + * \param check Whether to check erase: \c TRUE or \c FALSE. + * + * \return Whether the erase succeeded or always \c TRUE if erase check was not + * requested. + * + * \warning A Lock Error is issued if at least one region is locked or the + * bootloader protection is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern Bool flashc_erase_all_pages(Bool check); + +/*! \brief Writes a page from the page buffer. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \warning A Lock Error is issued if the command is applied to a page belonging + * to a locked region or to the bootloader protected area. + * + * \warning The page buffer is not automatically reset after a page write. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits. + */ +extern void flashc_write_page(int page_number); + +/*! \brief Issues a Quick Page Read User Page command to the FLASHC. + * + * \return Whether the User page is erased. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern Bool flashc_quick_user_page_read(void); + +/*! \brief Erases the User page. + * + * \param check Whether to check erase: \c TRUE or \c FALSE. + * + * \return Whether the erase succeeded or always \c TRUE if erase check was not + * requested. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern Bool flashc_erase_user_page(Bool check); + +/*! \brief Writes the User page from the page buffer. + * + * \warning The page buffer is not automatically reset after a page write. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits. + */ +extern void flashc_write_user_page(void); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src source byte. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source byte. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c TRUE or \c FALSE. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c FALSE only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source half-word. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source half-word. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c TRUE or \c FALSE. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c FALSE only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source word. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source word. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c TRUE or \c FALSE. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c FALSE only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source double-word. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source double-word. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c TRUE or \c FALSE. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c FALSE only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source pattern. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source double-word. + * \param src_width \a src width in bits: 8, 16, 32 or 64. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c TRUE or \c FALSE. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c FALSE only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +#define flashc_memset(dst, src, src_width, nbytes, erase) \ + TPASTE2(flashc_memset, src_width)((dst), (src), (nbytes), (erase)) + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the source pointed to by \a src. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Pointer to source data. + * \param nbytes Number of bytes to copy. + * \param erase Whether to erase before writing: \c TRUE or \c FALSE. + * + * \return The value of \a dst. + * + * \warning If copying takes place between areas that overlap, the behavior is + * undefined. + * + * \warning This function may be called with \a erase set to \c FALSE only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase); + +#if UC3C + +/*! \brief Depednding to the CPU frequency, set the wait states of flash read + * accesses and enable or disable the High speed read mode. + * + * \param cpu_f_hz The CPU frequency + */ +void flashc_set_flash_waitstate_and_readmode(unsigned long cpu_f_hz); +#endif // UC3C device-specific implementation + +//! @} + + +#endif // _FLASHC_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.c new file mode 100644 index 0000000..b6b83c7 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.c @@ -0,0 +1,458 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief GPIO driver for AVR32 UC3. + * + * This file defines a useful set of functions for the GPIO. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a GPIO module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "gpio.h" + +//! GPIO module instance. +#define GPIO AVR32_GPIO + + +/*! \name Peripheral Bus Interface + */ +//! @{ + + +int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size) +{ + int status = GPIO_SUCCESS; + unsigned int i; + + for (i = 0; i < size; i++) + { + status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function); + gpiomap++; + } + + return status; +} + + +int gpio_enable_module_pin(unsigned int pin, unsigned int function) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + // Enable the correct function. + switch (function) + { + case 0: // A function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + + case 1: // B function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + + case 2: // C function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + + case 3: // D function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) + case 4: // E function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; + + case 5: // F function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; + + case 6: // G function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; + + case 7: // H function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; +#endif + + default: + return GPIO_INVALID_ARGUMENT; + } + + // Disable GPIO control. + gpio_port->gperc = 1 << (pin & 0x1F); + + return GPIO_SUCCESS; +} + + +void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size) +{ + unsigned int i; + + for (i = 0; i < size; i++) + { + gpio_enable_gpio_pin(gpiomap->pin); + gpiomap++; + } +} + + +void gpio_enable_gpio_pin(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->oderc = 1 << (pin & 0x1F); + gpio_port->gpers = 1 << (pin & 0x1F); +} + + +// The open-drain mode is not synthesized on the current AVR32 products. +// If one day some AVR32 products have this feature, the corresponding part +// numbers should be listed in the #if below. +// Note that other functions are available in this driver to use pins with open +// drain in GPIO mode. The advantage of the open-drain mode functions over these +// other functions is that they can be used not only in GPIO mode but also in +// module mode. +#if 0 + + +void gpio_enable_pin_open_drain(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->odmers = 1 << (pin & 0x1F); +} + + +void gpio_disable_pin_open_drain(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->odmerc = 1 << (pin & 0x1F); +} + + +#endif + + +void gpio_enable_pin_pull_up(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puers = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) + gpio_port->pderc = 1 << (pin & 0x1F); +#endif +} + + +void gpio_disable_pin_pull_up(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puerc = 1 << (pin & 0x1F); +} + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) +// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control. + +/*! \brief Enables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +void gpio_enable_pin_pull_down(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puerc = 1 << (pin & 0x1F); + gpio_port->pders = 1 << (pin & 0x1F); +} + +/*! \brief Disables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +void gpio_disable_pin_pull_down(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->pderc = 1 << (pin & 0x1F); +} + +/*! \brief Enables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +void gpio_enable_pin_buskeeper(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puers = 1 << (pin & 0x1F); + gpio_port->pders = 1 << (pin & 0x1F); +} + +/*! \brief Disables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +void gpio_disable_pin_buskeeper(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puerc = 1 << (pin & 0x1F); + gpio_port->pderc = 1 << (pin & 0x1F); +} + +#endif + +int gpio_get_pin_value(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return (gpio_port->pvr >> (pin & 0x1F)) & 1; +} + + +int gpio_get_gpio_pin_output_value(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return (gpio_port->ovr >> (pin & 0x1F)) & 1; +} + + +int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return ((gpio_port->oder >> (pin & 0x1F)) & 1) ^ 1; +} + + +void gpio_set_gpio_pin(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrs = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_clr_gpio_pin(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_tgl_gpio_pin(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrt = 1 << (pin & 0x1F); // Toggle the I/O line. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_set_gpio_open_drain_pin(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_clr_gpio_open_drain_pin(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_tgl_gpio_open_drain_pin(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line if the GPIO output driver is enabled: 0. + gpio_port->odert = 1 << (pin & 0x1F); // The GPIO output driver is toggled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_enable_pin_glitch_filter(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->gfers = 1 << (pin & 0x1F); +} + + +void gpio_disable_pin_glitch_filter(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->gferc = 1 << (pin & 0x1F); +} + +/*! \brief Configure the edge detector of an input pin + * + * \param pin The pin number. + * \param mode The edge detection mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE + * or \ref GPIO_FALLING_EDGE). + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +static int gpio_configure_edge_detector(unsigned int pin, unsigned int mode) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + // Configure the edge detector. + switch (mode) + { + case GPIO_PIN_CHANGE: + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + break; + + case GPIO_RISING_EDGE: + gpio_port->imr0s = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + break; + + case GPIO_FALLING_EDGE: + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1s = 1 << (pin & 0x1F); + break; + + default: + return GPIO_INVALID_ARGUMENT; + } + + return GPIO_SUCCESS; +} + + +int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + // Enable the glitch filter. + gpio_port->gfers = 1 << (pin & 0x1F); + + // Configure the edge detector. + if(GPIO_INVALID_ARGUMENT == gpio_configure_edge_detector(pin, mode)) + return(GPIO_INVALID_ARGUMENT); + + // Enable interrupt. + gpio_port->iers = 1 << (pin & 0x1F); + + return GPIO_SUCCESS; +} + + +void gpio_disable_pin_interrupt(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ierc = 1 << (pin & 0x1F); +} + + +int gpio_get_pin_interrupt_flag(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return (gpio_port->ifr >> (pin & 0x1F)) & 1; +} + + +void gpio_clear_pin_interrupt_flag(unsigned int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ifrc = 1 << (pin & 0x1F); +} + + +//# +//# Peripheral Event System Support. +//# +#if UC3L +int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + if(TRUE == use_igf) + { + // Enable the glitch filter. + gpio_port->gfers = 1 << (pin & 0x1F); + } + else + { + // Disable the glitch filter. + gpio_port->gferc = 1 << (pin & 0x1F); + } + + // Configure the edge detector. + return(gpio_configure_edge_detector(pin, mode)); +} + +#endif + +//! @} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.h new file mode 100644 index 0000000..f0b5fd8 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.h @@ -0,0 +1,583 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief GPIO header for AVR32 UC3. + * + * This file contains basic GPIO driver functions. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a GPIO module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _GPIO_H_ +#define _GPIO_H_ + +#include +#include "compiler.h" + +/*! \name Return Values of the GPIO API + */ +//! @{ +#define GPIO_SUCCESS 0 //!< Function successfully completed. +#define GPIO_INVALID_ARGUMENT 1 //!< Input parameters are out of range. +//! @} + + +/*! \name Interrupt Trigger Modes + */ +//! @{ +#define GPIO_PIN_CHANGE 0 //!< Interrupt triggered upon pin change. +#define GPIO_RISING_EDGE 1 //!< Interrupt triggered upon rising edge. +#define GPIO_FALLING_EDGE 2 //!< Interrupt triggered upon falling edge. +//! @} + + +//! A type definition of pins and modules connectivity. +typedef struct +{ + unsigned char pin; //!< Module pin. + unsigned char function; //!< Module function. +} gpio_map_t[]; + + +/*! \name Peripheral Bus Interface + * + * Low-speed interface with a non-deterministic number of clock cycles per + * access. + * + * This interface operates with lower clock frequencies (fPB <= fCPU), and its + * timing is not deterministic since it needs to access a shared bus which may + * be heavily loaded. + * + * \note This interface is immediately available without initialization. + */ +//! @{ + +/*! \brief Enables specific module modes for a set of pins. + * + * \param gpiomap The pin map. + * \param size The number of pins in \a gpiomap. + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size); + +/*! \brief Enables a specific module mode for a pin. + * + * \param pin The pin number.\n + * Refer to the product header file `uc3x.h' (where x is the part + * number; e.g. x = a0512) for module pins. E.g., to enable a PWM + * channel output, the pin number can be AVR32_PWM_3_PIN for PWM + * channel 3. + * \param function The pin function.\n + * Refer to the product header file `uc3x.h' (where x is the + * part number; e.g. x = a0512) for module pin functions. E.g., + * to enable a PWM channel output, the pin function can be + * AVR32_PWM_3_FUNCTION for PWM channel 3. + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_enable_module_pin(unsigned int pin, unsigned int function); + +/*! \brief Enables the GPIO mode of a set of pins. + * + * \param gpiomap The pin map. + * \param size The number of pins in \a gpiomap. + */ +extern void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size); + +/*! \brief Enables the GPIO mode of a pin. + * + * \param pin The pin number.\n + * Refer to the product header file `uc3x.h' (where x is the part + * number; e.g. x = a0512) for pin definitions. E.g., to enable the + * GPIO mode of PX21, AVR32_PIN_PX21 can be used. Module pins such as + * AVR32_PWM_3_PIN for PWM channel 3 can also be used to release + * module pins for GPIO. + */ +extern void gpio_enable_gpio_pin(unsigned int pin); + +// The open-drain mode is not synthesized on the current AVR32 products. +// If one day some AVR32 products have this feature, the corresponding part +// numbers should be listed in the #if below. +// Note that other functions are available in this driver to use pins with open +// drain in GPIO mode. The advantage of the open-drain mode functions over these +// other functions is that they can be used not only in GPIO mode but also in +// module mode. +#if 0 + +/*! \brief Enables the open-drain mode of a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_open_drain(unsigned int pin); + +/*! \brief Disables the open-drain mode of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_open_drain(unsigned int pin); + +#endif + +/*! \brief Enables the pull-up resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_pull_up(unsigned int pin); + +/*! \brief Disables the pull-up resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_pull_up(unsigned int pin); + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) +// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control. + +/*! \brief Enables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_pull_down(unsigned int pin); + +/*! \brief Disables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_pull_down(unsigned int pin); + +/*! \brief Enables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_buskeeper(unsigned int pin); + +/*! \brief Disables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_buskeeper(unsigned int pin); + +#endif + +/*! \brief Returns the value of a pin. + * + * \param pin The pin number. + * + * \return The pin value. + */ +extern int gpio_get_pin_value(unsigned int pin); + +/*! \brief Returns the output value set for a GPIO pin. + * + * \param pin The pin number. + * + * \return The pin output value. + * + * \note This function must be used in conjunction with \ref gpio_set_gpio_pin, + * \ref gpio_clr_gpio_pin and \ref gpio_tgl_gpio_pin. + */ +extern int gpio_get_gpio_pin_output_value(unsigned int pin); + +/*! \brief Returns the output value set for a GPIO pin using open drain. + * + * \param pin The pin number. + * + * \return The pin output value. + * + * \note This function must be used in conjunction with + * \ref gpio_set_gpio_open_drain_pin, \ref gpio_clr_gpio_open_drain_pin + * and \ref gpio_tgl_gpio_open_drain_pin. + */ +extern int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin); + +/*! \brief Drives a GPIO pin to 1. + * + * \param pin The pin number. + */ +extern void gpio_set_gpio_pin(unsigned int pin); + +/*! \brief Drives a GPIO pin to 0. + * + * \param pin The pin number. + */ +extern void gpio_clr_gpio_pin(unsigned int pin); + +/*! \brief Toggles a GPIO pin. + * + * \param pin The pin number. + */ +extern void gpio_tgl_gpio_pin(unsigned int pin); + +/*! \brief Drives a GPIO pin to 1 using open drain. + * + * \param pin The pin number. + */ +extern void gpio_set_gpio_open_drain_pin(unsigned int pin); + +/*! \brief Drives a GPIO pin to 0 using open drain. + * + * \param pin The pin number. + */ +extern void gpio_clr_gpio_open_drain_pin(unsigned int pin); + +/*! \brief Toggles a GPIO pin using open drain. + * + * \param pin The pin number. + */ +extern void gpio_tgl_gpio_open_drain_pin(unsigned int pin); + +/*! \brief Enables the glitch filter of a pin. + * + * When the glitch filter is enabled, a glitch with duration of less than 1 + * clock cycle is automatically rejected, while a pulse with duration of 2 clock + * cycles or more is accepted. For pulse durations between 1 clock cycle and 2 + * clock cycles, the pulse may or may not be taken into account, depending on + * the precise timing of its occurrence. Thus for a pulse to be guaranteed + * visible it must exceed 2 clock cycles, whereas for a glitch to be reliably + * filtered out, its duration must not exceed 1 clock cycle. The filter + * introduces 2 clock cycles latency. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_glitch_filter(unsigned int pin); + +/*! \brief Disables the glitch filter of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_glitch_filter(unsigned int pin); + +/*! \brief Enables the interrupt of a pin with the specified settings. + * + * \param pin The pin number. + * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or + * \ref GPIO_FALLING_EDGE). + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode); + +/*! \brief Disables the interrupt of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_interrupt(unsigned int pin); + +/*! \brief Gets the interrupt flag of a pin. + * + * \param pin The pin number. + * + * \return The pin interrupt flag. + */ +extern int gpio_get_pin_interrupt_flag(unsigned int pin); + +/*! \brief Clears the interrupt flag of a pin. + * + * \param pin The pin number. + */ +extern void gpio_clear_pin_interrupt_flag(unsigned int pin); + +//! @} + + +#if (defined AVR32_GPIO_LOCAL_ADDRESS) +/*! \name Local Bus Interface + * + * High-speed interface with only one clock cycle per access. + * + * This interface operates with high clock frequency (fCPU), and its timing is + * deterministic since it does not need to access a shared bus which may be + * heavily loaded. + * + * \warning To use this interface, the clock frequency of the peripheral bus on + * which the GPIO peripheral is connected must be set to the CPU clock + * frequency (fPB = fCPU). + * + * \note This interface has to be initialized in order to be available. + */ +//! @{ + +/*! \brief Enables the local bus interface for GPIO. + * + * \note This function must have been called at least once before using other + * functions in this interface. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_init(void) +{ + Set_system_register(AVR32_CPUCR, + Get_system_register(AVR32_CPUCR) | AVR32_CPUCR_LOCEN_MASK); +} + +/*! \brief Enables the output driver of a pin. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_enable_pin_output_driver(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F); +} + +/*! \brief Disables the output driver of a pin. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_disable_pin_output_driver(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F); +} + +/*! \brief Returns the value of a pin. + * + * \param pin The pin number. + * + * \return The pin value. + * + * \note \ref gpio_local_init must have been called beforehand. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int gpio_local_get_pin_value(unsigned int pin) +{ + return (AVR32_GPIO_LOCAL.port[pin >> 5].pvr >> (pin & 0x1F)) & 1; +} + +/*! \brief Drives a GPIO pin to 1. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin nor its output + * driver. \ref gpio_enable_gpio_pin and + * \ref gpio_local_enable_pin_output_driver can be called for this + * purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_set_gpio_pin(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrs = 1 << (pin & 0x1F); +} + +/*! \brief Drives a GPIO pin to 0. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin nor its output + * driver. \ref gpio_enable_gpio_pin and + * \ref gpio_local_enable_pin_output_driver can be called for this + * purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_clr_gpio_pin(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F); +} + +/*! \brief Toggles a GPIO pin. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin nor its output + * driver. \ref gpio_enable_gpio_pin and + * \ref gpio_local_enable_pin_output_driver can be called for this + * purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_tgl_gpio_pin(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrt = 1 << (pin & 0x1F); +} + +/*! \brief Initializes the configuration of a GPIO pin so that it can be used + * with GPIO open-drain functions. + * + * \note This function must have been called at least once before using + * \ref gpio_local_set_gpio_open_drain_pin, + * \ref gpio_local_clr_gpio_open_drain_pin or + * \ref gpio_local_tgl_gpio_open_drain_pin. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_init_gpio_open_drain_pin(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F); +} + +/*! \brief Drives a GPIO pin to 1 using open drain. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must + * have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_set_gpio_open_drain_pin(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F); +} + +/*! \brief Drives a GPIO pin to 0 using open drain. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must + * have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_clr_gpio_open_drain_pin(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F); +} + +/*! \brief Toggles a GPIO pin using open drain. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must + * have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_local_tgl_gpio_open_drain_pin(unsigned int pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].odert = 1 << (pin & 0x1F); +} + +//! @} +#endif // AVR32_GPIO_LOCAL_ADDRESS + +#if UC3L +//! @{ +/*! \name Peripheral Event System support + * + * The GPIO can be programmed to output peripheral events whenever an interrupt + * condition is detected, such as pin value change, or only when a rising or + * falling edge is detected. + * + */ + +/*! \brief Enables the peripheral event generation of a pin. + * + * \param pin The pin number. + * + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_enable_pin_periph_event(unsigned int pin) +{ + AVR32_GPIO.port[pin >> 5].oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin. + AVR32_GPIO.port[pin >> 5].evers = 1 << (pin & 0x1F); +} + +/*! \brief Disables the peripheral event generation of a pin. + * + * \param pin The pin number. + * + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void gpio_disable_pin_periph_event(unsigned int pin) +{ + AVR32_GPIO.port[pin >> 5].everc = 1 << (pin & 0x1F); +} + +/*! \brief Configure the peripheral event trigger mode of a pin + * + * \param pin The pin number. + * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or + * \ref GPIO_FALLING_EDGE). + * \param use_igf use the Input Glitch Filter (TRUE) or not (FALSE). + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf); + +//! @} +#endif + + +#endif // _GPIO_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/exception.x b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/exception.x new file mode 100644 index 0000000..ec4109d --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/exception.x @@ -0,0 +1,239 @@ +/* This file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Exception and interrupt vectors. + * + * This file maps all events supported by an AVR32. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an INTC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#if !__AVR32_UC__ && !__AVR32_AP__ + #error Implementation of the AVR32 architecture not supported by the INTC driver. +#endif + + +#include + + +//! @{ +//! \verbatim + + + .section .exception, "ax", @progbits + + +// Start of Exception Vector Table. + + // EVBA must be aligned with a power of two strictly greater than the EVBA- + // relative offset of the last vector. + .balign 0x200 + + // Export symbol. + .global _evba + .type _evba, @function +_evba: + + .org 0x000 + // Unrecoverable Exception. +_handle_Unrecoverable_Exception: + rjmp $ + + .org 0x004 + // TLB Multiple Hit. +_handle_TLB_Multiple_Hit: + rjmp $ + + .org 0x008 + // Bus Error Data Fetch. +_handle_Bus_Error_Data_Fetch: + rjmp $ + + .org 0x00C + // Bus Error Instruction Fetch. +_handle_Bus_Error_Instruction_Fetch: + rjmp $ + + .org 0x010 + // NMI. +_handle_NMI: + rjmp $ + + .org 0x014 + // Instruction Address. +_handle_Instruction_Address: + rjmp $ + + .org 0x018 + // ITLB Protection. +_handle_ITLB_Protection: + rjmp $ + + .org 0x01C + // Breakpoint. +_handle_Breakpoint: + rjmp $ + + .org 0x020 + // Illegal Opcode. +_handle_Illegal_Opcode: + rjmp $ + + .org 0x024 + // Unimplemented Instruction. +_handle_Unimplemented_Instruction: + rjmp $ + + .org 0x028 + // Privilege Violation. +_handle_Privilege_Violation: + rjmp $ + + .org 0x02C + // Floating-Point: UNUSED IN AVR32UC and AVR32AP. +_handle_Floating_Point: + rjmp $ + + .org 0x030 + // Coprocessor Absent: UNUSED IN AVR32UC. +_handle_Coprocessor_Absent: + rjmp $ + + .org 0x034 + // Data Address (Read). +_handle_Data_Address_Read: + rjmp $ + + .org 0x038 + // Data Address (Write). +_handle_Data_Address_Write: + rjmp $ + + .org 0x03C + // DTLB Protection (Read). +_handle_DTLB_Protection_Read: + rjmp $ + + .org 0x040 + // DTLB Protection (Write). +_handle_DTLB_Protection_Write: + rjmp $ + + .org 0x044 + // DTLB Modified: UNUSED IN AVR32UC. +_handle_DTLB_Modified: + rjmp $ + + .org 0x050 + // ITLB Miss. +_handle_ITLB_Miss: + rjmp $ + + .org 0x060 + // DTLB Miss (Read). +_handle_DTLB_Miss_Read: + rjmp $ + + .org 0x070 + // DTLB Miss (Write). +_handle_DTLB_Miss_Write: + rjmp $ + + .org 0x100 + // Supervisor Call. +_handle_Supervisor_Call: + rjmp $ + + +// Interrupt support. +// The interrupt controller must provide the offset address relative to EVBA. +// Important note: +// All interrupts call a C function named _get_interrupt_handler. +// This function will read group and interrupt line number to then return in +// R12 a pointer to a user-provided interrupt handler. + + .balign 4 + + .irp priority, 0, 1, 2, 3 +_int\priority: +#if __AVR32_UC__ + // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the + // CPU upon interrupt entry. No other register is saved by hardware. +#elif __AVR32_AP__ + // PC and SR are automatically saved in respectively RAR_INTx and RSR_INTx by + // the CPU upon interrupt entry. No other register is saved by hardware. + pushm r8-r12, lr +#endif + mov r12, \priority // Pass the int_level parameter to the _get_interrupt_handler function. + call _get_interrupt_handler + cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function. +#if __AVR32_UC__ + movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler. +#elif __AVR32_AP__ + breq spint\priority // If this was a spurious interrupt (R12 == NULL), branch. + st.w --sp, r12 // Push the pointer to the interrupt handler onto the system stack since no register may be altered. + popm r8-r12, lr, pc // Restore registers and jump to the handler. +spint\priority: + popm r8-r12, lr +#endif + rete // If this was a spurious interrupt (R12 == NULL), return from event handler. + .endr + + +// Constant data area. + + .balign 4 + + // Values to store in the interrupt priority registers for the various interrupt priority levels. + // The interrupt priority registers contain the interrupt priority level and + // the EVBA-relative interrupt vector offset. + .global ipr_val + .type ipr_val, @object +ipr_val: + .word (AVR32_INTC_INT0 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int0 - _evba),\ + (AVR32_INTC_INT1 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int1 - _evba),\ + (AVR32_INTC_INT2 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int2 - _evba),\ + (AVR32_INTC_INT3 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int3 - _evba) + + +//! \endverbatim +//! @} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.c new file mode 100644 index 0000000..84d498d --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.c @@ -0,0 +1,214 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief INTC driver for AVR32 UC3. + * + * AVR32 Interrupt Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an INTC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "compiler.h" +#include "preprocessor.h" +#include "intc.h" + +// define _evba from exception.S +extern void _evba; + +//! Values to store in the interrupt priority registers for the various interrupt priority levels. +extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS]; + +//! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space. +//! Each line handler table contains a set of pointers to interrupt handlers. +#if (defined __GNUC__) +#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \ +static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)]; +#elif (defined __ICCAVR32__) +#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \ +static volatile __no_init __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)]; +#endif +MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~); +#undef DECL_INT_LINE_HANDLER_TABLE + +//! Table containing for each interrupt group the number of interrupt request +//! lines and a pointer to the table of interrupt line handlers. +static const struct +{ + unsigned int num_irqs; + volatile __int_handler *_int_line_handler_table; +} _int_handler_table[AVR32_INTC_NUM_INT_GRPS] = +{ +#define INSERT_INT_LINE_HANDLER_TABLE(GRP, unused) \ + {AVR32_INTC_NUM_IRQS_PER_GRP##GRP, _int_line_handler_table_##GRP}, + MREPEAT(AVR32_INTC_NUM_INT_GRPS, INSERT_INT_LINE_HANDLER_TABLE, ~) +#undef INSERT_INT_LINE_HANDLER_TABLE +}; + + +/*! \brief Default interrupt handler. + * + * \note Taken and adapted from Newlib. + */ +#if (defined __GNUC__) +__attribute__((__interrupt__)) +#elif (defined __ICCAVR32__) +__interrupt +#endif +static void _unhandled_interrupt(void) +{ + // Catch unregistered interrupts. + while (TRUE); +} + + +/*! \brief Gets the interrupt handler of the current event at the \a int_level + * interrupt priority level (called from exception.S). + * + * \param int_level Interrupt priority level to handle. + * + * \return Interrupt handler to execute. + * + * \note Taken and adapted from Newlib. + */ +__int_handler _get_interrupt_handler(unsigned int int_level) +{ + // ICR3 is mapped first, ICR0 last. + // Code in exception.S puts int_level in R12 which is used by AVR32-GCC to + // pass a single argument to a function. + unsigned int int_grp = AVR32_INTC.icr[AVR32_INTC_INT3 - int_level]; + unsigned int int_req = AVR32_INTC.irr[int_grp]; + + // As an interrupt may disappear while it is being fetched by the CPU + // (spurious interrupt caused by a delayed response from an MCU peripheral to + // an interrupt flag clear or interrupt disable instruction), check if there + // are remaining interrupt lines to process. + // If a spurious interrupt occurs, the status register (SR) contains an + // execution mode and interrupt level masks corresponding to a level 0 + // interrupt, whatever the interrupt priority level causing the spurious + // event. This behavior has been chosen because a spurious interrupt has not + // to be a priority one and because it may not cause any trouble to other + // interrupts. + // However, these spurious interrupts place the hardware in an unstable state + // and could give problems in other/future versions of the CPU, so the + // software has to be written so that they never occur. The only safe way of + // achieving this is to always clear or disable peripheral interrupts with the + // following sequence: + // 1: Mask the interrupt in the CPU by setting GM (or IxM) in SR. + // 2: Perform the bus access to the peripheral register that clears or + // disables the interrupt. + // 3: Wait until the interrupt has actually been cleared or disabled by the + // peripheral. This is usually performed by reading from a register in the + // same peripheral (it DOES NOT have to be the same register that was + // accessed in step 2, but it MUST be in the same peripheral), what takes + // bus system latencies into account, but peripheral internal latencies + // (generally 0 cycle) also have to be considered. + // 4: Unmask the interrupt in the CPU by clearing GM (or IxM) in SR. + // Note that steps 1 and 4 are useless inside interrupt handlers as the + // corresponding interrupt level is automatically masked by IxM (unless IxM is + // explicitly cleared by the software). + // + // Get the right IRQ handler. + // + // If several interrupt lines are active in the group, the interrupt line with + // the highest number is selected. This is to be coherent with the + // prioritization of interrupt groups performed by the hardware interrupt + // controller. + // + // If no handler has been registered for the pending interrupt, + // _unhandled_interrupt will be selected thanks to the initialization of + // _int_line_handler_table_x by INTC_init_interrupts. + // + // exception.S will provide the interrupt handler with a clean interrupt stack + // frame, with nothing more pushed onto the stack. The interrupt handler must + // manage the `rete' instruction, what can be done thanks to pure assembly, + // inline assembly or the `__attribute__((__interrupt__))' C function + // attribute. + return (int_req) ? _int_handler_table[int_grp]._int_line_handler_table[32 - clz(int_req) - 1] : NULL; +} + +//! Init EVBA address. This sequence might also be done in the UTILS/STARTUP/GCC/crt0.S +static __inline__ void INTC_init_evba(void) +{ + Set_system_register(AVR32_EVBA, (int)&_evba ); +} + +void INTC_init_interrupts(void) +{ + unsigned int int_grp, int_req; + + INTC_init_evba(); + + // For all interrupt groups, + for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++) + { + // For all interrupt request lines of each group, + for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++) + { + // Assign _unhandled_interrupt as default interrupt handler. + _int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt; + } + + // Set the interrupt group priority register to its default value. + // By default, all interrupt groups are linked to the interrupt priority + // level 0 and to the interrupt vector _int0. + AVR32_INTC.ipr[int_grp] = ipr_val[AVR32_INTC_INT0]; + } +} + + +void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level) +{ + // Determine the group of the IRQ. + unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP; + + // Store in _int_line_handler_table_x the pointer to the interrupt handler, so + // that _get_interrupt_handler can retrieve it when the interrupt is vectored. + _int_handler_table[int_grp]._int_line_handler_table[irq % AVR32_INTC_MAX_NUM_IRQS_PER_GRP] = handler; + + // Program the corresponding IPRX register to set the interrupt priority level + // and the interrupt vector offset that will be fetched by the core interrupt + // system. + // NOTE: The _intx functions are intermediate assembly functions between the + // core interrupt system and the user interrupt handler. + AVR32_INTC.ipr[int_grp] = ipr_val[int_level & (AVR32_INTC_IPR_INTLEVEL_MASK >> AVR32_INTC_IPR_INTLEVEL_OFFSET)]; +} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.h new file mode 100644 index 0000000..31a4fc1 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.h @@ -0,0 +1,100 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief INTC driver for AVR32 UC3. + * + * AVR32 Interrupt Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an INTC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _INTC_H_ +#define _INTC_H_ + +#include "compiler.h" + + +//! Maximal number of interrupt request lines per group. +#define AVR32_INTC_MAX_NUM_IRQS_PER_GRP 32 + +//! Number of interrupt priority levels. +#define AVR32_INTC_NUM_INT_LEVELS (1 << AVR32_INTC_IPR_INTLEVEL_SIZE) + + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +//! Pointer to interrupt handler. +#if (defined __GNUC__) +typedef void (*__int_handler)(void); +#elif (defined __ICCAVR32__) +typedef void (__interrupt *__int_handler)(void); +#endif + + +/*! \brief Initializes the hardware interrupt controller driver. + * + * \note Taken and adapted from Newlib. + */ +extern void INTC_init_interrupts(void); + +/*! \brief Registers an interrupt handler. + * + * \param handler Interrupt handler to register. + * \param irq IRQ of the interrupt handler to register. + * \param int_level Interrupt priority level to assign to the group of this IRQ. + * + * \warning The interrupt handler must manage the `rete' instruction, what can + * be done thanks to pure assembly, inline assembly or the + * `__attribute__((__interrupt__))' C function attribute. + * + * \warning If several interrupt handlers of a same group are registered with + * different priority levels, only the latest priority level set will + * be effective. + * + * \note Taken and adapted from Newlib. + */ +extern void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level); + +#endif // __AVR32_ABI_COMPILER__ + + +#endif // _INTC_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.c new file mode 100644 index 0000000..76d9268 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.c @@ -0,0 +1,546 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Power Manager driver. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "compiler.h" +#include "pm.h" + + +/*! \name PM Writable Bit-Field Registers + */ +//! @{ + +typedef union +{ + unsigned long mcctrl; + avr32_pm_mcctrl_t MCCTRL; +} u_avr32_pm_mcctrl_t; + +typedef union +{ + unsigned long cksel; + avr32_pm_cksel_t CKSEL; +} u_avr32_pm_cksel_t; + +typedef union +{ + unsigned long pll; + avr32_pm_pll_t PLL; +} u_avr32_pm_pll_t; + +typedef union +{ + unsigned long oscctrl0; + avr32_pm_oscctrl0_t OSCCTRL0; +} u_avr32_pm_oscctrl0_t; + +typedef union +{ + unsigned long oscctrl1; + avr32_pm_oscctrl1_t OSCCTRL1; +} u_avr32_pm_oscctrl1_t; + +typedef union +{ + unsigned long oscctrl32; + avr32_pm_oscctrl32_t OSCCTRL32; +} u_avr32_pm_oscctrl32_t; + +typedef union +{ + unsigned long ier; + avr32_pm_ier_t IER; +} u_avr32_pm_ier_t; + +typedef union +{ + unsigned long idr; + avr32_pm_idr_t IDR; +} u_avr32_pm_idr_t; + +typedef union +{ + unsigned long icr; + avr32_pm_icr_t ICR; +} u_avr32_pm_icr_t; + +typedef union +{ + unsigned long gcctrl; + avr32_pm_gcctrl_t GCCTRL; +} u_avr32_pm_gcctrl_t; + +typedef union +{ + unsigned long rccr; + avr32_pm_rccr_t RCCR; +} u_avr32_pm_rccr_t; + +typedef union +{ + unsigned long bgcr; + avr32_pm_bgcr_t BGCR; +} u_avr32_pm_bgcr_t; + +typedef union +{ + unsigned long vregcr; + avr32_pm_vregcr_t VREGCR; +} u_avr32_pm_vregcr_t; + +typedef union +{ + unsigned long bod; + avr32_pm_bod_t BOD; +} u_avr32_pm_bod_t; + +//! @} + + +/*! \brief Sets the mode of the oscillator 0. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * \param mode Oscillator 0 mode (i.e. AVR32_PM_OSCCTRL0_MODE_x). + */ +static void pm_set_osc0_mode(volatile avr32_pm_t *pm, unsigned int mode) +{ + // Read + u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0}; + // Modify + u_avr32_pm_oscctrl0.OSCCTRL0.mode = mode; + // Write + pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0; +} + + +void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm) +{ + pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK); +} + + +void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0) +{ + pm_set_osc0_mode(pm, (fosc0 < 900000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G0 : + (fosc0 < 3000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G1 : + (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 : + AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3); +} + + +void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup) +{ + pm_enable_clk0_no_wait(pm, startup); + pm_wait_for_clk0_ready(pm); +} + + +void pm_disable_clk0(volatile avr32_pm_t *pm) +{ + pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC0EN_MASK; +} + + +void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + // Read register + u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0}; + // Modify + u_avr32_pm_oscctrl0.OSCCTRL0.startup = startup; + // Write back + pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0; + + pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK; +} + + +void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_OSC0RDY_MASK)); +} + + +/*! \brief Sets the mode of the oscillator 1. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * \param mode Oscillator 1 mode (i.e. AVR32_PM_OSCCTRL1_MODE_x). + */ +static void pm_set_osc1_mode(volatile avr32_pm_t *pm, unsigned int mode) +{ + // Read + u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1}; + // Modify + u_avr32_pm_oscctrl1.OSCCTRL1.mode = mode; + // Write + pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1; +} + + +void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm) +{ + pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK); +} + + +void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1) +{ + pm_set_osc1_mode(pm, (fosc1 < 900000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G0 : + (fosc1 < 3000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G1 : + (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 : + AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3); +} + + +void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup) +{ + pm_enable_clk1_no_wait(pm, startup); + pm_wait_for_clk1_ready(pm); +} + + +void pm_disable_clk1(volatile avr32_pm_t *pm) +{ + pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC1EN_MASK; +} + + +void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + // Read register + u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1}; + // Modify + u_avr32_pm_oscctrl1.OSCCTRL1.startup = startup; + // Write back + pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1; + + pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK; +} + + +void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_OSC1RDY_MASK)); +} + + +/*! \brief Sets the mode of the 32-kHz oscillator. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * \param mode 32-kHz oscillator mode (i.e. AVR32_PM_OSCCTRL32_MODE_x). + */ +static void pm_set_osc32_mode(volatile avr32_pm_t *pm, unsigned int mode) +{ + // Read + u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32}; + // Modify + u_avr32_pm_oscctrl32.OSCCTRL32.mode = mode; + // Write + pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32; +} + + +void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm) +{ + pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK); +} + + +void pm_enable_osc32_crystal(volatile avr32_pm_t *pm) +{ + pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL); +} + + +void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup) +{ + pm_enable_clk32_no_wait(pm, startup); + pm_wait_for_clk32_ready(pm); +} + + +void pm_disable_clk32(volatile avr32_pm_t *pm) +{ + pm->oscctrl32 &= ~AVR32_PM_OSCCTRL32_OSC32EN_MASK; +} + + +void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + // Read register + u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32}; + // Modify + u_avr32_pm_oscctrl32.OSCCTRL32.osc32en = 1; + u_avr32_pm_oscctrl32.OSCCTRL32.startup = startup; + // Write back + pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32; +} + + +void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_OSC32RDY_MASK)); +} + + +void pm_cksel(volatile avr32_pm_t *pm, + unsigned int pbadiv, + unsigned int pbasel, + unsigned int pbbdiv, + unsigned int pbbsel, + unsigned int hsbdiv, + unsigned int hsbsel) +{ + u_avr32_pm_cksel_t u_avr32_pm_cksel = {0}; + + u_avr32_pm_cksel.CKSEL.cpusel = hsbsel; + u_avr32_pm_cksel.CKSEL.cpudiv = hsbdiv; + u_avr32_pm_cksel.CKSEL.hsbsel = hsbsel; + u_avr32_pm_cksel.CKSEL.hsbdiv = hsbdiv; + u_avr32_pm_cksel.CKSEL.pbasel = pbasel; + u_avr32_pm_cksel.CKSEL.pbadiv = pbadiv; + u_avr32_pm_cksel.CKSEL.pbbsel = pbbsel; + u_avr32_pm_cksel.CKSEL.pbbdiv = pbbdiv; + + pm->cksel = u_avr32_pm_cksel.cksel; + + // Wait for ckrdy bit and then clear it + while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK)); +} + + +void pm_gc_setup(volatile avr32_pm_t *pm, + unsigned int gc, + unsigned int osc_or_pll, // Use Osc (=0) or PLL (=1) + unsigned int pll_osc, // Sel Osc0/PLL0 or Osc1/PLL1 + unsigned int diven, + unsigned int div) +{ + u_avr32_pm_gcctrl_t u_avr32_pm_gcctrl = {0}; + + u_avr32_pm_gcctrl.GCCTRL.oscsel = pll_osc; + u_avr32_pm_gcctrl.GCCTRL.pllsel = osc_or_pll; + u_avr32_pm_gcctrl.GCCTRL.diven = diven; + u_avr32_pm_gcctrl.GCCTRL.div = div; + + pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl; +} + + +void pm_gc_enable(volatile avr32_pm_t *pm, + unsigned int gc) +{ + pm->gcctrl[gc] |= AVR32_PM_GCCTRL_CEN_MASK; +} + + +void pm_gc_disable(volatile avr32_pm_t *pm, + unsigned int gc) +{ + pm->gcctrl[gc] &= ~AVR32_PM_GCCTRL_CEN_MASK; +} + + +void pm_pll_setup(volatile avr32_pm_t *pm, + unsigned int pll, + unsigned int mul, + unsigned int div, + unsigned int osc, + unsigned int lockcount) +{ + u_avr32_pm_pll_t u_avr32_pm_pll = {0}; + + u_avr32_pm_pll.PLL.pllosc = osc; + u_avr32_pm_pll.PLL.plldiv = div; + u_avr32_pm_pll.PLL.pllmul = mul; + u_avr32_pm_pll.PLL.pllcount = lockcount; + + pm->pll[pll] = u_avr32_pm_pll.pll; +} + + +void pm_pll_set_option(volatile avr32_pm_t *pm, + unsigned int pll, + unsigned int pll_freq, + unsigned int pll_div2, + unsigned int pll_wbwdisable) +{ + u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]}; + u_avr32_pm_pll.PLL.pllopt = pll_freq | (pll_div2 << 1) | (pll_wbwdisable << 2); + pm->pll[pll] = u_avr32_pm_pll.pll; +} + + +unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, + unsigned int pll) +{ + return (pm->pll[pll] & AVR32_PM_PLLOPT_MASK) >> AVR32_PM_PLLOPT_OFFSET; +} + + +void pm_pll_enable(volatile avr32_pm_t *pm, + unsigned int pll) +{ + pm->pll[pll] |= AVR32_PM_PLLEN_MASK; +} + + +void pm_pll_disable(volatile avr32_pm_t *pm, + unsigned int pll) +{ + pm->pll[pll] &= ~AVR32_PM_PLLEN_MASK; +} + + +void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK0_MASK)); +} + + +void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK1_MASK)); +} + + +void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock) +{ + // Read + u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl}; + // Modify + u_avr32_pm_mcctrl.MCCTRL.mcsel = clock; + // Write back + pm->mcctrl = u_avr32_pm_mcctrl.mcctrl; +} + + +void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup) +{ + pm_enable_osc0_crystal(pm, fosc0); // Enable the Osc0 in crystal mode + pm_enable_clk0(pm, startup); // Crystal startup time - This parameter is critical and depends on the characteristics of the crystal + pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0); // Then switch main clock to Osc0 +} + + +void pm_bod_enable_irq(volatile avr32_pm_t *pm) +{ + pm->ier = AVR32_PM_IER_BODDET_MASK; +} + + +void pm_bod_disable_irq(volatile avr32_pm_t *pm) +{ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + if (global_interrupt_enabled) Disable_global_interrupt(); + pm->idr = AVR32_PM_IDR_BODDET_MASK; + pm->isr; + if (global_interrupt_enabled) Enable_global_interrupt(); +} + + +void pm_bod_clear_irq(volatile avr32_pm_t *pm) +{ + pm->icr = AVR32_PM_ICR_BODDET_MASK; +} + + +unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm) +{ + return ((pm->isr & AVR32_PM_ISR_BODDET_MASK) != 0); +} + + +unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm) +{ + return ((pm->imr & AVR32_PM_IMR_BODDET_MASK) != 0); +} + + +unsigned long pm_bod_get_level(volatile avr32_pm_t *pm) +{ + return (pm->bod & AVR32_PM_BOD_LEVEL_MASK) >> AVR32_PM_BOD_LEVEL_OFFSET; +} + + +unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp) +{ + return pm->gplp[gplp]; +} + + +void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value) +{ + pm->gplp[gplp] = value; +} + + +long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module) +{ + unsigned long domain = module>>5; + unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain); + + // Implementation-specific shortcut: the ckMASK registers are contiguous and + // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK. + + *regptr |= (1<<(module%32)); + + return PASS; +} + +long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module) +{ + unsigned long domain = module>>5; + unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain); + + // Implementation-specific shortcut: the ckMASK registers are contiguous and + // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK. + + *regptr &= ~(1<<(module%32)); + + return PASS; +} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.h new file mode 100644 index 0000000..ca679f7 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.h @@ -0,0 +1,493 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Power Manager driver. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _PM_H_ +#define _PM_H_ + +#include +#include "compiler.h" +#include "preprocessor.h" + + +/*! \brief Sets the MCU in the specified sleep mode. + * + * \param mode Sleep mode: + * \arg \c AVR32_PM_SMODE_IDLE: Idle; + * \arg \c AVR32_PM_SMODE_FROZEN: Frozen; + * \arg \c AVR32_PM_SMODE_STANDBY: Standby; + * \arg \c AVR32_PM_SMODE_STOP: Stop; + * \arg \c AVR32_PM_SMODE_DEEP_STOP: DeepStop; + * \arg \c AVR32_PM_SMODE_STATIC: Static. + */ +#define SLEEP(mode) {__asm__ __volatile__ ("sleep "STRINGZ(mode));} + + +//! Input and output parameters when initializing PM clocks using pm_configure_clocks(). +typedef struct +{ + //! CPU frequency (input/output argument). + unsigned long cpu_f; + + //! PBA frequency (input/output argument). + unsigned long pba_f; + + //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument). + unsigned long osc0_f; + + //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument). + unsigned long osc0_startup; +} pm_freq_param_t; + +#define PM_FREQ_STATUS_FAIL (-1) +#define PM_FREQ_STATUS_OK (0) + + +/*! \brief Gets the MCU reset cause. + * + * \param pm Base address of the Power Manager instance (i.e. &AVR32_PM). + * + * \return The MCU reset cause which can be masked with the + * \c AVR32_PM_RCAUSE_x_MASK bit-masks to isolate specific causes. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ unsigned int pm_get_reset_cause(volatile avr32_pm_t *pm) +{ + return pm->rcause; +} + + +/*! + * \brief This function will enable the external clock mode of the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc0 Oscillator 0 crystal frequency (Hz) + */ +extern void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0); + + +/*! + * \brief This function will enable the oscillator 0 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk0(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 0 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 0 startup time, for which the function does not wait. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the Osc0 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the external clock mode of the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc1 Oscillator 1 crystal frequency (Hz) + */ +extern void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1); + + +/*! + * \brief This function will enable the oscillator 1 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 1 startup time. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk1(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 1 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 1 startup time, for which the function does not wait. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the Osc1 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the external clock mode of the 32-kHz oscillator. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the 32-kHz oscillator. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc32_crystal(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 32 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 32 kHz startup time. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 32. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk32(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 32 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 32 kHz startup time, for which the function does not wait. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the osc32 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will select all the power manager clocks. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pbadiv Peripheral Bus A clock divisor enable + * \param pbasel Peripheral Bus A select + * \param pbbdiv Peripheral Bus B clock divisor enable + * \param pbbsel Peripheral Bus B select + * \param hsbdiv High Speed Bus clock divisor enable (CPU clock = HSB clock) + * \param hsbsel High Speed Bus select (CPU clock = HSB clock ) + */ +extern void pm_cksel(volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel); + + +/*! + * \brief This function will setup a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + * \param osc_or_pll Use OSC (=0) or PLL (=1) + * \param pll_osc Select Osc0/PLL0 or Osc1/PLL1 + * \param diven Generic clock divisor enable + * \param div Generic clock divisor + */ +extern void pm_gc_setup(volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div); + + +/*! + * \brief This function will enable a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + */ +extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc); + + +/*! + * \brief This function will disable a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + */ +extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc); + + +/*! + * \brief This function will setup a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \param mul PLL MUL in the PLL formula + * \param div PLL DIV in the PLL formula + * \param osc OSC number (0 for osc0, 1 for osc1) + * \param lockcount PLL lockount + */ +extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount); + + +/*! + * \brief This function will set a PLL option. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \param pll_freq Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + * \param pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + * \param pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + */ +extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int pll_freq, unsigned int pll_div2, unsigned int pll_wbwdisable); + + +/*! + * \brief This function will get a PLL option. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \return Option + */ +extern unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will enable a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + */ +extern void pm_pll_enable(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will disable a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + */ +extern void pm_pll_disable(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will wait for PLL0 locked + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will wait for PLL1 locked + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will switch the power manager main clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param clock Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0. + */ +extern void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock); + + +/*! + * \brief Switch main clock to clock Osc0 (crystal mode) + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc0 Oscillator 0 crystal frequency (Hz) + * \param startup Crystal 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. + */ +extern void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup); + + +/*! \brief Enables the Brown-Out Detector interrupt. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + */ +extern void pm_bod_enable_irq(volatile avr32_pm_t *pm); + + +/*! \brief Disables the Brown-Out Detector interrupt. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + */ +extern void pm_bod_disable_irq(volatile avr32_pm_t *pm); + + +/*! \brief Clears the Brown-Out Detector interrupt flag. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + */ +extern void pm_bod_clear_irq(volatile avr32_pm_t *pm); + + +/*! \brief Gets the Brown-Out Detector interrupt flag. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * + * \retval 0 No BOD interrupt. + * \retval 1 BOD interrupt pending. + */ +extern unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm); + + +/*! \brief Gets the Brown-Out Detector interrupt enable status. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * + * \retval 0 BOD interrupt disabled. + * \retval 1 BOD interrupt enabled. + */ +extern unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm); + + +/*! \brief Gets the triggering threshold of the Brown-Out Detector. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * + * \return Triggering threshold of the BOD. See the electrical characteristics + * in the part datasheet for actual voltage levels. + */ +extern unsigned long pm_bod_get_level(volatile avr32_pm_t *pm); + + +/*! + * \brief Read the content of the PM GPLP registers + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * + * \return The content of the chosen GPLP register. + */ +extern unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp); + + +/*! + * \brief Write into the PM GPLP registers + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * \param value Value to write + */ +extern void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value); + + +/*! \brief Enable the clock of a module. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param module The module to clock (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks") + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module); + +/*! \brief Disable the clock of a module. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param module The module to shut down (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks") + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module); + + + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks + * according to the user wishes. + * + * This function needs some parameters stored in a pm_freq_param_t structure: + * - cpu_f and pba_f are the wanted frequencies, + * - osc0_f is the oscillator 0 on-board frequency (e.g. FOSC0), + * - osc0_startup is the oscillator 0 startup time (e.g. OSC0_STARTUP). + * + * The function will then configure the clocks using the following rules: + * - It first try to find a valid PLL frequency (the highest possible value to avoid jitter) in order + * to satisfy the CPU frequency, + * - It optimizes the configuration depending the various divide stages, + * - Then, the PBA frequency is configured from the CPU freq. + * - Note that HSB and PBB are configured with the same frequency as CPU. + * - Note also that the number of wait states of the flash read accesses is automatically set-up depending + * the CPU frequency. As a consequence, the application needs the FLASHC driver to compile. + * + * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f. + * + * \param param pointer on the configuration structure. + * + * \retval PM_FREQ_STATUS_OK Mode successfully initialized. + * \retval PM_FREQ_STATUS_FAIL The configuration can not be done. + */ +extern int pm_configure_clocks(pm_freq_param_t *param); + + +/*! \brief Automatically configure the USB clock. + * + * USB clock is configured to 48MHz, using the PLL1 from the Oscillator0, assuming + * a 12 MHz crystal is connected to it. + */ +extern void pm_configure_usb_clock(void); + + +#endif // _PM_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm_conf_clocks.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm_conf_clocks.c new file mode 100644 index 0000000..8beb83b --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm_conf_clocks.c @@ -0,0 +1,268 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Power Manager clocks configuration helper. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "compiler.h" +#include "pm.h" + +extern void flashc_set_wait_state(unsigned int wait_state); +#if (defined AVR32_FLASHC_210_H_INCLUDED) +extern void flashc_issue_command(unsigned int command, int page_number); +#endif + + +#define PM_MAX_MUL ((1 << AVR32_PM_PLL0_PLLMUL_SIZE) - 1) + + +int pm_configure_clocks(pm_freq_param_t *param) +{ + // Supported frequencies: + // Fosc0 mul div PLL div2_en cpu_f pba_f Comment + // 12 15 1 192 1 12 12 + // 12 9 3 40 1 20 20 PLL out of spec + // 12 15 1 192 1 24 12 + // 12 9 1 120 1 30 15 + // 12 9 3 40 0 40 20 PLL out of spec + // 12 15 1 192 1 48 12 + // 12 15 1 192 1 48 24 + // 12 8 1 108 1 54 27 + // 12 9 1 120 1 60 15 + // 12 9 1 120 1 60 30 + // 12 10 1 132 1 66 16.5 + // + unsigned long in_cpu_f = param->cpu_f; + unsigned long in_osc0_f = param->osc0_f; + unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0; + unsigned long pll_freq, rest; + Bool b_div2_pba, b_div2_cpu; + + // Switch to external Oscillator 0 + pm_switch_to_osc0(&AVR32_PM, in_osc0_f, param->osc0_startup); + + // Start with CPU freq config + if (in_cpu_f == in_osc0_f) + { + param->cpu_f = in_osc0_f; + param->pba_f = in_osc0_f; + return PM_FREQ_STATUS_OK; + } + else if (in_cpu_f < in_osc0_f) + { + // TBD + } + + rest = in_cpu_f % in_osc0_f; + + for (div = 1; div < 32; div++) + { + if ((div * rest) % in_osc0_f == 0) + break; + } + if (div == 32) + return PM_FREQ_STATUS_FAIL; + + mul = (in_cpu_f * div) / in_osc0_f; + + if (mul > PM_MAX_MUL) + return PM_FREQ_STATUS_FAIL; + + // export 2power from PLL div to div2_cpu + while (!(div % 2)) + { + div /= 2; + div2_cpu++; + } + + // Here we know the mul and div parameter of the PLL config. + // . Check out if the PLL has a valid in_cpu_f. + // . Try to have for the PLL frequency (VCO output) the highest possible value + // to reduce jitter. + while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ) + { + if (2 * mul > PM_MAX_MUL) + break; + mul *= 2; + div2_cpu++; + } + + if (div2_cpu != 0) + { + div2_cpu--; + div2_en = 1; + } + + pll_freq = in_osc0_f * mul / (div * (1 << div2_en)); + + // Update real CPU Frequency + param->cpu_f = pll_freq / (1 << div2_cpu); + mul--; + + pm_pll_setup(&AVR32_PM + , 0 // pll + , mul // mul + , div // div + , 0 // osc + , 16 // lockcount + ); + + pm_pll_set_option(&AVR32_PM + , 0 // pll + // PLL clock is lower than 160MHz: need to set pllopt. + , (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0 // pll_freq + , div2_en // pll_div2 + , 0 // pll_wbwdisable + ); + + rest = pll_freq; + while (rest > AVR32_PM_PBA_MAX_FREQ || + rest != param->pba_f) + { + div2_pba++; + rest = pll_freq / (1 << div2_pba); + if (rest < param->pba_f) + break; + } + + // Update real PBA Frequency + param->pba_f = pll_freq / (1 << div2_pba); + + // Enable PLL0 + pm_pll_enable(&AVR32_PM, 0); + + // Wait for PLL0 locked + pm_wait_for_pll0_locked(&AVR32_PM); + + if (div2_cpu) + { + b_div2_cpu = TRUE; + div2_cpu--; + } + else + b_div2_cpu = FALSE; + + if (div2_pba) + { + b_div2_pba = TRUE; + div2_pba--; + } + else + b_div2_pba = FALSE; + + pm_cksel(&AVR32_PM + , b_div2_pba, div2_pba // PBA + , b_div2_cpu, div2_cpu // PBB + , b_div2_cpu, div2_cpu // HSB + ); + + if (param->cpu_f > AVR32_FLASHC_FWS_0_MAX_FREQ) + { + flashc_set_wait_state(1); +#if (defined AVR32_FLASHC_210_H_INCLUDED) + if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ) + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1); + else + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); +#endif + } + else + { + flashc_set_wait_state(0); +#if (defined AVR32_FLASHC_210_H_INCLUDED) + if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ) + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1); + else + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); +#endif + } + + pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0); + + return PM_FREQ_STATUS_OK; +} + + +void pm_configure_usb_clock(void) +{ +#if UC3A3 + + // Setup USB GCLK. + pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc + 0, // osc_or_pll: use Osc (if 0) or PLL (if 1) + 0, // pll_osc: select Osc0/PLL0 or Osc1/PLL1 + 0, // diven + 0); // div + + // Enable USB GCLK. + pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB); +#else + // Use 12MHz from OSC0 and generate 96 MHz + pm_pll_setup(&AVR32_PM, 1, // pll. + 7, // mul. + 1, // div. + 0, // osc. + 16); // lockcount. + + pm_pll_set_option(&AVR32_PM, 1, // pll. + 1, // pll_freq: choose the range 80-180MHz. + 1, // pll_div2. + 0); // pll_wbwdisable. + + // start PLL1 and wait forl lock + pm_pll_enable(&AVR32_PM, 1); + + // Wait for PLL1 locked. + pm_wait_for_pll1_locked(&AVR32_PM); + + pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc. + 1, // osc_or_pll: use Osc (if 0) or PLL (if 1). + 1, // pll_osc: select Osc0/PLL0 or Osc1/PLL1. + 0, // diven. + 0); // div. + pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB); +#endif +} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.c new file mode 100644 index 0000000..f5fc155 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.c @@ -0,0 +1,566 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief High-level library abstracting features such as oscillators/pll/dfll + * configuration, clock configuration, System-sensible parameters + * configuration, buses clocks configuration, sleep mode, reset. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +#include "power_clocks_lib.h" + + +//! Device-specific data +#if UC3L +static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param); // FORWARD declaration +#endif + +#if UC3C +static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param); // FORWARD declaration +#endif + +long int pcl_configure_clocks(pcl_freq_param_t *param) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE + // Implementation for UC3A, UC3A3, UC3B parts. + return(pm_configure_clocks(param)); +#else + #ifdef AVR32_PM_410_H_INCLUDED + // Implementation for UC3C parts. + return(pcl_configure_clocks_uc3c(param)); + #else + // Implementation for UC3L parts. + return(pcl_configure_clocks_uc3l(param)); + #endif +#endif +} + + +//! Device-specific implementation +#if UC3L +// FORWARD declaration +static long int pcl_configure_synchronous_clocks( pm_clk_src_t main_clk_src, + unsigned long main_clock_freq_hz, + pcl_freq_param_t *param); + +long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_RCSYS + + // Supported synchronous clocks frequencies if RCSYS is the main clock source: + // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target frequencies are reachable. + if((param->cpu_f > SCIF_SLOWCLOCK_FREQ_HZ) || (param->pba_f > SCIF_SLOWCLOCK_FREQ_HZ) + || (param->pbb_f > SCIF_SLOWCLOCK_FREQ_HZ)) + return(-1); +#endif + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_SLOW, SCIF_SLOWCLOCK_FREQ_HZ, param)); +} + + +long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_RC120M + + // Supported synchronous clocks frequencies if RC120M is the main clock source: + // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target frequencies are reachable. + if((param->cpu_f > SCIF_RC120M_FREQ_HZ) || (param->pba_f > SCIF_RC120M_FREQ_HZ) + || (param->pbb_f > SCIF_RC120M_FREQ_HZ)) + return(-1); +#endif + + // Start the 120MHz internal RCosc (RC120M) clock + scif_start_rc120M(); + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_RC120M, SCIF_RC120M_FREQ_HZ, param)); +} + + +long int pcl_configure_clocks_osc0(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_OSC0 + + // Supported synchronous clocks frequencies if OSC0 is the main clock source: + // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) + // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + + unsigned long main_clock_freq; + + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + + main_clock_freq = param->osc0_f; +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target frequencies are reachable. + if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq) + || (param->pbb_f > main_clock_freq)) + return(-1); +#endif + // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, main_clock_freq); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, param->osc0_startup, true); + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_OSC0, main_clock_freq, param)); +} + + +long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_DFLL + + // Supported synchronous clocks frequencies if DFLL is the main clock source: + // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) + // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + + unsigned long main_clock_freq; + scif_gclk_opt_t *pgc_dfllif_ref_opt; + + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + + main_clock_freq = param->dfll_f; +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target DFLL output frequency is in the correct range. + if((main_clock_freq > SCIF_DFLL_MAXFREQ_HZ) || (main_clock_freq < SCIF_DFLL_MINFREQ_HZ)) + return(-1); + // Verify that the target frequencies are reachable. + if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq) + || (param->pbb_f > main_clock_freq)) + return(-1); +#endif + pgc_dfllif_ref_opt = (scif_gclk_opt_t *)param->pextra_params; + // Implementation note: this implementation configures the DFLL in closed-loop + // mode (because it gives the best accuracy) which enables the generic clock CLK_DFLLIF_REF + // as a reference (RCSYS being used as the generic clock source, undivided). + scif_dfll0_closedloop_configure_and_start(pgc_dfllif_ref_opt, main_clock_freq, TRUE); + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_DFLL0, main_clock_freq, param)); +} + + +static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_RCSYS, PCL_MC_OSC0, PCL_MC_DFLL0, PCL_MC_RC120M + + // Supported synchronous clocks frequencies if RCSYS is the main clock source: + // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz. + + // Supported synchronous clocks frequencies if RC120M is the main clock source: + // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz. + + // Supported synchronous clocks frequencies if OSC0 is the main clock source: + // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) + // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz. + + // Supported synchronous clocks frequencies if DFLL is the main clock source: + // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) + // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + + if(PCL_MC_RCSYS == param->main_clk_src) + { + return(pcl_configure_clocks_rcsys(param)); + } + else if(PCL_MC_RC120M == param->main_clk_src) + { + return(pcl_configure_clocks_rc120m(param)); + } + else if(PCL_MC_OSC0 == param->main_clk_src) + { + return(pcl_configure_clocks_osc0(param)); + } + else // PCL_MC_DFLL0 == param->main_clk_src + { + return(pcl_configure_clocks_dfll0(param)); + } +} + +static long int pcl_configure_synchronous_clocks(pm_clk_src_t main_clk_src, unsigned long main_clock_freq_hz, pcl_freq_param_t *param) +{ + //# + //# Set the Synchronous clock division ratio for each clock domain + //# + pm_set_all_cksel(main_clock_freq_hz, param->cpu_f, param->pba_f, param->pbb_f); + + //# + //# Set the Flash wait state and the speed read mode (depending on the target CPU frequency). + //# +#if UC3L + flashcdw_set_flash_waitstate_and_readmode(param->cpu_f); +#elif UC3C + flashc_set_flash_waitstate_and_readmode(param->cpu_f); +#endif + + + //# + //# Switch the main clock source to the selected clock. + //# + pm_set_mclk_source(main_clk_src); + + return PASS; +} + +#endif // UC3L device-specific implementation + +//! UC3C Device-specific implementation +#if UC3C +static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param) +{ + #define PM_MAX_MUL ((1 << AVR32_SCIF_PLLMUL_SIZE) - 1) + #define AVR32_PM_PBA_MAX_FREQ 66000000 + #define AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ 240000000 + #define AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ 160000000 + + // Implementation for UC3C parts. + // Supported frequencies: + // Fosc0 mul div PLL div2_en cpu_f pba_f Comment + // 12 15 1 192 1 12 12 + // 12 9 3 40 1 20 20 PLL out of spec + // 12 15 1 192 1 24 12 + // 12 9 1 120 1 30 15 + // 12 9 3 40 0 40 20 PLL out of spec + // 12 15 1 192 1 48 12 + // 12 15 1 192 1 48 24 + // 12 8 1 108 1 54 27 + // 12 9 1 120 1 60 15 + // 12 9 1 120 1 60 30 + // 12 10 1 132 1 66 16.5 + // + unsigned long in_cpu_f = param->cpu_f; + unsigned long in_osc0_f = param->osc0_f; + unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0; + unsigned long pll_freq, rest; + Bool b_div2_pba, b_div2_cpu; + + // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, in_osc0_f); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, param->osc0_startup, true); + // Set the main clock source as being OSC0. + pm_set_mclk_source(PM_CLK_SRC_OSC0); + + // Start with CPU freq config + if (in_cpu_f == in_osc0_f) + { + param->cpu_f = in_osc0_f; + param->pba_f = in_osc0_f; + return PASS; + } + else if (in_cpu_f < in_osc0_f) + { + // TBD + } + + rest = in_cpu_f % in_osc0_f; + + for (div = 1; div < 32; div++) + { + if ((div * rest) % in_osc0_f == 0) + break; + } + if (div == 32) + return FAIL; + + mul = (in_cpu_f * div) / in_osc0_f; + + if (mul > PM_MAX_MUL) + return FAIL; + + // export 2power from PLL div to div2_cpu + while (!(div % 2)) + { + div /= 2; + div2_cpu++; + } + + // Here we know the mul and div parameter of the PLL config. + // . Check out if the PLL has a valid in_cpu_f. + // . Try to have for the PLL frequency (VCO output) the highest possible value + // to reduce jitter. + while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ) + { + if (2 * mul > PM_MAX_MUL) + break; + mul *= 2; + div2_cpu++; + } + + if (div2_cpu != 0) + { + div2_cpu--; + div2_en = 1; + } + + pll_freq = in_osc0_f * mul / (div * (1 << div2_en)); + + // Update real CPU Frequency + param->cpu_f = pll_freq / (1 << div2_cpu); + mul--; + + scif_pll_opt_t opt; + + opt.osc = SCIF_OSC0, // Sel Osc0 or Osc1 + opt.lockcount = 16, // lockcount in main clock for the PLL wait lock + opt.div = div, // DIV=1 in the formula + opt.mul = mul, // MUL=7 in the formula + opt.pll_div2 = div2_en, // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + opt.pll_wbwdisable = 0, //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + opt.pll_freq = (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0, // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + + + scif_pll_setup(SCIF_PLL0, opt); // lockcount in main clock for the PLL wait lock + + /* Enable PLL0 */ + scif_pll_enable(SCIF_PLL0); + + /* Wait for PLL0 locked */ + scif_wait_for_pll_locked(SCIF_PLL0) ; + + rest = pll_freq; + while (rest > AVR32_PM_PBA_MAX_FREQ || + rest != param->pba_f) + { + div2_pba++; + rest = pll_freq / (1 << div2_pba); + if (rest < param->pba_f) + break; + } + + // Update real PBA Frequency + param->pba_f = pll_freq / (1 << div2_pba); + + + if (div2_cpu) + { + b_div2_cpu = TRUE; + div2_cpu--; + } + else + b_div2_cpu = FALSE; + + if (div2_pba) + { + b_div2_pba = TRUE; + div2_pba--; + } + else + b_div2_pba = FALSE; + + if (b_div2_cpu == TRUE ) + { + pm_set_clk_domain_div(PM_CLK_DOMAIN_0, (pm_divratio_t) div2_cpu); // CPU + pm_set_clk_domain_div(PM_CLK_DOMAIN_1, (pm_divratio_t) div2_cpu); // HSB + pm_set_clk_domain_div(PM_CLK_DOMAIN_3, (pm_divratio_t) div2_cpu); // PBB + } + if (b_div2_pba == TRUE ) + { + pm_set_clk_domain_div(PM_CLK_DOMAIN_2, (pm_divratio_t) div2_pba); // PBA + pm_set_clk_domain_div(PM_CLK_DOMAIN_4, (pm_divratio_t) div2_pba); // PBC + } + + // Set Flashc Wait State + flashc_set_flash_waitstate_and_readmode(param->cpu_f); + + // Set the main clock source as being PLL0. + pm_set_mclk_source(PM_CLK_SRC_PLL0); + + return PASS; +} +#endif // UC3C device-specific implementation + +long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + if(PCL_OSC0 == osc) + { + // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency, + // enable the OSC0, set the main clock source as being OSC0. + pm_switch_to_osc0(&AVR32_PM, fcrystal, startup); + } + else + { + return PCL_NOT_SUPPORTED; + } +#else +// Implementation for UC3C, UC3L parts. + #if AVR32_PM_VERSION_RESETVALUE < 0x400 + return PCL_NOT_SUPPORTED; + #else + if(PCL_OSC0 == osc) + { + // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, fcrystal); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, startup, true); + // Set the Flash wait state and the speed read mode (depending on the target CPU frequency). +#if UC3L + flashcdw_set_flash_waitstate_and_readmode(fcrystal); +#elif UC3C + flashc_set_flash_waitstate_and_readmode(fcrystal); +#endif + // Set the main clock source as being OSC0. + pm_set_mclk_source(PM_CLK_SRC_OSC0); + } + else + { + return PCL_NOT_SUPPORTED; + } + #endif +#endif + return PASS; +} + +long int pcl_configure_usb_clock(void) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + pm_configure_usb_clock(); + return PASS; +#else + #ifdef AVR32_PM_410_H_INCLUDED + const scif_pll_opt_t opt = { + .osc = SCIF_OSC0, // Sel Osc0 or Osc1 + .lockcount = 16, // lockcount in main clock for the PLL wait lock + .div = 1, // DIV=1 in the formula + .mul = 5, // MUL=7 in the formula + .pll_div2 = 1, // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + .pll_wbwdisable = 0, //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + .pll_freq = 1, // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + }; + + /* Setup PLL1 on Osc0, mul=7 ,no divisor, lockcount=16, ie. 16Mhzx6 = 96MHz output */ + scif_pll_setup(SCIF_PLL1, opt); // lockcount in main clock for the PLL wait lock + + /* Enable PLL1 */ + scif_pll_enable(SCIF_PLL1); + + /* Wait for PLL1 locked */ + scif_wait_for_pll_locked(SCIF_PLL1) ; + + // Implementation for UC3C parts. + // Setup the generic clock for USB + scif_gc_setup(AVR32_SCIF_GCLK_USB, + SCIF_GCCTRL_PLL1, + AVR32_SCIF_GC_NO_DIV_CLOCK, + 0); + // Now enable the generic clock + scif_gc_enable(AVR32_SCIF_GCLK_USB); + return PASS; + #else + return PCL_NOT_SUPPORTED; + #endif +#endif +} + + +#if UC3L +#else +void pcl_write_gplp(unsigned long gplp, unsigned long value) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + pm_write_gplp(&AVR32_PM,gplp,value); +#else + scif_write_gplp(gplp,value); +#endif +} + +unsigned long pcl_read_gplp(unsigned long gplp) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + return pm_read_gplp(&AVR32_PM,gplp); +#else + return scif_read_gplp(gplp); +#endif +} +#endif diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.h new file mode 100644 index 0000000..28c5888 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.h @@ -0,0 +1,379 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief High-level library abstracting features such as oscillators/pll/dfll + * configuration, clock configuration, System-sensible parameters + * configuration, buses clocks configuration, sleep mode, reset. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _POWER_CLOCKS_LIB_H_ +#define _POWER_CLOCKS_LIB_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include "compiler.h" + +#ifndef AVR32_PM_VERSION_RESETVALUE +// Support for UC3A, UC3A3, UC3B parts. + #include "pm.h" +#else +//! Device-specific data +#if UC3L + #include "pm_uc3l.h" + #include "scif_uc3l.h" + #include "flashcdw.h" +#elif UC3C + #include "pm_uc3c.h" + #include "scif_uc3c.h" + #include "flashc.h" +#endif +#endif + +/*! \name Clocks Management + */ +//! @{ + +//! The different oscillators +typedef enum +{ + PCL_OSC0 = 0, + PCL_OSC1 = 1 +} pcl_osc_t; + +//! The different DFLLs +typedef enum +{ + PCL_DFLL0 = 0, + PCL_DFLL1 = 1 +} pcl_dfll_t; + +//! Possible Main Clock Sources +typedef enum +{ + PCL_MC_RCSYS, // Default main clock source, supported by all (aka Slow Clock) + PCL_MC_OSC0, // Supported by all + PCL_MC_OSC1, // Supported by UC3C only + PCL_MC_OSC0_PLL0, // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC0 as reference) + PCL_MC_OSC1_PLL0, // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC1 as reference) + PCL_MC_OSC0_PLL1, // Supported by UC3C (the main clock source is PLL1 with OSC0 as reference) + PCL_MC_OSC1_PLL1, // Supported by UC3C (the main clock source is PLL1 with OSC1 as reference) + PCL_MC_DFLL0, // Supported by UC3L + PCL_MC_DFLL1, // Not supported yet + PCL_MC_RC120M, // Supported by UC3L, UC3C + PCL_MC_RC8M, // Supported by UC3C + PCL_MC_CRIPOSC // Supported by UC3C +} pcl_mainclk_t; + +//! Input and output parameters to configure clocks with pcl_configure_clocks(). +// NOTE: regarding the frequency settings, always abide by the datasheet rules and min & max supported frequencies. +#ifndef AVR32_PM_VERSION_RESETVALUE +// Support for UC3A, UC3A3, UC3B parts. +#define pcl_freq_param_t pm_freq_param_t // See pm.h +#else +// Support for UC3C, UC3L parts. +typedef struct +{ + //! Main clock source selection (input argument). + pcl_mainclk_t main_clk_src; + + //! Target CPU frequency (input/output argument). + unsigned long cpu_f; + + //! Target PBA frequency (input/output argument). + unsigned long pba_f; + + //! Target PBB frequency (input/output argument). + unsigned long pbb_f; + + //! Target PBC frequency (input/output argument). + unsigned long pbc_f; + + //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument). + unsigned long osc0_f; + + //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument). + unsigned long osc0_startup; + + //! DFLL target frequency (input/output argument) (NOTE: the bigger, the most stable the frequency) + unsigned long dfll_f; + + //! Other parameters that might be necessary depending on the device (implementation-dependent). + // For the UC3L DFLL setup, this parameter should be pointing to a structure of + // type (scif_gclk_opt_t *). + void *pextra_params; +} pcl_freq_param_t; +#endif + +//! Define "not supported" for the lib. +#define PCL_NOT_SUPPORTED (-10000) + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - main_clk_src is the id of the main clock source to use, + * - cpu_f and pba_f and pbb_f are the wanted frequencies, + * - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0), + * - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP). + * - dfll_f is the target DFLL frequency to set-up if main_clk_src is the dfll. + * + * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks() and modify it to use + * preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RCSYS osc as main source clock. + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies + * + * Supported main clock sources: PCL_MC_RCSYS + * + * Supported synchronous clocks frequencies: + * 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_rcsys() and modify it to use + * preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RC120M osc as main source clock. + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies + * + * Supported main clock sources: PCL_MC_RC120M + * + * Supported synchronous clocks frequencies: + * 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_rc120m() and modify it to + * use preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the OSC0 osc as main source clock + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies, + * - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0), + * - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP). + * + * Supported main clock sources: PCL_MC_OSC0 + * + * Supported synchronous clocks frequencies: + * (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) + * 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_osc0() and modify it to use + * preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_osc0(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the DFLL0 as main source clock + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies, + * - dfll_f is the target DFLL frequency to set-up + * + * \note: when the DFLL0 is to be used as main source clock for the synchronous clocks, + * the target frequency of the DFLL should be chosen to be as high as possible + * within the specification range (for stability reasons); the target cpu and pbx + * frequencies will then be reached by appropriate division ratio. + * + * Supported main clock sources: PCL_MC_DFLL0 + * + * Supported synchronous clocks frequencies: + * (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) + * 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_dfll0() and modify it to + * use preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param); + +/*! \brief Switch the main clock source to Osc0 configured in crystal mode + * + * \param osc The oscillator to enable and switch to. + * \param fcrystal Oscillator external crystal frequency (Hz) + * \param startup Oscillator startup time. + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup); + +/*! \brief Enable the clock of a module. + * + * \param module The module to clock (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks" + * or look in the module section). + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. +#define pcl_enable_module(module) pm_enable_module(&AVR32_PM, module) +#else +// Implementation for UC3C, UC3L parts. +#define pcl_enable_module(module) pm_enable_module(module) +#endif + +/*! \brief Disable the clock of a module. + * + * \param module The module to shut down (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks" + * or look in the module section). + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. +#define pcl_disable_module(module) pm_disable_module(&AVR32_PM, module) +#else +// Implementation for UC3C, UC3L parts. +#define pcl_disable_module(module) pm_disable_module(module) +#endif + +/*! \brief Configure the USB Clock + * + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long int pcl_configure_usb_clock(void); + +//! @} + +/*! \name Power Management + */ +//! @{ +/*! + * \brief Read the content of the GPLP registers + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * + * \return The content of the chosen GPLP register. + */ +extern unsigned long pcl_read_gplp(unsigned long gplp); + + +/*! + * \brief Write into the GPLP registers + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * \param value Value to write + */ +extern void pcl_write_gplp(unsigned long gplp, unsigned long value); + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif // _POWER_CLOCKS_LIB_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.c new file mode 100644 index 0000000..cadb8b1 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.c @@ -0,0 +1,443 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief SPI driver for AVR32 UC3. + * + * This file defines a useful set of functions for the SPI interface on AVR32 + * devices. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "spi.h" + +#ifdef FREERTOS_USED + +#include "FreeRTOS.h" +#include "semphr.h" + +#endif + + +/*! \name SPI Writable Bit-Field Registers + */ +//! @{ + +typedef union +{ + unsigned long cr; + avr32_spi_cr_t CR; +} u_avr32_spi_cr_t; + +typedef union +{ + unsigned long mr; + avr32_spi_mr_t MR; +} u_avr32_spi_mr_t; + +typedef union +{ + unsigned long tdr; + avr32_spi_tdr_t TDR; +} u_avr32_spi_tdr_t; + +typedef union +{ + unsigned long ier; + avr32_spi_ier_t IER; +} u_avr32_spi_ier_t; + +typedef union +{ + unsigned long idr; + avr32_spi_idr_t IDR; +} u_avr32_spi_idr_t; + +typedef union +{ + unsigned long csr; + avr32_spi_csr0_t CSR; +} u_avr32_spi_csr_t; + +//! @} + + +#ifdef FREERTOS_USED + +//! The SPI mutex. +static xSemaphoreHandle xSPIMutex; + +#endif + + +/*! \brief Calculates the baudrate divider. + * + * \param options Pointer to a structure containing initialization options for + * an SPI channel. + * \param pba_hz SPI module input clock frequency (PBA clock, Hz). + * + * \return Divider or error code. + * \retval >=0 Success. + * \retval <0 Error. + */ +static int getBaudDiv(const spi_options_t *options, unsigned int pba_hz) +{ + int baudDiv = (pba_hz + options->baudrate / 2) / options->baudrate; + + if (baudDiv <= 0 || baudDiv > 255) { + return -1; + } + + return baudDiv; +} + + +void spi_reset(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SWRST_MASK; +} + + +spi_status_t spi_initSlave(volatile avr32_spi_t *spi, + unsigned char bits, + unsigned char spi_mode) +{ + if (spi_mode > 3 || + bits < 8 || bits > 16) { + return SPI_ERROR_ARGUMENT; + } + + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; + + // Will use CSR0 offsets; these are the same for CSR0 to CSR3. + spi->csr0 = ((spi_mode >> 1) << AVR32_SPI_CSR0_CPOL_OFFSET) | + (((spi_mode & 0x1) ^ 0x1) << AVR32_SPI_CSR0_NCPHA_OFFSET) | + ((bits - 8) << AVR32_SPI_CSR0_BITS_OFFSET); + + return SPI_OK; +} + + +spi_status_t spi_initTest(volatile avr32_spi_t *spi) +{ + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; + spi->mr |= AVR32_SPI_MR_MSTR_MASK | // Master Mode. + AVR32_SPI_MR_LLB_MASK; // Local Loopback. + + return SPI_OK; +} + + +spi_status_t spi_initMaster(volatile avr32_spi_t *spi, const spi_options_t *options) +{ + u_avr32_spi_mr_t u_avr32_spi_mr; + + if (options->modfdis > 1) { + return SPI_ERROR_ARGUMENT; + } + + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; + + // Master Mode. + u_avr32_spi_mr.mr = spi->mr; + u_avr32_spi_mr.MR.mstr = 1; + u_avr32_spi_mr.MR.modfdis = options->modfdis; + u_avr32_spi_mr.MR.llb = 0; + u_avr32_spi_mr.MR.pcs = (1 << AVR32_SPI_MR_PCS_SIZE) - 1; + spi->mr = u_avr32_spi_mr.mr; + + return SPI_OK; +} + + +spi_status_t spi_selectionMode(volatile avr32_spi_t *spi, + unsigned char variable_ps, + unsigned char pcs_decode, + unsigned char delay) +{ + u_avr32_spi_mr_t u_avr32_spi_mr; + + if (variable_ps > 1 || + pcs_decode > 1) { + return SPI_ERROR_ARGUMENT; + } + + u_avr32_spi_mr.mr = spi->mr; + u_avr32_spi_mr.MR.ps = variable_ps; + u_avr32_spi_mr.MR.pcsdec = pcs_decode; + u_avr32_spi_mr.MR.dlybcs = delay; + spi->mr = u_avr32_spi_mr.mr; + + return SPI_OK; +} + + +spi_status_t spi_selectChip(volatile avr32_spi_t *spi, unsigned char chip) +{ +#ifdef FREERTOS_USED + while (pdFALSE == xSemaphoreTake(xSPIMutex, 20)); +#endif + + // Assert all lines; no peripheral is selected. + spi->mr |= AVR32_SPI_MR_PCS_MASK; + + if (spi->mr & AVR32_SPI_MR_PCSDEC_MASK) { + // The signal is decoded; allow up to 15 chips. + if (chip > 14) { + return SPI_ERROR_ARGUMENT; + } + + spi->mr &= ~AVR32_SPI_MR_PCS_MASK | (chip << AVR32_SPI_MR_PCS_OFFSET); + } else { + if (chip > 3) { + return SPI_ERROR_ARGUMENT; + } + + spi->mr &= ~(1 << (AVR32_SPI_MR_PCS_OFFSET + chip)); + } + + return SPI_OK; +} + + +spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip) +{ + unsigned int timeout = SPI_TIMEOUT; + + while (!(spi->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + // Assert all lines; no peripheral is selected. + spi->mr |= AVR32_SPI_MR_PCS_MASK; + + // Last transfer, so deassert the current NPCS if CSAAT is set. + spi->cr = AVR32_SPI_CR_LASTXFER_MASK; + +#ifdef FREERTOS_USED + xSemaphoreGive(xSPIMutex); +#endif + + return SPI_OK; +} + + +spi_status_t spi_setupChipReg(volatile avr32_spi_t *spi, + const spi_options_t *options, + unsigned int pba_hz) +{ + u_avr32_spi_csr_t u_avr32_spi_csr; + + if (options->spi_mode > 3 || + options->stay_act > 1 || + options->bits < 8 || options->bits > 16) { + return SPI_ERROR_ARGUMENT; + } + + int baudDiv = getBaudDiv(options, pba_hz); + + if (baudDiv < 0) { + return SPI_ERROR_ARGUMENT; + } + + // Will use CSR0 offsets; these are the same for CSR0 to CSR3. + u_avr32_spi_csr.csr = 0; + u_avr32_spi_csr.CSR.cpol = options->spi_mode >> 1; + u_avr32_spi_csr.CSR.ncpha = (options->spi_mode & 0x1) ^ 0x1; + u_avr32_spi_csr.CSR.csaat = options->stay_act; + u_avr32_spi_csr.CSR.bits = options->bits - 8; + u_avr32_spi_csr.CSR.scbr = baudDiv; + u_avr32_spi_csr.CSR.dlybs = options->spck_delay; + u_avr32_spi_csr.CSR.dlybct = options->trans_delay; + + switch(options->reg) { + case 0: + spi->csr0 = u_avr32_spi_csr.csr; + break; + case 1: + spi->csr1 = u_avr32_spi_csr.csr; + break; + case 2: + spi->csr2 = u_avr32_spi_csr.csr; + break; + case 3: + spi->csr3 = u_avr32_spi_csr.csr; + break; + default: + return SPI_ERROR_ARGUMENT; + } + +#ifdef FREERTOS_USED + if (!xSPIMutex) + { + // Create the SPI mutex. + vSemaphoreCreateBinary(xSPIMutex); + if (!xSPIMutex) + { + while(1); + } + } +#endif + + return SPI_OK; +} + + +void spi_enable(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SPIEN_MASK; +} + + +void spi_disable(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SPIDIS_MASK; +} + + +int spi_is_enabled(volatile avr32_spi_t *spi) +{ + return (spi->sr & AVR32_SPI_SR_SPIENS_MASK) != 0; +} + + +unsigned char spi_writeRegisterEmptyCheck(volatile avr32_spi_t *spi) +{ + return ((spi->sr & AVR32_SPI_SR_TDRE_MASK) != 0); +} + + +spi_status_t spi_write(volatile avr32_spi_t *spi, unsigned short data) +{ + unsigned int timeout = SPI_TIMEOUT; + + while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + spi->tdr = data << AVR32_SPI_TDR_TD_OFFSET; + + return SPI_OK; +} + + +spi_status_t spi_variableSlaveWrite(volatile avr32_spi_t *spi, unsigned short data, + unsigned char pcs, unsigned char lastxfer) +{ + unsigned int timeout = SPI_TIMEOUT; + + if (pcs > 14 || lastxfer > 1) { + return SPI_ERROR_ARGUMENT; + } + + while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + spi->tdr = (data << AVR32_SPI_TDR_TD_OFFSET) | + (pcs << AVR32_SPI_TDR_PCS_OFFSET) | + (lastxfer << AVR32_SPI_TDR_LASTXFER_OFFSET); + + return SPI_OK; +} + + +unsigned char spi_writeEndCheck(volatile avr32_spi_t *spi) +{ + return ((spi->sr & AVR32_SPI_SR_TXEMPTY_MASK) != 0); +} + + +unsigned char spi_readRegisterFullCheck(volatile avr32_spi_t *spi) +{ + return ((spi->sr & AVR32_SPI_SR_RDRF_MASK) != 0); +} + + +spi_status_t spi_read(volatile avr32_spi_t *spi, unsigned short *data) +{ + unsigned int timeout = SPI_TIMEOUT; + + while ((spi->sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) != + (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + *data = spi->rdr >> AVR32_SPI_RDR_RD_OFFSET; + + return SPI_OK; +} + + +unsigned char spi_getStatus(volatile avr32_spi_t *spi) +{ + spi_status_t ret = SPI_OK; + unsigned long sr = spi->sr; + + if (sr & AVR32_SPI_SR_OVRES_MASK) { + ret = SPI_ERROR_OVERRUN; + } + + if (sr & AVR32_SPI_SR_MODF_MASK) { + ret += SPI_ERROR_MODE_FAULT; + } + + if (ret == (SPI_ERROR_OVERRUN + SPI_ERROR_MODE_FAULT)) { + return SPI_ERROR_OVERRUN_AND_MODE_FAULT; + } + else if (ret > 0) { + return ret; + } else { + return SPI_OK; + } +} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.h new file mode 100644 index 0000000..6dcc928 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/SPI/spi.h @@ -0,0 +1,342 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief SPI driver for AVR32 UC3. + * + * This file defines a useful set of functions for the SPI interface on AVR32 + * devices. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _SPI_H_ +#define _SPI_H_ + +#include + + +//! Time-out value (number of attempts). +#define SPI_TIMEOUT 10000 + + +//! Status codes used by the SPI driver. +typedef enum +{ + SPI_ERROR = -1, + SPI_OK = 0, + SPI_ERROR_TIMEOUT = 1, + SPI_ERROR_ARGUMENT, + SPI_ERROR_OVERRUN, + SPI_ERROR_MODE_FAULT, + SPI_ERROR_OVERRUN_AND_MODE_FAULT +} spi_status_t; + +//! Option structure for SPI channels. +typedef struct +{ + //! The SPI channel to set up. + unsigned char reg; + + //! Preferred baudrate for the SPI. + unsigned int baudrate; + + //! Number of bits in each character (8 to 16). + unsigned char bits; + + //! Delay before first clock pulse after selecting slave (in PBA clock periods). + unsigned char spck_delay; + + //! Delay between each transfer/character (in PBA clock periods). + unsigned char trans_delay; + + //! Sets this chip to stay active after last transfer to it. + unsigned char stay_act; + + //! Which SPI mode to use when transmitting. + unsigned char spi_mode; + + //! Disables the mode fault detection. + //! With this bit cleared, the SPI master mode will disable itself if another + //! master tries to address it. + unsigned char modfdis; +} spi_options_t; + + +/*! \brief Resets the SPI controller. + * + * \param spi Base address of the SPI instance. + */ +extern void spi_reset(volatile avr32_spi_t *spi); + +/*! \brief Initializes the SPI in slave mode. + * + * \param spi Base address of the SPI instance. + * \param bits Number of bits in each transmitted character (8 to 16). + * \param spi_mode Clock polarity and phase. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_initSlave(volatile avr32_spi_t *spi, + unsigned char bits, + unsigned char spi_mode); + +/*! \brief Sets up the SPI in a test mode where the transmitter is connected to + * the receiver (local loopback). + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval SPI_OK Success. + */ +extern spi_status_t spi_initTest(volatile avr32_spi_t *spi); + +/*! \brief Initializes the SPI in master mode. + * + * \param spi Base address of the SPI instance. + * \param options Pointer to a structure containing initialization options. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_initMaster(volatile avr32_spi_t *spi, const spi_options_t *options); + +/*! \brief Sets up how and when the slave chips are selected (master mode only). + * + * \param spi Base address of the SPI instance. + * \param variable_ps Target slave is selected in transfer register for every + * character to transmit. + * \param pcs_decode The four chip select lines are decoded externally. Values + * 0 to 14 can be given to \ref spi_selectChip. + * \param delay Delay in PBA periods between chip selects. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_selectionMode(volatile avr32_spi_t *spi, + unsigned char variable_ps, + unsigned char pcs_decode, + unsigned char delay); + +/*! \brief Selects slave chip. + * + * \param spi Base address of the SPI instance. + * \param chip Slave chip number (normal: 0 to 3, extarnally decoded signal: 0 + * to 14). + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_selectChip(volatile avr32_spi_t *spi, unsigned char chip); + +/*! \brief Unselects slave chip. + * + * \param spi Base address of the SPI instance. + * \param chip Slave chip number (normal: 0 to 3, extarnally decoded signal: 0 + * to 14). + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * + * \note Will block program execution until time-out occurs if last transmission + * is not complete. Invoke \ref spi_writeEndCheck beforehand if needed. + */ +extern spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip); + +/*! \brief Sets options for a specific slave chip. + * + * The baudrate field has to be written before transfer in master mode. Four + * similar registers exist, one for each slave. When using encoded slave + * addressing, reg=0 sets options for slaves 0 to 3, reg=1 for slaves 4 to 7 and + * so on. + * + * \param spi Base address of the SPI instance. + * \param options Pointer to a structure containing initialization options for + * an SPI channel. + * \param pba_hz SPI module input clock frequency (PBA clock, Hz). + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_setupChipReg(volatile avr32_spi_t *spi, + const spi_options_t *options, + unsigned int pba_hz); + +/*! \brief Enables the SPI. + * + * \param spi Base address of the SPI instance. + */ +extern void spi_enable(volatile avr32_spi_t *spi); + +/*! \brief Disables the SPI. + * + * Ensures that nothing is transferred while setting up buffers. + * + * \param spi Base address of the SPI instance. + * + * \warning This may cause data loss if used on a slave SPI. + */ +extern void spi_disable(volatile avr32_spi_t *spi); + +/*! \brief Tests if the SPI is enabled. + * + * \param spi Base address of the SPI instance. + * + * \return \c 1 if the SPI is enabled, otherwise \c 0. + */ +extern int spi_is_enabled(volatile avr32_spi_t *spi); + +/*! \brief Checks if there is no data in the transmit register. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 No data in TDR. + * \retval 0 Some data in TDR. + */ +extern unsigned char spi_writeRegisterEmptyCheck(volatile avr32_spi_t *spi); + +/*! \brief Writes one data word in master fixed peripheral select mode or in + * slave mode. + * + * \param spi Base address of the SPI instance. + * \param data The data word to write. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * + * \note Will block program execution until time-out occurs if transmitter is + * busy and transmit buffer is full. Invoke + * \ref spi_writeRegisterEmptyCheck beforehand if needed. + * + * \note Once the data has been written to the transmit buffer, the end of + * transmission is not waited for. Invoke \ref spi_writeEndCheck if + * needed. + */ +extern spi_status_t spi_write(volatile avr32_spi_t *spi, unsigned short data); + +/*! \brief Selects a slave in master variable peripheral select mode and writes + * one data word to it. + * + * \param spi Base address of the SPI instance. + * \param data The data word to write. + * \param pcs Slave selector (bit 0 -> nCS line 0, bit 1 -> nCS line 1, + * etc.). + * \param lastxfer Boolean indicating whether this is the last data word + * transfer. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + * + * \note Will block program execution until time-out occurs if transmitter is + * busy and transmit buffer is full. Invoke + * \ref spi_writeRegisterEmptyCheck beforehand if needed. + * + * \note Once the data has been written to the transmit buffer, the end of + * transmission is not waited for. Invoke \ref spi_writeEndCheck if + * needed. + */ +extern spi_status_t spi_variableSlaveWrite(volatile avr32_spi_t *spi, + unsigned short data, + unsigned char pcs, + unsigned char lastxfer); + +/*! \brief Checks if all transmissions are complete. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 All transmissions complete. + * \retval 0 Transmissions not complete. + */ +extern unsigned char spi_writeEndCheck(volatile avr32_spi_t *spi); + +/*! \brief Checks if there is data in the receive register. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 Some data in RDR. + * \retval 0 No data in RDR. + */ +extern unsigned char spi_readRegisterFullCheck(volatile avr32_spi_t *spi); + +/*! \brief Reads one data word in master mode or in slave mode. + * + * \param spi Base address of the SPI instance. + * \param data Pointer to the location where to store the received data word. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * + * \note Will block program execution until time-out occurs if no data is + * received or last transmission is not complete. Invoke + * \ref spi_writeEndCheck or \ref spi_readRegisterFullCheck beforehand if + * needed. + */ +extern spi_status_t spi_read(volatile avr32_spi_t *spi, unsigned short *data); + +/*! \brief Gets status information from the SPI. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_OVERRUN Overrun error. + * \retval SPI_ERROR_MODE_FAULT Mode fault (SPI addressed as slave + * while in master mode). + * \retval SPI_ERROR_OVERRUN_AND_MODE_FAULT Overrun error and mode fault. + */ +extern unsigned char spi_getStatus(volatile avr32_spi_t *spi); + + +#endif // _SPI_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.c new file mode 100644 index 0000000..b95882a --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.c @@ -0,0 +1,914 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief USART driver for AVR32 UC3. + * + * This file contains basic functions for the AVR32 USART, with support for all + * modes, settings and clock speeds. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USART module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "compiler.h" +#include "usart.h" + + +//------------------------------------------------------------------------------ +/*! \name Private Functions + */ +//! @{ + + +/*! \brief Checks if the USART is in multidrop mode. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if the USART is in multidrop mode, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static __inline__ int usart_mode_is_multidrop(volatile avr32_usart_t *usart) +{ + return ((usart->mr >> AVR32_USART_MR_PAR_OFFSET) & AVR32_USART_MR_PAR_MULTI) == AVR32_USART_MR_PAR_MULTI; +} + + +/*! \brief Calculates a clock divider (\e CD) and a fractional part (\e FP) for + * the USART asynchronous modes to generate a baud rate as close as + * possible to the baud rate set point. + * + * Baud rate calculation: + * \f$ Baudrate = \frac{SelectedClock}{Over \times (CD + \frac{FP}{8})} \f$, \e Over being 16 or 8. + * The maximal oversampling is selected if it allows to generate a baud rate close to the set point. + * + * \param usart Base address of the USART instance. + * \param baudrate Baud rate set point. + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Baud rate successfully initialized. + * \retval USART_INVALID_INPUT Baud rate set point is out of range for the given input clock frequency. + */ +static int usart_set_async_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz) +{ + unsigned int over = (pba_hz >= 16 * baudrate) ? 16 : 8; + unsigned int cd_fp = ((1 << AVR32_USART_BRGR_FP_SIZE) * pba_hz + (over * baudrate) / 2) / (over * baudrate); + unsigned int cd = cd_fp >> AVR32_USART_BRGR_FP_SIZE; + unsigned int fp = cd_fp & ((1 << AVR32_USART_BRGR_FP_SIZE) - 1); + + if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1) + return USART_INVALID_INPUT; + + usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK | + AVR32_USART_MR_SYNC_MASK | + AVR32_USART_MR_OVER_MASK)) | + AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET | + ((over == 16) ? AVR32_USART_MR_OVER_X16 : AVR32_USART_MR_OVER_X8) << AVR32_USART_MR_OVER_OFFSET; + + usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET | + fp << AVR32_USART_BRGR_FP_OFFSET; + + return USART_SUCCESS; +} + + +/*! \brief Calculates a clock divider (\e CD) for the USART synchronous master + * modes to generate a baud rate as close as possible to the baud rate + * set point. + * + * Baud rate calculation: + * \f$ Baudrate = \frac{SelectedClock}{CD} \f$. + * + * \param usart Base address of the USART instance. + * \param baudrate Baud rate set point. + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Baud rate successfully initialized. + * \retval USART_INVALID_INPUT Baud rate set point is out of range for the given input clock frequency. + */ +static int usart_set_sync_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz) +{ + unsigned int cd = (pba_hz + baudrate / 2) / baudrate; + + if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1) + return USART_INVALID_INPUT; + + usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) | + AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET | + AVR32_USART_MR_SYNC_MASK; + + usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET; + + return USART_SUCCESS; +} + + +/*! \brief Selects the SCK pin as the source of baud rate for the USART + * synchronous slave modes. + * + * \param usart Base address of the USART instance. + * + * \retval USART_SUCCESS Baud rate successfully initialized. + */ +static int usart_set_sync_slave_baudrate(volatile avr32_usart_t *usart) +{ + usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) | + AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET | + AVR32_USART_MR_SYNC_MASK; + + return USART_SUCCESS; +} + + +/*! \brief Calculates a clock divider (\e CD) for the USART ISO7816 mode to + * generate an ISO7816 clock as close as possible to the clock set point. + * + * ISO7816 clock calculation: + * \f$ Clock = \frac{SelectedClock}{CD} \f$. + * + * \param usart Base address of the USART instance. + * \param clock ISO7816 clock set point. + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS ISO7816 clock successfully initialized. + * \retval USART_INVALID_INPUT ISO7816 clock set point is out of range for the given input clock frequency. + */ +static int usart_set_iso7816_clock(volatile avr32_usart_t *usart, unsigned int clock, unsigned long pba_hz) +{ + unsigned int cd = (pba_hz + clock / 2) / clock; + + if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1) + return USART_INVALID_INPUT; + + usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK | + AVR32_USART_MR_SYNC_MASK | + AVR32_USART_MR_OVER_MASK)) | + AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET | + AVR32_USART_MR_OVER_X16 << AVR32_USART_MR_OVER_OFFSET; + + usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET; + + return USART_SUCCESS; +} + + +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + + +/*! \brief Calculates a clock divider (\e CD) for the USART SPI master mode to + * generate a baud rate as close as possible to the baud rate set point. + * + * Baud rate calculation: + * \f$ Baudrate = \frac{SelectedClock}{CD} \f$. + * + * \param usart Base address of the USART instance. + * \param baudrate Baud rate set point. + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Baud rate successfully initialized. + * \retval USART_INVALID_INPUT Baud rate set point is out of range for the given input clock frequency. + */ +static int usart_set_spi_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz) +{ + unsigned int cd = (pba_hz + baudrate / 2) / baudrate; + + if (cd < 4 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1) + return USART_INVALID_INPUT; + + usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) | + AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET; + + usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET; + + return USART_SUCCESS; +} + + +/*! \brief Selects the SCK pin as the source of baud rate for the USART SPI + * slave mode. + * + * \param usart Base address of the USART instance. + * + * \retval USART_SUCCESS Baud rate successfully initialized. + */ +static int usart_set_spi_slave_baudrate(volatile avr32_usart_t *usart) +{ + usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) | + AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET; + + return USART_SUCCESS; +} + + +#endif // USART rev. >= 4.0.0 + + +//! @} + + +//------------------------------------------------------------------------------ +/*! \name Initialization Functions + */ +//! @{ + + +void usart_reset(volatile avr32_usart_t *usart) +{ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + // Disable all USART interrupts. + // Interrupts needed should be set explicitly on every reset. + if (global_interrupt_enabled) Disable_global_interrupt(); + usart->idr = 0xFFFFFFFF; + usart->csr; + if (global_interrupt_enabled) Enable_global_interrupt(); + + // Reset mode and other registers that could cause unpredictable behavior after reset. + usart->mr = 0; + usart->rtor = 0; + usart->ttgr = 0; + + // Shutdown TX and RX (will be re-enabled when setup has successfully completed), + // reset status bits and turn off DTR and RTS. + usart->cr = AVR32_USART_CR_RSTRX_MASK | + AVR32_USART_CR_RSTTX_MASK | + AVR32_USART_CR_RSTSTA_MASK | + AVR32_USART_CR_RSTIT_MASK | + AVR32_USART_CR_RSTNACK_MASK | +#ifndef AVR32_USART_440_H_INCLUDED +// Note: Modem Signal Management DTR-DSR-DCD-RI are not included in USART rev.440. + AVR32_USART_CR_DTRDIS_MASK | +#endif + AVR32_USART_CR_RTSDIS_MASK; +} + + +int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt || // Null pointer. + opt->charlength < 5 || opt->charlength > 9 || + opt->paritytype > 7 || + opt->stopbits > 2 + 255 || + opt->channelmode > 3 || + usart_set_async_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + if (opt->charlength == 9) + { + // Character length set to 9 bits. MODE9 dominates CHRL. + usart->mr |= AVR32_USART_MR_MODE9_MASK; + } + else + { + // CHRL gives the character length (- 5) when MODE9 = 0. + usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET; + } + + usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET | + opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET; + + if (opt->stopbits > USART_2_STOPBITS) + { + // Set two stop bits + usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET; + // and a timeguard period gives the rest. + usart->ttgr = opt->stopbits - USART_2_STOPBITS; + } + else + // Insert 1, 1.5 or 2 stop bits. + usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET; + + // Set normal mode. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET; + + // Setup complete; enable communication. + // Enable input and output. + usart->cr = AVR32_USART_CR_RXEN_MASK | + AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +int usart_init_rs232_tx_only(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt || // Null pointer. + opt->charlength < 5 || opt->charlength > 9 || + opt->paritytype > 7 || + opt->stopbits == 1 || opt->stopbits > 2 + 255 || + opt->channelmode > 3 || + usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + if (opt->charlength == 9) + { + // Character length set to 9 bits. MODE9 dominates CHRL. + usart->mr |= AVR32_USART_MR_MODE9_MASK; + } + else + { + // CHRL gives the character length (- 5) when MODE9 = 0. + usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET; + } + + usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET | + opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET; + + if (opt->stopbits > USART_2_STOPBITS) + { + // Set two stop bits + usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET; + // and a timeguard period gives the rest. + usart->ttgr = opt->stopbits - USART_2_STOPBITS; + } + else + // Insert 1 or 2 stop bits. + usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET; + + // Set normal mode. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET; + + // Setup complete; enable communication. + // Enable only output as input is not possible in synchronous mode without + // transferring clock. + usart->cr = AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // First: Setup standard RS232. + if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + // Set hardware handshaking mode. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MR_MODE_HARDWARE << AVR32_USART_MR_MODE_OFFSET; + + return USART_SUCCESS; +} + + +int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // First: Setup standard RS232. + if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + // Set modem mode. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MR_MODE_MODEM << AVR32_USART_MR_MODE_OFFSET; + + return USART_SUCCESS; +} + + +int usart_init_sync_master(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt || // Null pointer. + opt->charlength < 5 || opt->charlength > 9 || + opt->paritytype > 7 || + opt->stopbits == 1 || opt->stopbits > 2 + 255 || + opt->channelmode > 3 || + usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + if (opt->charlength == 9) + { + // Character length set to 9 bits. MODE9 dominates CHRL. + usart->mr |= AVR32_USART_MR_MODE9_MASK; + } + else + { + // CHRL gives the character length (- 5) when MODE9 = 0. + usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET; + } + + usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET | + opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET; + + if (opt->stopbits > USART_2_STOPBITS) + { + // Set two stop bits + usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET; + // and a timeguard period gives the rest. + usart->ttgr = opt->stopbits - USART_2_STOPBITS; + } + else + // Insert 1 or 2 stop bits. + usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET; + + // Set normal mode. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET | + AVR32_USART_MR_CLKO_MASK; + + // Setup complete; enable communication. + // Enable input and output. + usart->cr = AVR32_USART_CR_RXEN_MASK | + AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +int usart_init_sync_slave(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt || // Null pointer. + opt->charlength < 5 || opt->charlength > 9 || + opt->paritytype > 7 || + opt->stopbits == 1 || opt->stopbits > 2 + 255 || + opt->channelmode > 3 || + usart_set_sync_slave_baudrate(usart) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + if (opt->charlength == 9) + { + // Character length set to 9 bits. MODE9 dominates CHRL. + usart->mr |= AVR32_USART_MR_MODE9_MASK; + } + else + { + // CHRL gives the character length (- 5) when MODE9 = 0. + usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET; + } + + usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET | + opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET; + + if (opt->stopbits > USART_2_STOPBITS) + { + // Set two stop bits + usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET; + // and a timeguard period gives the rest. + usart->ttgr = opt->stopbits - USART_2_STOPBITS; + } + else + // Insert 1 or 2 stop bits. + usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET; + + // Set normal mode. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET; + + // Setup complete; enable communication. + // Enable input and output. + usart->cr = AVR32_USART_CR_RXEN_MASK | + AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // First: Setup standard RS232. + if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + // Set RS485 mode. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MR_MODE_RS485 << AVR32_USART_MR_MODE_OFFSET; + + return USART_SUCCESS; +} + + +int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt, + long pba_hz, unsigned char irda_filter) +{ + // First: Setup standard RS232. + if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + // Set IrDA filter. + usart->ifr = irda_filter; + + // Set IrDA mode and activate filtering of input. + usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) | + AVR32_USART_MODE_IRDA << AVR32_USART_MR_MODE_OFFSET | + AVR32_USART_MR_FILTER_MASK; + + return USART_SUCCESS; +} + + +int usart_init_iso7816(volatile avr32_usart_t *usart, const usart_iso7816_options_t *opt, int t, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt || // Null pointer. + opt->paritytype > 1) + return USART_INVALID_INPUT; + + if (t == 0) + { + // Set USART mode to ISO7816, T=0. + // The T=0 protocol always uses 2 stop bits. + usart->mr = AVR32_USART_MR_MODE_ISO7816_T0 << AVR32_USART_MR_MODE_OFFSET | + AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET | + opt->bit_order << AVR32_USART_MR_MSBF_OFFSET; // Allow MSBF in T=0. + } + else if (t == 1) + { + // Only LSB first in the T=1 protocol. + // max_iterations field is only used in T=0 mode. + if (opt->bit_order != 0 || + opt->max_iterations != 0) + return USART_INVALID_INPUT; + + // Set USART mode to ISO7816, T=1. + // The T=1 protocol always uses 1 stop bit. + usart->mr = AVR32_USART_MR_MODE_ISO7816_T1 << AVR32_USART_MR_MODE_OFFSET | + AVR32_USART_MR_NBSTOP_1 << AVR32_USART_MR_NBSTOP_OFFSET; + } + else + return USART_INVALID_INPUT; + + if (usart_set_iso7816_clock(usart, opt->iso7816_hz, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + // Set FIDI register: bit rate = selected clock/FI_DI_ratio/16. + usart->fidi = opt->fidi_ratio; + + // Set ISO7816 spesific options in the MODE register. + usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET | + AVR32_USART_MR_CLKO_MASK | // Enable clock output. + opt->inhibit_nack << AVR32_USART_MR_INACK_OFFSET | + opt->dis_suc_nack << AVR32_USART_MR_DSNACK_OFFSET | + opt->max_iterations << AVR32_USART_MR_MAX_ITERATION_OFFSET; + + // Setup complete; enable the receiver by default. + usart_iso7816_enable_receiver(usart); + + return USART_SUCCESS; +} + + +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + + +int usart_init_lin_master(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + usart->mr |= AVR32_USART_MR_MODE_LIN_MASTER << AVR32_USART_MR_MODE_OFFSET; // LIN master mode. + + // Setup complete; enable communication. + // Enable input and output. + usart->cr = AVR32_USART_CR_RXEN_MASK | + AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +int usart_init_lin_slave(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + usart->mr |= AVR32_USART_MR_MODE_LIN_SLAVE << AVR32_USART_MR_MODE_OFFSET; // LIN slave mode. + + // Setup complete; enable communication. + // Enable input and output. + usart->cr = AVR32_USART_CR_RXEN_MASK | + AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt || // Null pointer. + opt->charlength < 5 || opt->charlength > 9 || + opt->spimode > 3 || + opt->channelmode > 3 || + usart_set_spi_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + if (opt->charlength == 9) + { + // Character length set to 9 bits. MODE9 dominates CHRL. + usart->mr |= AVR32_USART_MR_MODE9_MASK; + } + else + { + // CHRL gives the character length (- 5) when MODE9 = 0. + usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET; + } + + usart->mr |= AVR32_USART_MR_MODE_SPI_MASTER << AVR32_USART_MR_MODE_OFFSET | // SPI master mode. + ((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET | // SPI clock phase. + opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET | // Channel mode. + (opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET | // SPI clock polarity. + AVR32_USART_MR_CLKO_MASK; // Drive SCK pin. + + // Setup complete; enable communication. + // Enable input and output. + usart->cr = AVR32_USART_CR_RXEN_MASK | + AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt || // Null pointer. + opt->charlength < 5 || opt->charlength > 9 || + opt->spimode > 3 || + opt->channelmode > 3 || + usart_set_spi_slave_baudrate(usart) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + if (opt->charlength == 9) + { + // Character length set to 9 bits. MODE9 dominates CHRL. + usart->mr |= AVR32_USART_MR_MODE9_MASK; + } + else + { + // CHRL gives the character length (- 5) when MODE9 = 0. + usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET; + } + + usart->mr |= AVR32_USART_MR_MODE_SPI_SLAVE << AVR32_USART_MR_MODE_OFFSET | // SPI slave mode. + ((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET | // SPI clock phase. + opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET | // Channel mode. + (opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET; // SPI clock polarity. + + // Setup complete; enable communication. + // Enable input and output. + usart->cr = AVR32_USART_CR_RXEN_MASK | + AVR32_USART_CR_TXEN_MASK; + + return USART_SUCCESS; +} + + +#endif // USART rev. >= 4.0.0 + + +//! @} + + +//------------------------------------------------------------------------------ +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + + +/*! \name SPI Control Functions + */ +//! @{ + + +int usart_spi_selectChip(volatile avr32_usart_t *usart) +{ + // Force the SPI chip select. + usart->cr = AVR32_USART_CR_RTSEN_MASK; + + return USART_SUCCESS; +} + + +int usart_spi_unselectChip(volatile avr32_usart_t *usart) +{ + int timeout = USART_DEFAULT_TIMEOUT; + + do + { + if (!timeout--) return USART_FAILURE; + } while (!usart_tx_empty(usart)); + + // Release the SPI chip select. + usart->cr = AVR32_USART_CR_RTSDIS_MASK; + + return USART_SUCCESS; +} + + +//! @} + + +#endif // USART rev. >= 4.0.0 + + +//------------------------------------------------------------------------------ +/*! \name Transmit/Receive Functions + */ +//! @{ + + +int usart_send_address(volatile avr32_usart_t *usart, int address) +{ + // Check if USART is in multidrop / RS485 mode. + if (!usart_mode_is_multidrop(usart)) return USART_MODE_FAULT; + + // Prepare to send an address. + usart->cr = AVR32_USART_CR_SENDA_MASK; + + // Write the address to TX. + usart_bw_write_char(usart, address); + + return USART_SUCCESS; +} + + +int usart_write_char(volatile avr32_usart_t *usart, int c) +{ + if (usart_tx_ready(usart)) + { + usart->thr = (c << AVR32_USART_THR_TXCHR_OFFSET) & AVR32_USART_THR_TXCHR_MASK; + return USART_SUCCESS; + } + else + return USART_TX_BUSY; +} + + +int usart_putchar(volatile avr32_usart_t *usart, int c) +{ + int timeout = USART_DEFAULT_TIMEOUT; + + if (c == '\n') + { + do + { + if (!timeout--) return USART_FAILURE; + } while (usart_write_char(usart, '\r') != USART_SUCCESS); + + timeout = USART_DEFAULT_TIMEOUT; + } + + do + { + if (!timeout--) return USART_FAILURE; + } while (usart_write_char(usart, c) != USART_SUCCESS); + + return USART_SUCCESS; +} + + +int usart_read_char(volatile avr32_usart_t *usart, int *c) +{ + // Check for errors: frame, parity and overrun. In RS485 mode, a parity error + // would mean that an address char has been received. + if (usart->csr & (AVR32_USART_CSR_OVRE_MASK | + AVR32_USART_CSR_FRAME_MASK | + AVR32_USART_CSR_PARE_MASK)) + return USART_RX_ERROR; + + // No error; if we really did receive a char, read it and return SUCCESS. + if (usart_test_hit(usart)) + { + *c = (usart->rhr & AVR32_USART_RHR_RXCHR_MASK) >> AVR32_USART_RHR_RXCHR_OFFSET; + return USART_SUCCESS; + } + else + return USART_RX_EMPTY; +} + + +int usart_getchar(volatile avr32_usart_t *usart) +{ + int c, ret; + + while ((ret = usart_read_char(usart, &c)) == USART_RX_EMPTY); + + if (ret == USART_RX_ERROR) + return USART_FAILURE; + + return c; +} + + +void usart_write_line(volatile avr32_usart_t *usart, const char *string) +{ + while (*string != '\0') + usart_putchar(usart, *string++); +} + + +int usart_get_echo_line(volatile avr32_usart_t *usart) +{ + int rx_char; + int retval = USART_SUCCESS; + + while (1) + { + rx_char = usart_getchar(usart); + if (rx_char == USART_FAILURE) + { + usart_write_line(usart, "Error!!!\n"); + retval = USART_FAILURE; + break; + } + if (rx_char == '\x03') + { + retval = USART_FAILURE; + break; + } + usart_putchar(usart, rx_char); + if (rx_char == '\r') + { + usart_putchar(usart, '\n'); + break; + } + } + + return retval; +} + + +//! @} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.h new file mode 100644 index 0000000..bc1c100 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.h @@ -0,0 +1,889 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief USART driver for AVR32 UC3. + * + * This file contains basic functions for the AVR32 USART, with support for all + * modes, settings and clock speeds. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USART module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _USART_H_ +#define _USART_H_ + +#include +#include "compiler.h" + + +/*! \name Return Values + */ +//! @{ +#define USART_SUCCESS 0 //!< Successful completion. +#define USART_FAILURE -1 //!< Failure because of some unspecified reason. +#define USART_INVALID_INPUT 1 //!< Input value out of range. +#define USART_INVALID_ARGUMENT -1 //!< Argument value out of range. +#define USART_TX_BUSY 2 //!< Transmitter was busy. +#define USART_RX_EMPTY 3 //!< Nothing was received. +#define USART_RX_ERROR 4 //!< Transmission error occurred. +#define USART_MODE_FAULT 5 //!< USART not in the appropriate mode. +//! @} + +//! Default time-out value (number of attempts). +#define USART_DEFAULT_TIMEOUT 10000 + +/*! \name Parity Settings + */ +//! @{ +#define USART_EVEN_PARITY AVR32_USART_MR_PAR_EVEN //!< Use even parity on character transmission. +#define USART_ODD_PARITY AVR32_USART_MR_PAR_ODD //!< Use odd parity on character transmission. +#define USART_SPACE_PARITY AVR32_USART_MR_PAR_SPACE //!< Use a space as parity bit. +#define USART_MARK_PARITY AVR32_USART_MR_PAR_MARK //!< Use a mark as parity bit. +#define USART_NO_PARITY AVR32_USART_MR_PAR_NONE //!< Don't use a parity bit. +#define USART_MULTIDROP_PARITY AVR32_USART_MR_PAR_MULTI //!< Parity bit is used to flag address characters. +//! @} + +/*! \name Stop Bits Settings + */ +//! @{ +#define USART_1_STOPBIT AVR32_USART_MR_NBSTOP_1 //!< Use 1 stop bit. +#define USART_1_5_STOPBITS AVR32_USART_MR_NBSTOP_1_5 //!< Use 1.5 stop bits. +#define USART_2_STOPBITS AVR32_USART_MR_NBSTOP_2 //!< Use 2 stop bits (for more, just give the number of bits). +//! @} + +/*! \name Channel Modes + */ +//! @{ +#define USART_NORMAL_CHMODE AVR32_USART_MR_CHMODE_NORMAL //!< Normal communication. +#define USART_AUTO_ECHO AVR32_USART_MR_CHMODE_ECHO //!< Echo data. +#define USART_LOCAL_LOOPBACK AVR32_USART_MR_CHMODE_LOCAL_LOOP //!< Local loopback. +#define USART_REMOTE_LOOPBACK AVR32_USART_MR_CHMODE_REMOTE_LOOP //!< Remote loopback. +//! @} + +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + +/*! \name LIN Node Actions + */ +//! @{ +#define USART_LIN_PUBLISH_ACTION AVR32_USART_LINMR_NACT_PUBLISH //!< The USART transmits the response. +#define USART_LIN_SUBSCRIBE_ACTION AVR32_USART_LINMR_NACT_SUBSCRIBE //!< The USART receives the response. +#define USART_LIN_IGNORE_ACTION AVR32_USART_LINMR_NACT_IGNORE //!< The USART does not transmit and does not receive the reponse. +//! @} + +/*! \name LIN Checksum Types + */ +//! @{ +#define USART_LIN_ENHANCED_CHECKSUM 0 //!< LIN 2.0 "enhanced" checksum. +#define USART_LIN_CLASSIC_CHECKSUM 1 //!< LIN 1.3 "classic" checksum. +//! @} + +#endif // USART rev. >= 4.0.0 + + +//! Input parameters when initializing RS232 and similar modes. +typedef struct +{ + //! Set baud rate of the USART (unused in slave modes). + unsigned long baudrate; + + //! Number of bits to transmit as a character (5 to 9). + unsigned char charlength; + + //! How to calculate the parity bit: \ref USART_EVEN_PARITY, \ref USART_ODD_PARITY, + //! \ref USART_SPACE_PARITY, \ref USART_MARK_PARITY, \ref USART_NO_PARITY or + //! \ref USART_MULTIDROP_PARITY. + unsigned char paritytype; + + //! Number of stop bits between two characters: \ref USART_1_STOPBIT, + //! \ref USART_1_5_STOPBITS, \ref USART_2_STOPBITS or any number from 3 to 257 + //! which will result in a time guard period of that length between characters. + //! \note \ref USART_1_5_STOPBITS is supported in asynchronous modes only. + unsigned short stopbits; + + //! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO, + //! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK. + unsigned char channelmode; +} usart_options_t; + +//! Input parameters when initializing ISO7816 mode. +typedef struct +{ + //! Set the frequency of the ISO7816 clock. + unsigned long iso7816_hz; + + //! The number of ISO7816 clock ticks in every bit period (1 to 2047, 0 = disable clock). + //! Bit rate = \ref iso7816_hz / \ref fidi_ratio. + unsigned short fidi_ratio; + + //! How to calculate the parity bit: \ref USART_EVEN_PARITY for normal mode or + //! \ref USART_ODD_PARITY for inverse mode. + unsigned char paritytype; + + //! Inhibit Non Acknowledge:\n + //! - 0: the NACK is generated;\n + //! - 1: the NACK is not generated. + //! + //! \note This bit will be used only in ISO7816 mode, protocol T = 0 receiver. + int inhibit_nack; + + //! Disable successive NACKs. + //! Successive parity errors are counted up to the value in the \ref max_iterations field. + //! These parity errors generate a NACK on the ISO line. As soon as this value is reached, + //! no addititional NACK is sent on the ISO line. The ITERATION flag is asserted. + int dis_suc_nack; + + //! Max number of repetitions (0 to 7). + unsigned char max_iterations; + + //! Bit order in transmitted characters:\n + //! - 0: LSB first;\n + //! - 1: MSB first. + int bit_order; +} usart_iso7816_options_t; + +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + +//! Input parameters when initializing SPI mode. +typedef struct +{ + //! Set the frequency of the SPI clock (unused in slave mode). + unsigned long baudrate; + + //! Number of bits to transmit as a character (5 to 9). + unsigned char charlength; + + //! Which SPI mode to use. + unsigned char spimode; + + //! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO, + //! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK. + unsigned char channelmode; +} usart_spi_options_t; + +#endif // USART rev. >= 4.0.0 + + +//------------------------------------------------------------------------------ +/*! \name Initialization Functions + */ +//! @{ + +/*! \brief Resets the USART and disables TX and RX. + * + * \param usart Base address of the USART instance. + */ +extern void usart_reset(volatile avr32_usart_t *usart); + +/*! \brief Sets up the USART to use the standard RS232 protocol. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use the standard RS232 protocol in TX-only mode. + * + * Compared to \ref usart_init_rs232, this function allows very high baud rates + * (up to \a pba_hz instead of \a pba_hz / \c 8) at the expense of full duplex. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + * + * \note The \c 1.5 stop bit is not supported in this mode. + */ +extern int usart_init_rs232_tx_only(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use hardware handshaking. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + * + * \note \ref usart_init_rs232 does not need to be invoked before this function. + */ +extern int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use the modem protocol, activating dedicated inputs/outputs. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use a synchronous RS232-like protocol in master mode. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_sync_master(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use a synchronous RS232-like protocol in slave mode. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_sync_slave(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use the RS485 protocol. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use the IrDA protocol. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * \param irda_filter Counter used to distinguish received ones from zeros. + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt, + long pba_hz, unsigned char irda_filter); + +/*! \brief Sets up the USART to use the ISO7816 T=0 or T=1 smartcard protocols. + * + * The receiver is enabled by default. \ref usart_iso7816_enable_receiver and + * \ref usart_iso7816_enable_transmitter can be called to change the half-duplex + * communication direction. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up ISO7816 communication (see \ref usart_iso7816_options_t). + * \param t ISO7816 mode to use (T=0 or T=1). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_iso7816(volatile avr32_usart_t *usart, const usart_iso7816_options_t *opt, int t, long pba_hz); + +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + +/*! \brief Sets up the USART to use the LIN master mode. + * + * \param usart Base address of the USART instance. + * \param baudrate Baud rate. + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + */ +extern int usart_init_lin_master(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz); + +/*! \brief Sets up the USART to use the LIN slave mode. + * + * \param usart Base address of the USART instance. + * \param baudrate Baud rate. + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + */ +extern int usart_init_lin_slave(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz); + +/*! \brief Sets up the USART to use the SPI master mode. + * + * \ref usart_spi_selectChip and \ref usart_spi_unselectChip can be called to + * select or unselect the SPI slave chip. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up SPI mode (see \ref usart_spi_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use the SPI slave mode. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up SPI mode (see \ref usart_spi_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz); + +#endif // USART rev. >= 4.0.0 + +//! @} + + +//------------------------------------------------------------------------------ +/*! \name Read and Reset Error Status Bits + */ +//! @{ + +/*! \brief Resets the error status. + * + * This function resets the status bits indicating that a parity error, + * framing error or overrun has occurred. The RXBRK bit, indicating + * a start/end of break condition on the RX line, is also reset. + * + * \param usart Base address of the USART instance. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_reset_status(volatile avr32_usart_t *usart) +{ + usart->cr = AVR32_USART_CR_RSTSTA_MASK; +} + +/*! \brief Checks if a parity error has occurred since last status reset. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if a parity error has been detected, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_parity_error(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_PARE_MASK) != 0; +} + +/*! \brief Checks if a framing error has occurred since last status reset. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if a framing error has been detected, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_framing_error(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_FRAME_MASK) != 0; +} + +/*! \brief Checks if an overrun error has occurred since last status reset. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if a overrun error has been detected, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_overrun_error(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_OVRE_MASK) != 0; +} + +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + +/*! \brief Get LIN Error Status + * + * \param usart Base address of the USART instance. + * + * \retval The binary value of the error field. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_lin_get_error(volatile avr32_usart_t *usart) +{ + return (usart->csr & (AVR32_USART_CSR_LINSNRE_MASK | + AVR32_USART_CSR_LINCE_MASK | + AVR32_USART_CSR_LINIPE_MASK | + AVR32_USART_CSR_LINISFE_MASK | + AVR32_USART_CSR_LINBE_MASK)) >> AVR32_USART_CSR_LINBE_OFFSET; +} + +#endif // USART rev. >= 4.0.0 + +//! @} + + +//------------------------------------------------------------------------------ +/*! \name ISO7816 Control Functions + */ +//! @{ + +/*! \brief Enables the ISO7816 receiver. + * + * The ISO7816 transmitter is disabled. + * + * \param usart Base address of the USART instance. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_iso7816_enable_receiver(volatile avr32_usart_t *usart) +{ + usart->cr = AVR32_USART_CR_TXDIS_MASK | AVR32_USART_CR_RXEN_MASK; +} + +/*! \brief Enables the ISO7816 transmitter. + * + * The ISO7816 receiver is disabled. + * + * \param usart Base address of the USART instance. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_iso7816_enable_transmitter(volatile avr32_usart_t *usart) +{ + usart->cr = AVR32_USART_CR_RXDIS_MASK | AVR32_USART_CR_TXEN_MASK; +} + +//! @} + + +//------------------------------------------------------------------------------ +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + +/*! \name LIN Control Functions + */ +//! @{ + +/*! \brief Sets the node action. + * + * \param usart Base address of the USART instance. + * \param action The node action: \ref USART_LIN_PUBLISH_ACTION, + * \ref USART_LIN_SUBSCRIBE_ACTION or + * \ref USART_LIN_IGNORE_ACTION. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_set_node_action(volatile avr32_usart_t *usart, unsigned char action) +{ + usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_NACT_MASK) | + action << AVR32_USART_LINMR_NACT_OFFSET; +} + +/*! \brief Enables or disables the Identifier parity. + * + * \param usart Base address of the USART instance. + * \param parity Whether to enable the Identifier parity: \c TRUE or \c FALSE. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_enable_parity(volatile avr32_usart_t *usart, unsigned char parity) +{ + usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_PARDIS_MASK) | + !parity << AVR32_USART_LINMR_PARDIS_OFFSET; +} + +/*! \brief Enables or disables the checksum. + * + * \param usart Base address of the USART instance. + * \param parity Whether to enable the checksum: \c TRUE or \c FALSE. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_enable_checksum(volatile avr32_usart_t *usart, unsigned char checksum) +{ + usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_CHKDIS_MASK) | + !checksum << AVR32_USART_LINMR_CHKDIS_OFFSET; +} + +/*! \brief Sets the checksum type. + * + * \param usart Base address of the USART instance. + * \param chktyp The checksum type: \ref USART_LIN_ENHANCED_CHEKSUM or + * \ref USART_LIN_CLASSIC_CHECKSUM. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_set_checksum(volatile avr32_usart_t *usart, unsigned char chktyp) +{ + usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_CHKTYP_MASK) | + chktyp << AVR32_USART_LINMR_CHKTYP_OFFSET; +} + +/*! \brief Gets the response data length. + * + * \param usart Base address of the USART instance. + * + * \return The response data length. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ unsigned char usart_lin_get_data_length(volatile avr32_usart_t *usart) +{ + if (usart->linmr & AVR32_USART_LINMR_DLM_MASK) + { + unsigned char data_length = 1 << ((usart->linir >> (AVR32_USART_LINIR_IDCHR_OFFSET + 4)) & 0x03); + if (data_length == 1) + data_length = 2; + return data_length; + } + else + return ((usart->linmr & AVR32_USART_LINMR_DLC_MASK) >> AVR32_USART_LINMR_DLC_OFFSET) + 1; +} + +/*! \brief Sets the response data length for LIN 1.x. + * + * \param usart Base address of the USART instance. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_set_data_length_lin1x(volatile avr32_usart_t *usart) +{ + usart->linmr |= AVR32_USART_LINMR_DLM_MASK; +} + +/*! \brief Sets the response data length for LIN 2.x. + * + * \param usart Base address of the USART instance. + * \param data_length The response data length. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_set_data_length_lin2x(volatile avr32_usart_t *usart, unsigned char data_length) +{ + usart->linmr = (usart->linmr & ~(AVR32_USART_LINMR_DLC_MASK | + AVR32_USART_LINMR_DLM_MASK)) | + (data_length - 1) << AVR32_USART_LINMR_DLC_OFFSET; +} + +/*! \brief Enables or disables the frame slot mode. + * + * \param usart Base address of the USART instance. + * \param frameslot Whether to enable the frame slot mode: \c TRUE or + * \c FALSE. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_enable_frameslot(volatile avr32_usart_t *usart, unsigned char frameslot) +{ + usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_FSDIS_MASK) | + !frameslot << AVR32_USART_LINMR_FSDIS_OFFSET; +} + +/*! \brief Gets the Identifier character. + * + * \param usart Base address of the USART instance. + * + * \return The Identifier character. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ unsigned char usart_lin_get_id_char(volatile avr32_usart_t *usart) +{ + return (usart->linir & AVR32_USART_LINIR_IDCHR_MASK) >> AVR32_USART_LINIR_IDCHR_OFFSET; +} + +/*! \brief Sets the Identifier character. + * + * \param usart Base address of the USART instance. + * \param id_char The Identifier character. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_set_id_char(volatile avr32_usart_t *usart, unsigned char id_char) +{ + usart->linir = (usart->linir & ~AVR32_USART_LINIR_IDCHR_MASK) | + id_char << AVR32_USART_LINIR_IDCHR_OFFSET; +} + +//! @} + +#endif // USART rev. >= 4.0.0 + + +//------------------------------------------------------------------------------ +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + +/*! \name SPI Control Functions + */ +//! @{ + +/*! \brief Selects SPI slave chip. + * + * \param usart Base address of the USART instance. + * + * \retval USART_SUCCESS Success. + */ +extern int usart_spi_selectChip(volatile avr32_usart_t *usart); + +/*! \brief Unselects SPI slave chip. + * + * \param usart Base address of the USART instance. + * + * \retval USART_SUCCESS Success. + * \retval USART_FAILURE Time-out. + */ +extern int usart_spi_unselectChip(volatile avr32_usart_t *usart); + +//! @} + +#endif // USART rev. >= 4.0.0 + + +//------------------------------------------------------------------------------ +/*! \name Transmit/Receive Functions + */ +//! @{ + +/*! \brief Addresses a receiver. + * + * While in RS485 mode, receivers only accept data addressed to them. + * A packet/char with the address tag set has to precede any data. + * This function is used to address a receiver. This receiver should read + * all the following data, until an address packet addresses another receiver. + * + * \param usart Base address of the USART instance. + * \param address Address of the target device. + * + * \retval USART_SUCCESS Address successfully sent (if current mode is RS485). + * \retval USART_MODE_FAULT Wrong operating mode. + */ +extern int usart_send_address(volatile avr32_usart_t *usart, int address); + +/*! \brief Tests if the USART is ready to transmit a character. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if the USART Transmit Holding Register is free, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_tx_ready(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_TXRDY_MASK) != 0; +} + +/*! \brief Writes the given character to the TX buffer if the transmitter is ready. + * + * \param usart Base address of the USART instance. + * \param c The character (up to 9 bits) to transmit. + * + * \retval USART_SUCCESS The transmitter was ready. + * \retval USART_TX_BUSY The transmitter was busy. + */ +extern int usart_write_char(volatile avr32_usart_t *usart, int c); + +/*! \brief An active wait writing a character to the USART. + * + * \param usart Base address of the USART instance. + * \param c The character (up to 9 bits) to transmit. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_bw_write_char(volatile avr32_usart_t *usart, int c) +{ + while (usart_write_char(usart, c) != USART_SUCCESS); +} + +/*! \brief Sends a character with the USART. + * + * \param usart Base address of the USART instance. + * \param c Character to write. + * + * \retval USART_SUCCESS The character was written. + * \retval USART_FAILURE The function timed out before the USART transmitter became ready to send. + */ +extern int usart_putchar(volatile avr32_usart_t *usart, int c); + +/*! \brief Tests if all requested USART transmissions are over. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if the USART Transmit Shift Register and the USART Transmit + * Holding Register are free, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_tx_empty(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_TXEMPTY_MASK) != 0; +} + +/*! \brief Tests if the USART contains a received character. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if the USART Receive Holding Register is full, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_test_hit(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_RXRDY_MASK) != 0; +} + +/*! \brief Checks the RX buffer for a received character, and stores it at the + * given memory location. + * + * \param usart Base address of the USART instance. + * \param c Pointer to the where the read character should be stored + * (must be at least short in order to accept 9-bit characters). + * + * \retval USART_SUCCESS The character was read successfully. + * \retval USART_RX_EMPTY The RX buffer was empty. + * \retval USART_RX_ERROR An error was deteceted. + */ +extern int usart_read_char(volatile avr32_usart_t *usart, int *c); + +/*! \brief Waits until a character is received, and returns it. + * + * \param usart Base address of the USART instance. + * + * \return The received character, or \ref USART_FAILURE upon error. + */ +extern int usart_getchar(volatile avr32_usart_t *usart); + +/*! \brief Writes one character string to the USART. + * + * \param usart Base address of the USART instance. + * \param string String to be written. + */ +extern void usart_write_line(volatile avr32_usart_t *usart, const char *string); + +/*! \brief Gets and echoes characters until end of line. + * + * \param usart Base address of the USART instance. + * + * \retval USART_SUCCESS Success. + * \retval USART_FAILURE Low-level error detected or ETX character received. + */ +extern int usart_get_echo_line(volatile avr32_usart_t *usart); + +#if defined(AVR32_USART_400_H_INCLUDED) || \ + defined(AVR32_USART_410_H_INCLUDED) || \ + defined(AVR32_USART_420_H_INCLUDED) || \ + defined(AVR32_USART_440_H_INCLUDED) || \ + defined(AVR32_USART_602_H_INCLUDED) + +/*! \brief Abort LIN transmission. + * + * \param usart Base address of the USART instance. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_lin_abort(volatile avr32_usart_t *usart) +{ + usart->cr = AVR32_USART_LINABT_MASK; +} + +/*! \brief Tests if a LIN transfer has been completed. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if a LIN transfer has been completed, otherwise \c 0. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_lin_transfer_completed(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_LINTC_MASK) != 0; +} + +#endif // USART rev. >= 4.0.0 + +//! @} + + +#endif // _USART_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.c new file mode 100644 index 0000000..09790c2 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.c @@ -0,0 +1,571 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Abstraction layer for memory interfaces. + * + * This module contains the interfaces: + * - MEM <-> USB; + * - MEM <-> RAM; + * - MEM <-> MEM. + * + * This module may be configured and expanded to support the following features: + * - write-protected globals; + * - password-protected data; + * - specific features; + * - etc. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +//_____ I N C L U D E S ____________________________________________________ + +#include "compiler.h" +#include "preprocessor.h" +#ifdef FREERTOS_USED +#include "FreeRTOS.h" +#include "semphr.h" +#endif +#include "ctrl_access.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +#ifdef FREERTOS_USED + +/*! \name LUN Access Protection Macros + */ +//! @{ + +/*! \brief Locks accesses to LUNs. + * + * \return \c TRUE if the access was successfully locked, else \c FALSE. + */ +#define Ctrl_access_lock() ctrl_access_lock() + +/*! \brief Unlocks accesses to LUNs. + */ +#define Ctrl_access_unlock() xSemaphoreGive(ctrl_access_semphr) + +//! @} + +//! Handle to the semaphore protecting accesses to LUNs. +static xSemaphoreHandle ctrl_access_semphr = NULL; + +#else + +/*! \name LUN Access Protection Macros + */ +//! @{ + +/*! \brief Locks accesses to LUNs. + * + * \return \c TRUE if the access was successfully locked, else \c FALSE. + */ +#define Ctrl_access_lock() TRUE + +/*! \brief Unlocks accesses to LUNs. + */ +#define Ctrl_access_unlock() + +//! @} + +#endif // FREERTOS_USED + + +#if MAX_LUN + +/*! \brief Initializes an entry of the LUN descriptor table. + * + * \param lun Logical Unit Number. + * + * \return LUN descriptor table entry initializer. + */ +#if ACCESS_USB == ENABLED && ACCESS_MEM_TO_RAM == ENABLED +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(Lun_, lun, _usb_read_10),\ + TPASTE3(Lun_, lun, _usb_write_10),\ + TPASTE3(Lun_, lun, _mem_2_ram),\ + TPASTE3(Lun_, lun, _ram_2_mem),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#elif ACCESS_USB == ENABLED +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(Lun_, lun, _usb_read_10),\ + TPASTE3(Lun_, lun, _usb_write_10),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#elif ACCESS_MEM_TO_RAM == ENABLED +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(Lun_, lun, _mem_2_ram),\ + TPASTE3(Lun_, lun, _ram_2_mem),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#else +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#endif + +//! LUN descriptor table. +static const struct +{ + Ctrl_status (*test_unit_ready)(void); + Ctrl_status (*read_capacity)(U32 *); + Bool (*wr_protect)(void); + Bool (*removal)(void); +#if ACCESS_USB == ENABLED + Ctrl_status (*usb_read_10)(U32, U16); + Ctrl_status (*usb_write_10)(U32, U16); +#endif +#if ACCESS_MEM_TO_RAM == ENABLED + Ctrl_status (*mem_2_ram)(U32, void *); + Ctrl_status (*ram_2_mem)(U32, const void *); +#endif + const char *name; +} lun_desc[MAX_LUN] = +{ +#if LUN_0 == ENABLE + Lun_desc_entry(0), +#endif +#if LUN_1 == ENABLE + Lun_desc_entry(1), +#endif +#if LUN_2 == ENABLE + Lun_desc_entry(2), +#endif +#if LUN_3 == ENABLE + Lun_desc_entry(3), +#endif +#if LUN_4 == ENABLE + Lun_desc_entry(4), +#endif +#if LUN_5 == ENABLE + Lun_desc_entry(5), +#endif +#if LUN_6 == ENABLE + Lun_desc_entry(6), +#endif +#if LUN_7 == ENABLE + Lun_desc_entry(7) +#endif +}; + +#endif + + +#if GLOBAL_WR_PROTECT == ENABLED +Bool g_wr_protect; +#endif + + +/*! \name Control Interface + */ +//! @{ + + +#ifdef FREERTOS_USED + +Bool ctrl_access_init(void) +{ + // If the handle to the protecting semaphore is not valid, + if (!ctrl_access_semphr) + { + // try to create the semaphore. + vSemaphoreCreateBinary(ctrl_access_semphr); + + // If the semaphore could not be created, there is no backup solution. + if (!ctrl_access_semphr) return FALSE; + } + + return TRUE; +} + + +/*! \brief Locks accesses to LUNs. + * + * \return \c TRUE if the access was successfully locked, else \c FALSE. + */ +static Bool ctrl_access_lock(void) +{ + // If the semaphore could not be created, there is no backup solution. + if (!ctrl_access_semphr) return FALSE; + + // Wait for the semaphore. + while (!xSemaphoreTake(ctrl_access_semphr, portMAX_DELAY)); + + return TRUE; +} + +#endif // FREERTOS_USED + + +U8 get_nb_lun(void) +{ +#if MEM_USB == ENABLE + U8 nb_lun; + + if (!Ctrl_access_lock()) return MAX_LUN; + + nb_lun = MAX_LUN + host_get_lun(); + + Ctrl_access_unlock(); + + return nb_lun; +#else + return MAX_LUN; +#endif +} + + +U8 get_cur_lun(void) +{ + return LUN_ID_0; +} + + +Ctrl_status mem_test_unit_ready(U8 lun) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].test_unit_ready() : +#endif +#if LUN_USB == ENABLE + Lun_usb_test_unit_ready(lun - LUN_ID_USB); +#else + CTRL_FAIL; +#endif + + Ctrl_access_unlock(); + + return status; +} + + +Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].read_capacity(u32_nb_sector) : +#endif +#if LUN_USB == ENABLE + Lun_usb_read_capacity(lun - LUN_ID_USB, u32_nb_sector); +#else + CTRL_FAIL; +#endif + + Ctrl_access_unlock(); + + return status; +} + + +U8 mem_sector_size(U8 lun) +{ + U8 sector_size; + + if (!Ctrl_access_lock()) return 0; + + sector_size = +#if MAX_LUN + (lun < MAX_LUN) ? 1 : +#endif +#if LUN_USB == ENABLE + Lun_usb_read_sector_size(lun - LUN_ID_USB); +#else + 0; +#endif + + Ctrl_access_unlock(); + + return sector_size; +} + + +Bool mem_wr_protect(U8 lun) +{ + Bool wr_protect; + + if (!Ctrl_access_lock()) return TRUE; + + wr_protect = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].wr_protect() : +#endif +#if LUN_USB == ENABLE + Lun_usb_wr_protect(lun - LUN_ID_USB); +#else + TRUE; +#endif + + Ctrl_access_unlock(); + + return wr_protect; +} + + +Bool mem_removal(U8 lun) +{ + Bool removal; + + if (!Ctrl_access_lock()) return TRUE; + + removal = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].removal() : +#endif +#if LUN_USB == ENABLE + Lun_usb_removal(); +#else + TRUE; +#endif + + Ctrl_access_unlock(); + + return removal; +} + + +const char *mem_name(U8 lun) +{ + return +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].name : +#endif +#if LUN_USB == ENABLE + LUN_USB_NAME; +#else + NULL; +#endif +} + + +//! @} + + +#if ACCESS_USB == ENABLED + +/*! \name MEM <-> USB Interface + */ +//! @{ + + +Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_read_action(nb_sector); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].usb_read_10(addr, nb_sector) : +#endif + CTRL_FAIL; + memory_stop_read_action(); + + Ctrl_access_unlock(); + + return status; +} + + +Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_write_action(nb_sector); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].usb_write_10(addr, nb_sector) : +#endif + CTRL_FAIL; + memory_stop_write_action(); + + Ctrl_access_unlock(); + + return status; +} + + +//! @} + +#endif // ACCESS_USB == ENABLED + + +#if ACCESS_MEM_TO_RAM == ENABLED + +/*! \name MEM <-> RAM Interface + */ +//! @{ + + +Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_read_action(1); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].mem_2_ram(addr, ram) : +#endif +#if LUN_USB == ENABLE + Lun_usb_mem_2_ram(addr, ram); +#else + CTRL_FAIL; +#endif + memory_stop_read_action(); + + Ctrl_access_unlock(); + + return status; +} + + +Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_write_action(1); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].ram_2_mem(addr, ram) : +#endif +#if LUN_USB == ENABLE + Lun_usb_ram_2_mem(addr, ram); +#else + CTRL_FAIL; +#endif + memory_stop_write_action(); + + Ctrl_access_unlock(); + + return status; +} + + +//! @} + +#endif // ACCESS_MEM_TO_RAM == ENABLED + + +#if ACCESS_STREAM == ENABLED + +/*! \name Streaming MEM <-> MEM Interface + */ +//! @{ + + + #if ACCESS_MEM_TO_MEM == ENABLED + +#include "fat.h" + +Ctrl_status stream_mem_to_mem(U8 src_lun, U32 src_addr, U8 dest_lun, U32 dest_addr, U16 nb_sector) +{ +#if (defined __GNUC__) && (defined __AVR32__) + __attribute__((__aligned__(4))) +#elif (defined __ICCAVR32__) + #pragma data_alignment = 4 +#endif + static U8 sector_buf[FS_512B]; + Ctrl_status status = CTRL_GOOD; + + while (nb_sector--) + { + if ((status = memory_2_ram(src_lun, src_addr++, sector_buf)) != CTRL_GOOD) break; + if ((status = ram_2_memory(dest_lun, dest_addr++, sector_buf)) != CTRL_GOOD) break; + } + + return status; +} + + #endif // ACCESS_MEM_TO_MEM == ENABLED + + +Ctrl_status stream_state(U8 id) +{ + return CTRL_GOOD; +} + + +U16 stream_stop(U8 id) +{ + return 0; +} + + +//! @} + +#endif // ACCESS_STREAM == ENABLED diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.h new file mode 100644 index 0000000..358bf65 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/SERVICES/MEMORY/CTRL_ACCESS/ctrl_access.h @@ -0,0 +1,369 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Abstraction layer for memory interfaces. + * + * This module contains the interfaces: + * - MEM <-> USB; + * - MEM <-> RAM; + * - MEM <-> MEM. + * + * This module may be configured and expanded to support the following features: + * - write-protected globals; + * - password-protected data; + * - specific features; + * - etc. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CTRL_ACCESS_H_ +#define _CTRL_ACCESS_H_ + +#include "compiler.h" +#include "conf_access.h" + + +//! Status returned by CTRL_ACCESS interfaces. +typedef enum +{ + CTRL_GOOD = PASS, //!< Success, memory ready. + CTRL_FAIL = FAIL, //!< An error occurred. + CTRL_NO_PRESENT = FAIL + 1, //!< Memory unplugged. + CTRL_BUSY = FAIL + 2 //!< Memory not initialized or changed. +} Ctrl_status; + + +// FYI: Each Logical Unit Number (LUN) corresponds to a memory. + +// Check LUN defines. +#ifndef LUN_0 + #error LUN_0 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_1 + #error LUN_1 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_2 + #error LUN_2 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_3 + #error LUN_3 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_4 + #error LUN_4 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_5 + #error LUN_5 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_6 + #error LUN_6 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_7 + #error LUN_7 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_USB + #error LUN_USB must be defined as ENABLE or DISABLE in conf_access.h +#endif + +/*! \name LUN IDs + */ +//! @{ +#define LUN_ID_0 (0) //!< First static LUN. +#define LUN_ID_1 (LUN_ID_0 + LUN_0) +#define LUN_ID_2 (LUN_ID_1 + LUN_1) +#define LUN_ID_3 (LUN_ID_2 + LUN_2) +#define LUN_ID_4 (LUN_ID_3 + LUN_3) +#define LUN_ID_5 (LUN_ID_4 + LUN_4) +#define LUN_ID_6 (LUN_ID_5 + LUN_5) +#define LUN_ID_7 (LUN_ID_6 + LUN_6) +#define MAX_LUN (LUN_ID_7 + LUN_7) //!< Number of static LUNs. +#define LUN_ID_USB (MAX_LUN) //!< First dynamic LUN (USB host mass storage). +//! @} + + +// Include LUN header files. +#if LUN_0 == ENABLE + #include LUN_0_INCLUDE +#endif +#if LUN_1 == ENABLE + #include LUN_1_INCLUDE +#endif +#if LUN_2 == ENABLE + #include LUN_2_INCLUDE +#endif +#if LUN_3 == ENABLE + #include LUN_3_INCLUDE +#endif +#if LUN_4 == ENABLE + #include LUN_4_INCLUDE +#endif +#if LUN_5 == ENABLE + #include LUN_5_INCLUDE +#endif +#if LUN_6 == ENABLE + #include LUN_6_INCLUDE +#endif +#if LUN_7 == ENABLE + #include LUN_7_INCLUDE +#endif +#if LUN_USB == ENABLE + #include LUN_USB_INCLUDE +#endif + + +// Check the configuration of write protection in conf_access.h. +#ifndef GLOBAL_WR_PROTECT + #error GLOBAL_WR_PROTECT must be defined as ENABLED or DISABLED in conf_access.h +#endif + + +#if GLOBAL_WR_PROTECT == ENABLED + +//! Write protect. +extern Bool g_wr_protect; + +#endif + + +/*! \name Control Interface + */ +//! @{ + +#ifdef FREERTOS_USED + +/*! \brief Initializes the LUN access locker. + * + * \return \c TRUE if the locker was successfully initialized, else \c FALSE. + */ +extern Bool ctrl_access_init(void); + +#endif // FREERTOS_USED + +/*! \brief Returns the number of LUNs. + * + * \return Number of LUNs in the system. + */ +extern U8 get_nb_lun(void); + +/*! \brief Returns the current LUN. + * + * \return Current LUN. + * + * \todo Implement. + */ +extern U8 get_cur_lun(void); + +/*! \brief Tests the memory state and initializes the memory if required. + * + * The TEST UNIT READY SCSI primary command allows an application client to poll + * a LUN until it is ready without having to allocate memory for returned data. + * + * This command may be used to check the media status of LUNs with removable + * media. + * + * \param lun Logical Unit Number. + * + * \return Status. + */ +extern Ctrl_status mem_test_unit_ready(U8 lun); + +/*! \brief Returns the address of the last valid sector (512 bytes) in the + * memory. + * + * \param lun Logical Unit Number. + * \param u32_nb_sector Pointer to the address of the last valid sector. + * + * \return Status. + */ +extern Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector); + +/*! \brief Returns the size of the physical sector. + * + * \param lun Logical Unit Number. + * + * \return Sector size (unit: 512 bytes). + */ +extern U8 mem_sector_size(U8 lun); + +/*! \brief Returns the write-protection state of the memory. + * + * \param lun Logical Unit Number. + * + * \return \c TRUE if the memory is write-protected, else \c FALSE. + * + * \note Only used by removable memories with hardware-specific write + * protection. + */ +extern Bool mem_wr_protect(U8 lun); + +/*! \brief Tells whether the memory is removable. + * + * \param lun Logical Unit Number. + * + * \return \c TRUE if the memory is removable, else \c FALSE. + */ +extern Bool mem_removal(U8 lun); + +/*! \brief Returns a pointer to the LUN name. + * + * \param lun Logical Unit Number. + * + * \return Pointer to the LUN name string. + */ +extern const char *mem_name(U8 lun); + +//! @} + + +#if ACCESS_USB == ENABLED + +/*! \name MEM <-> USB Interface + */ +//! @{ + +/*! \brief Tranfers data from the memory to USB. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to read. + * \param nb_sector Number of sectors to transfer. + * + * \return Status. + */ +extern Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector); + +/*! \brief Tranfers data from USB to the memory. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to write. + * \param nb_sector Number of sectors to transfer. + * + * \return Status. + */ +extern Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector); + +//! @} + +#endif // ACCESS_USB == ENABLED + + +#if ACCESS_MEM_TO_RAM == ENABLED + +/*! \name MEM <-> RAM Interface + */ +//! @{ + +/*! \brief Copies 1 data sector from the memory to RAM. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to read. + * \param ram Pointer to RAM buffer to write. + * + * \return Status. + */ +extern Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram); + +/*! \brief Copies 1 data sector from RAM to the memory. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to write. + * \param ram Pointer to RAM buffer to read. + * + * \return Status. + */ +extern Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram); + +//! @} + +#endif // ACCESS_MEM_TO_RAM == ENABLED + + +#if ACCESS_STREAM == ENABLED + +/*! \name Streaming MEM <-> MEM Interface + */ +//! @{ + +//! Erroneous streaming data transfer ID. +#define ID_STREAM_ERR 0xFF + + #if ACCESS_MEM_TO_MEM == ENABLED + +/*! \brief Copies data from one memory to another. + * + * \param src_lun Source Logical Unit Number. + * \param src_addr Source address of first memory sector to read. + * \param dest_lun Destination Logical Unit Number. + * \param dest_addr Destination address of first memory sector to write. + * \param nb_sector Number of sectors to copy. + * + * \return Status. + */ +extern Ctrl_status stream_mem_to_mem(U8 src_lun, U32 src_addr, U8 dest_lun, U32 dest_addr, U16 nb_sector); + + #endif // ACCESS_MEM_TO_MEM == ENABLED + +/*! \brief Returns the state of a streaming data transfer. + * + * \param id Transfer ID. + * + * \return Status. + * + * \todo Implement. + */ +extern Ctrl_status stream_state(U8 id); + +/*! \brief Stops a streaming data transfer. + * + * \param id Transfer ID. + * + * \return Number of remaining sectors. + * + * \todo Implement. + */ +extern U16 stream_stop(U8 id); + +//! @} + +#endif // ACCESS_STREAM == ENABLED + + +#endif // _CTRL_ACCESS_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.c new file mode 100644 index 0000000..c7c0a03 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.c @@ -0,0 +1,119 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Macros and functions dedicated to debug purposes. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USART module can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "compiler.h" +#include "debug.h" + + +#if (defined __GNUC__) +# include "malloc.h" + +U32 get_heap_curr_used_size( void ) +{ + struct mallinfo my_info=mallinfo(); + return my_info.uordblks; +} + +U32 get_heap_total_used_size( void ) +{ + struct mallinfo my_info=mallinfo(); + return my_info.arena; +} +#endif + +U32 get_heap_free_size( void ) +{ + U32 high_mark= AVR32_SRAM_SIZE; + U32 low_mark = 0; + U32 size ; + void* p_mem; + + size = (high_mark + low_mark)/2; + + do + { + p_mem = malloc(size); + if( p_mem != NULL) + { // Can allocate memory + free(p_mem); + low_mark = size; + } + else + { // Can not allocate memory + high_mark = size; + } + + size = (high_mark + low_mark)/2; + } + while( (high_mark-low_mark) >1 ); + + return size; +} + +static void* round_trace_pbuf; +static U32 round_trace_size; + +void uc3_round_trace_init(void* buf, U32 size) +{ + round_trace_pbuf = buf; + (*(U32*)round_trace_pbuf)=(U32)buf+4; + round_trace_size = size; +} + +void uc3_round_trace(U32 val) +{ + //Disable_global_interrupt(); + + U32* p_wr = (U32*)(*(U32*)round_trace_pbuf); + *p_wr = val; + p_wr++; + if( ((U32)p_wr % round_trace_size) ==0 ) + p_wr= (U32*)round_trace_pbuf+1; + *p_wr = 0xdeadbeef; + *(U32*)round_trace_pbuf = (U32)p_wr; + + //Enable_global_interrupt(); +} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.h new file mode 100644 index 0000000..a832d7c --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/debug.h @@ -0,0 +1,116 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Macros and functions dedicated to debug purposes. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USART module can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _DEBUG_H_ +#define _DEBUG_H_ + +#include "stringz.h" + +/*! \brief These macros are used to add traces memory. + * + * First, initialise the trace with Uc3_trace_init(pointer), giving the start address + * of the memory location where will be stored the trace. + * Use Uc3_trace(something) to store "something" into the memory. The end of the trace + * is signaled by the "0xdeadbeef" pattern. + */ +#define Uc3_trace_init(debug_addr) \ + *(U32*)(debug_addr)=debug_addr+4 + +#define Uc3_trace(debug_addr, x) \ + *(U32*)(*(U32*)(debug_addr) ) = (U32)(x) ;\ + *(U32*)(*(U32*)(debug_addr)+4) = 0xdeadbeef ;\ + *(U32*)(debug_addr ) = *(U32*)(debug_addr)+4 + +/*! \brief This macro is used to insert labels into assembly output. + * + */ +#define Insert_label(name) \ + __asm__ __volatile__ (STRINGZ(name)":"); + +#if (defined __GNUC__) +/*! \brief Returns the number of total of used bytes allocated from the HEAP. + * + * \retval total number of used bytes. + */ +U32 get_heap_total_used_size( void ); + +/*! \brief Returns the number of bytes currently used from the HEAP. + * + * \retval total number of used bytes. + */ +U32 get_heap_curr_used_size( void ); +#endif + +/*! \brief Returns the number of free bytes in the HEAP. + * + * This funtion tries to allocate the maximum number of bytes by dichotomical method. + * + * \retval number of free bytes. + */ +extern U32 get_heap_free_size( void ); + +/*! \name Traces function using a round buffer + */ +//! @{ + +/*! \brief Initialize the trace using a round buffer. + * + * \param buf Base address of the buffer used for the trace. + * \param size Size of the round buffer. Must be a power of 2. + */ +void uc3_round_trace_init(void* buf, U32 size); + +/*! \brief Trace a data in the round buffer. + * + * The end of the trace is signaled by the "0xdeadbeef" pattern. + * \param val Data to trace; + */ +void uc3_round_trace(U32 val); + +//! @} + + +#endif // _DEBUG_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.c b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.c new file mode 100644 index 0000000..99e9274 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.c @@ -0,0 +1,215 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Strings and integers print module for debug purposes. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USART module can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "compiler.h" +#include "gpio.h" +#include "usart.h" +#include "print_funcs.h" + + +//! ASCII representation of hexadecimal digits. +static const char HEX_DIGITS[16] = "0123456789ABCDEF"; + + +void init_dbg_rs232(long pba_hz) +{ + init_dbg_rs232_ex(DBG_USART_BAUDRATE, pba_hz); +} + + +void init_dbg_rs232_ex(unsigned long baudrate, long pba_hz) +{ + static const gpio_map_t DBG_USART_GPIO_MAP = + { + {DBG_USART_RX_PIN, DBG_USART_RX_FUNCTION}, + {DBG_USART_TX_PIN, DBG_USART_TX_FUNCTION} + }; + + // Options for debug USART. + usart_options_t dbg_usart_options = + { + .baudrate = baudrate, + .charlength = 8, + .paritytype = USART_NO_PARITY, + .stopbits = USART_1_STOPBIT, + .channelmode = USART_NORMAL_CHMODE + }; + + // Setup GPIO for debug USART. + gpio_enable_module(DBG_USART_GPIO_MAP, + sizeof(DBG_USART_GPIO_MAP) / sizeof(DBG_USART_GPIO_MAP[0])); + + // Initialize it in RS232 mode. + usart_init_rs232(DBG_USART, &dbg_usart_options, pba_hz); +} + + +void print_dbg(const char *str) +{ + // Redirection to the debug USART. + print(DBG_USART, str); +} + + +void print_dbg_char(int c) +{ + // Redirection to the debug USART. + print_char(DBG_USART, c); +} + + +void print_dbg_ulong(unsigned long n) +{ + // Redirection to the debug USART. + print_ulong(DBG_USART, n); +} + + +void print_dbg_char_hex(unsigned char n) +{ + // Redirection to the debug USART. + print_char_hex(DBG_USART, n); +} + + +void print_dbg_short_hex(unsigned short n) +{ + // Redirection to the debug USART. + print_short_hex(DBG_USART, n); +} + + +void print_dbg_hex(unsigned long n) +{ + // Redirection to the debug USART. + print_hex(DBG_USART, n); +} + + +void print(volatile avr32_usart_t *usart, const char *str) +{ + // Invoke the USART driver to transmit the input string with the given USART. + usart_write_line(usart, str); +} + + +void print_char(volatile avr32_usart_t *usart, int c) +{ + // Invoke the USART driver to transmit the input character with the given USART. + usart_putchar(usart, c); +} + + +void print_ulong(volatile avr32_usart_t *usart, unsigned long n) +{ + char tmp[11]; + int i = sizeof(tmp) - 1; + + // Convert the given number to an ASCII decimal representation. + tmp[i] = '\0'; + do + { + tmp[--i] = '0' + n % 10; + n /= 10; + } while (n); + + // Transmit the resulting string with the given USART. + print(usart, tmp + i); +} + + +void print_char_hex(volatile avr32_usart_t *usart, unsigned char n) +{ + char tmp[3]; + int i; + + // Convert the given number to an ASCII hexadecimal representation. + tmp[2] = '\0'; + for (i = 1; i >= 0; i--) + { + tmp[i] = HEX_DIGITS[n & 0xF]; + n >>= 4; + } + + // Transmit the resulting string with the given USART. + print(usart, tmp); +} + + +void print_short_hex(volatile avr32_usart_t *usart, unsigned short n) +{ + char tmp[5]; + int i; + + // Convert the given number to an ASCII hexadecimal representation. + tmp[4] = '\0'; + for (i = 3; i >= 0; i--) + { + tmp[i] = HEX_DIGITS[n & 0xF]; + n >>= 4; + } + + // Transmit the resulting string with the given USART. + print(usart, tmp); +} + + +void print_hex(volatile avr32_usart_t *usart, unsigned long n) +{ + char tmp[9]; + int i; + + // Convert the given number to an ASCII hexadecimal representation. + tmp[8] = '\0'; + for (i = 7; i >= 0; i--) + { + tmp[i] = HEX_DIGITS[n & 0xF]; + n >>= 4; + } + + // Transmit the resulting string with the given USART. + print(usart, tmp); +} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.h new file mode 100644 index 0000000..38f931d --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/DEBUG/print_funcs.h @@ -0,0 +1,294 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Strings and integers print module for debug purposes. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USART module can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _PRINT_FUNCS_H_ +#define _PRINT_FUNCS_H_ + +#include +#include "board.h" + + +/*! \name USART Settings for the Debug Module + */ +//! @{ +#if BOARD == EVK1100 +# define DBG_USART (&AVR32_USART1) +# define DBG_USART_RX_PIN AVR32_USART1_RXD_0_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART1_TXD_0_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION +# define DBG_USART_BAUDRATE 57600 +#elif BOARD == EVK1101 +# define DBG_USART (&AVR32_USART1) +# define DBG_USART_RX_PIN AVR32_USART1_RXD_0_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART1_TXD_0_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION +# define DBG_USART_BAUDRATE 57600 +#elif BOARD == UC3C_EK +# define DBG_USART (&AVR32_USART2) +# define DBG_USART_RX_PIN AVR32_USART2_RXD_0_1_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART2_RXD_0_1_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART2_TXD_0_1_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART2_TXD_0_1_FUNCTION +# define DBG_USART_BAUDRATE 57600 +#elif BOARD == EVK1104 +# define DBG_USART (&AVR32_USART1) +# define DBG_USART_RX_PIN AVR32_USART1_RXD_0_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART1_TXD_0_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION +# define DBG_USART_BAUDRATE 57600 +#elif BOARD == EVK1105 +# define DBG_USART (&AVR32_USART0) +# define DBG_USART_RX_PIN AVR32_USART0_RXD_0_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART0_RXD_0_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART0_TXD_0_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART0_TXD_0_0_FUNCTION +# define DBG_USART_BAUDRATE 57600 +#elif BOARD == STK1000 +# define DBG_USART (&AVR32_USART1) +# define DBG_USART_RX_PIN AVR32_USART1_RXD_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART1_TXD_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_FUNCTION +# define DBG_USART_BAUDRATE 115200 +#elif BOARD == NGW100 +# define DBG_USART (&AVR32_USART1) +# define DBG_USART_RX_PIN AVR32_USART1_RXD_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART1_TXD_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_FUNCTION +# define DBG_USART_BAUDRATE 115200 +#elif BOARD == STK600_RCUC3L0 +# define DBG_USART (&AVR32_USART1) +# define DBG_USART_RX_PIN AVR32_USART1_RXD_0_1_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_1_FUNCTION +// For the RX pin, connect STK600.PORTE.PE3 to STK600.RS232 SPARE.RXD +# define DBG_USART_TX_PIN AVR32_USART1_TXD_0_1_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_1_FUNCTION +// For the TX pin, connect STK600.PORTE.PE2 to STK600.RS232 SPARE.TXD +# define DBG_USART_BAUDRATE 57600 +# define DBG_USART_CLOCK_MASK AVR32_USART1_CLK_PBA +#elif BOARD == UC3L_EK +# define DBG_USART (&AVR32_USART3) +# define DBG_USART_RX_PIN AVR32_USART3_RXD_0_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART3_RXD_0_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART3_TXD_0_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART3_TXD_0_0_FUNCTION +# define DBG_USART_BAUDRATE 57600 +# define DBG_USART_CLOCK_MASK AVR32_USART3_CLK_PBA +#elif BOARD == ARDUINO +# define DBG_USART (&AVR32_USART1) +# define DBG_USART_RX_PIN AVR32_USART1_RXD_0_0_PIN +# define DBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION +# define DBG_USART_TX_PIN AVR32_USART1_TXD_0_0_PIN +# define DBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION +# define DBG_USART_BAUDRATE 57600 +# define DBG_USART_CLOCK_MASK AVR32_USART1_CLK_PBA +#endif + +#if !defined(DBG_USART) || \ + !defined(DBG_USART_RX_PIN) || \ + !defined(DBG_USART_RX_FUNCTION) || \ + !defined(DBG_USART_TX_PIN) || \ + !defined(DBG_USART_TX_FUNCTION) || \ + !defined(DBG_USART_BAUDRATE) +# error The USART configuration to use for debug on your board is missing +#endif +//! @} + +/*! \name VT100 Common Commands + */ +//! @{ +#define CLEARSCR "\x1B[2J\x1B[;H" //!< Clear screen. +#define CLEAREOL "\x1B[K" //!< Clear end of line. +#define CLEAREOS "\x1B[J" //!< Clear end of screen. +#define CLEARLCR "\x1B[0K" //!< Clear line cursor right. +#define CLEARLCL "\x1B[1K" //!< Clear line cursor left. +#define CLEARELN "\x1B[2K" //!< Clear entire line. +#define CLEARCDW "\x1B[0J" //!< Clear cursor down. +#define CLEARCUP "\x1B[1J" //!< Clear cursor up. +#define GOTOYX "\x1B[%.2d;%.2dH" //!< Set cursor to (y, x). +#define INSERTMOD "\x1B[4h" //!< Insert mode. +#define OVERWRITEMOD "\x1B[4l" //!< Overwrite mode. +#define DELAFCURSOR "\x1B[K" //!< Erase from cursor to end of line. +#define CRLF "\r\n" //!< Carriage Return + Line Feed. +//! @} + +/*! \name VT100 Cursor Commands + */ +//! @{ +#define CURSON "\x1B[?25h" //!< Show cursor. +#define CURSOFF "\x1B[?25l" //!< Hide cursor. +//! @} + +/*! \name VT100 Character Commands + */ +//! @{ +#define NORMAL "\x1B[0m" //!< Normal. +#define BOLD "\x1B[1m" //!< Bold. +#define UNDERLINE "\x1B[4m" //!< Underline. +#define BLINKING "\x1B[5m" //!< Blink. +#define INVVIDEO "\x1B[7m" //!< Inverse video. +//! @} + +/*! \name VT100 Color Commands + */ +//! @{ +#define CL_BLACK "\033[22;30m" //!< Black. +#define CL_RED "\033[22;31m" //!< Red. +#define CL_GREEN "\033[22;32m" //!< Green. +#define CL_BROWN "\033[22;33m" //!< Brown. +#define CL_BLUE "\033[22;34m" //!< Blue. +#define CL_MAGENTA "\033[22;35m" //!< Magenta. +#define CL_CYAN "\033[22;36m" //!< Cyan. +#define CL_GRAY "\033[22;37m" //!< Gray. +#define CL_DARKGRAY "\033[01;30m" //!< Dark gray. +#define CL_LIGHTRED "\033[01;31m" //!< Light red. +#define CL_LIGHTGREEN "\033[01;32m" //!< Light green. +#define CL_YELLOW "\033[01;33m" //!< Yellow. +#define CL_LIGHTBLUE "\033[01;34m" //!< Light blue. +#define CL_LIGHTMAGENTA "\033[01;35m" //!< Light magenta. +#define CL_LIGHTCYAN "\033[01;36m" //!< Light cyan. +#define CL_WHITE "\033[01;37m" //!< White. +//! @} + + +/*! \brief Sets up DBG_USART with 8N1 at DBG_USART_BAUDRATE. + * + * \param pba_hz PBA clock frequency (Hz). + */ +extern void init_dbg_rs232(long pba_hz); + +/*! \brief Sets up DBG_USART with 8N1 at a given baud rate. + * + * \param baudrate Baud rate to set DBG_USART to. + * \param pba_hz PBA clock frequency (Hz). + */ +extern void init_dbg_rs232_ex(unsigned long baudrate, long pba_hz); + +/*! \brief Prints a string of characters to DBG_USART. + * + * \param str The string of characters to print. + */ +extern void print_dbg(const char *str); + +/*! \brief Prints a character to DBG_USART. + * + * \param c The character to print. + */ +extern void print_dbg_char(int c); + +/*! \brief Prints an integer to DBG_USART in a decimal representation. + * + * \param n The integer to print. + */ +extern void print_dbg_ulong(unsigned long n); + +/*! \brief Prints a char to DBG_USART in an hexadecimal representation. + * + * \param n The char to print. + */ +extern void print_dbg_char_hex(unsigned char n); + +/*! \brief Prints a short integer to DBG_USART in an hexadecimal representation. + * + * \param n The short integer to print. + */ +extern void print_dbg_short_hex(unsigned short n); + +/*! \brief Prints an integer to DBG_USART in an hexadecimal representation. + * + * \param n The integer to print. + */ +extern void print_dbg_hex(unsigned long n); + +/*! \brief Prints a string of characters to a given USART. + * + * \param usart Base address of the USART instance to print to. + * \param str The string of characters to print. + */ +extern void print(volatile avr32_usart_t *usart, const char *str); + +/*! \brief Prints a character to a given USART. + * + * \param usart Base address of the USART instance to print to. + * \param c The character to print. + */ +extern void print_char(volatile avr32_usart_t *usart, int c); + +/*! \brief Prints an integer to a given USART in a decimal representation. + * + * \param usart Base address of the USART instance to print to. + * \param n The integer to print. + */ +extern void print_ulong(volatile avr32_usart_t *usart, unsigned long n); + +/*! \brief Prints a char to a given USART in an hexadecimal representation. + * + * \param usart Base address of the USART instance to print to. + * \param n The char to print. + */ +extern void print_char_hex(volatile avr32_usart_t *usart, unsigned char n); + +/*! \brief Prints a short integer to a given USART in an hexadecimal + * representation. + * + * \param usart Base address of the USART instance to print to. + * \param n The short integer to print. + */ +extern void print_short_hex(volatile avr32_usart_t *usart, unsigned short n); + +/*! \brief Prints an integer to a given USART in an hexadecimal representation. + * + * \param usart Base address of the USART instance to print to. + * \param n The integer to print. + */ +extern void print_hex(volatile avr32_usart_t *usart, unsigned long n); + + +#endif // _PRINT_FUNCS_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_cpu.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_cpu.h new file mode 100644 index 0000000..e3ebea7 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_cpu.h @@ -0,0 +1,63 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief NEWLIB_ADDONS CPU include file for AVR32. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef __AVR32_NEWLIB_ADDONS_CPU_H__ +#define __AVR32_NEWLIB_ADDONS_CPU_H__ + +#include <_ansi.h> + +_BEGIN_STD_C + +#define CPU_HZ get_cpu_hz() + +void udelay(unsigned long usec); +void set_cpu_hz(unsigned int clk_hz); +unsigned int get_cpu_hz(); + +_END_STD_C + +#endif diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_exceptions.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_exceptions.h new file mode 100644 index 0000000..31caf13 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_exceptions.h @@ -0,0 +1,120 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief NEWLIB_ADDONS exceptions include file for AVR32. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef __AVR32_NEWLIB_ADDONS_EXCEPTIONS_H__ +#define __AVR32_NEWLIB_ADDONS_EXCEPTIONS_H__ + +#include <_ansi.h> + +_BEGIN_STD_C + +/* + Exception vector offsets +*/ +#define EVBA_UNRECOVERABLE 0x000 +#define EVBA_TLB_MULTIPLE 0x004 +#define EVBA_BUS_ERROR_DATA 0x008 +#define EVBA_BUS_ERROR_INSTR 0x00C +#define EVBA_NMI 0x010 +#define EVBA_INSTR_ADDR 0x014 +#define EVBA_ITLB_MISS 0x050 +#define EVBA_ITLB_PROT 0x018 +#define EVBA_BREAKPOINT 0x01C +#define EVBA_ILLEGAL_OPCODE 0x020 +#define EVBA_UNIMPLEMENTED 0x024 +#define EVBA_PRIVILEGE_VIOL 0x028 +#define EVBA_FLOATING_POINT 0x02C +#define EVBA_COP_ABSENT 0x030 +#define EVBA_SCALL 0x100 +#define EVBA_DATA_ADDR_R 0x034 +#define EVBA_DATA_ADDR_W 0x038 +#define EVBA_DTLB_MISS_R 0x060 +#define EVBA_DTLB_MISS_W 0x070 +#define EVBA_DTLB_PROT_R 0x03C +#define EVBA_DTLB_PROT_W 0x040 +#define EVBA_DTLB_MODIFIED 0x044 + + +/* + Define the form of the function used when registering exceptions. + The function should return the address which the exception should + return to after the exception processing. +*/ + +typedef unsigned int (*__exception_handler)(int /*evba_offset*/, int /*return address*/); + +/* + Define the form of the function used when registering a scall handler. +*/ + +typedef void (*__scall_handler)(int /*code*/, int /*p1*/, int /*p2*/ + , int /*p3*/, int /*p4*/); + +/* + Function for registering an exception handler for the exception with + offset given by evba_offset. +*/ +void _register_exception_handler(__exception_handler handler, int evba_offset); + +/* + Function for registering a scall handler which can be a arbirary + function which uses r8-r12 for parameters. +*/ +void _register_scall_handler(__scall_handler handler); + +/* + Initialize exceptions. Must be called before registering exception handlers + and needed to enable exceptions. 'evba' is the pointer to the exception + vector. 'handler_table' is a pointer to an array where the pointers to + the exception handlers are stored. This array must be at least 0x104 bytes + and word aligned. +*/ +void init_exceptions(void *evba, void *handler_table); + +_END_STD_C + +#endif diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_interrupts.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_interrupts.h new file mode 100644 index 0000000..76d81f7 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_interrupts.h @@ -0,0 +1,82 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief NEWLIB_ADDONS interrupts include file for AVR32. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef __AVR32_NEWLIB_ADDONS_INTERRUPTS_H__ +#define __AVR32_NEWLIB_ADDONS_INTERRUPTS_H__ + +#include <_ansi.h> + +_BEGIN_STD_C + +#define INT_GRPS 64 +#define INT_LINES 32 +#define INTPR_BASE (__intc_base__ + 0x0000) +#define INTREQ_BASE (__intc_base__ + 64*4) +#define INTCAUSE_BASE (__intc_base__ + 2*64*4) + +//Register offsets +#define INTLEVEL 30 +#define AUTOVECTOR 0 +#define AUTOVECTOR_BITS 14 + +//Priorities +#define INT0 0 +#define INT1 1 +#define INT2 2 +#define INT3 3 + + +typedef void (*__newlib_int_handler)(int /* int_grp*/, void */*user_handle*/); + +__newlib_int_handler register_interrupt(__newlib_int_handler handler, int int_grp, int line, int priority, + .../* void *user_handle*/); +void init_interrupts(); +void set_interrupts_base(void *base); + +_END_STD_C + +#endif diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_io.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_io.h new file mode 100644 index 0000000..a725769 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_io.h @@ -0,0 +1,174 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief NEWLIB_ADDONS miscellaneous macros include file for AVR32. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef __AVR32_NEWLIB_ADDONS_IO_H__ +#define __AVR32_NEWLIB_ADDONS_IO_H__ + +#include <_ansi.h> + +_BEGIN_STD_C + +typedef char u8; +typedef unsigned int u32; + +#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v)) +#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) +#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v)) + +#define __raw_readb(a) (*(volatile unsigned char *)(a)) +#define __raw_readw(a) (*(volatile unsigned short *)(a)) +#define __raw_readl(a) (*(volatile unsigned int *)(a)) + +/* As long as I/O is only performed in P4 (or possibly P3), we're safe */ +#define writeb(v,a) __raw_writeb(v,a) +#define writew(v,a) __raw_writew(v,a) +#define writel(v,a) __raw_writel(v,a) + +#define readb(a) __raw_readb(a) +#define readw(a) __raw_readw(a) +#define readl(a) __raw_readl(a) + +/* Memory segments when segmentation is enabled */ +#define P0SEG 0x00000000 +#define P1SEG 0x80000000 +#define P2SEG 0xa0000000 +#define P3SEG 0xc0000000 +#define P4SEG 0xe0000000 + +/* Returns the privileged segment base of a given address */ +#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) + +/* Returns the physical address of a PnSEG (n=1,2) address */ +#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) + +/* + * Map an address to a certain privileged segment + */ +#define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG)) +#define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG)) +#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG)) +#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG)) + + +#define cached(addr) P1SEGADDR(addr) +#define uncached(addr) P2SEGADDR(addr) +#define physaddr(addr) PHYSADDR(addr) + +#define BF(field, value) \ + ({ union { \ + struct { \ + unsigned : 32 - field ## _OFFSET - field ## _SIZE ; \ + unsigned long __val: field ## _SIZE ; \ + }; \ + unsigned long __ul; \ + } __tmp; \ + __tmp.__ul = 0; \ + __tmp.__val = value; \ + __tmp.__ul;}) + +#define BF_D(field, value) \ + ({ union { \ + struct { \ + unsigned long long : 64 - field ## _OFFSET - field ## _SIZE ; \ + unsigned long long __val: field ## _SIZE ; \ + }; \ + unsigned long long __ul; \ + } __tmp; \ + __tmp.__ul = 0; \ + __tmp.__val = value; \ + __tmp.__ul;}) + +#define BFINS(var, field, value) \ + { union {\ + struct { \ + unsigned : 32 - field ## _OFFSET - field ## _SIZE ; \ + unsigned long __val: field ## _SIZE ; \ + }; \ + unsigned long __ul; \ + } __tmp; \ + __tmp.__ul = var; \ + __tmp.__val = value; \ + var = __tmp.__ul;} + +#define BFEXT(var, field) \ + ({ union {\ + struct { \ + unsigned : 32 - field ## _OFFSET - field ## _SIZE ; \ + unsigned long __val: field ## _SIZE ; \ + }; \ + unsigned long __ul; \ + } __tmp; \ + __tmp.__ul = var; \ + __tmp.__val; }) + +#define BFINS_D(var, field, value) \ + { union {\ + struct { \ + unsigned long long : 64 - field ## _OFFSET - field ## _SIZE ; \ + unsigned long long __val: field ## _SIZE ; \ + }; \ + unsigned long long __ul; \ + } __tmp; \ + __tmp.__ul = var; \ + __tmp.__val = value; \ + var = __tmp.__ul;} + +#define BFEXT_D(var, field) \ + ({ union {\ + struct { \ + unsigned long long : 64 - field ## _OFFSET - field ## _SIZE ; \ + unsigned long long __val: field ## _SIZE ; \ + }; \ + unsigned long long __ul; \ + } __tmp; \ + __tmp.__ul = var; \ + __tmp.__val; }) + + +_END_STD_C + +#endif diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_usart.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_usart.h new file mode 100644 index 0000000..6c4697d --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_usart.h @@ -0,0 +1,208 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief NEWLIB_ADDONS USART include file for AVR32. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef __AVR32_NEWLIB_ADDONS_USART_H__ +#define __AVR32_NEWLIB_ADDONS_USART_H__ + +#include <_ansi.h> + +#include "nlao_io.h" + +_BEGIN_STD_C + +struct usart3 { + volatile u32 us_cr; + volatile u32 us_mr; + volatile u32 us_ier; + volatile u32 us_idr; + volatile u32 us_imr; + volatile u32 us_csr; + volatile u32 us_rhr; + volatile u32 us_thr; + volatile u32 us_brgr; + volatile u32 us_rtor; + volatile u32 us_ttgr; + volatile u32 us_reserved[5]; + volatile u32 us_fidi; + volatile u32 us_ner; + volatile u32 us_xxr; + volatile u32 us_if; +}; + +/* Register offsets */ +#define US_CR 0x0000 +#define US_MR 0x0004 +#define US_IER 0x0008 +#define US_IDR 0x000c +#define US_IMR 0x0010 +#define US_CSR 0x0014 +#define US_RHR 0x0018 +#define US_THR 0x001c +#define US_BRGR 0x0020 +#define US_RTOR 0x0024 +#define US_TTGR 0x0028 + +#define US_FIDI 0x0040 +#define US_NER 0x0044 +#define US_XXR 0x0048 +#define US_IF 0x004c + +#define US_RPR 0x0100 +#define US_RCR 0x0104 +#define US_TPR 0x0108 +#define US_TCR 0x010c +#define US_RNPR 0x0110 +#define US_RNCR 0x0114 +#define US_TNPR 0x0118 +#define US_TNCR 0x011c +#define US_PTCR 0x0120 +#define US_PTSR 0x0124 + + + + +/* USART3 Control Register */ +#define US_CR_RSTRX (1 << 2) +#define US_CR_RSTTX (1 << 3) +#define US_CR_RXEN (1 << 4) +#define US_CR_RXDIS (1 << 5) +#define US_CR_TXEN (1 << 6) +#define US_CR_TXDIS (1 << 7) +#define US_CR_RSTSTA (1 << 8) +#define US_CR_STTBRK (1 << 9) +#define US_CR_STPBRK (1 << 10) + +#define US_CR_DTREN (1 << 16) +#define US_CR_DTRDIS (1 << 17) +#define US_CR_RTSEN (1 << 18) +#define US_CR_RTSDIS (1 << 19) + +/* USART3 Mode Register */ +#define US_MR_MODE (15 << 0) +#define US_MR_MODE_NORMAL ( 0 << 0) +#define US_MR_MODE_HWFLOW ( 2 << 0) +#define US_MR_CLKS ( 3 << 4) +#define US_MR_CLKS_CLOCK ( 0 << 4) +#define US_MR_CLKS_FDIV1 ( 1 << 4) +#define US_MR_CLKS_SLOW ( 2 << 4) +#define US_MR_CLKS_EXT ( 3 << 4) +#define US_MR_CHRL_5BITS ( 0 << 6) +#define US_MR_CHRL_6BITS ( 1 << 6) +#define US_MR_CHRL_7BITS ( 2 << 6) +#define US_MR_CHRL_8BITS ( 3 << 6) +#define US_MR_SYNC ( 1 << 8) +#define US_MR_PAR_EVEN ( 0 << 9) +#define US_MR_PAR_ODD ( 1 << 9) +#define US_MR_PAR_SPACE ( 2 << 9) +#define US_MR_PAR_MARK ( 3 << 9) +#define US_MR_PAR_NONE ( 4 << 9) +#define US_MR_PAR_MDROP ( 6 << 9) +#define US_MR_NBSTOP_1BIT ( 0 << 12) +#define US_MR_NBSTOP_1_5BIT ( 1 << 12) +#define US_MR_NBSTOP_2BITS ( 2 << 12) +#define US_MR_OVER ( 1 << 19) +#define US_MR_OVER_X16 ( 0 << 19) +#define US_MR_OVER_X8 ( 1 << 19) + +/* USART3 Channel Status Register */ +#define US_CSR_RXRDY (1 << 0) +#define US_CSR_TXRDY (1 << 1) +#define US_CSR_RXBRK (1 << 2) +#define US_CSR_ENDRX (1 << 3) +#define US_CSR_ENDTX (1 << 4) + + +#define US_CSR_OVRE (1 << 5) +#define US_CSR_FRAME (1 << 6) +#define US_CSR_PARE (1 << 7) + +#define US_CSR_TXEMPTY (1 << 9) + +#define US_CSR_TXBUFE (1 << 11) +#define US_CSR_RXBUFF (1 << 12) +#define US_CSR_RIIC (1 << 16) +#define US_CSR_DSRIC (1 << 17) +#define US_CSR_DCDIC (1 << 18) +#define US_CSR_CTSIC (1 << 19) +#define US_CSR_RI (1 << 20) +#define US_CSR_DSR (1 << 21) +#define US_CSR_DCD (1 << 22) +#define US_CSR_CTS (1 << 23) + +/* USART3 Baud Rate Generator Register */ +#define US_BRGR_CD_OFFSET 0 +#define US_BRGR_FP_OFFSET 16 + +#define US_BRGR_CD_SIZE 16 +#define US_BRGR_FP_SIZE 3 + +#define US_BRGR_CD (0xFFFF << 0) +#define US_BRGR_FP ( 7 << 16) + +/*USART3 PDC Transfer Control Register */ +#define US_PTCR_RXTEN (1 << 0) +#define US_PTCR_RXTDIS (1 << 1) +#define US_PTCR_TXTEN (1 << 8) +#define US_PTCR_TXTDIS (1 << 9) + +/*USART3 PDC Transfer Status Register */ +#define US_PTSR_RXTEN (1 << 0) +#define US_PTSR_TXTEN (1 << 8) + + +int usart_init(int baudrate); +void usart_putc(char c); +void usart_puts(const char *s); +int usart_getc(void); +int usart_tstc(void); +void usart_setbrg(int baudrate, int cpu_clock); +void set_usart_base(void *usart_base); + + +_END_STD_C + +#endif /* MERLIN_USART3_H */ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/libnewlib_addons-at32ucr2-speed_opt.a b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/libnewlib_addons-at32ucr2-speed_opt.a new file mode 100644 index 0000000..aa673ec Binary files /dev/null and b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/libnewlib_addons-at32ucr2-speed_opt.a differ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds new file mode 100644 index 0000000..59152ac --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds @@ -0,0 +1,266 @@ +/****************************************************************************** + * AVR32 AT32UC3A0512 GNU LD script file. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: AVR32 AT32UC3A0512 + * + * - author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") + +OUTPUT_ARCH(avr32:uc) + +ENTRY(_start) + +MEMORY +{ + FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00080000 + INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC + USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200 +} + +PHDRS +{ + FLASH PT_LOAD; + INTRAM_ALIGN PT_NULL; + INTRAM_AT_FLASH PT_LOAD; + INTRAM PT_NULL; + USERPAGE PT_LOAD; +} + +SECTIONS +{ + /* If this heap size is selected, all the INTRAM space from the end of the + data area to the beginning of the stack will be allocated for the heap. */ + __max_heap_size__ = -1; + + /* Use a default heap size if heap size was not defined. */ + __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__; + + /* Use a default stack size if stack size was not defined. */ + __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K; + + /* Read-only sections, merged into text segment: */ + PROVIDE (__executable_start = 0x80000000); . = 0x80000000; + .interp : { *(.interp) } >FLASH AT>FLASH :FLASH + .reset : { *(.reset) } >FLASH AT>FLASH :FLASH + .hash : { *(.hash) } >FLASH AT>FLASH :FLASH + .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH + .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH + .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH + .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH + .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH + .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH + .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH + .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH + .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH + .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH + .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH + .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH + .rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH + .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH + .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH + .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH + .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH + .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH + .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH + .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH + .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH + .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH + .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH + .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH + .rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH + .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH + .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH + .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH + .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH + .init : + { + KEEP (*(.init)) + } >FLASH AT>FLASH :FLASH =0xd703d703 + .plt : { *(.plt) } >FLASH AT>FLASH :FLASH + .text : + { + *(.text .stub .text.* .gnu.linkonce.t.*) + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + } >FLASH AT>FLASH :FLASH =0xd703d703 + .fini : + { + KEEP (*(.fini)) + } >FLASH AT>FLASH :FLASH =0xd703d703 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH + .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH + .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH + .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH + . = ORIGIN(INTRAM); + .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM_ALIGN + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + /* Ensure the __preinit_array_start label is properly aligned. We + could instead move the label definition inside the section, but + the linker would then create the section even if it turns out to + be empty, which isn't pretty. */ + PROVIDE (__preinit_array_start = ALIGN(32 / 8)); + .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__fini_array_end = .); + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin*.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .dtors : + { + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .ramtext : { *(.ramtext .ramtext.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .ddalign : { . = ALIGN(8); } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data : + { + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data1 : { *(.data1) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .balign : { . = ALIGN(8); PROVIDE(_edata = .); } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (edata = .); + __bss_start = .; + .bss : + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. */ + . = ALIGN(8); + } >INTRAM AT>INTRAM :INTRAM + . = ALIGN(8); + _end = .; + PROVIDE (end = .); + __heap_start__ = ALIGN(8); + .heap : + { + *(.heap) + . = (__heap_size__ == __max_heap_size__) ? + ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) : + __heap_size__; + } >INTRAM AT>INTRAM :INTRAM + __heap_end__ = .; + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ : + { + _stack = .; + *(.stack) + . = __stack_size__; + _estack = .; + } >INTRAM AT>INTRAM :INTRAM + .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/GCC/link_uc3a1256.lds b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/GCC/link_uc3a1256.lds new file mode 100644 index 0000000..a5926d8 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/GCC/link_uc3a1256.lds @@ -0,0 +1,266 @@ +/****************************************************************************** + * AVR32 AT32UC3A1256 GNU LD script file. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: AVR32 AT32UC3A1256 + * + * - author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") + +OUTPUT_ARCH(avr32:uc) + +ENTRY(_start) + +MEMORY +{ + FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000 + INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC + USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200 +} + +PHDRS +{ + FLASH PT_LOAD; + INTRAM_ALIGN PT_NULL; + INTRAM_AT_FLASH PT_LOAD; + INTRAM PT_NULL; + USERPAGE PT_LOAD; +} + +SECTIONS +{ + /* If this heap size is selected, all the INTRAM space from the end of the + data area to the beginning of the stack will be allocated for the heap. */ + __max_heap_size__ = -1; + + /* Use a default heap size if heap size was not defined. */ + __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__; + + /* Use a default stack size if stack size was not defined. */ + __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K; + + /* Read-only sections, merged into text segment: */ + PROVIDE (__executable_start = 0x80000000); . = 0x80000000; + .interp : { *(.interp) } >FLASH AT>FLASH :FLASH + .reset : { *(.reset) } >FLASH AT>FLASH :FLASH + .hash : { *(.hash) } >FLASH AT>FLASH :FLASH + .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH + .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH + .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH + .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH + .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH + .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH + .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH + .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH + .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH + .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH + .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH + .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH + .rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH + .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH + .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH + .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH + .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH + .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH + .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH + .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH + .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH + .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH + .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH + .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH + .rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH + .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH + .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH + .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH + .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH + .init : + { + KEEP (*(.init)) + } >FLASH AT>FLASH :FLASH =0xd703d703 + .plt : { *(.plt) } >FLASH AT>FLASH :FLASH + .text : + { + *(.text .stub .text.* .gnu.linkonce.t.*) + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + } >FLASH AT>FLASH :FLASH =0xd703d703 + .fini : + { + KEEP (*(.fini)) + } >FLASH AT>FLASH :FLASH =0xd703d703 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH + .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH + .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH + .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH + . = ORIGIN(INTRAM); + .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM_ALIGN + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + /* Ensure the __preinit_array_start label is properly aligned. We + could instead move the label definition inside the section, but + the linker would then create the section even if it turns out to + be empty, which isn't pretty. */ + PROVIDE (__preinit_array_start = ALIGN(32 / 8)); + .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__fini_array_end = .); + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin*.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .dtors : + { + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .ramtext : { *(.ramtext .ramtext.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .ddalign : { . = ALIGN(8); } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data : + { + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data1 : { *(.data1) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .balign : { . = ALIGN(8); PROVIDE(_edata = .); } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (edata = .); + __bss_start = .; + .bss : + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. */ + . = ALIGN(8); + } >INTRAM AT>INTRAM :INTRAM + . = ALIGN(8); + _end = .; + PROVIDE (end = .); + __heap_start__ = ALIGN(8); + .heap : + { + *(.heap) + . = (__heap_size__ == __max_heap_size__) ? + ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) : + __heap_size__; + } >INTRAM AT>INTRAM :INTRAM + __heap_end__ = .; + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ : + { + _stack = .; + *(.stack) + . = __stack_size__; + _estack = .; + } >INTRAM AT>INTRAM :INTRAM + .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/mrepeat.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/mrepeat.h new file mode 100644 index 0000000..41163b6 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/mrepeat.h @@ -0,0 +1,328 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor macro repeating utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _MREPEAT_H_ +#define _MREPEAT_H_ + +#include "preprocessor.h" + + +//! Maximal number of repetitions supported by MREPEAT. +#define MREPEAT_LIMIT 256 + +/*! \brief Macro repeat. + * + * This macro represents a horizontal repetition construct. + * + * \param count The number of repetitious calls to macro. Valid values range from 0 to MREPEAT_LIMIT. + * \param macro A binary operation of the form macro(n, data). This macro is expanded by MREPEAT with + * the current repetition number and the auxiliary data argument. + * \param data Auxiliary data passed to macro. + * + * \return macro(0, data) macro(1, data) ... macro(count - 1, data) + */ +#define MREPEAT(count, macro, data) TPASTE2(MREPEAT, count)(macro, data) + +#define MREPEAT0( macro, data) +#define MREPEAT1( macro, data) MREPEAT0( macro, data) macro( 0, data) +#define MREPEAT2( macro, data) MREPEAT1( macro, data) macro( 1, data) +#define MREPEAT3( macro, data) MREPEAT2( macro, data) macro( 2, data) +#define MREPEAT4( macro, data) MREPEAT3( macro, data) macro( 3, data) +#define MREPEAT5( macro, data) MREPEAT4( macro, data) macro( 4, data) +#define MREPEAT6( macro, data) MREPEAT5( macro, data) macro( 5, data) +#define MREPEAT7( macro, data) MREPEAT6( macro, data) macro( 6, data) +#define MREPEAT8( macro, data) MREPEAT7( macro, data) macro( 7, data) +#define MREPEAT9( macro, data) MREPEAT8( macro, data) macro( 8, data) +#define MREPEAT10( macro, data) MREPEAT9( macro, data) macro( 9, data) +#define MREPEAT11( macro, data) MREPEAT10( macro, data) macro( 10, data) +#define MREPEAT12( macro, data) MREPEAT11( macro, data) macro( 11, data) +#define MREPEAT13( macro, data) MREPEAT12( macro, data) macro( 12, data) +#define MREPEAT14( macro, data) MREPEAT13( macro, data) macro( 13, data) +#define MREPEAT15( macro, data) MREPEAT14( macro, data) macro( 14, data) +#define MREPEAT16( macro, data) MREPEAT15( macro, data) macro( 15, data) +#define MREPEAT17( macro, data) MREPEAT16( macro, data) macro( 16, data) +#define MREPEAT18( macro, data) MREPEAT17( macro, data) macro( 17, data) +#define MREPEAT19( macro, data) MREPEAT18( macro, data) macro( 18, data) +#define MREPEAT20( macro, data) MREPEAT19( macro, data) macro( 19, data) +#define MREPEAT21( macro, data) MREPEAT20( macro, data) macro( 20, data) +#define MREPEAT22( macro, data) MREPEAT21( macro, data) macro( 21, data) +#define MREPEAT23( macro, data) MREPEAT22( macro, data) macro( 22, data) +#define MREPEAT24( macro, data) MREPEAT23( macro, data) macro( 23, data) +#define MREPEAT25( macro, data) MREPEAT24( macro, data) macro( 24, data) +#define MREPEAT26( macro, data) MREPEAT25( macro, data) macro( 25, data) +#define MREPEAT27( macro, data) MREPEAT26( macro, data) macro( 26, data) +#define MREPEAT28( macro, data) MREPEAT27( macro, data) macro( 27, data) +#define MREPEAT29( macro, data) MREPEAT28( macro, data) macro( 28, data) +#define MREPEAT30( macro, data) MREPEAT29( macro, data) macro( 29, data) +#define MREPEAT31( macro, data) MREPEAT30( macro, data) macro( 30, data) +#define MREPEAT32( macro, data) MREPEAT31( macro, data) macro( 31, data) +#define MREPEAT33( macro, data) MREPEAT32( macro, data) macro( 32, data) +#define MREPEAT34( macro, data) MREPEAT33( macro, data) macro( 33, data) +#define MREPEAT35( macro, data) MREPEAT34( macro, data) macro( 34, data) +#define MREPEAT36( macro, data) MREPEAT35( macro, data) macro( 35, data) +#define MREPEAT37( macro, data) MREPEAT36( macro, data) macro( 36, data) +#define MREPEAT38( macro, data) MREPEAT37( macro, data) macro( 37, data) +#define MREPEAT39( macro, data) MREPEAT38( macro, data) macro( 38, data) +#define MREPEAT40( macro, data) MREPEAT39( macro, data) macro( 39, data) +#define MREPEAT41( macro, data) MREPEAT40( macro, data) macro( 40, data) +#define MREPEAT42( macro, data) MREPEAT41( macro, data) macro( 41, data) +#define MREPEAT43( macro, data) MREPEAT42( macro, data) macro( 42, data) +#define MREPEAT44( macro, data) MREPEAT43( macro, data) macro( 43, data) +#define MREPEAT45( macro, data) MREPEAT44( macro, data) macro( 44, data) +#define MREPEAT46( macro, data) MREPEAT45( macro, data) macro( 45, data) +#define MREPEAT47( macro, data) MREPEAT46( macro, data) macro( 46, data) +#define MREPEAT48( macro, data) MREPEAT47( macro, data) macro( 47, data) +#define MREPEAT49( macro, data) MREPEAT48( macro, data) macro( 48, data) +#define MREPEAT50( macro, data) MREPEAT49( macro, data) macro( 49, data) +#define MREPEAT51( macro, data) MREPEAT50( macro, data) macro( 50, data) +#define MREPEAT52( macro, data) MREPEAT51( macro, data) macro( 51, data) +#define MREPEAT53( macro, data) MREPEAT52( macro, data) macro( 52, data) +#define MREPEAT54( macro, data) MREPEAT53( macro, data) macro( 53, data) +#define MREPEAT55( macro, data) MREPEAT54( macro, data) macro( 54, data) +#define MREPEAT56( macro, data) MREPEAT55( macro, data) macro( 55, data) +#define MREPEAT57( macro, data) MREPEAT56( macro, data) macro( 56, data) +#define MREPEAT58( macro, data) MREPEAT57( macro, data) macro( 57, data) +#define MREPEAT59( macro, data) MREPEAT58( macro, data) macro( 58, data) +#define MREPEAT60( macro, data) MREPEAT59( macro, data) macro( 59, data) +#define MREPEAT61( macro, data) MREPEAT60( macro, data) macro( 60, data) +#define MREPEAT62( macro, data) MREPEAT61( macro, data) macro( 61, data) +#define MREPEAT63( macro, data) MREPEAT62( macro, data) macro( 62, data) +#define MREPEAT64( macro, data) MREPEAT63( macro, data) macro( 63, data) +#define MREPEAT65( macro, data) MREPEAT64( macro, data) macro( 64, data) +#define MREPEAT66( macro, data) MREPEAT65( macro, data) macro( 65, data) +#define MREPEAT67( macro, data) MREPEAT66( macro, data) macro( 66, data) +#define MREPEAT68( macro, data) MREPEAT67( macro, data) macro( 67, data) +#define MREPEAT69( macro, data) MREPEAT68( macro, data) macro( 68, data) +#define MREPEAT70( macro, data) MREPEAT69( macro, data) macro( 69, data) +#define MREPEAT71( macro, data) MREPEAT70( macro, data) macro( 70, data) +#define MREPEAT72( macro, data) MREPEAT71( macro, data) macro( 71, data) +#define MREPEAT73( macro, data) MREPEAT72( macro, data) macro( 72, data) +#define MREPEAT74( macro, data) MREPEAT73( macro, data) macro( 73, data) +#define MREPEAT75( macro, data) MREPEAT74( macro, data) macro( 74, data) +#define MREPEAT76( macro, data) MREPEAT75( macro, data) macro( 75, data) +#define MREPEAT77( macro, data) MREPEAT76( macro, data) macro( 76, data) +#define MREPEAT78( macro, data) MREPEAT77( macro, data) macro( 77, data) +#define MREPEAT79( macro, data) MREPEAT78( macro, data) macro( 78, data) +#define MREPEAT80( macro, data) MREPEAT79( macro, data) macro( 79, data) +#define MREPEAT81( macro, data) MREPEAT80( macro, data) macro( 80, data) +#define MREPEAT82( macro, data) MREPEAT81( macro, data) macro( 81, data) +#define MREPEAT83( macro, data) MREPEAT82( macro, data) macro( 82, data) +#define MREPEAT84( macro, data) MREPEAT83( macro, data) macro( 83, data) +#define MREPEAT85( macro, data) MREPEAT84( macro, data) macro( 84, data) +#define MREPEAT86( macro, data) MREPEAT85( macro, data) macro( 85, data) +#define MREPEAT87( macro, data) MREPEAT86( macro, data) macro( 86, data) +#define MREPEAT88( macro, data) MREPEAT87( macro, data) macro( 87, data) +#define MREPEAT89( macro, data) MREPEAT88( macro, data) macro( 88, data) +#define MREPEAT90( macro, data) MREPEAT89( macro, data) macro( 89, data) +#define MREPEAT91( macro, data) MREPEAT90( macro, data) macro( 90, data) +#define MREPEAT92( macro, data) MREPEAT91( macro, data) macro( 91, data) +#define MREPEAT93( macro, data) MREPEAT92( macro, data) macro( 92, data) +#define MREPEAT94( macro, data) MREPEAT93( macro, data) macro( 93, data) +#define MREPEAT95( macro, data) MREPEAT94( macro, data) macro( 94, data) +#define MREPEAT96( macro, data) MREPEAT95( macro, data) macro( 95, data) +#define MREPEAT97( macro, data) MREPEAT96( macro, data) macro( 96, data) +#define MREPEAT98( macro, data) MREPEAT97( macro, data) macro( 97, data) +#define MREPEAT99( macro, data) MREPEAT98( macro, data) macro( 98, data) +#define MREPEAT100(macro, data) MREPEAT99( macro, data) macro( 99, data) +#define MREPEAT101(macro, data) MREPEAT100(macro, data) macro(100, data) +#define MREPEAT102(macro, data) MREPEAT101(macro, data) macro(101, data) +#define MREPEAT103(macro, data) MREPEAT102(macro, data) macro(102, data) +#define MREPEAT104(macro, data) MREPEAT103(macro, data) macro(103, data) +#define MREPEAT105(macro, data) MREPEAT104(macro, data) macro(104, data) +#define MREPEAT106(macro, data) MREPEAT105(macro, data) macro(105, data) +#define MREPEAT107(macro, data) MREPEAT106(macro, data) macro(106, data) +#define MREPEAT108(macro, data) MREPEAT107(macro, data) macro(107, data) +#define MREPEAT109(macro, data) MREPEAT108(macro, data) macro(108, data) +#define MREPEAT110(macro, data) MREPEAT109(macro, data) macro(109, data) +#define MREPEAT111(macro, data) MREPEAT110(macro, data) macro(110, data) +#define MREPEAT112(macro, data) MREPEAT111(macro, data) macro(111, data) +#define MREPEAT113(macro, data) MREPEAT112(macro, data) macro(112, data) +#define MREPEAT114(macro, data) MREPEAT113(macro, data) macro(113, data) +#define MREPEAT115(macro, data) MREPEAT114(macro, data) macro(114, data) +#define MREPEAT116(macro, data) MREPEAT115(macro, data) macro(115, data) +#define MREPEAT117(macro, data) MREPEAT116(macro, data) macro(116, data) +#define MREPEAT118(macro, data) MREPEAT117(macro, data) macro(117, data) +#define MREPEAT119(macro, data) MREPEAT118(macro, data) macro(118, data) +#define MREPEAT120(macro, data) MREPEAT119(macro, data) macro(119, data) +#define MREPEAT121(macro, data) MREPEAT120(macro, data) macro(120, data) +#define MREPEAT122(macro, data) MREPEAT121(macro, data) macro(121, data) +#define MREPEAT123(macro, data) MREPEAT122(macro, data) macro(122, data) +#define MREPEAT124(macro, data) MREPEAT123(macro, data) macro(123, data) +#define MREPEAT125(macro, data) MREPEAT124(macro, data) macro(124, data) +#define MREPEAT126(macro, data) MREPEAT125(macro, data) macro(125, data) +#define MREPEAT127(macro, data) MREPEAT126(macro, data) macro(126, data) +#define MREPEAT128(macro, data) MREPEAT127(macro, data) macro(127, data) +#define MREPEAT129(macro, data) MREPEAT128(macro, data) macro(128, data) +#define MREPEAT130(macro, data) MREPEAT129(macro, data) macro(129, data) +#define MREPEAT131(macro, data) MREPEAT130(macro, data) macro(130, data) +#define MREPEAT132(macro, data) MREPEAT131(macro, data) macro(131, data) +#define MREPEAT133(macro, data) MREPEAT132(macro, data) macro(132, data) +#define MREPEAT134(macro, data) MREPEAT133(macro, data) macro(133, data) +#define MREPEAT135(macro, data) MREPEAT134(macro, data) macro(134, data) +#define MREPEAT136(macro, data) MREPEAT135(macro, data) macro(135, data) +#define MREPEAT137(macro, data) MREPEAT136(macro, data) macro(136, data) +#define MREPEAT138(macro, data) MREPEAT137(macro, data) macro(137, data) +#define MREPEAT139(macro, data) MREPEAT138(macro, data) macro(138, data) +#define MREPEAT140(macro, data) MREPEAT139(macro, data) macro(139, data) +#define MREPEAT141(macro, data) MREPEAT140(macro, data) macro(140, data) +#define MREPEAT142(macro, data) MREPEAT141(macro, data) macro(141, data) +#define MREPEAT143(macro, data) MREPEAT142(macro, data) macro(142, data) +#define MREPEAT144(macro, data) MREPEAT143(macro, data) macro(143, data) +#define MREPEAT145(macro, data) MREPEAT144(macro, data) macro(144, data) +#define MREPEAT146(macro, data) MREPEAT145(macro, data) macro(145, data) +#define MREPEAT147(macro, data) MREPEAT146(macro, data) macro(146, data) +#define MREPEAT148(macro, data) MREPEAT147(macro, data) macro(147, data) +#define MREPEAT149(macro, data) MREPEAT148(macro, data) macro(148, data) +#define MREPEAT150(macro, data) MREPEAT149(macro, data) macro(149, data) +#define MREPEAT151(macro, data) MREPEAT150(macro, data) macro(150, data) +#define MREPEAT152(macro, data) MREPEAT151(macro, data) macro(151, data) +#define MREPEAT153(macro, data) MREPEAT152(macro, data) macro(152, data) +#define MREPEAT154(macro, data) MREPEAT153(macro, data) macro(153, data) +#define MREPEAT155(macro, data) MREPEAT154(macro, data) macro(154, data) +#define MREPEAT156(macro, data) MREPEAT155(macro, data) macro(155, data) +#define MREPEAT157(macro, data) MREPEAT156(macro, data) macro(156, data) +#define MREPEAT158(macro, data) MREPEAT157(macro, data) macro(157, data) +#define MREPEAT159(macro, data) MREPEAT158(macro, data) macro(158, data) +#define MREPEAT160(macro, data) MREPEAT159(macro, data) macro(159, data) +#define MREPEAT161(macro, data) MREPEAT160(macro, data) macro(160, data) +#define MREPEAT162(macro, data) MREPEAT161(macro, data) macro(161, data) +#define MREPEAT163(macro, data) MREPEAT162(macro, data) macro(162, data) +#define MREPEAT164(macro, data) MREPEAT163(macro, data) macro(163, data) +#define MREPEAT165(macro, data) MREPEAT164(macro, data) macro(164, data) +#define MREPEAT166(macro, data) MREPEAT165(macro, data) macro(165, data) +#define MREPEAT167(macro, data) MREPEAT166(macro, data) macro(166, data) +#define MREPEAT168(macro, data) MREPEAT167(macro, data) macro(167, data) +#define MREPEAT169(macro, data) MREPEAT168(macro, data) macro(168, data) +#define MREPEAT170(macro, data) MREPEAT169(macro, data) macro(169, data) +#define MREPEAT171(macro, data) MREPEAT170(macro, data) macro(170, data) +#define MREPEAT172(macro, data) MREPEAT171(macro, data) macro(171, data) +#define MREPEAT173(macro, data) MREPEAT172(macro, data) macro(172, data) +#define MREPEAT174(macro, data) MREPEAT173(macro, data) macro(173, data) +#define MREPEAT175(macro, data) MREPEAT174(macro, data) macro(174, data) +#define MREPEAT176(macro, data) MREPEAT175(macro, data) macro(175, data) +#define MREPEAT177(macro, data) MREPEAT176(macro, data) macro(176, data) +#define MREPEAT178(macro, data) MREPEAT177(macro, data) macro(177, data) +#define MREPEAT179(macro, data) MREPEAT178(macro, data) macro(178, data) +#define MREPEAT180(macro, data) MREPEAT179(macro, data) macro(179, data) +#define MREPEAT181(macro, data) MREPEAT180(macro, data) macro(180, data) +#define MREPEAT182(macro, data) MREPEAT181(macro, data) macro(181, data) +#define MREPEAT183(macro, data) MREPEAT182(macro, data) macro(182, data) +#define MREPEAT184(macro, data) MREPEAT183(macro, data) macro(183, data) +#define MREPEAT185(macro, data) MREPEAT184(macro, data) macro(184, data) +#define MREPEAT186(macro, data) MREPEAT185(macro, data) macro(185, data) +#define MREPEAT187(macro, data) MREPEAT186(macro, data) macro(186, data) +#define MREPEAT188(macro, data) MREPEAT187(macro, data) macro(187, data) +#define MREPEAT189(macro, data) MREPEAT188(macro, data) macro(188, data) +#define MREPEAT190(macro, data) MREPEAT189(macro, data) macro(189, data) +#define MREPEAT191(macro, data) MREPEAT190(macro, data) macro(190, data) +#define MREPEAT192(macro, data) MREPEAT191(macro, data) macro(191, data) +#define MREPEAT193(macro, data) MREPEAT192(macro, data) macro(192, data) +#define MREPEAT194(macro, data) MREPEAT193(macro, data) macro(193, data) +#define MREPEAT195(macro, data) MREPEAT194(macro, data) macro(194, data) +#define MREPEAT196(macro, data) MREPEAT195(macro, data) macro(195, data) +#define MREPEAT197(macro, data) MREPEAT196(macro, data) macro(196, data) +#define MREPEAT198(macro, data) MREPEAT197(macro, data) macro(197, data) +#define MREPEAT199(macro, data) MREPEAT198(macro, data) macro(198, data) +#define MREPEAT200(macro, data) MREPEAT199(macro, data) macro(199, data) +#define MREPEAT201(macro, data) MREPEAT200(macro, data) macro(200, data) +#define MREPEAT202(macro, data) MREPEAT201(macro, data) macro(201, data) +#define MREPEAT203(macro, data) MREPEAT202(macro, data) macro(202, data) +#define MREPEAT204(macro, data) MREPEAT203(macro, data) macro(203, data) +#define MREPEAT205(macro, data) MREPEAT204(macro, data) macro(204, data) +#define MREPEAT206(macro, data) MREPEAT205(macro, data) macro(205, data) +#define MREPEAT207(macro, data) MREPEAT206(macro, data) macro(206, data) +#define MREPEAT208(macro, data) MREPEAT207(macro, data) macro(207, data) +#define MREPEAT209(macro, data) MREPEAT208(macro, data) macro(208, data) +#define MREPEAT210(macro, data) MREPEAT209(macro, data) macro(209, data) +#define MREPEAT211(macro, data) MREPEAT210(macro, data) macro(210, data) +#define MREPEAT212(macro, data) MREPEAT211(macro, data) macro(211, data) +#define MREPEAT213(macro, data) MREPEAT212(macro, data) macro(212, data) +#define MREPEAT214(macro, data) MREPEAT213(macro, data) macro(213, data) +#define MREPEAT215(macro, data) MREPEAT214(macro, data) macro(214, data) +#define MREPEAT216(macro, data) MREPEAT215(macro, data) macro(215, data) +#define MREPEAT217(macro, data) MREPEAT216(macro, data) macro(216, data) +#define MREPEAT218(macro, data) MREPEAT217(macro, data) macro(217, data) +#define MREPEAT219(macro, data) MREPEAT218(macro, data) macro(218, data) +#define MREPEAT220(macro, data) MREPEAT219(macro, data) macro(219, data) +#define MREPEAT221(macro, data) MREPEAT220(macro, data) macro(220, data) +#define MREPEAT222(macro, data) MREPEAT221(macro, data) macro(221, data) +#define MREPEAT223(macro, data) MREPEAT222(macro, data) macro(222, data) +#define MREPEAT224(macro, data) MREPEAT223(macro, data) macro(223, data) +#define MREPEAT225(macro, data) MREPEAT224(macro, data) macro(224, data) +#define MREPEAT226(macro, data) MREPEAT225(macro, data) macro(225, data) +#define MREPEAT227(macro, data) MREPEAT226(macro, data) macro(226, data) +#define MREPEAT228(macro, data) MREPEAT227(macro, data) macro(227, data) +#define MREPEAT229(macro, data) MREPEAT228(macro, data) macro(228, data) +#define MREPEAT230(macro, data) MREPEAT229(macro, data) macro(229, data) +#define MREPEAT231(macro, data) MREPEAT230(macro, data) macro(230, data) +#define MREPEAT232(macro, data) MREPEAT231(macro, data) macro(231, data) +#define MREPEAT233(macro, data) MREPEAT232(macro, data) macro(232, data) +#define MREPEAT234(macro, data) MREPEAT233(macro, data) macro(233, data) +#define MREPEAT235(macro, data) MREPEAT234(macro, data) macro(234, data) +#define MREPEAT236(macro, data) MREPEAT235(macro, data) macro(235, data) +#define MREPEAT237(macro, data) MREPEAT236(macro, data) macro(236, data) +#define MREPEAT238(macro, data) MREPEAT237(macro, data) macro(237, data) +#define MREPEAT239(macro, data) MREPEAT238(macro, data) macro(238, data) +#define MREPEAT240(macro, data) MREPEAT239(macro, data) macro(239, data) +#define MREPEAT241(macro, data) MREPEAT240(macro, data) macro(240, data) +#define MREPEAT242(macro, data) MREPEAT241(macro, data) macro(241, data) +#define MREPEAT243(macro, data) MREPEAT242(macro, data) macro(242, data) +#define MREPEAT244(macro, data) MREPEAT243(macro, data) macro(243, data) +#define MREPEAT245(macro, data) MREPEAT244(macro, data) macro(244, data) +#define MREPEAT246(macro, data) MREPEAT245(macro, data) macro(245, data) +#define MREPEAT247(macro, data) MREPEAT246(macro, data) macro(246, data) +#define MREPEAT248(macro, data) MREPEAT247(macro, data) macro(247, data) +#define MREPEAT249(macro, data) MREPEAT248(macro, data) macro(248, data) +#define MREPEAT250(macro, data) MREPEAT249(macro, data) macro(249, data) +#define MREPEAT251(macro, data) MREPEAT250(macro, data) macro(250, data) +#define MREPEAT252(macro, data) MREPEAT251(macro, data) macro(251, data) +#define MREPEAT253(macro, data) MREPEAT252(macro, data) macro(252, data) +#define MREPEAT254(macro, data) MREPEAT253(macro, data) macro(253, data) +#define MREPEAT255(macro, data) MREPEAT254(macro, data) macro(254, data) +#define MREPEAT256(macro, data) MREPEAT255(macro, data) macro(255, data) + + +#endif // _MREPEAT_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/preprocessor.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/preprocessor.h new file mode 100644 index 0000000..5b996ba --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/preprocessor.h @@ -0,0 +1,55 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _PREPROCESSOR_H_ +#define _PREPROCESSOR_H_ + +#include "tpaste.h" +#include "stringz.h" +#include "mrepeat.h" + + +#endif // _PREPROCESSOR_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/stringz.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/stringz.h new file mode 100644 index 0000000..3528ea0 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/stringz.h @@ -0,0 +1,75 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor stringizing utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _STRINGZ_H_ +#define _STRINGZ_H_ + + +/*! \brief Stringize. + * + * Stringize a preprocessing token, this token being allowed to be \#defined. + * + * May be used only within macros with the token passed as an argument if the token is \#defined. + * + * For example, writing STRINGZ(PIN) within a macro \#defined by PIN_NAME(PIN) + * and invoked as PIN_NAME(PIN0) with PIN0 \#defined as A0 is equivalent to + * writing "A0". + */ +#define STRINGZ(x) #x + +/*! \brief Absolute stringize. + * + * Stringize a preprocessing token, this token being allowed to be \#defined. + * + * No restriction of use if the token is \#defined. + * + * For example, writing ASTRINGZ(PIN0) anywhere with PIN0 \#defined as A0 is + * equivalent to writing "A0". + */ +#define ASTRINGZ(x) STRINGZ(x) + + +#endif // _STRINGZ_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/tpaste.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/tpaste.h new file mode 100644 index 0000000..a5d7bee --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/tpaste.h @@ -0,0 +1,95 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor token pasting utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _TPASTE_H_ +#define _TPASTE_H_ + + +/*! \name Token Paste + * + * Paste N preprocessing tokens together, these tokens being allowed to be \#defined. + * + * May be used only within macros with the tokens passed as arguments if the tokens are \#defined. + * + * For example, writing TPASTE2(U, WIDTH) within a macro \#defined by + * UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is + * equivalent to writing U32. + */ +//! @{ +#define TPASTE2( a, b) a##b +#define TPASTE3( a, b, c) a##b##c +#define TPASTE4( a, b, c, d) a##b##c##d +#define TPASTE5( a, b, c, d, e) a##b##c##d##e +#define TPASTE6( a, b, c, d, e, f) a##b##c##d##e##f +#define TPASTE7( a, b, c, d, e, f, g) a##b##c##d##e##f##g +#define TPASTE8( a, b, c, d, e, f, g, h) a##b##c##d##e##f##g##h +#define TPASTE9( a, b, c, d, e, f, g, h, i) a##b##c##d##e##f##g##h##i +#define TPASTE10(a, b, c, d, e, f, g, h, i, j) a##b##c##d##e##f##g##h##i##j +//! @} + +/*! \name Absolute Token Paste + * + * Paste N preprocessing tokens together, these tokens being allowed to be \#defined. + * + * No restriction of use if the tokens are \#defined. + * + * For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined + * as 32 is equivalent to writing U32. + */ +//! @{ +#define ATPASTE2( a, b) TPASTE2( a, b) +#define ATPASTE3( a, b, c) TPASTE3( a, b, c) +#define ATPASTE4( a, b, c, d) TPASTE4( a, b, c, d) +#define ATPASTE5( a, b, c, d, e) TPASTE5( a, b, c, d, e) +#define ATPASTE6( a, b, c, d, e, f) TPASTE6( a, b, c, d, e, f) +#define ATPASTE7( a, b, c, d, e, f, g) TPASTE7( a, b, c, d, e, f, g) +#define ATPASTE8( a, b, c, d, e, f, g, h) TPASTE8( a, b, c, d, e, f, g, h) +#define ATPASTE9( a, b, c, d, e, f, g, h, i) TPASTE9( a, b, c, d, e, f, g, h, i) +#define ATPASTE10(a, b, c, d, e, f, g, h, i, j) TPASTE10(a, b, c, d, e, f, g, h, i, j) +//! @} + + +#endif // _TPASTE_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/STARTUP_FILES/GCC/crt0.x b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/STARTUP_FILES/GCC/crt0.x new file mode 100644 index 0000000..23b658b --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/STARTUP_FILES/GCC/crt0.x @@ -0,0 +1,121 @@ +/* This file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AVR32UC C runtime startup file. + * + * This file has been built from the Newlib crt0.S. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32UC devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include + + +//! @{ +//! \verbatim + + + // This must be linked @ 0x80000000 if it is to be run upon reset. + .section .reset, "ax", @progbits + + + .global _start + .type _start, @function +_start: + // Jump to the C runtime startup routine. + lda.w pc, _stext + + + // _stext is placed outside the .reset section so that the program entry point + // can be changed without affecting the C runtime startup. + .section .text._stext, "ax", @progbits + + + .global _stext + .type _stext, @function +_stext: + // Set initial stack pointer. + lda.w sp, _estack + + // Set up EVBA so interrupts can be enabled. + lda.w r0, _evba + mtsr AVR32_EVBA, r0 + + // Enable the exception processing. + csrf AVR32_SR_EM_OFFSET + + // Load initialized data having a global lifetime from the data LMA. + lda.w r0, _data + lda.w r1, _edata + cp r0, r1 + brhs idata_load_loop_end + lda.w r2, _data_lma +idata_load_loop: + ld.d r4, r2++ + st.d r0++, r4 + cp r0, r1 + brlo idata_load_loop +idata_load_loop_end: + + // Clear uninitialized data having a global lifetime in the blank static storage section. + lda.w r0, __bss_start + lda.w r1, _end + cp r0, r1 + brhs udata_clear_loop_end + mov r2, 0 + mov r3, 0 +udata_clear_loop: + st.d r0++, r2 + cp r0, r1 + brlo udata_clear_loop +udata_clear_loop_end: + +#ifdef CONFIG_FRAME_POINTER + // Safety: Set the default "return" @ to the exit routine address. + lda.w lr, exit +#endif + + // Start the show. + lda.w pc, main + + +//! \endverbatim +//! @} diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/compiler.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/compiler.h new file mode 100644 index 0000000..885be7f --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/compiler.h @@ -0,0 +1,1145 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Compiler file for AVR32. + * + * This file defines commonly used types and macros. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _COMPILER_H_ +#define _COMPILER_H_ + +#if ((defined __GNUC__) && (defined __AVR32__)) || (defined __ICCAVR32__ || defined __AAVR32__) +# include +#endif +#if (defined __ICCAVR32__) +# include +#endif +#include "preprocessor.h" + +#include "parts.h" + + +//_____ D E C L A R A T I O N S ____________________________________________ + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +#include +#include + + +#if (defined __ICCAVR32__) + +/*! \name Compiler Keywords + * + * Port of some keywords from GNU GCC for AVR32 to IAR Embedded Workbench for Atmel AVR32. + */ +//! @{ +#define __asm__ asm +#define __inline__ inline +#define __volatile__ +//! @} + +#endif + + +/*! \name Usual Types + */ +//! @{ +typedef unsigned char Bool; //!< Boolean. +#ifndef __cplusplus +#if !defined(__bool_true_false_are_defined) +typedef unsigned char bool; //!< Boolean. +#endif +#endif +typedef signed char S8 ; //!< 8-bit signed integer. +typedef unsigned char U8 ; //!< 8-bit unsigned integer. +typedef signed short int S16; //!< 16-bit signed integer. +typedef unsigned short int U16; //!< 16-bit unsigned integer. +typedef signed long int S32; //!< 32-bit signed integer. +typedef unsigned long int U32; //!< 32-bit unsigned integer. +typedef signed long long int S64; //!< 64-bit signed integer. +typedef unsigned long long int U64; //!< 64-bit unsigned integer. +typedef float F32; //!< 32-bit floating-point number. +typedef double F64; //!< 64-bit floating-point number. +//! @} + + +/*! \name Status Types + */ +//! @{ +typedef Bool Status_bool_t; //!< Boolean status. +typedef U8 Status_t; //!< 8-bit-coded status. +//! @} + + +/*! \name Aliasing Aggregate Types + */ +//! @{ + +//! 16-bit union. +typedef union +{ + S16 s16 ; + U16 u16 ; + S8 s8 [2]; + U8 u8 [2]; +} Union16; + +//! 32-bit union. +typedef union +{ + S32 s32 ; + U32 u32 ; + S16 s16[2]; + U16 u16[2]; + S8 s8 [4]; + U8 u8 [4]; +} Union32; + +//! 64-bit union. +typedef union +{ + S64 s64 ; + U64 u64 ; + S32 s32[2]; + U32 u32[2]; + S16 s16[4]; + U16 u16[4]; + S8 s8 [8]; + U8 u8 [8]; +} Union64; + +//! Union of pointers to 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + S64 *s64ptr; + U64 *u64ptr; + S32 *s32ptr; + U32 *u32ptr; + S16 *s16ptr; + U16 *u16ptr; + S8 *s8ptr ; + U8 *u8ptr ; +} UnionPtr; + +//! Union of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + volatile S64 *s64ptr; + volatile U64 *u64ptr; + volatile S32 *s32ptr; + volatile U32 *u32ptr; + volatile S16 *s16ptr; + volatile U16 *u16ptr; + volatile S8 *s8ptr ; + volatile U8 *u8ptr ; +} UnionVPtr; + +//! Union of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + const S64 *s64ptr; + const U64 *u64ptr; + const S32 *s32ptr; + const U32 *u32ptr; + const S16 *s16ptr; + const U16 *u16ptr; + const S8 *s8ptr ; + const U8 *u8ptr ; +} UnionCPtr; + +//! Union of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + const volatile S64 *s64ptr; + const volatile U64 *u64ptr; + const volatile S32 *s32ptr; + const volatile U32 *u32ptr; + const volatile S16 *s16ptr; + const volatile U16 *u16ptr; + const volatile S8 *s8ptr ; + const volatile U8 *u8ptr ; +} UnionCVPtr; + +//! Structure of pointers to 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + S64 *s64ptr; + U64 *u64ptr; + S32 *s32ptr; + U32 *u32ptr; + S16 *s16ptr; + U16 *u16ptr; + S8 *s8ptr ; + U8 *u8ptr ; +} StructPtr; + +//! Structure of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + volatile S64 *s64ptr; + volatile U64 *u64ptr; + volatile S32 *s32ptr; + volatile U32 *u32ptr; + volatile S16 *s16ptr; + volatile U16 *u16ptr; + volatile S8 *s8ptr ; + volatile U8 *u8ptr ; +} StructVPtr; + +//! Structure of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + const S64 *s64ptr; + const U64 *u64ptr; + const S32 *s32ptr; + const U32 *u32ptr; + const S16 *s16ptr; + const U16 *u16ptr; + const S8 *s8ptr ; + const U8 *u8ptr ; +} StructCPtr; + +//! Structure of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + const volatile S64 *s64ptr; + const volatile U64 *u64ptr; + const volatile S32 *s32ptr; + const volatile U32 *u32ptr; + const volatile S16 *s16ptr; + const volatile U16 *u16ptr; + const volatile S8 *s8ptr ; + const volatile U8 *u8ptr ; +} StructCVPtr; + +//! @} + +#endif // __AVR32_ABI_COMPILER__ + + +//_____ M A C R O S ________________________________________________________ + +/*! \name Usual Constants + */ +//! @{ +#define DISABLE 0 +#define ENABLE 1 +#define DISABLED 0 +#define ENABLED 1 +#define OFF 0 +#define ON 1 +#define FALSE 0 +#define TRUE 1 +#ifndef __cplusplus +#if !defined(__bool_true_false_are_defined) +#define false FALSE +#define true TRUE +#endif +#endif +#define KO 0 +#define OK 1 +#define PASS 0 +#define FAIL 1 +#define LOW 0 +#define HIGH 1 +#define CLR 0 +#define SET 1 +//! @} + + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +/*! \name Bit-Field Handling + */ +//! @{ + +/*! \brief Reads the bits of a value specified by a given bit-mask. + * + * \param value Value to read bits from. + * \param mask Bit-mask indicating bits to read. + * + * \return Read bits. + */ +#define Rd_bits( value, mask) ((value) & (mask)) + +/*! \brief Writes the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue to write bits to. + * \param mask Bit-mask indicating bits to write. + * \param bits Bits to write. + * + * \return Resulting value with written bits. + */ +#define Wr_bits(lvalue, mask, bits) ((lvalue) = ((lvalue) & ~(mask)) |\ + ((bits ) & (mask))) + +/*! \brief Tests the bits of a value specified by a given bit-mask. + * + * \param value Value of which to test bits. + * \param mask Bit-mask indicating bits to test. + * + * \return \c 1 if at least one of the tested bits is set, else \c 0. + */ +#define Tst_bits( value, mask) (Rd_bits(value, mask) != 0) + +/*! \brief Clears the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to clear bits. + * \param mask Bit-mask indicating bits to clear. + * + * \return Resulting value with cleared bits. + */ +#define Clr_bits(lvalue, mask) ((lvalue) &= ~(mask)) + +/*! \brief Sets the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to set bits. + * \param mask Bit-mask indicating bits to set. + * + * \return Resulting value with set bits. + */ +#define Set_bits(lvalue, mask) ((lvalue) |= (mask)) + +/*! \brief Toggles the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to toggle bits. + * \param mask Bit-mask indicating bits to toggle. + * + * \return Resulting value with toggled bits. + */ +#define Tgl_bits(lvalue, mask) ((lvalue) ^= (mask)) + +/*! \brief Reads the bit-field of a value specified by a given bit-mask. + * + * \param value Value to read a bit-field from. + * \param mask Bit-mask indicating the bit-field to read. + * + * \return Read bit-field. + */ +#define Rd_bitfield( value, mask) (Rd_bits( value, mask) >> ctz(mask)) + +/*! \brief Writes the bit-field of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue to write a bit-field to. + * \param mask Bit-mask indicating the bit-field to write. + * \param bitfield Bit-field to write. + * + * \return Resulting value with written bit-field. + */ +#define Wr_bitfield(lvalue, mask, bitfield) (Wr_bits(lvalue, mask, (U32)(bitfield) << ctz(mask))) + +//! @} + + +/*! \brief This macro is used to test fatal errors. + * + * The macro tests if the expression is FALSE. If it is, a fatal error is + * detected and the application hangs up. + * + * \param expr Expression to evaluate and supposed to be nonzero. + */ +#ifdef _ASSERT_ENABLE_ + #define Assert(expr) \ + {\ + if (!(expr)) while (TRUE);\ + } +#else + #define Assert(expr) +#endif + + +/*! \name Zero-Bit Counting + * + * Under AVR32-GCC, __builtin_clz and __builtin_ctz behave like macros when + * applied to constant expressions (values known at compile time), so they are + * more optimized than the use of the corresponding assembly instructions and + * they can be used as constant expressions e.g. to initialize objects having + * static storage duration, and like the corresponding assembly instructions + * when applied to non-constant expressions (values unknown at compile time), so + * they are more optimized than an assembly periphrasis. Hence, clz and ctz + * ensure a possible and optimized behavior for both constant and non-constant + * expressions. + */ +//! @{ + +/*! \brief Counts the leading zero bits of the given value considered as a 32-bit integer. + * + * \param u Value of which to count the leading zero bits. + * + * \return The count of leading zero bits in \a u. + */ +#if (defined __GNUC__) + #define clz(u) __builtin_clz(u) +#elif (defined __ICCAVR32__) + #define clz(u) __count_leading_zeros(u) +#endif + +/*! \brief Counts the trailing zero bits of the given value considered as a 32-bit integer. + * + * \param u Value of which to count the trailing zero bits. + * + * \return The count of trailing zero bits in \a u. + */ +#if (defined __GNUC__) + #define ctz(u) __builtin_ctz(u) +#elif (defined __ICCAVR32__) + #define ctz(u) __count_trailing_zeros(u) +#endif + +//! @} + + +/*! \name Bit Reversing + */ +//! @{ + +/*! \brief Reverses the bits of \a u8. + * + * \param u8 U8 of which to reverse the bits. + * + * \return Value resulting from \a u8 with reversed bits. + */ +#define bit_reverse8(u8) ((U8)(bit_reverse32((U8)(u8)) >> 24)) + +/*! \brief Reverses the bits of \a u16. + * + * \param u16 U16 of which to reverse the bits. + * + * \return Value resulting from \a u16 with reversed bits. + */ +#define bit_reverse16(u16) ((U16)(bit_reverse32((U16)(u16)) >> 16)) + +/*! \brief Reverses the bits of \a u32. + * + * \param u32 U32 of which to reverse the bits. + * + * \return Value resulting from \a u32 with reversed bits. + */ +#if (defined __GNUC__) + #define bit_reverse32(u32) \ + (\ + {\ + unsigned int __value = (U32)(u32);\ + __asm__ ("brev\t%0" : "+r" (__value) : : "cc");\ + (U32)__value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define bit_reverse32(u32) ((U32)__bit_reverse((U32)(u32))) +#endif + +/*! \brief Reverses the bits of \a u64. + * + * \param u64 U64 of which to reverse the bits. + * + * \return Value resulting from \a u64 with reversed bits. + */ +#define bit_reverse64(u64) ((U64)(((U64)bit_reverse32((U64)(u64) >> 32)) |\ + ((U64)bit_reverse32((U64)(u64)) << 32))) + +//! @} + + +/*! \name Alignment + */ +//! @{ + +/*! \brief Tests alignment of the number \a val with the \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return \c 1 if the number \a val is aligned with the \a n boundary, else \c 0. + */ +#define Test_align(val, n ) (!Tst_bits( val, (n) - 1 ) ) + +/*! \brief Gets alignment of the number \a val with respect to the \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Alignment of the number \a val with respect to the \a n boundary. + */ +#define Get_align( val, n ) ( Rd_bits( val, (n) - 1 ) ) + +/*! \brief Sets alignment of the lvalue number \a lval to \a alg with respect to the \a n boundary. + * + * \param lval Input/output lvalue. + * \param n Boundary. + * \param alg Alignment. + * + * \return New value of \a lval resulting from its alignment set to \a alg with respect to the \a n boundary. + */ +#define Set_align(lval, n, alg) ( Wr_bits(lval, (n) - 1, alg) ) + +/*! \brief Aligns the number \a val with the upper \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Value resulting from the number \a val aligned with the upper \a n boundary. + */ +#define Align_up( val, n ) (((val) + ((n) - 1)) & ~((n) - 1)) + +/*! \brief Aligns the number \a val with the lower \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Value resulting from the number \a val aligned with the lower \a n boundary. + */ +#define Align_down(val, n ) ( (val) & ~((n) - 1)) + +//! @} + + +/*! \name Mathematics + * + * The same considerations as for clz and ctz apply here but AVR32-GCC does not + * provide built-in functions to access the assembly instructions abs, min and + * max and it does not produce them by itself in most cases, so two sets of + * macros are defined here: + * - Abs, Min and Max to apply to constant expressions (values known at + * compile time); + * - abs, min and max to apply to non-constant expressions (values unknown at + * compile time). + */ +//! @{ + +/*! \brief Takes the absolute value of \a a. + * + * \param a Input value. + * + * \return Absolute value of \a a. + * + * \note More optimized if only used with values known at compile time. + */ +#define Abs(a) (((a) < 0 ) ? -(a) : (a)) + +/*! \brief Takes the minimal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Minimal value of \a a and \a b. + * + * \note More optimized if only used with values known at compile time. + */ +#define Min(a, b) (((a) < (b)) ? (a) : (b)) + +/*! \brief Takes the maximal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Maximal value of \a a and \a b. + * + * \note More optimized if only used with values known at compile time. + */ +#define Max(a, b) (((a) > (b)) ? (a) : (b)) + +/*! \brief Takes the absolute value of \a a. + * + * \param a Input value. + * + * \return Absolute value of \a a. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define abs(a) \ + (\ + {\ + int __value = (a);\ + __asm__ ("abs\t%0" : "+r" (__value) : : "cc");\ + __value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define abs(a) Abs(a) +#endif + +/*! \brief Takes the minimal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Minimal value of \a a and \a b. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define min(a, b) \ + (\ + {\ + int __value, __arg_a = (a), __arg_b = (b);\ + __asm__ ("min\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\ + __value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define min(a, b) __min(a, b) +#endif + +/*! \brief Takes the maximal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Maximal value of \a a and \a b. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define max(a, b) \ + (\ + {\ + int __value, __arg_a = (a), __arg_b = (b);\ + __asm__ ("max\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\ + __value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define max(a, b) __max(a, b) +#endif + +//! @} + + +/*! \brief Calls the routine at address \a addr. + * + * It generates a long call opcode. + * + * For example, `Long_call(0x80000000)' generates a software reset on a UC3 if + * it is invoked from the CPU supervisor mode. + * + * \param addr Address of the routine to call. + * + * \note It may be used as a long jump opcode in some special cases. + */ +#define Long_call(addr) ((*(void (*)(void))(addr))()) + +/*! \brief Resets the CPU by software. + * + * \warning It shall not be called from the CPU application mode. + */ +#if (defined __GNUC__) + #define Reset_CPU() \ + (\ + {\ + __asm__ __volatile__ (\ + "lddpc r9, 3f\n\t"\ + "mfsr r8, %[SR]\n\t"\ + "bfextu r8, r8, %[SR_M_OFFSET], %[SR_M_SIZE]\n\t"\ + "cp.w r8, 0b001\n\t"\ + "breq 0f\n\t"\ + "sub r8, pc, $ - 1f\n\t"\ + "pushm r8-r9\n\t"\ + "rete\n"\ + "0:\n\t"\ + "mtsr %[SR], r9\n"\ + "1:\n\t"\ + "mov r0, 0\n\t"\ + "mov r1, 0\n\t"\ + "mov r2, 0\n\t"\ + "mov r3, 0\n\t"\ + "mov r4, 0\n\t"\ + "mov r5, 0\n\t"\ + "mov r6, 0\n\t"\ + "mov r7, 0\n\t"\ + "mov r8, 0\n\t"\ + "mov r9, 0\n\t"\ + "mov r10, 0\n\t"\ + "mov r11, 0\n\t"\ + "mov r12, 0\n\t"\ + "mov sp, 0\n\t"\ + "stdsp sp[0], sp\n\t"\ + "ldmts sp, sp\n\t"\ + "mov lr, 0\n\t"\ + "lddpc pc, 2f\n\t"\ + ".balign 4\n"\ + "2:\n\t"\ + ".word _start\n"\ + "3:\n\t"\ + ".word %[RESET_SR]"\ + :\ + : [SR] "i" (AVR32_SR),\ + [SR_M_OFFSET] "i" (AVR32_SR_M_OFFSET),\ + [SR_M_SIZE] "i" (AVR32_SR_M_SIZE),\ + [RESET_SR] "i" (AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))\ + );\ + }\ + ) +#elif (defined __ICCAVR32__) + #define Reset_CPU() \ + {\ + extern void *volatile __program_start;\ + __asm__ __volatile__ (\ + "mov r7, LWRD(__program_start)\n\t"\ + "orh r7, HWRD(__program_start)\n\t"\ + "mov r9, LWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\ + "orh r9, HWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\ + "mfsr r8, "ASTRINGZ(AVR32_SR)"\n\t"\ + "bfextu r8, r8, "ASTRINGZ(AVR32_SR_M_OFFSET)", "ASTRINGZ(AVR32_SR_M_SIZE)"\n\t"\ + "cp.w r8, 001b\n\t"\ + "breq $ + 10\n\t"\ + "sub r8, pc, -12\n\t"\ + "pushm r8-r9\n\t"\ + "rete\n\t"\ + "mtsr "ASTRINGZ(AVR32_SR)", r9\n\t"\ + "mov r0, 0\n\t"\ + "mov r1, 0\n\t"\ + "mov r2, 0\n\t"\ + "mov r3, 0\n\t"\ + "mov r4, 0\n\t"\ + "mov r5, 0\n\t"\ + "mov r6, 0\n\t"\ + "st.w r0[4], r7\n\t"\ + "mov r7, 0\n\t"\ + "mov r8, 0\n\t"\ + "mov r9, 0\n\t"\ + "mov r10, 0\n\t"\ + "mov r11, 0\n\t"\ + "mov r12, 0\n\t"\ + "mov sp, 0\n\t"\ + "stdsp sp[0], sp\n\t"\ + "ldmts sp, sp\n\t"\ + "mov lr, 0\n\t"\ + "ld.w pc, lr[4]"\ + );\ + __program_start;\ + } +#endif + + +/*! \name System Register Access + */ +//! @{ + +/*! \brief Gets the value of the \a sysreg system register. + * + * \param sysreg Address of the system register of which to get the value. + * + * \return Value of the \a sysreg system register. + */ +#if (defined __GNUC__) + #define Get_system_register(sysreg) __builtin_mfsr(sysreg) +#elif (defined __ICCAVR32__) + #define Get_system_register(sysreg) __get_system_register(sysreg) +#endif + +/*! \brief Sets the value of the \a sysreg system register to \a value. + * + * \param sysreg Address of the system register of which to set the value. + * \param value Value to set the \a sysreg system register to. + */ +#if (defined __GNUC__) + #define Set_system_register(sysreg, value) __builtin_mtsr(sysreg, value) +#elif (defined __ICCAVR32__) + #define Set_system_register(sysreg, value) __set_system_register(sysreg, value) +#endif + +//! @} + + +/*! \name CPU Status Register Access + */ +//! @{ + +/*! \brief Tells whether exceptions are globally enabled. + * + * \return \c 1 if exceptions are globally enabled, else \c 0. + */ +#define Is_global_exception_enabled() (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_EM_MASK)) + +/*! \brief Disables exceptions globally. + */ +#if (defined __GNUC__) + #define Disable_global_exception() ({__asm__ __volatile__ ("ssrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));}) +#elif (defined __ICCAVR32__) + #define Disable_global_exception() (__set_status_flag(AVR32_SR_EM_OFFSET)) +#endif + +/*! \brief Enables exceptions globally. + */ +#if (defined __GNUC__) + #define Enable_global_exception() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));}) +#elif (defined __ICCAVR32__) + #define Enable_global_exception() (__clear_status_flag(AVR32_SR_EM_OFFSET)) +#endif + +/*! \brief Tells whether interrupts are globally enabled. + * + * \return \c 1 if interrupts are globally enabled, else \c 0. + */ +#define Is_global_interrupt_enabled() (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_GM_MASK)) + +/*! \brief Disables interrupts globally. + */ +#if (defined __GNUC__) + #define Disable_global_interrupt() ({__asm__ __volatile__ ("ssrf\t%0" : : "i" (AVR32_SR_GM_OFFSET));}) +#elif (defined __ICCAVR32__) + #define Disable_global_interrupt() (__disable_interrupt()) +#endif + +/*! \brief Enables interrupts globally. + */ +#if (defined __GNUC__) + #define Enable_global_interrupt() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_GM_OFFSET));}) +#elif (defined __ICCAVR32__) + #define Enable_global_interrupt() (__enable_interrupt()) +#endif + +/*! \brief Tells whether interrupt level \a int_level is enabled. + * + * \param int_level Interrupt level (0 to 3). + * + * \return \c 1 if interrupt level \a int_level is enabled, else \c 0. + */ +#define Is_interrupt_level_enabled(int_level) (!Tst_bits(Get_system_register(AVR32_SR), TPASTE3(AVR32_SR_I, int_level, M_MASK))) + +/*! \brief Disables interrupt level \a int_level. + * + * \param int_level Interrupt level to disable (0 to 3). + */ +#if (defined __GNUC__) + #define Disable_interrupt_level(int_level) ({__asm__ __volatile__ ("ssrf\t%0" : : "i" (TPASTE3(AVR32_SR_I, int_level, M_OFFSET)));}) +#elif (defined __ICCAVR32__) + #define Disable_interrupt_level(int_level) (__set_status_flag(TPASTE3(AVR32_SR_I, int_level, M_OFFSET))) +#endif + +/*! \brief Enables interrupt level \a int_level. + * + * \param int_level Interrupt level to enable (0 to 3). + */ +#if (defined __GNUC__) + #define Enable_interrupt_level(int_level) ({__asm__ __volatile__ ("csrf\t%0" : : "i" (TPASTE3(AVR32_SR_I, int_level, M_OFFSET)));}) +#elif (defined __ICCAVR32__) + #define Enable_interrupt_level(int_level) (__clear_status_flag(TPASTE3(AVR32_SR_I, int_level, M_OFFSET))) +#endif + +/*! \brief Protects subsequent code from interrupts. + */ +#define AVR32_ENTER_CRITICAL_REGION( ) \ + { \ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); \ + Disable_global_interrupt(); // Disable the appropriate interrupts. + +/*! \brief This macro must always be used in conjunction with AVR32_ENTER_CRITICAL_REGION + * so that interrupts are enabled again. + */ +#define AVR32_LEAVE_CRITICAL_REGION( ) \ + if (global_interrupt_enabled) Enable_global_interrupt(); \ + } + +//! @} + + +/*! \name Debug Register Access + */ +//! @{ + +/*! \brief Gets the value of the \a dbgreg debug register. + * + * \param dbgreg Address of the debug register of which to get the value. + * + * \return Value of the \a dbgreg debug register. + */ +#if (defined __GNUC__) + #define Get_debug_register(dbgreg) __builtin_mfdr(dbgreg) +#elif (defined __ICCAVR32__) + #define Get_debug_register(dbgreg) __get_debug_register(dbgreg) +#endif + +/*! \brief Sets the value of the \a dbgreg debug register to \a value. + * + * \param dbgreg Address of the debug register of which to set the value. + * \param value Value to set the \a dbgreg debug register to. + */ +#if (defined __GNUC__) + #define Set_debug_register(dbgreg, value) __builtin_mtdr(dbgreg, value) +#elif (defined __ICCAVR32__) + #define Set_debug_register(dbgreg, value) __set_debug_register(dbgreg, value) +#endif + +//! @} + +#endif // __AVR32_ABI_COMPILER__ + + +//! Boolean evaluating MCU little endianism. +#if ((defined __GNUC__) && (defined __AVR32__)) || ((defined __ICCAVR32__) || (defined __AAVR32__)) + #define LITTLE_ENDIAN_MCU FALSE +#else + #error If you are here, you should check what is exactly the processor you are using... + #define LITTLE_ENDIAN_MCU FALSE +#endif + +// Check that MCU endianism is correctly defined. +#ifndef LITTLE_ENDIAN_MCU + #error YOU MUST define the MCU endianism with LITTLE_ENDIAN_MCU: either FALSE or TRUE +#endif + +//! Boolean evaluating MCU big endianism. +#define BIG_ENDIAN_MCU (!LITTLE_ENDIAN_MCU) + + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +/*! \name MCU Endianism Handling + */ +//! @{ + +#if (LITTLE_ENDIAN_MCU==TRUE) + #define LSB(u16) (((U8 *)&(u16))[0]) //!< Least significant byte of \a u16. + #define MSB(u16) (((U8 *)&(u16))[1]) //!< Most significant byte of \a u16. + + #define LSH(u32) (((U16 *)&(u32))[0]) //!< Least significant half-word of \a u32. + #define MSH(u32) (((U16 *)&(u32))[1]) //!< Most significant half-word of \a u32. + #define LSB0W(u32) (((U8 *)&(u32))[0]) //!< Least significant byte of 1st rank of \a u32. + #define LSB1W(u32) (((U8 *)&(u32))[1]) //!< Least significant byte of 2nd rank of \a u32. + #define LSB2W(u32) (((U8 *)&(u32))[2]) //!< Least significant byte of 3rd rank of \a u32. + #define LSB3W(u32) (((U8 *)&(u32))[3]) //!< Least significant byte of 4th rank of \a u32. + #define MSB3W(u32) LSB0W(u32) //!< Most significant byte of 4th rank of \a u32. + #define MSB2W(u32) LSB1W(u32) //!< Most significant byte of 3rd rank of \a u32. + #define MSB1W(u32) LSB2W(u32) //!< Most significant byte of 2nd rank of \a u32. + #define MSB0W(u32) LSB3W(u32) //!< Most significant byte of 1st rank of \a u32. + + #define LSW(u64) (((U32 *)&(u64))[0]) //!< Least significant word of \a u64. + #define MSW(u64) (((U32 *)&(u64))[1]) //!< Most significant word of \a u64. + #define LSH0(u64) (((U16 *)&(u64))[0]) //!< Least significant half-word of 1st rank of \a u64. + #define LSH1(u64) (((U16 *)&(u64))[1]) //!< Least significant half-word of 2nd rank of \a u64. + #define LSH2(u64) (((U16 *)&(u64))[2]) //!< Least significant half-word of 3rd rank of \a u64. + #define LSH3(u64) (((U16 *)&(u64))[3]) //!< Least significant half-word of 4th rank of \a u64. + #define MSH3(u64) LSH0(u64) //!< Most significant half-word of 4th rank of \a u64. + #define MSH2(u64) LSH1(u64) //!< Most significant half-word of 3rd rank of \a u64. + #define MSH1(u64) LSH2(u64) //!< Most significant half-word of 2nd rank of \a u64. + #define MSH0(u64) LSH3(u64) //!< Most significant half-word of 1st rank of \a u64. + #define LSB0D(u64) (((U8 *)&(u64))[0]) //!< Least significant byte of 1st rank of \a u64. + #define LSB1D(u64) (((U8 *)&(u64))[1]) //!< Least significant byte of 2nd rank of \a u64. + #define LSB2D(u64) (((U8 *)&(u64))[2]) //!< Least significant byte of 3rd rank of \a u64. + #define LSB3D(u64) (((U8 *)&(u64))[3]) //!< Least significant byte of 4th rank of \a u64. + #define LSB4D(u64) (((U8 *)&(u64))[4]) //!< Least significant byte of 5th rank of \a u64. + #define LSB5D(u64) (((U8 *)&(u64))[5]) //!< Least significant byte of 6th rank of \a u64. + #define LSB6D(u64) (((U8 *)&(u64))[6]) //!< Least significant byte of 7th rank of \a u64. + #define LSB7D(u64) (((U8 *)&(u64))[7]) //!< Least significant byte of 8th rank of \a u64. + #define MSB7D(u64) LSB0D(u64) //!< Most significant byte of 8th rank of \a u64. + #define MSB6D(u64) LSB1D(u64) //!< Most significant byte of 7th rank of \a u64. + #define MSB5D(u64) LSB2D(u64) //!< Most significant byte of 6th rank of \a u64. + #define MSB4D(u64) LSB3D(u64) //!< Most significant byte of 5th rank of \a u64. + #define MSB3D(u64) LSB4D(u64) //!< Most significant byte of 4th rank of \a u64. + #define MSB2D(u64) LSB5D(u64) //!< Most significant byte of 3rd rank of \a u64. + #define MSB1D(u64) LSB6D(u64) //!< Most significant byte of 2nd rank of \a u64. + #define MSB0D(u64) LSB7D(u64) //!< Most significant byte of 1st rank of \a u64. + +#elif (BIG_ENDIAN_MCU==TRUE) + #define MSB(u16) (((U8 *)&(u16))[0]) //!< Most significant byte of \a u16. + #define LSB(u16) (((U8 *)&(u16))[1]) //!< Least significant byte of \a u16. + + #define MSH(u32) (((U16 *)&(u32))[0]) //!< Most significant half-word of \a u32. + #define LSH(u32) (((U16 *)&(u32))[1]) //!< Least significant half-word of \a u32. + #define MSB0W(u32) (((U8 *)&(u32))[0]) //!< Most significant byte of 1st rank of \a u32. + #define MSB1W(u32) (((U8 *)&(u32))[1]) //!< Most significant byte of 2nd rank of \a u32. + #define MSB2W(u32) (((U8 *)&(u32))[2]) //!< Most significant byte of 3rd rank of \a u32. + #define MSB3W(u32) (((U8 *)&(u32))[3]) //!< Most significant byte of 4th rank of \a u32. + #define LSB3W(u32) MSB0W(u32) //!< Least significant byte of 4th rank of \a u32. + #define LSB2W(u32) MSB1W(u32) //!< Least significant byte of 3rd rank of \a u32. + #define LSB1W(u32) MSB2W(u32) //!< Least significant byte of 2nd rank of \a u32. + #define LSB0W(u32) MSB3W(u32) //!< Least significant byte of 1st rank of \a u32. + + #define MSW(u64) (((U32 *)&(u64))[0]) //!< Most significant word of \a u64. + #define LSW(u64) (((U32 *)&(u64))[1]) //!< Least significant word of \a u64. + #define MSH0(u64) (((U16 *)&(u64))[0]) //!< Most significant half-word of 1st rank of \a u64. + #define MSH1(u64) (((U16 *)&(u64))[1]) //!< Most significant half-word of 2nd rank of \a u64. + #define MSH2(u64) (((U16 *)&(u64))[2]) //!< Most significant half-word of 3rd rank of \a u64. + #define MSH3(u64) (((U16 *)&(u64))[3]) //!< Most significant half-word of 4th rank of \a u64. + #define LSH3(u64) MSH0(u64) //!< Least significant half-word of 4th rank of \a u64. + #define LSH2(u64) MSH1(u64) //!< Least significant half-word of 3rd rank of \a u64. + #define LSH1(u64) MSH2(u64) //!< Least significant half-word of 2nd rank of \a u64. + #define LSH0(u64) MSH3(u64) //!< Least significant half-word of 1st rank of \a u64. + #define MSB0D(u64) (((U8 *)&(u64))[0]) //!< Most significant byte of 1st rank of \a u64. + #define MSB1D(u64) (((U8 *)&(u64))[1]) //!< Most significant byte of 2nd rank of \a u64. + #define MSB2D(u64) (((U8 *)&(u64))[2]) //!< Most significant byte of 3rd rank of \a u64. + #define MSB3D(u64) (((U8 *)&(u64))[3]) //!< Most significant byte of 4th rank of \a u64. + #define MSB4D(u64) (((U8 *)&(u64))[4]) //!< Most significant byte of 5th rank of \a u64. + #define MSB5D(u64) (((U8 *)&(u64))[5]) //!< Most significant byte of 6th rank of \a u64. + #define MSB6D(u64) (((U8 *)&(u64))[6]) //!< Most significant byte of 7th rank of \a u64. + #define MSB7D(u64) (((U8 *)&(u64))[7]) //!< Most significant byte of 8th rank of \a u64. + #define LSB7D(u64) MSB0D(u64) //!< Least significant byte of 8th rank of \a u64. + #define LSB6D(u64) MSB1D(u64) //!< Least significant byte of 7th rank of \a u64. + #define LSB5D(u64) MSB2D(u64) //!< Least significant byte of 6th rank of \a u64. + #define LSB4D(u64) MSB3D(u64) //!< Least significant byte of 5th rank of \a u64. + #define LSB3D(u64) MSB4D(u64) //!< Least significant byte of 4th rank of \a u64. + #define LSB2D(u64) MSB5D(u64) //!< Least significant byte of 3rd rank of \a u64. + #define LSB1D(u64) MSB6D(u64) //!< Least significant byte of 2nd rank of \a u64. + #define LSB0D(u64) MSB7D(u64) //!< Least significant byte of 1st rank of \a u64. + +#else + #error Unknown endianism. +#endif + +//! @} + + +/*! \name Endianism Conversion + * + * The same considerations as for clz and ctz apply here but AVR32-GCC's + * __builtin_bswap_16 and __builtin_bswap_32 do not behave like macros when + * applied to constant expressions, so two sets of macros are defined here: + * - Swap16, Swap32 and Swap64 to apply to constant expressions (values known + * at compile time); + * - swap16, swap32 and swap64 to apply to non-constant expressions (values + * unknown at compile time). + */ +//! @{ + +/*! \brief Toggles the endianism of \a u16 (by swapping its bytes). + * + * \param u16 U16 of which to toggle the endianism. + * + * \return Value resulting from \a u16 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap16(u16) ((U16)(((U16)(u16) >> 8) |\ + ((U16)(u16) << 8))) + +/*! \brief Toggles the endianism of \a u32 (by swapping its bytes). + * + * \param u32 U32 of which to toggle the endianism. + * + * \return Value resulting from \a u32 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap32(u32) ((U32)(((U32)Swap16((U32)(u32) >> 16)) |\ + ((U32)Swap16((U32)(u32)) << 16))) + +/*! \brief Toggles the endianism of \a u64 (by swapping its bytes). + * + * \param u64 U64 of which to toggle the endianism. + * + * \return Value resulting from \a u64 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap64(u64) ((U64)(((U64)Swap32((U64)(u64) >> 32)) |\ + ((U64)Swap32((U64)(u64)) << 32))) + +/*! \brief Toggles the endianism of \a u16 (by swapping its bytes). + * + * \param u16 U16 of which to toggle the endianism. + * + * \return Value resulting from \a u16 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define swap16(u16) ((U16)__builtin_bswap_16((U16)(u16))) +#elif (defined __ICCAVR32__) + #define swap16(u16) ((U16)__swap_bytes_in_halfwords((U16)(u16))) +#endif + +/*! \brief Toggles the endianism of \a u32 (by swapping its bytes). + * + * \param u32 U32 of which to toggle the endianism. + * + * \return Value resulting from \a u32 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define swap32(u32) ((U32)__builtin_bswap_32((U32)(u32))) +#elif (defined __ICCAVR32__) + #define swap32(u32) ((U32)__swap_bytes((U32)(u32))) +#endif + +/*! \brief Toggles the endianism of \a u64 (by swapping its bytes). + * + * \param u64 U64 of which to toggle the endianism. + * + * \return Value resulting from \a u64 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#define swap64(u64) ((U64)(((U64)swap32((U64)(u64) >> 32)) |\ + ((U64)swap32((U64)(u64)) << 32))) + +//! @} + + +/*! \name Target Abstraction + */ +//! @{ + +#define _GLOBEXT_ extern //!< extern storage-class specifier. +#define _CONST_TYPE_ const //!< const type qualifier. +#define _MEM_TYPE_SLOW_ //!< Slow memory type. +#define _MEM_TYPE_MEDFAST_ //!< Fairly fast memory type. +#define _MEM_TYPE_FAST_ //!< Fast memory type. + +typedef U8 Byte; //!< 8-bit unsigned integer. + +#define memcmp_ram2ram memcmp //!< Target-specific memcmp of RAM to RAM. +#define memcmp_code2ram memcmp //!< Target-specific memcmp of RAM to NVRAM. +#define memcpy_ram2ram memcpy //!< Target-specific memcpy from RAM to RAM. +#define memcpy_code2ram memcpy //!< Target-specific memcpy from NVRAM to RAM. + +#define LSB0(u32) LSB0W(u32) //!< Least significant byte of 1st rank of \a u32. +#define LSB1(u32) LSB1W(u32) //!< Least significant byte of 2nd rank of \a u32. +#define LSB2(u32) LSB2W(u32) //!< Least significant byte of 3rd rank of \a u32. +#define LSB3(u32) LSB3W(u32) //!< Least significant byte of 4th rank of \a u32. +#define MSB3(u32) MSB3W(u32) //!< Most significant byte of 4th rank of \a u32. +#define MSB2(u32) MSB2W(u32) //!< Most significant byte of 3rd rank of \a u32. +#define MSB1(u32) MSB1W(u32) //!< Most significant byte of 2nd rank of \a u32. +#define MSB0(u32) MSB0W(u32) //!< Most significant byte of 1st rank of \a u32. + +//! @} + +#endif // __AVR32_ABI_COMPILER__ + + +#endif // _COMPILER_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/conf_isp.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/conf_isp.h new file mode 100644 index 0000000..ca516ee --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/conf_isp.h @@ -0,0 +1,136 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ****************************************************************** + * + * \brief ISP configuration file. + * + * This file contains the possible external configuration of the ISP. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USB module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ***************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_ISP_H_ +#define _CONF_ISP_H_ + +#include +#include "compiler.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +#define PRODUCT_MANUFACTURER_ID 0x58 +#define PRODUCT_FAMILY_ID 0x20 + +#define ISP_VERSION 0x10 +#define ISP_ID0 0x00 +#define ISP_ID1 0x00 + +#define ISP_CFG1 (*(volatile U32 *)ISP_CFG1_ADDRESS) +#define ISP_CFG1_ADDRESS (AVR32_FLASHC_USER_PAGE_ADDRESS + ISP_CFG1_OFFSET) +#define ISP_CFG1_OFFSET 0x000001FC +#define ISP_CFG1_SIZE 4 + +#define ISP_CFG1_BOOT_KEY1 16 +#define ISP_CFG1_BOOT_KEY1_MASK 0xFFFF0000 +#define ISP_CFG1_BOOT_KEY1_OFFSET 16 +#define ISP_CFG1_BOOT_KEY1_SIZE 16 +#define ISP_CFG1_BOOT_KEY1_VALUE 0xE11E + +#define ISP_CFG1_FORCE 9 +#define ISP_CFG1_FORCE_MASK 0x00000200 +#define ISP_CFG1_FORCE_OFFSET 9 +#define ISP_CFG1_FORCE_SIZE 1 + +#define ISP_CFG1_IO_COND_EN 8 +#define ISP_CFG1_IO_COND_EN_MASK 0x00000100 +#define ISP_CFG1_IO_COND_EN_OFFSET 8 +#define ISP_CFG1_IO_COND_EN_SIZE 1 + +#define ISP_CFG1_CRC8 0 +#define ISP_CFG1_CRC8_MASK 0x000000FF +#define ISP_CFG1_CRC8_OFFSET 0 +#define ISP_CFG1_CRC8_SIZE 8 +#define ISP_CFG1_CRC8_POLYNOMIAL 0x107 + +#define ISP_CFG2 (*(volatile U32 *)ISP_CFG2_ADDRESS) +#define ISP_CFG2_ADDRESS (AVR32_FLASHC_USER_PAGE_ADDRESS + ISP_CFG2_OFFSET) +#define ISP_CFG2_OFFSET 0x000001F8 +#define ISP_CFG2_SIZE 4 + +#define ISP_CFG2_BOOT_KEY 17 +#define ISP_CFG2_BOOT_KEY_MASK 0xFFFE0000 +#define ISP_CFG2_BOOT_KEY_OFFSET 17 +#define ISP_CFG2_BOOT_KEY_SIZE 15 +#define ISP_CFG2_BOOT_KEY_VALUE 0x494F + +#define ISP_CFG2_IO_COND_LEVEL 16 +#define ISP_CFG2_IO_COND_LEVEL_MASK 0x00010000 +#define ISP_CFG2_IO_COND_LEVEL_OFFSET 16 +#define ISP_CFG2_IO_COND_LEVEL_SIZE 1 + +#define ISP_CFG2_IO_COND_PIN 8 +#define ISP_CFG2_IO_COND_PIN_MASK 0x0000FF00 +#define ISP_CFG2_IO_COND_PIN_OFFSET 8 +#define ISP_CFG2_IO_COND_PIN_SIZE 8 + +#define ISP_CFG2_CRC8 0 +#define ISP_CFG2_CRC8_MASK 0x000000FF +#define ISP_CFG2_CRC8_OFFSET 0 +#define ISP_CFG2_CRC8_SIZE 8 +#define ISP_CFG2_CRC8_POLYNOMIAL 0x107 + +#define ISP_KEY (*(volatile U32 *)ISP_KEY_ADDRESS) +#define ISP_KEY_ADDRESS (AVR32_SRAM_ADDRESS + ISP_KEY_OFFSET) +#define ISP_KEY_OFFSET 0x00000000 +#define ISP_KEY_SIZE 4 +#define ISP_KEY_VALUE ('I' << 24 | 'S' << 16 | 'P' << 8 | 'K') + +#ifndef ISP_OSC + #define ISP_OSC 0 +#endif + +#define DFU_FRAME_LENGTH 2048 + +#define PROGRAM_START_ADDRESS (AVR32_FLASH_ADDRESS + PROGRAM_START_OFFSET) +#define PROGRAM_START_OFFSET 0x00002000 + + +#endif // _CONF_ISP_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/parts.h b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/parts.h new file mode 100644 index 0000000..6637b2f --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/SOFTWARE_FRAMEWORK/UTILS/parts.h @@ -0,0 +1,203 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Arch file for AVR32. + * + * This file defines common AVR32 UC3 series. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _ARCH_H_ +#define _ARCH_H_ + +// UC3 A Series +#define UC3A0 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A0128__) || \ + defined (__AVR32_UC3A0256__) || \ + defined (__AVR32_UC3A0512__) || \ + defined (__AVR32_UC3A0512ES__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A0128__) || \ + defined (__AT32UC3A0256__) || \ + defined (__AT32UC3A0512__) || \ + defined (__AT32UC3A0512ES__))) + +#define UC3A1 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A1128__) || \ + defined (__AVR32_UC3A1256__) || \ + defined (__AVR32_UC3A1512__) || \ + defined (__AVR32_UC3A1512ES__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A1128__) || \ + defined (__AT32UC3A1256__) || \ + defined (__AT32UC3A1512__) || \ + defined (__AT32UC3A1512ES__))) + +#define UC3A3 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A364__) || \ + defined (__AVR32_UC3A364S__) || \ + defined (__AVR32_UC3A3128__) || \ + defined (__AVR32_UC3A3128S__) || \ + defined (__AVR32_UC3A3256__) || \ + defined (__AVR32_UC3A3256S__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A364__) || \ + defined (__AT32UC3A364S__) || \ + defined (__AT32UC3A3128__) || \ + defined (__AT32UC3A3128S__) || \ + defined (__AT32UC3A3256__) || \ + defined (__AT32UC3A3256S__))) + +#define UC3A (UC3A0 || UC3A1 || UC3A3) + +// UC3 B Series +#define UC3B0 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3B064__) || \ + defined (__AVR32_UC3B0128__) || \ + defined (__AVR32_UC3B0256__) || \ + defined (__AVR32_UC3B0256ES__) || \ + defined (__AVR32_UC3B0512__) || \ + defined (__AVR32_UC3B0512REVC_))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3B064__) || \ + defined (__AT32UC3B0128__) || \ + defined (__AT32UC3B0256__) || \ + defined (__AT32UC3B0256ES__) || \ + defined (__AT32UC3B0512__) || \ + defined (__AT32UC3B0512REVC__))) + +#define UC3B1 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3B164__) || \ + defined (__AVR32_UC3B1128__) || \ + defined (__AVR32_UC3B1256__) || \ + defined (__AVR32_UC3B1256ES__) || \ + defined (__AVR32_UC3B1512__) || \ + defined (__AVR32_UC3B1512ES__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3B164__) || \ + defined (__AT32UC3B1128__) || \ + defined (__AT32UC3B1256__) || \ + defined (__AT32UC3B1256ES__) || \ + defined (__AT32UC3B1512__) || \ + defined (__AT32UC3B1512REVC__))) + +#define UC3B (UC3B0 || UC3B1 ) + +// UC3 C Series +#define UC3C0 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C064C__) || \ + defined (__AVR32_UC3C0128C__) || \ + defined (__AVR32_UC3C0256C__) || \ + defined (__AVR32_UC3C0512CREVC__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C064C__) || \ + defined (__AT32UC3C0128C__) || \ + defined (__AT32UC3C0256C__) || \ + defined (__AT32UC3C0512C__))) + +#define UC3C1 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C164C__) || \ + defined (__AVR32_UC3C1128C__) || \ + defined (__AVR32_UC3C1256C__) || \ + defined (__AVR32_UC3C1512CREVC__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C164C__) || \ + defined (__AT32UC3C1128C__) || \ + defined (__AT32UC3C1256C__) || \ + defined (__AT32UC3C1512C__))) + +#define UC3C2 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C264C__) || \ + defined (__AVR32_UC3C2128C__) || \ + defined (__AVR32_UC3C2256C__) || \ + defined (__AVR32_UC3C2512CREVC__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C264C__) || \ + defined (__AT32UC3C2128C__) || \ + defined (__AT32UC3C2256C__) || \ + defined (__AT32UC3C2512C__))) + +#define UC3C (UC3C0 || UC3C1 || UC3C2) + +// UC3 L Device series +#define UC3L0 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3L016__) || \ + defined (__AVR32_UC3L032__) || \ + defined (__AVR32_UC3L064__) || \ + defined (__AVR32_UC3L064REVB__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3L016__) || \ + defined (__AT32UC3L032__) || \ + defined (__AT32UC3L064__) || \ + defined (__AT32UC3L064REVB__))) + +#define UC3L1 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3L116__) || \ + defined (__AVR32_UC3L132__) || \ + defined (__AVR32_UC3L164__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3L116__) || \ + defined (__AT32UC3L132__) || \ + defined (__AT32UC3L164__))) + +#define UC3L2 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3L216__) || \ + defined (__AVR32_UC3L232__) || \ + defined (__AVR32_UC3L264__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3L216__) || \ + defined (__AT32UC3L232__) || \ + defined (__AT32UC3L264__))) + +#define UC3L3 ( defined (__GNUC__) && \ + ( defined (__AVR32_UC3L316__) || \ + defined (__AVR32_UC3L332__) || \ + defined (__AVR32_UC3L364__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3L316__) || \ + defined (__AT32UC3L332__) || \ + defined (__AT32UC3L364__))) + +#define UC3L (UC3L0 || UC3L1 || UC3L2 || UC3L3) + +#endif // _ARCH_H_ diff --git a/firmwares/wifishield/wifi_dnld/src/clocks.c b/firmwares/wifishield/wifi_dnld/src/clocks.c new file mode 100644 index 0000000..cdd07fa --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/clocks.c @@ -0,0 +1,101 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#include +#include "board.h" +#include "clocks.h" +#include "pm.h" +#include "flashc.h" +#include "gpio.h" + +/** + * Initializes the MCU system clocks. + */ +void +init_sys_clocks(void) +{ + /* switch to OSC0 to speed up the booting */ + pm_switch_to_osc0(&AVR32_PM, FOSC0, OSC0_STARTUP); + +#ifndef USE_PLL + return; +#endif + + /* For audio, ee have to use OSC1 on to generate the correct clockrate + * for the SSC + */ +#if OSC == 1 + /* start oscillator1 */ + pm_enable_osc1_crystal(&AVR32_PM, FOSC1); + pm_enable_clk1(&AVR32_PM, OSC1_STARTUP); +#endif + + /* configure pll multipliers */ + pm_pll_setup(&AVR32_PM, + 0, /* pll */ + PLL_MUL, /* mul */ + 1, /* div */ + OSC, /* osc */ + 16); /* lockcount */ + + /* set PLL operating range and divider (fpll = fvco/2) + * this gives PLL output = 66 MHz (62.0928 MHz for EVK1105/OSC1) + */ + pm_pll_set_option(&AVR32_PM, + 0, /* pll */ + 1, /* pll_freq */ + 1, /* pll_div2 */ + 0); /* pll_wbwdisable. */ + + + /* start PLL0 and wait for the lock */ + pm_pll_enable(&AVR32_PM, 0); + pm_wait_for_pll0_locked(&AVR32_PM); + + /* Set all peripheral clocks torun at master clock rate */ + pm_cksel(&AVR32_PM, + 0, /* pbadiv */ + 0, /* pbasel */ + 0, /* pbbdiv */ + 0, /* pbbsel */ + 0, /* hsbdiv */ + 0); /* hsbsel */ + + /* Set one waitstate for the flash */ + flashc_set_wait_state(1); + + /* Switch to PLL0 as the master clock */ + pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0); + +#if OSC == 1 + pm_configure_usb_clock(); +#endif +} diff --git a/firmwares/wifishield/wifi_dnld/src/clocks.h b/firmwares/wifishield/wifi_dnld/src/clocks.h new file mode 100644 index 0000000..cceda29 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/clocks.h @@ -0,0 +1,78 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef CLOCKS_H +#define CLOCKS_H + +#include "board.h" + + +#if BOARD == EVK1100 +# define USE_PLL +# define OSC 0 +# define PLL_MUL 10 +#elif BOARD == EVK1101 +# define USE_PLL +# define OSC 0 +# define PLL_MUL 9 +#elif BOARD == EVK1104 +# define USE_PLL +# define OSC 0 +# define PLL_MUL 9 /* for some reason we cant use 66 MHz */ +#elif BOARD == EVK1105 +# define USE_PLL +# define OSC 1 +# define PLL_MUL 10 +#elif BOARD == ARDUINO +# define USE_PLL +# define OSC 0 +# define PLL_MUL 8 +#endif + +#if OSC == 0 +# define FOSC FOSC0 /* 12 MHz */ +#else +# define FOSC FOSC1 /* 11.2896 MHz */ +#endif + +#ifdef USE_PLL +# define FMCK_HZ ((FOSC * (PLL_MUL + 1)) / 2) +#else +# define FMCK_HZ FOSC +#endif + +#define FCPU_HZ FMCK_HZ +#define FHSB_HZ FCPU_HZ +#define FPBB_HZ FMCK_HZ +#define FPBA_HZ FMCK_HZ + +void init_sys_clocks(void); + +#endif diff --git a/firmwares/wifishield/wifi_dnld/src/flash_fw.c b/firmwares/wifishield/wifi_dnld/src/flash_fw.c new file mode 100644 index 0000000..75d35f6 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/flash_fw.c @@ -0,0 +1,125 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#include + +#include "printf-stdarg.h" +#include "wl_fw.h" +#include "startup.h" +#include "nor_flash.h" +#include "gpio.h" + +#define GREEN_OFF() gpio_set_gpio_pin(LED0_GPIO) +#define GREEN_ON() gpio_clr_gpio_pin(LED0_GPIO) +#define GREEN_BLINK() gpio_tgl_gpio_pin(LED0_GPIO) +#define RED_OFF() gpio_set_gpio_pin(LED1_GPIO) +#define RED_ON() gpio_clr_gpio_pin(LED1_GPIO) +#define RED_BLINK() gpio_tgl_gpio_pin(LED1_GPIO) +#define BLUE_OFF() gpio_set_gpio_pin(LED2_GPIO) +#define BLUE_ON() gpio_clr_gpio_pin(LED2_GPIO) +#define BLUE_BLINK() gpio_tgl_gpio_pin(LED2_GPIO) + + +/** + * + */ +void +led_init(void) +{ + gpio_enable_gpio_pin(LED0_GPIO); + gpio_enable_gpio_pin(LED1_GPIO); + gpio_enable_gpio_pin(LED2_GPIO); + GREEN_OFF(); + RED_OFF(); + BLUE_OFF(); +} + + +int main(void) +{ + U32 pos, len; + + startup_init(); + printk("*** HD chip firmware upgrade ver 2.7 ***\n"); + led_init(); + flash_init(); + GREEN_ON(); + if (at45dbx_mem_check() == OK) + { + printk("Memory check... [ OK ]\n"); + } + else + { + RED_ON(); + GREEN_OFF(); + printk("Memory check... [FAIL]\n"); + return 0; + } + printk("Writing firmware data to flash\n"); + pos = 0; + while (pos < fw_len) { + if (fw_len - pos > SECTOR_SIZE) + len = SECTOR_SIZE; + else + len = fw_len - pos; + + flash_write(pos, fw_buf + pos, len); + pos += len; + } + + printk("Verifying firmware data\n"); + pos = 0; + while (pos < fw_len) { + static U8 page_buf[SECTOR_SIZE]; + U32 i; + + if (fw_len - pos > SECTOR_SIZE) + len = SECTOR_SIZE; + else + len = fw_len - pos; + + flash_read(pos, page_buf, len); + + for (i = 0; i < len; i++) + if (*(page_buf + i) != *(fw_buf + pos + i)) { + RED_ON(); + GREEN_OFF(); + printk("Verify failed at byte %d, 0x%02x != 0x%02x\n", + pos + i, *(page_buf + i), *(fw_buf + pos + i)); + return 0; + } + + + pos += len; + } + GREEN_OFF(); + BLUE_ON(); + printk("Firmware successfully stored in flash!\n"); + return 0; +} diff --git a/firmwares/wifishield/wifi_dnld/src/license.txt b/firmwares/wifishield/wifi_dnld/src/license.txt new file mode 100644 index 0000000..e57439f --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/license.txt @@ -0,0 +1,42 @@ + Copyright (C) 2009, H&D Wireless AB All rights reserved. + + The license to use this software in whole and in part and to + redistribute it in any form follows with the WiFi HW module from H&D + Wireless and is granted under the following restrictions: + + 1. Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + 3. The name of H&D Wireless AB may not be used to endorse or promote + products derived from this software without specific prior written + permission. + + 4. The software may only be used together with hardware from H&D + Wireless all other use is prohibited. + + 5. The license to use and redistribute the software is granted + together with the purchase of a hardware platform on a one to one + basis + + 6. The binary code may not be reversed engineered or by other means + copied to circumvent this license. + + THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY + EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + PURPOSE ARE EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT + SHALL HD WIRELESS AB BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + OF THE POSSIBILITY OF SUCH DAMAGE. + + For more information regarding this software license Contact H&D + Wireless AB (support@hd-wireless.se). diff --git a/firmwares/wifishield/wifi_dnld/src/nor_flash.c b/firmwares/wifishield/wifi_dnld/src/nor_flash.c new file mode 100644 index 0000000..0115949 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/nor_flash.c @@ -0,0 +1,99 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#include +#include "compiler.h" +#include "preprocessor.h" +#include "board.h" +#include "power_clocks_lib.h" +#include "gpio.h" +#include "spi.h" +#include "conf_at45dbx.h" +#include "at45dbx.h" +#include "clocks.h" + + +void flash_init(void) +{ + static const gpio_map_t AT45DBX_SPI_GPIO_MAP = { + { AT45DBX_SPI_SCK_PIN, AT45DBX_SPI_SCK_FUNCTION }, + { AT45DBX_SPI_MISO_PIN, AT45DBX_SPI_MISO_FUNCTION }, + { AT45DBX_SPI_MOSI_PIN, AT45DBX_SPI_MOSI_FUNCTION }, + { AT45DBX_SPI_NPCS2_PIN, AT45DBX_SPI_NPCS2_FUNCTION }, + }; + + spi_options_t spiOptions = { + .reg = AT45DBX_SPI_FIRST_NPCS, + .baudrate = AT45DBX_SPI_MASTER_SPEED, + .bits = AT45DBX_SPI_BITS, + .spck_delay = 0, + .trans_delay = 0, + .stay_act = 1, + .spi_mode = 0, + .modfdis = 1 + }; + + gpio_enable_module(AT45DBX_SPI_GPIO_MAP, + sizeof(AT45DBX_SPI_GPIO_MAP) / + sizeof(AT45DBX_SPI_GPIO_MAP[0])); + + spi_initMaster(AT45DBX_SPI, &spiOptions); + + spi_selectionMode(AT45DBX_SPI, 0, 0, 0); + spi_enable(AT45DBX_SPI); + + /* put up flash reset pin */ + gpio_set_gpio_pin(AT45DBX_CHIP_RESET); + + at45dbx_init(spiOptions, FPBA_HZ); +} + +void flash_write(U32 addr, const U8* buf, U32 len) +{ + U32 sector = addr / AT45DBX_SECTOR_SIZE; + U32 i; + Assert(addr % AT45DBX_SECTOR_SIZE == 0); + + at45dbx_write_open(sector); + for (i = 0; i < len; i++) + at45dbx_write_byte(buf[i]); + at45dbx_write_close(); +} + +void flash_read(U32 addr, U8* buf, U32 len) +{ + U32 sector = addr / AT45DBX_SECTOR_SIZE; + U32 i; + Assert(addr % AT45DBX_SECTOR_SIZE == 0); + + at45dbx_read_open(sector); + for (i = 0; i < len; i++) + buf[i] = at45dbx_read_byte(); + at45dbx_read_close(); +} diff --git a/firmwares/wifishield/wifi_dnld/src/nor_flash.h b/firmwares/wifishield/wifi_dnld/src/nor_flash.h new file mode 100644 index 0000000..52a4a20 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/nor_flash.h @@ -0,0 +1,41 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef NOR_FLASH_H +#define NOR_FLASH_H + +#include "at45dbx.h" + +#define SECTOR_SIZE AT45DBX_SECTOR_SIZE + +void flash_init(void); +void flash_write(U32 addr, const U8* buf, U32 len); +void flash_read(U32 addr, U8* buf, U32 len); + +#endif diff --git a/firmwares/wifishield/wifi_dnld/src/printf-stdarg.c b/firmwares/wifishield/wifi_dnld/src/printf-stdarg.c new file mode 100644 index 0000000..86ab88e --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/printf-stdarg.c @@ -0,0 +1,323 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/* This source file is part of the ATMEL AVR32-SoftwareFramework-AT32UC3A-1.4.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief sprintf functions to replace newlib for AVR32 UC3. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (C) 2006-2008, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + Copyright 2001, 2002 Georges Menie (www.menie.org) + stdarg version contributed by Christian Ettinger + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU Lesser General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +/* + putchar is the only external dependency for this file, + if you have a working putchar, leave it commented out. + If not, uncomment the define below and + replace outbyte(c) by your own function call. + +*/ + + +#include +#include + +#define putchar(c) print_dbg_char(c) + +static void printchar(char **str, int c) +{ + extern int putchar(int c); + + if (str) { + **str = c; + ++(*str); + } + else (void)putchar(c); +} + +#define PAD_RIGHT 1 +#define PAD_ZERO 2 + +static int prints(char **out, const char *string, int width, int pad) +{ + register int pc = 0, padchar = ' '; + + if (width > 0) { + register int len = 0; + register const char *ptr; + for (ptr = string; *ptr; ++ptr) ++len; + if (len >= width) width = 0; + else width -= len; + if (pad & PAD_ZERO) padchar = '0'; + } + if (!(pad & PAD_RIGHT)) { + for ( ; width > 0; --width) { + printchar (out, padchar); + ++pc; + } + } + for ( ; *string ; ++string) { + printchar (out, *string); + ++pc; + } + for ( ; width > 0; --width) { + printchar (out, padchar); + ++pc; + } + + return pc; +} + +/* the following should be enough for 32 bit int */ +#define PRINT_BUF_LEN 12 + +static int printi(char **out, int i, int b, int sg, int width, int pad, int letbase) +{ + char print_buf[PRINT_BUF_LEN]; + register char *s; + register int t, neg = 0, pc = 0; + register unsigned int u = i; + + if (i == 0) { + print_buf[0] = '0'; + print_buf[1] = '\0'; + return prints (out, print_buf, width, pad); + } + + if (sg && b == 10 && i < 0) { + neg = 1; + u = -i; + } + + s = print_buf + PRINT_BUF_LEN-1; + *s = '\0'; + + while (u) { + t = u % b; + if( t >= 10 ) + t += letbase - '0' - 10; + *--s = t + '0'; + u /= b; + } + + if (neg) { + if( width && (pad & PAD_ZERO) ) { + printchar (out, '-'); + ++pc; + --width; + } + else { + *--s = '-'; + } + } + + return pc + prints (out, s, width, pad); +} + +int fprintf(__FILE *stream, const char *format, ...) +{ +return 0; +} +int printk_va(char **out, const char *format, va_list args ) +{ + register int width, pad; + register int pc = 0; + char scr[2]; + + for (; *format != 0; ++format) { + if (*format == '%') { + ++format; + width = pad = 0; + if (*format == '\0') break; + if (*format == '%') goto out; + if (*format == '-') { + ++format; + pad = PAD_RIGHT; + } + while (*format == '0') { + ++format; + pad |= PAD_ZERO; + } + for ( ; *format >= '0' && *format <= '9'; ++format) { + width *= 10; + width += *format - '0'; + } + if( *format == 's' ) { + register char *s = (char *)va_arg( args, int ); + pc += prints (out, s?s:"(null)", width, pad); + continue; + } + if( *format == 'd' ) { + pc += printi (out, va_arg( args, int ), 10, 1, width, pad, 'a'); + continue; + } + if( *format == 'p' ) { + pad = 8; + pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'a'); + continue; + } + if( *format == 'x' ) { + pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'a'); + continue; + } + if( *format == 'X' ) { + pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'A'); + continue; + } + if( *format == 'u' ) { + pc += printi (out, va_arg( args, int ), 10, 0, width, pad, 'a'); + continue; + } + if( *format == 'c' ) { + /* char are converted to int then pushed on the stack */ + scr[0] = (char)va_arg( args, int ); + scr[1] = '\0'; + pc += prints (out, scr, width, pad); + continue; + } + } + else { + out: + printchar (out, *format); + ++pc; + } + } + if (out) **out = '\0'; + va_end( args ); + return pc; +} + +int printk(const char *format, ...) +{ + va_list args; + + va_start( args, format ); + return printk_va( 0, format, args ); +} + +int sprintf(char *out, const char *format, ...) +{ + va_list args; + + va_start( args, format ); + return printk_va( &out, format, args ); +} + +#ifdef TEST_PRINTF +int main(void) +{ + char *ptr = "Hello world!"; + char *np = 0; + int i = 5; + unsigned int bs = sizeof(int)*8; + int mi; + char buf[80]; + + mi = (1 << (bs-1)) + 1; + printf("%s\n", ptr); + printf("printf test\n"); + printf("%s is null pointer\n", np); + printf("%d = 5\n", i); + printf("%d = - max int\n", mi); + printf("char %c = 'a'\n", 'a'); + printf("hex %x = ff\n", 0xff); + printf("hex %02x = 00\n", 0); + printf("signed %d = unsigned %u = hex %x\n", -3, -3, -3); + printf("%d %s(s)%", 0, "message"); + printf("\n"); + printf("%d %s(s) with %%\n", 0, "message"); + sprintf(buf, "justif: \"%-10s\"\n", "left"); printf("%s", buf); + sprintf(buf, "justif: \"%10s\"\n", "right"); printf("%s", buf); + sprintf(buf, " 3: %04d zero padded\n", 3); printf("%s", buf); + sprintf(buf, " 3: %-4d left justif.\n", 3); printf("%s", buf); + sprintf(buf, " 3: %4d right justif.\n", 3); printf("%s", buf); + sprintf(buf, "-3: %04d zero padded\n", -3); printf("%s", buf); + sprintf(buf, "-3: %-4d left justif.\n", -3); printf("%s", buf); + sprintf(buf, "-3: %4d right justif.\n", -3); printf("%s", buf); + + return 0; +} + +/* + * if you compile this file with + * gcc -Wall $(YOUR_C_OPTIONS) -DTEST_PRINTF -c printf.c + * you will get a normal warning: + * printf.c:214: warning: spurious trailing `%' in format + * this line is testing an invalid % at the end of the format string. + * + * this should display (on 32bit int machine) : + * + * Hello world! + * printf test + * (null) is null pointer + * 5 = 5 + * -2147483647 = - max int + * char a = 'a' + * hex ff = ff + * hex 00 = 00 + * signed -3 = unsigned 4294967293 = hex fffffffd + * 0 message(s) + * 0 message(s) with % + * justif: "left " + * justif: " right" + * 3: 0003 zero padded + * 3: 3 left justif. + * 3: 3 right justif. + * -3: -003 zero padded + * -3: -3 left justif. + * -3: -3 right justif. + */ + +#endif diff --git a/firmwares/wifishield/wifi_dnld/src/printf-stdarg.h b/firmwares/wifishield/wifi_dnld/src/printf-stdarg.h new file mode 100644 index 0000000..f6bd664 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/printf-stdarg.h @@ -0,0 +1,36 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef PRINTF_STDARG_H +#define PRINTF_STDARG_H +#include + +int printk(const char *format, ...); +int printk_va(char **out, const char *format, va_list args ); +#endif diff --git a/firmwares/wifishield/wifi_dnld/src/startup.c b/firmwares/wifishield/wifi_dnld/src/startup.c new file mode 100644 index 0000000..fa2a8c0 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/startup.c @@ -0,0 +1,75 @@ +/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#include "startup.h" +#include "pm.h" +#include "intc.h" +#include "board.h" +#include "print_funcs.h" +#include "clocks.h" + + +static void init_exceptions(void) +{ + extern void _evba; + Set_system_register(AVR32_EVBA, (int)&_evba); + Enable_global_exception(); +} + +static void init_hmatrix(void) +{ + union { + unsigned long scfg; + avr32_hmatrix_scfg_t SCFG; + } u_avr32_hmatrix_scfg = { + AVR32_HMATRIX.scfg[AVR32_HMATRIX_SLAVE_FLASH] + }; + u_avr32_hmatrix_scfg.SCFG.defmstr_type = + AVR32_HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT; + AVR32_HMATRIX.scfg[AVR32_HMATRIX_SLAVE_FLASH] = + u_avr32_hmatrix_scfg.scfg; +} + +static void init_interrupts(void) +{ + INTC_init_interrupts(); + + //initExtInt(); + + Enable_global_interrupt(); +} + +void startup_init(void) +{ + init_exceptions(); + init_hmatrix(); + init_sys_clocks(); + init_interrupts(); + init_dbg_rs232(FPBA_HZ); +} diff --git a/firmwares/wifishield/wifi_dnld/src/startup.h b/firmwares/wifishield/wifi_dnld/src/startup.h new file mode 100644 index 0000000..a9adc60 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/startup.h @@ -0,0 +1,35 @@ +/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */ + +/*! \page License + * Copyright (C) 2009, H&D Wireless AB All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef STARTUP_H +#define STARTUP_H + +void startup_init(void); + +#endif diff --git a/firmwares/wifishield/wifi_dnld/src/wl_fw.h b/firmwares/wifishield/wifi_dnld/src/wl_fw.h new file mode 100644 index 0000000..5be5f37 --- /dev/null +++ b/firmwares/wifishield/wifi_dnld/src/wl_fw.h @@ -0,0 +1,19287 @@ +/* + * Programming interface for wl_api. + * Copyright (C) 2010 HD Wireless AB + * + * You should have received a copy of the license along with this library. + */ + +#ifndef WITHOUT_STDINT +#include +#endif +const uint8_t fw_buf[154188] = { + 0x10, 0x61, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x30, 0x00, 0x00, 0x00, 0x10, 0x61, 0x04, 0x00, + 0x38, 0x61, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x20, 0x61, 0x04, 0x00, + 0x30, 0x61, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x30, 0x61, 0x04, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x10, 0x61, 0x04, 0x00, + 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0xee, 0xee, + 0xee, 0xee, 0x18, 0xf0, 0x9f, 0xe5, 0x18, 0xf0, + 0x9f, 0xe5, 0x18, 0xf0, 0x9f, 0xe5, 0x18, 0xf0, + 0x9f, 0xe5, 0x00, 0x00, 0xa0, 0xe1, 0x18, 0xf0, + 0x9f, 0xe5, 0x18, 0xf0, 0x9f, 0xe5, 0x44, 0x00, + 0x00, 0x00, 0xb4, 0x08, 0x00, 0x00, 0xb4, 0x08, + 0x00, 0x00, 0xb4, 0x08, 0x00, 0x00, 0xb4, 0x08, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe4, 0x08, + 0x00, 0x00, 0x3c, 0x00, 0x3c, 0x00, 0x00, 0x00, + 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x0f, 0xe1, 0x1f, 0x00, 0xc0, 0xe3, + 0x13, 0x00, 0x80, 0xe3, 0xc0, 0x00, 0x80, 0xe3, + 0x00, 0xf0, 0x2f, 0xe1, 0x1c, 0xf0, 0x9f, 0xe5, + 0x3d, 0x02, 0x00, 0xeb, 0x5a, 0x02, 0x00, 0xeb, + 0x8d, 0x02, 0x00, 0xeb, 0x01, 0x00, 0x8f, 0xe2, + 0x10, 0xff, 0x2f, 0xe1, 0x41, 0xf0, 0xde, 0xfb, + 0x01, 0xf0, 0xdc, 0xfd, 0x3c, 0x00, 0x78, 0x00, + 0x00, 0x00, 0xfe, 0xe7, 0x00, 0x00, 0x5c, 0x00, + 0x00, 0x00, 0x78, 0x47, 0xc0, 0x46, 0x01, 0x00, + 0x00, 0xea, 0x78, 0x47, 0xc0, 0x46, 0x17, 0x00, + 0x00, 0xea, 0x8c, 0x11, 0x9f, 0xe5, 0x00, 0x20, + 0x91, 0xe5, 0x00, 0x30, 0x0f, 0xe1, 0x84, 0x11, + 0x9f, 0xe5, 0xfd, 0x20, 0xa1, 0xe8, 0x80, 0x01, + 0x9f, 0xe5, 0x80, 0x21, 0x9f, 0xe5, 0x01, 0x20, + 0x42, 0xe0, 0x0d, 0x00, 0x40, 0xe0, 0x3c, 0x00, + 0xb4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x50, 0xe1, + 0x28, 0x00, 0x00, 0xaa, 0x68, 0x01, 0x9f, 0xe5, + 0x0d, 0x00, 0x50, 0xe1, 0x02, 0x00, 0x00, 0xba, + 0x04, 0x20, 0x10, 0xe4, 0x04, 0x20, 0x81, 0xe4, + 0xfa, 0xff, 0xff, 0xea, 0x58, 0x11, 0x9f, 0xe5, + 0x58, 0x01, 0x9f, 0xe5, 0x00, 0x00, 0x81, 0xe5, + 0x3c, 0x11, 0x9f, 0xe5, 0x50, 0x01, 0x9f, 0xe5, + 0x00, 0x00, 0x81, 0xe5, 0x1e, 0xff, 0x2f, 0xe1, + 0x3c, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x48, 0x11, + 0x9f, 0xe5, 0x00, 0x00, 0x91, 0xe5, 0x24, 0x11, + 0x9f, 0xe5, 0x00, 0x00, 0x81, 0xe5, 0x2c, 0x11, + 0x9f, 0xe5, 0x38, 0x01, 0x9f, 0xe5, 0x00, 0x00, + 0x81, 0xe5, 0x1e, 0xff, 0x2f, 0xe1, 0x74, 0x02, + 0x00, 0xeb, 0x10, 0x01, 0x9f, 0xe5, 0x28, 0x11, + 0x9f, 0xe5, 0x04, 0x20, 0x91, 0xe4, 0x04, 0x20, + 0x00, 0xe4, 0x04, 0x21, 0x9f, 0xe5, 0x02, 0x00, + 0x51, 0xe1, 0x3c, 0x00, 0x2c, 0x01, 0x00, 0x00, + 0xfa, 0xff, 0xff, 0x1a, 0xf0, 0x10, 0x9f, 0xe5, + 0xfd, 0x20, 0xb1, 0xe8, 0x03, 0xf0, 0x2f, 0xe1, + 0xe0, 0x10, 0x9f, 0xe5, 0x00, 0x20, 0x81, 0xe5, + 0xe8, 0x10, 0x9f, 0xe5, 0xf4, 0x20, 0x9f, 0xe5, + 0x00, 0x20, 0x81, 0xe5, 0x02, 0x10, 0x80, 0xe2, + 0x00, 0x00, 0x20, 0xe0, 0x01, 0x00, 0x40, 0xe2, + 0x11, 0xff, 0x2f, 0xe1, 0x01, 0x00, 0x8f, 0xe2, + 0x10, 0xff, 0x2f, 0xe1, 0x3c, 0x00, 0x68, 0x01, + 0x00, 0x00, 0x01, 0xf0, 0x9c, 0xf8, 0x78, 0x47, + 0x00, 0x00, 0x01, 0x00, 0x8f, 0xe2, 0x10, 0xff, + 0x2f, 0xe1, 0x01, 0xf0, 0x94, 0xf8, 0x78, 0x47, + 0x00, 0x00, 0x03, 0x00, 0x2d, 0xe9, 0x00, 0x10, + 0x0f, 0xe1, 0x00, 0x10, 0x80, 0xe5, 0xb8, 0x10, + 0x9f, 0xe5, 0x04, 0x10, 0x80, 0xe5, 0x00, 0x10, + 0xa0, 0xe1, 0x10, 0x00, 0x80, 0xe2, 0xfc, 0x1f, + 0xa0, 0xe8, 0x00, 0x20, 0xa0, 0xe1, 0x3c, 0x00, + 0xa4, 0x01, 0x00, 0x00, 0x01, 0x30, 0xa0, 0xe1, + 0x03, 0x00, 0xbd, 0xe8, 0x08, 0x00, 0x83, 0xe5, + 0x0c, 0x10, 0x83, 0xe5, 0xd3, 0x00, 0xa0, 0xe3, + 0x00, 0xf0, 0x21, 0xe1, 0x00, 0x60, 0xa2, 0xe8, + 0x00, 0x10, 0x4f, 0xe1, 0x04, 0x10, 0x82, 0xe4, + 0xd2, 0x00, 0xa0, 0xe3, 0x00, 0xf0, 0x21, 0xe1, + 0x00, 0x60, 0xa2, 0xe8, 0x00, 0x10, 0x4f, 0xe1, + 0x04, 0x10, 0x82, 0xe4, 0xd1, 0x00, 0xa0, 0xe3, + 0x3c, 0x00, 0xe0, 0x01, 0x00, 0x00, 0x00, 0xf0, + 0x21, 0xe1, 0x00, 0x7f, 0xa2, 0xe8, 0x00, 0x10, + 0x4f, 0xe1, 0x04, 0x10, 0x82, 0xe4, 0xd7, 0x00, + 0xa0, 0xe3, 0x00, 0xf0, 0x21, 0xe1, 0x00, 0x60, + 0xa2, 0xe8, 0x00, 0x10, 0x4f, 0xe1, 0x04, 0x10, + 0x82, 0xe4, 0xdb, 0x00, 0xa0, 0xe3, 0x00, 0xf0, + 0x21, 0xe1, 0x00, 0x60, 0xa2, 0xe8, 0x00, 0x10, + 0x4f, 0xe1, 0x00, 0x10, 0x82, 0xe5, 0x00, 0x00, + 0x93, 0xe5, 0x3c, 0x00, 0x1c, 0x02, 0x00, 0x00, + 0x00, 0xf0, 0x2f, 0xe1, 0x1e, 0xff, 0x2f, 0xe1, + 0x20, 0x00, 0x00, 0x00, 0x04, 0x03, 0x00, 0x00, + 0x20, 0xee, 0x01, 0x00, 0xd8, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x18, 0xf0, 0x9f, 0xe5, + 0x10, 0x01, 0x00, 0x00, 0x08, 0x03, 0x00, 0x00, + 0xee, 0xee, 0xee, 0xee, 0x24, 0x03, 0x00, 0x00, + 0x20, 0x02, 0x00, 0x00, 0xb0, 0xb5, 0x04, 0x1c, + 0x63, 0x1c, 0x0b, 0x4d, 0x3c, 0x00, 0x58, 0x02, + 0x00, 0x00, 0x01, 0xd1, 0x6c, 0x69, 0x10, 0xe0, + 0x00, 0xf0, 0x6c, 0xfb, 0x09, 0x48, 0xff, 0xf7, + 0x0c, 0xff, 0xec, 0x60, 0x08, 0x4a, 0x51, 0x68, + 0x50, 0x68, 0x88, 0x42, 0xfc, 0xd0, 0x02, 0x20, + 0x28, 0x70, 0x01, 0x21, 0x8a, 0x20, 0x01, 0xf0, + 0x12, 0xf8, 0x20, 0x1c, 0xb0, 0xbd, 0x30, 0x00, + 0x07, 0x00, 0x51, 0x02, 0x00, 0x00, 0x00, 0x03, + 0x07, 0x00, 0xb0, 0xb5, 0x05, 0x1c, 0x3c, 0x00, + 0x94, 0x02, 0x00, 0x00, 0x00, 0x24, 0x00, 0xf0, + 0x50, 0xfb, 0x14, 0x48, 0xff, 0xf7, 0xf0, 0xfe, + 0x13, 0x49, 0x14, 0x48, 0xc1, 0x60, 0x01, 0x21, + 0x13, 0x4a, 0x49, 0x03, 0x91, 0x60, 0x13, 0x49, + 0xca, 0x78, 0x08, 0x23, 0x9a, 0x43, 0xca, 0x70, + 0xca, 0x78, 0x04, 0x23, 0x1a, 0x43, 0xca, 0x70, + 0x6b, 0x1c, 0x0d, 0xd0, 0x0e, 0x4b, 0x5a, 0x68, + 0x59, 0x68, 0x91, 0x42, 0xfc, 0xd0, 0xbe, 0x21, + 0x3c, 0x00, 0xd0, 0x02, 0x00, 0x00, 0x19, 0x73, + 0x19, 0x7a, 0x11, 0x22, 0x91, 0x43, 0x19, 0x72, + 0x19, 0x7a, 0xc9, 0x07, 0xfc, 0xd4, 0x02, 0x21, + 0x01, 0x70, 0xff, 0xf7, 0xd0, 0xfe, 0x20, 0x1c, + 0xb0, 0xbd, 0x91, 0x02, 0x00, 0x00, 0xff, 0xff, + 0xff, 0x00, 0x30, 0x00, 0x07, 0x00, 0x00, 0x10, + 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x03, + 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x3c, 0x00, 0x0c, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x48, 0x03, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x00, + 0x84, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3c, 0x00, 0xc0, 0x03, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x47, + 0x08, 0x47, 0x10, 0x47, 0x18, 0x47, 0x20, 0x47, + 0x28, 0x47, 0x30, 0x47, 0x38, 0x47, 0x10, 0xb5, + 0x04, 0x1c, 0x10, 0x1c, 0x00, 0xf0, 0x23, 0xf9, + 0x03, 0xc4, 0x10, 0xbc, 0x08, 0xbc, 0x18, 0x47, + 0x00, 0x00, 0x3c, 0x00, 0xfc, 0x03, 0x00, 0x00, + 0x10, 0xb4, 0x04, 0x2a, 0x0e, 0xd3, 0x03, 0x1c, + 0x0b, 0x43, 0x9b, 0x07, 0x0a, 0xd1, 0x08, 0xc8, + 0x10, 0xc9, 0xa3, 0x42, 0x02, 0xd1, 0x04, 0x3a, + 0x04, 0x2a, 0xf8, 0xd2, 0xa3, 0x42, 0x01, 0xd0, + 0x04, 0x38, 0x04, 0x39, 0x00, 0x2a, 0x02, 0xd1, + 0x00, 0x20, 0x10, 0xbc, 0x70, 0x47, 0xd3, 0x07, + 0x01, 0xd5, 0x01, 0x32, 0x05, 0xe0, 0x03, 0x78, + 0x0c, 0x78, 0x01, 0x31, 0x3c, 0x00, 0x38, 0x04, + 0x00, 0x00, 0x01, 0x30, 0xa3, 0x42, 0x07, 0xd1, + 0x03, 0x78, 0x0c, 0x78, 0x01, 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