From 915ea3be2a6f453a9ab5f6c248e6695a3e74bf0f Mon Sep 17 00:00:00 2001 From: WestfW Date: Tue, 14 Jun 2011 23:57:41 -0700 Subject: Oops. Add atmega8.lst/hex and atmega168.lst/hex to controlled files. (cherry picked from commit c56a1293d70d27531b7351edc3aa4c11b4a6996b) --- bootloaders/optiboot/optiboot_atmega8.lst | 604 ++++++++++++++++++++++++++++++ 1 file changed, 604 insertions(+) create mode 100644 bootloaders/optiboot/optiboot_atmega8.lst (limited to 'bootloaders/optiboot/optiboot_atmega8.lst') diff --git a/bootloaders/optiboot/optiboot_atmega8.lst b/bootloaders/optiboot/optiboot_atmega8.lst new file mode 100644 index 0000000..d921895 --- /dev/null +++ b/bootloaders/optiboot/optiboot_atmega8.lst @@ -0,0 +1,604 @@ + +optiboot_atmega8.elf: file format elf32-avr + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text 000001e0 00001e00 00001e00 00000054 2**1 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .version 00000002 00001ffe 00001ffe 00000234 2**0 + CONTENTS, READONLY + 2 .debug_aranges 00000028 00000000 00000000 00000236 2**0 + CONTENTS, READONLY, DEBUGGING + 3 .debug_pubnames 0000005f 00000000 00000000 0000025e 2**0 + CONTENTS, READONLY, DEBUGGING + 4 .debug_info 000002a6 00000000 00000000 000002bd 2**0 + CONTENTS, READONLY, DEBUGGING + 5 .debug_abbrev 00000169 00000000 00000000 00000563 2**0 + CONTENTS, READONLY, DEBUGGING + 6 .debug_line 00000498 00000000 00000000 000006cc 2**0 + CONTENTS, READONLY, DEBUGGING + 7 .debug_frame 00000080 00000000 00000000 00000b64 2**2 + CONTENTS, READONLY, DEBUGGING + 8 .debug_str 0000014f 00000000 00000000 00000be4 2**0 + CONTENTS, READONLY, DEBUGGING + 9 .debug_loc 000002ba 00000000 00000000 00000d33 2**0 + CONTENTS, READONLY, DEBUGGING + 10 .debug_ranges 00000078 00000000 00000000 00000fed 2**0 + CONTENTS, READONLY, DEBUGGING + +Disassembly of section .text: + +00001e00
: +#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) +#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) +#endif + +/* main program starts here */ +int main(void) { + 1e00: 11 24 eor r1, r1 + // + // If not, uncomment the following instructions: + // cli(); + asm volatile ("clr __zero_reg__"); +#ifdef __AVR_ATmega8__ + SP=RAMEND; // This is done by hardware reset + 1e02: 8f e5 ldi r24, 0x5F ; 95 + 1e04: 94 e0 ldi r25, 0x04 ; 4 + 1e06: 9e bf out 0x3e, r25 ; 62 + 1e08: 8d bf out 0x3d, r24 ; 61 +#endif + + // Adaboot no-wait mod + ch = MCUSR; + 1e0a: 84 b7 in r24, 0x34 ; 52 + MCUSR = 0; + 1e0c: 14 be out 0x34, r1 ; 52 + if (!(ch & _BV(EXTRF))) appStart(); + 1e0e: 81 ff sbrs r24, 1 + 1e10: e2 d0 rcall .+452 ; 0x1fd6 + +#if LED_START_FLASHES > 0 + // Set up Timer 1 for timeout counter + TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 + 1e12: 85 e0 ldi r24, 0x05 ; 5 + 1e14: 8e bd out 0x2e, r24 ; 46 +#endif +#ifndef SOFT_UART +#ifdef __AVR_ATmega8__ + UCSRA = _BV(U2X); //Double speed mode USART + 1e16: 82 e0 ldi r24, 0x02 ; 2 + 1e18: 8b b9 out 0x0b, r24 ; 11 + UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx + 1e1a: 88 e1 ldi r24, 0x18 ; 24 + 1e1c: 8a b9 out 0x0a, r24 ; 10 + UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 + 1e1e: 86 e8 ldi r24, 0x86 ; 134 + 1e20: 80 bd out 0x20, r24 ; 32 + UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); + 1e22: 80 e1 ldi r24, 0x10 ; 16 + 1e24: 89 b9 out 0x09, r24 ; 9 + UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); +#endif +#endif + + // Set up watchdog to trigger after 500ms + watchdogConfig(WATCHDOG_1S); + 1e26: 8e e0 ldi r24, 0x0E ; 14 + 1e28: c2 d0 rcall .+388 ; 0x1fae + + /* Set LED pin as output */ + LED_DDR |= _BV(LED); + 1e2a: bd 9a sbi 0x17, 5 ; 23 + 1e2c: 96 e0 ldi r25, 0x06 ; 6 +} + +#if LED_START_FLASHES > 0 +void flash_led(uint8_t count) { + do { + TCNT1 = -(F_CPU/(1024*16)); + 1e2e: 20 e3 ldi r18, 0x30 ; 48 + 1e30: 3c ef ldi r19, 0xFC ; 252 + TIFR1 = _BV(TOV1); + 1e32: 54 e0 ldi r21, 0x04 ; 4 + while(!(TIFR1 & _BV(TOV1))); +#ifdef __AVR_ATmega8__ + LED_PORT ^= _BV(LED); + 1e34: 40 e2 ldi r20, 0x20 ; 32 +} + +#if LED_START_FLASHES > 0 +void flash_led(uint8_t count) { + do { + TCNT1 = -(F_CPU/(1024*16)); + 1e36: 3d bd out 0x2d, r19 ; 45 + 1e38: 2c bd out 0x2c, r18 ; 44 + TIFR1 = _BV(TOV1); + 1e3a: 58 bf out 0x38, r21 ; 56 + while(!(TIFR1 & _BV(TOV1))); + 1e3c: 08 b6 in r0, 0x38 ; 56 + 1e3e: 02 fe sbrs r0, 2 + 1e40: fd cf rjmp .-6 ; 0x1e3c +#ifdef __AVR_ATmega8__ + LED_PORT ^= _BV(LED); + 1e42: 88 b3 in r24, 0x18 ; 24 + 1e44: 84 27 eor r24, r20 + 1e46: 88 bb out 0x18, r24 ; 24 +} +#endif + +// Watchdog functions. These are only safe with interrupts turned off. +void watchdogReset() { + __asm__ __volatile__ ( + 1e48: a8 95 wdr + LED_PORT ^= _BV(LED); +#else + LED_PIN |= _BV(LED); +#endif + watchdogReset(); + } while (--count); + 1e4a: 91 50 subi r25, 0x01 ; 1 + 1e4c: a1 f7 brne .-24 ; 0x1e36 + 1e4e: cc 24 eor r12, r12 + 1e50: dd 24 eor r13, r13 + ch = SPM_PAGESIZE / 2; + do { + uint16_t a; + a = *bufPtr++; + a |= (*bufPtr++) << 8; + __boot_page_fill_short((uint16_t)(void*)addrPtr,a); + 1e52: 88 24 eor r8, r8 + 1e54: 83 94 inc r8 + addrPtr += 2; + } while (--ch); + + // Write from programming buffer + __boot_page_write_short((uint16_t)(void*)address); + 1e56: b5 e0 ldi r27, 0x05 ; 5 + 1e58: ab 2e mov r10, r27 + boot_spm_busy_wait(); + +#if defined(RWWSRE) + // Reenable read access to flash + boot_rww_enable(); + 1e5a: a1 e1 ldi r26, 0x11 ; 17 + 1e5c: 9a 2e mov r9, r26 + do *bufPtr++ = getch(); + while (--length); + + // If we are in NRWW section, page erase has to be delayed until now. + // Todo: Take RAMPZ into account + if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); + 1e5e: f3 e0 ldi r31, 0x03 ; 3 + 1e60: bf 2e mov r11, r31 +#endif + + /* Forever loop */ + for (;;) { + /* get character from UART */ + ch = getch(); + 1e62: 9e d0 rcall .+316 ; 0x1fa0 + + if(ch == STK_GET_PARAMETER) { + 1e64: 81 34 cpi r24, 0x41 ; 65 + 1e66: 61 f4 brne .+24 ; 0x1e80 + unsigned char which = getch(); + 1e68: 9b d0 rcall .+310 ; 0x1fa0 + 1e6a: 08 2f mov r16, r24 + verifySpace(); + 1e6c: a4 d0 rcall .+328 ; 0x1fb6 + if (which == 0x82) { + 1e6e: 02 38 cpi r16, 0x82 ; 130 + 1e70: 11 f0 breq .+4 ; 0x1e76 + /* + * Send optiboot version as "minor SW version" + */ + putch(OPTIBOOT_MINVER); + } else if (which == 0x81) { + 1e72: 01 38 cpi r16, 0x81 ; 129 + 1e74: 11 f4 brne .+4 ; 0x1e7a + putch(OPTIBOOT_MAJVER); + 1e76: 84 e0 ldi r24, 0x04 ; 4 + 1e78: 01 c0 rjmp .+2 ; 0x1e7c + } else { + /* + * GET PARAMETER returns a generic 0x03 reply for + * other parameters - enough to keep Avrdude happy + */ + putch(0x03); + 1e7a: 83 e0 ldi r24, 0x03 ; 3 + 1e7c: 8d d0 rcall .+282 ; 0x1f98 + 1e7e: 89 c0 rjmp .+274 ; 0x1f92 + } + } + else if(ch == STK_SET_DEVICE) { + 1e80: 82 34 cpi r24, 0x42 ; 66 + 1e82: 11 f4 brne .+4 ; 0x1e88 + // SET DEVICE is ignored + getNch(20); + 1e84: 84 e1 ldi r24, 0x14 ; 20 + 1e86: 03 c0 rjmp .+6 ; 0x1e8e + } + else if(ch == STK_SET_DEVICE_EXT) { + 1e88: 85 34 cpi r24, 0x45 ; 69 + 1e8a: 19 f4 brne .+6 ; 0x1e92 + // SET DEVICE EXT is ignored + getNch(5); + 1e8c: 85 e0 ldi r24, 0x05 ; 5 + 1e8e: 9b d0 rcall .+310 ; 0x1fc6 + 1e90: 80 c0 rjmp .+256 ; 0x1f92 + } + else if(ch == STK_LOAD_ADDRESS) { + 1e92: 85 35 cpi r24, 0x55 ; 85 + 1e94: 79 f4 brne .+30 ; 0x1eb4 + // LOAD ADDRESS + uint16_t newAddress; + newAddress = getch(); + 1e96: 84 d0 rcall .+264 ; 0x1fa0 + newAddress = (newAddress & 0xff) | (getch() << 8); + 1e98: e8 2e mov r14, r24 + 1e9a: ff 24 eor r15, r15 + 1e9c: 81 d0 rcall .+258 ; 0x1fa0 + 1e9e: 08 2f mov r16, r24 + 1ea0: 10 e0 ldi r17, 0x00 ; 0 + 1ea2: 10 2f mov r17, r16 + 1ea4: 00 27 eor r16, r16 + 1ea6: 0e 29 or r16, r14 + 1ea8: 1f 29 or r17, r15 +#ifdef RAMPZ + // Transfer top bit to RAMPZ + RAMPZ = (newAddress & 0x8000) ? 1 : 0; +#endif + newAddress += newAddress; // Convert from word address to byte address + 1eaa: 00 0f add r16, r16 + 1eac: 11 1f adc r17, r17 + address = newAddress; + verifySpace(); + 1eae: 83 d0 rcall .+262 ; 0x1fb6 + 1eb0: 68 01 movw r12, r16 + 1eb2: 6f c0 rjmp .+222 ; 0x1f92 + } + else if(ch == STK_UNIVERSAL) { + 1eb4: 86 35 cpi r24, 0x56 ; 86 + 1eb6: 21 f4 brne .+8 ; 0x1ec0 + // UNIVERSAL command is ignored + getNch(4); + 1eb8: 84 e0 ldi r24, 0x04 ; 4 + 1eba: 85 d0 rcall .+266 ; 0x1fc6 + putch(0x00); + 1ebc: 80 e0 ldi r24, 0x00 ; 0 + 1ebe: de cf rjmp .-68 ; 0x1e7c + } + /* Write memory, length is big endian and is in bytes */ + else if(ch == STK_PROG_PAGE) { + 1ec0: 84 36 cpi r24, 0x64 ; 100 + 1ec2: 09 f0 breq .+2 ; 0x1ec6 + 1ec4: 40 c0 rjmp .+128 ; 0x1f46 + // PROGRAM PAGE - we support flash programming only, not EEPROM + uint8_t *bufPtr; + uint16_t addrPtr; + + getch(); /* getlen() */ + 1ec6: 6c d0 rcall .+216 ; 0x1fa0 + length = getch(); + 1ec8: 6b d0 rcall .+214 ; 0x1fa0 + 1eca: 08 2f mov r16, r24 + getch(); + 1ecc: 69 d0 rcall .+210 ; 0x1fa0 + + // If we are in RWW section, immediately start page erase + if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); + 1ece: 80 e0 ldi r24, 0x00 ; 0 + 1ed0: c8 16 cp r12, r24 + 1ed2: 88 e1 ldi r24, 0x18 ; 24 + 1ed4: d8 06 cpc r13, r24 + 1ed6: 18 f4 brcc .+6 ; 0x1ede + 1ed8: f6 01 movw r30, r12 + 1eda: b7 be out 0x37, r11 ; 55 + 1edc: e8 95 spm + 1ede: c0 e0 ldi r28, 0x00 ; 0 + 1ee0: d1 e0 ldi r29, 0x01 ; 1 + + // While that is going on, read in page contents + bufPtr = buff; + do *bufPtr++ = getch(); + 1ee2: 5e d0 rcall .+188 ; 0x1fa0 + 1ee4: 89 93 st Y+, r24 + while (--length); + 1ee6: 0c 17 cp r16, r28 + 1ee8: e1 f7 brne .-8 ; 0x1ee2 + + // If we are in NRWW section, page erase has to be delayed until now. + // Todo: Take RAMPZ into account + if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); + 1eea: f0 e0 ldi r31, 0x00 ; 0 + 1eec: cf 16 cp r12, r31 + 1eee: f8 e1 ldi r31, 0x18 ; 24 + 1ef0: df 06 cpc r13, r31 + 1ef2: 18 f0 brcs .+6 ; 0x1efa + 1ef4: f6 01 movw r30, r12 + 1ef6: b7 be out 0x37, r11 ; 55 + 1ef8: e8 95 spm + + // Read command terminator, start reply + verifySpace(); + 1efa: 5d d0 rcall .+186 ; 0x1fb6 + + // If only a partial page is to be programmed, the erase might not be complete. + // So check that here + boot_spm_busy_wait(); + 1efc: 07 b6 in r0, 0x37 ; 55 + 1efe: 00 fc sbrc r0, 0 + 1f00: fd cf rjmp .-6 ; 0x1efc + 1f02: a6 01 movw r20, r12 + 1f04: a0 e0 ldi r26, 0x00 ; 0 + 1f06: b1 e0 ldi r27, 0x01 ; 1 + bufPtr = buff; + addrPtr = (uint16_t)(void*)address; + ch = SPM_PAGESIZE / 2; + do { + uint16_t a; + a = *bufPtr++; + 1f08: 2c 91 ld r18, X + 1f0a: 30 e0 ldi r19, 0x00 ; 0 + a |= (*bufPtr++) << 8; + 1f0c: 11 96 adiw r26, 0x01 ; 1 + 1f0e: 8c 91 ld r24, X + 1f10: 11 97 sbiw r26, 0x01 ; 1 + 1f12: 90 e0 ldi r25, 0x00 ; 0 + 1f14: 98 2f mov r25, r24 + 1f16: 88 27 eor r24, r24 + 1f18: 82 2b or r24, r18 + 1f1a: 93 2b or r25, r19 +#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) +#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) +#endif + +/* main program starts here */ +int main(void) { + 1f1c: 12 96 adiw r26, 0x02 ; 2 + ch = SPM_PAGESIZE / 2; + do { + uint16_t a; + a = *bufPtr++; + a |= (*bufPtr++) << 8; + __boot_page_fill_short((uint16_t)(void*)addrPtr,a); + 1f1e: fa 01 movw r30, r20 + 1f20: 0c 01 movw r0, r24 + 1f22: 87 be out 0x37, r8 ; 55 + 1f24: e8 95 spm + 1f26: 11 24 eor r1, r1 + addrPtr += 2; + 1f28: 4e 5f subi r20, 0xFE ; 254 + 1f2a: 5f 4f sbci r21, 0xFF ; 255 + } while (--ch); + 1f2c: f1 e0 ldi r31, 0x01 ; 1 + 1f2e: a0 34 cpi r26, 0x40 ; 64 + 1f30: bf 07 cpc r27, r31 + 1f32: 51 f7 brne .-44 ; 0x1f08 + + // Write from programming buffer + __boot_page_write_short((uint16_t)(void*)address); + 1f34: f6 01 movw r30, r12 + 1f36: a7 be out 0x37, r10 ; 55 + 1f38: e8 95 spm + boot_spm_busy_wait(); + 1f3a: 07 b6 in r0, 0x37 ; 55 + 1f3c: 00 fc sbrc r0, 0 + 1f3e: fd cf rjmp .-6 ; 0x1f3a + +#if defined(RWWSRE) + // Reenable read access to flash + boot_rww_enable(); + 1f40: 97 be out 0x37, r9 ; 55 + 1f42: e8 95 spm + 1f44: 26 c0 rjmp .+76 ; 0x1f92 +#endif + + } + /* Read memory block mode, length is big endian. */ + else if(ch == STK_READ_PAGE) { + 1f46: 84 37 cpi r24, 0x74 ; 116 + 1f48: b1 f4 brne .+44 ; 0x1f76 + // READ PAGE - we only read flash + getch(); /* getlen() */ + 1f4a: 2a d0 rcall .+84 ; 0x1fa0 + length = getch(); + 1f4c: 29 d0 rcall .+82 ; 0x1fa0 + 1f4e: f8 2e mov r15, r24 + getch(); + 1f50: 27 d0 rcall .+78 ; 0x1fa0 + + verifySpace(); + 1f52: 31 d0 rcall .+98 ; 0x1fb6 + 1f54: f6 01 movw r30, r12 + 1f56: ef 2c mov r14, r15 + putch(result); + address++; + } + while (--length); +#else + do putch(pgm_read_byte_near(address++)); + 1f58: 8f 01 movw r16, r30 + 1f5a: 0f 5f subi r16, 0xFF ; 255 + 1f5c: 1f 4f sbci r17, 0xFF ; 255 + 1f5e: 84 91 lpm r24, Z+ + 1f60: 1b d0 rcall .+54 ; 0x1f98 + while (--length); + 1f62: ea 94 dec r14 + 1f64: f8 01 movw r30, r16 + 1f66: c1 f7 brne .-16 ; 0x1f58 +#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) +#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) +#endif + +/* main program starts here */ +int main(void) { + 1f68: 08 94 sec + 1f6a: c1 1c adc r12, r1 + 1f6c: d1 1c adc r13, r1 + 1f6e: fa 94 dec r15 + 1f70: cf 0c add r12, r15 + 1f72: d1 1c adc r13, r1 + 1f74: 0e c0 rjmp .+28 ; 0x1f92 +#endif +#endif + } + + /* Get device signature bytes */ + else if(ch == STK_READ_SIGN) { + 1f76: 85 37 cpi r24, 0x75 ; 117 + 1f78: 39 f4 brne .+14 ; 0x1f88 + // READ SIGN - return what Avrdude wants to hear + verifySpace(); + 1f7a: 1d d0 rcall .+58 ; 0x1fb6 + putch(SIGNATURE_0); + 1f7c: 8e e1 ldi r24, 0x1E ; 30 + 1f7e: 0c d0 rcall .+24 ; 0x1f98 + putch(SIGNATURE_1); + 1f80: 83 e9 ldi r24, 0x93 ; 147 + 1f82: 0a d0 rcall .+20 ; 0x1f98 + putch(SIGNATURE_2); + 1f84: 87 e0 ldi r24, 0x07 ; 7 + 1f86: 7a cf rjmp .-268 ; 0x1e7c + } + else if (ch == 'Q') { + 1f88: 81 35 cpi r24, 0x51 ; 81 + 1f8a: 11 f4 brne .+4 ; 0x1f90 + // Adaboot no-wait mod + watchdogConfig(WATCHDOG_16MS); + 1f8c: 88 e0 ldi r24, 0x08 ; 8 + 1f8e: 0f d0 rcall .+30 ; 0x1fae + verifySpace(); + } + else { + // This covers the response to commands like STK_ENTER_PROGMODE + verifySpace(); + 1f90: 12 d0 rcall .+36 ; 0x1fb6 + } + putch(STK_OK); + 1f92: 80 e1 ldi r24, 0x10 ; 16 + 1f94: 01 d0 rcall .+2 ; 0x1f98 + 1f96: 65 cf rjmp .-310 ; 0x1e62 + +00001f98 : + } +} + +void putch(char ch) { +#ifndef SOFT_UART + while (!(UCSR0A & _BV(UDRE0))); + 1f98: 5d 9b sbis 0x0b, 5 ; 11 + 1f9a: fe cf rjmp .-4 ; 0x1f98 + UDR0 = ch; + 1f9c: 8c b9 out 0x0c, r24 ; 12 + [uartBit] "I" (UART_TX_BIT) + : + "r25" + ); +#endif +} + 1f9e: 08 95 ret + +00001fa0 : + [uartBit] "I" (UART_RX_BIT) + : + "r25" +); +#else + while(!(UCSR0A & _BV(RXC0))) + 1fa0: 5f 9b sbis 0x0b, 7 ; 11 + 1fa2: fe cf rjmp .-4 ; 0x1fa0 + ; + if (!(UCSR0A & _BV(FE0))) { + 1fa4: 5c 99 sbic 0x0b, 4 ; 11 + 1fa6: 01 c0 rjmp .+2 ; 0x1faa +} +#endif + +// Watchdog functions. These are only safe with interrupts turned off. +void watchdogReset() { + __asm__ __volatile__ ( + 1fa8: a8 95 wdr + * don't care that an invalid char is returned...) + */ + watchdogReset(); + } + + ch = UDR0; + 1faa: 8c b1 in r24, 0x0c ; 12 + LED_PIN |= _BV(LED); +#endif +#endif + + return ch; +} + 1fac: 08 95 ret + +00001fae : + "wdr\n" + ); +} + +void watchdogConfig(uint8_t x) { + WDTCSR = _BV(WDCE) | _BV(WDE); + 1fae: 98 e1 ldi r25, 0x18 ; 24 + 1fb0: 91 bd out 0x21, r25 ; 33 + WDTCSR = x; + 1fb2: 81 bd out 0x21, r24 ; 33 +} + 1fb4: 08 95 ret + +00001fb6 : + do getch(); while (--count); + verifySpace(); +} + +void verifySpace() { + if (getch() != CRC_EOP) { + 1fb6: f4 df rcall .-24 ; 0x1fa0 + 1fb8: 80 32 cpi r24, 0x20 ; 32 + 1fba: 19 f0 breq .+6 ; 0x1fc2 + watchdogConfig(WATCHDOG_16MS); // shorten WD timeout + 1fbc: 88 e0 ldi r24, 0x08 ; 8 + 1fbe: f7 df rcall .-18 ; 0x1fae + 1fc0: ff cf rjmp .-2 ; 0x1fc0 + while (1) // and busy-loop so that WD causes + ; // a reset and app start. + } + putch(STK_INSYNC); + 1fc2: 84 e1 ldi r24, 0x14 ; 20 +} + 1fc4: e9 cf rjmp .-46 ; 0x1f98 + +00001fc6 : + ::[count] "M" (UART_B_VALUE) + ); +} +#endif + +void getNch(uint8_t count) { + 1fc6: 1f 93 push r17 + 1fc8: 18 2f mov r17, r24 + do getch(); while (--count); + 1fca: ea df rcall .-44 ; 0x1fa0 + 1fcc: 11 50 subi r17, 0x01 ; 1 + 1fce: e9 f7 brne .-6 ; 0x1fca + verifySpace(); + 1fd0: f2 df rcall .-28 ; 0x1fb6 +} + 1fd2: 1f 91 pop r17 + 1fd4: 08 95 ret + +00001fd6 : + WDTCSR = _BV(WDCE) | _BV(WDE); + WDTCSR = x; +} + +void appStart() { + watchdogConfig(WATCHDOG_OFF); + 1fd6: 80 e0 ldi r24, 0x00 ; 0 + 1fd8: ea df rcall .-44 ; 0x1fae + __asm__ __volatile__ ( + 1fda: ee 27 eor r30, r30 + 1fdc: ff 27 eor r31, r31 + 1fde: 09 94 ijmp -- cgit v1.2.3-18-g5258