From 2a83ee55b38c81df04d7d3b83d6bf68ed72936e4 Mon Sep 17 00:00:00 2001 From: WestfW Date: Fri, 10 Jun 2011 17:47:47 -0700 Subject: Add a version number to the optiboot source and binary. http://code.google.com/p/arduino/issues/detail?id=554 end of flash memory where they can be read (at least in theory) by device programmers, hex-file examination, or application programs. This is done by putting the version number in a separate section (".version"), and using linker/objcopy magic to locate that section as appropriate for the target chip. (See http://lists.gnu.org/archive/html/avr-gcc-list/2011-02/msg00016.html for some discussion on the details.) Start the version at 4.1 (the last "packaged" version of optiboot was called version 3, so the "top of source" would be 4.0, and adding the version number makes 4.1) Refactor LDSECTION in the Makefile to LDSECTIONS so that multiple section start addresses can be defined. Change the _isp makefile definitions to make the bootloader section readable (but not writable) by the application section. (This would need to be done elsewhere as well to handle all bootloader programming techniques. Notably Arduino's boards.txt Note that this change does not change the "code" portion of optiboot at all. The only diffs in the .hex files are the added version word at the end of flash memory. --- .../optiboot/optiboot_atmega328_pro_8MHz.lst | 494 +++++++++++---------- 1 file changed, 248 insertions(+), 246 deletions(-) (limited to 'bootloaders/optiboot/optiboot_atmega328_pro_8MHz.lst') diff --git a/bootloaders/optiboot/optiboot_atmega328_pro_8MHz.lst b/bootloaders/optiboot/optiboot_atmega328_pro_8MHz.lst index 4cbcf62..d7ce991 100644 --- a/bootloaders/optiboot/optiboot_atmega328_pro_8MHz.lst +++ b/bootloaders/optiboot/optiboot_atmega328_pro_8MHz.lst @@ -3,552 +3,554 @@ optiboot_atmega328_pro_8MHz.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn - 0 .text 000001fc 00007e00 00007e00 00000054 2**1 + 0 .text 000001fc 00000000 00000000 00000054 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 1 .debug_aranges 00000028 00000000 00000000 00000250 2**0 + 1 .version 00000002 00007ffe 00007ffe 00000250 2**0 + CONTENTS, READONLY + 2 .debug_aranges 00000028 00000000 00000000 00000252 2**0 CONTENTS, READONLY, DEBUGGING - 2 .debug_pubnames 0000006a 00000000 00000000 00000278 2**0 + 3 .debug_pubnames 0000006a 00000000 00000000 0000027a 2**0 CONTENTS, READONLY, DEBUGGING - 3 .debug_info 00000284 00000000 00000000 000002e2 2**0 + 4 .debug_info 00000285 00000000 00000000 000002e4 2**0 CONTENTS, READONLY, DEBUGGING - 4 .debug_abbrev 000001ae 00000000 00000000 00000566 2**0 + 5 .debug_abbrev 0000019f 00000000 00000000 00000569 2**0 CONTENTS, READONLY, DEBUGGING - 5 .debug_line 00000450 00000000 00000000 00000714 2**0 + 6 .debug_line 00000453 00000000 00000000 00000708 2**0 CONTENTS, READONLY, DEBUGGING - 6 .debug_frame 00000090 00000000 00000000 00000b64 2**2 + 7 .debug_frame 00000090 00000000 00000000 00000b5c 2**2 CONTENTS, READONLY, DEBUGGING - 7 .debug_str 00000141 00000000 00000000 00000bf4 2**0 + 8 .debug_str 00000141 00000000 00000000 00000bec 2**0 CONTENTS, READONLY, DEBUGGING - 8 .debug_loc 000001e1 00000000 00000000 00000d35 2**0 + 9 .debug_loc 000001e1 00000000 00000000 00000d2d 2**0 CONTENTS, READONLY, DEBUGGING - 9 .debug_ranges 00000068 00000000 00000000 00000f16 2**0 + 10 .debug_ranges 00000068 00000000 00000000 00000f0e 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: -00007e00
: +00000000
: #define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #endif /* main program starts here */ int main(void) { - 7e00: 11 24 eor r1, r1 + 0: 11 24 eor r1, r1 #ifdef __AVR_ATmega8__ SP=RAMEND; // This is done by hardware reset #endif // Adaboot no-wait mod ch = MCUSR; - 7e02: 84 b7 in r24, 0x34 ; 52 + 2: 84 b7 in r24, 0x34 ; 52 MCUSR = 0; - 7e04: 14 be out 0x34, r1 ; 52 + 4: 14 be out 0x34, r1 ; 52 if (!(ch & _BV(EXTRF))) appStart(); - 7e06: 81 ff sbrs r24, 1 - 7e08: e6 d0 rcall .+460 ; 0x7fd6 + 6: 81 ff sbrs r24, 1 + 8: e6 d0 rcall .+460 ; 0x1d6 #if LED_START_FLASHES > 0 // Set up Timer 1 for timeout counter TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 - 7e0a: 85 e0 ldi r24, 0x05 ; 5 - 7e0c: 80 93 81 00 sts 0x0081, r24 + a: 85 e0 ldi r24, 0x05 ; 5 + c: 80 93 81 00 sts 0x0081, r24 UCSRA = _BV(U2X); //Double speed mode USART UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); #else UCSR0A = _BV(U2X0); //Double speed mode USART0 - 7e10: 82 e0 ldi r24, 0x02 ; 2 - 7e12: 80 93 c0 00 sts 0x00C0, r24 + 10: 82 e0 ldi r24, 0x02 ; 2 + 12: 80 93 c0 00 sts 0x00C0, r24 UCSR0B = _BV(RXEN0) | _BV(TXEN0); - 7e16: 88 e1 ldi r24, 0x18 ; 24 - 7e18: 80 93 c1 00 sts 0x00C1, r24 + 16: 88 e1 ldi r24, 0x18 ; 24 + 18: 80 93 c1 00 sts 0x00C1, r24 UCSR0C = _BV(UCSZ00) | _BV(UCSZ01); - 7e1c: 86 e0 ldi r24, 0x06 ; 6 - 7e1e: 80 93 c2 00 sts 0x00C2, r24 + 1c: 86 e0 ldi r24, 0x06 ; 6 + 1e: 80 93 c2 00 sts 0x00C2, r24 UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); - 7e22: 88 e0 ldi r24, 0x08 ; 8 - 7e24: 80 93 c4 00 sts 0x00C4, r24 + 22: 88 e0 ldi r24, 0x08 ; 8 + 24: 80 93 c4 00 sts 0x00C4, r24 #endif #endif // Set up watchdog to trigger after 500ms watchdogConfig(WATCHDOG_1S); - 7e28: 8e e0 ldi r24, 0x0E ; 14 - 7e2a: cf d0 rcall .+414 ; 0x7fca + 28: 8e e0 ldi r24, 0x0E ; 14 + 2a: cf d0 rcall .+414 ; 0x1ca /* Set LED pin as output */ LED_DDR |= _BV(LED); - 7e2c: 25 9a sbi 0x04, 5 ; 4 - 7e2e: 86 e0 ldi r24, 0x06 ; 6 + 2c: 25 9a sbi 0x04, 5 ; 4 + 2e: 86 e0 ldi r24, 0x06 ; 6 } #if LED_START_FLASHES > 0 void flash_led(uint8_t count) { do { TCNT1 = -(F_CPU/(1024*16)); - 7e30: 28 e1 ldi r18, 0x18 ; 24 - 7e32: 3e ef ldi r19, 0xFE ; 254 + 30: 28 e1 ldi r18, 0x18 ; 24 + 32: 3e ef ldi r19, 0xFE ; 254 TIFR1 = _BV(TOV1); - 7e34: 91 e0 ldi r25, 0x01 ; 1 + 34: 91 e0 ldi r25, 0x01 ; 1 } #if LED_START_FLASHES > 0 void flash_led(uint8_t count) { do { TCNT1 = -(F_CPU/(1024*16)); - 7e36: 30 93 85 00 sts 0x0085, r19 - 7e3a: 20 93 84 00 sts 0x0084, r18 + 36: 30 93 85 00 sts 0x0085, r19 + 3a: 20 93 84 00 sts 0x0084, r18 TIFR1 = _BV(TOV1); - 7e3e: 96 bb out 0x16, r25 ; 22 + 3e: 96 bb out 0x16, r25 ; 22 while(!(TIFR1 & _BV(TOV1))); - 7e40: b0 9b sbis 0x16, 0 ; 22 - 7e42: fe cf rjmp .-4 ; 0x7e40 + 40: b0 9b sbis 0x16, 0 ; 22 + 42: fe cf rjmp .-4 ; 0x40 <__SREG__+0x1> #ifdef __AVR_ATmega8__ LED_PORT ^= _BV(LED); #else LED_PIN |= _BV(LED); - 7e44: 1d 9a sbi 0x03, 5 ; 3 + 44: 1d 9a sbi 0x03, 5 ; 3 return getch(); } // Watchdog functions. These are only safe with interrupts turned off. void watchdogReset() { __asm__ __volatile__ ( - 7e46: a8 95 wdr + 46: a8 95 wdr LED_PORT ^= _BV(LED); #else LED_PIN |= _BV(LED); #endif watchdogReset(); } while (--count); - 7e48: 81 50 subi r24, 0x01 ; 1 - 7e4a: a9 f7 brne .-22 ; 0x7e36 + 48: 81 50 subi r24, 0x01 ; 1 + 4a: a9 f7 brne .-22 ; 0x36 <__CCP__+0x2> /* get character from UART */ ch = getch(); if(ch == STK_GET_PARAMETER) { // GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy getNch(1); - 7e4c: dd 24 eor r13, r13 - 7e4e: d3 94 inc r13 + 4c: dd 24 eor r13, r13 + 4e: d3 94 inc r13 __boot_page_fill_short((uint16_t)(void*)addrPtr,a); addrPtr += 2; } while (--ch); - + // Write from programming buffer __boot_page_write_short((uint16_t)(void*)address); - 7e50: a5 e0 ldi r26, 0x05 ; 5 - 7e52: ea 2e mov r14, r26 + 50: a5 e0 ldi r26, 0x05 ; 5 + 52: ea 2e mov r14, r26 boot_spm_busy_wait(); #if defined(RWWSRE) // Reenable read access to flash boot_rww_enable(); - 7e54: f1 e1 ldi r31, 0x11 ; 17 - 7e56: ff 2e mov r15, r31 + 54: f1 e1 ldi r31, 0x11 ; 17 + 56: ff 2e mov r15, r31 #endif /* Forever loop */ for (;;) { /* get character from UART */ ch = getch(); - 7e58: ab d0 rcall .+342 ; 0x7fb0 + 58: ab d0 rcall .+342 ; 0x1b0 if(ch == STK_GET_PARAMETER) { - 7e5a: 81 34 cpi r24, 0x41 ; 65 - 7e5c: 21 f4 brne .+8 ; 0x7e66 + 5a: 81 34 cpi r24, 0x41 ; 65 + 5c: 21 f4 brne .+8 ; 0x66 <__SREG__+0x27> // GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy getNch(1); - 7e5e: 81 e0 ldi r24, 0x01 ; 1 - 7e60: c5 d0 rcall .+394 ; 0x7fec + 5e: 81 e0 ldi r24, 0x01 ; 1 + 60: c5 d0 rcall .+394 ; 0x1ec putch(0x03); - 7e62: 83 e0 ldi r24, 0x03 ; 3 - 7e64: 20 c0 rjmp .+64 ; 0x7ea6 + 62: 83 e0 ldi r24, 0x03 ; 3 + 64: 20 c0 rjmp .+64 ; 0xa6 <__SREG__+0x67> } else if(ch == STK_SET_DEVICE) { - 7e66: 82 34 cpi r24, 0x42 ; 66 - 7e68: 11 f4 brne .+4 ; 0x7e6e + 66: 82 34 cpi r24, 0x42 ; 66 + 68: 11 f4 brne .+4 ; 0x6e <__SREG__+0x2f> // SET DEVICE is ignored getNch(20); - 7e6a: 84 e1 ldi r24, 0x14 ; 20 - 7e6c: 03 c0 rjmp .+6 ; 0x7e74 + 6a: 84 e1 ldi r24, 0x14 ; 20 + 6c: 03 c0 rjmp .+6 ; 0x74 <__SREG__+0x35> } else if(ch == STK_SET_DEVICE_EXT) { - 7e6e: 85 34 cpi r24, 0x45 ; 69 - 7e70: 19 f4 brne .+6 ; 0x7e78 + 6e: 85 34 cpi r24, 0x45 ; 69 + 70: 19 f4 brne .+6 ; 0x78 <__SREG__+0x39> // SET DEVICE EXT is ignored getNch(5); - 7e72: 85 e0 ldi r24, 0x05 ; 5 - 7e74: bb d0 rcall .+374 ; 0x7fec - 7e76: 91 c0 rjmp .+290 ; 0x7f9a + 72: 85 e0 ldi r24, 0x05 ; 5 + 74: bb d0 rcall .+374 ; 0x1ec + 76: 91 c0 rjmp .+290 ; 0x19a <__SREG__+0x15b> } else if(ch == STK_LOAD_ADDRESS) { - 7e78: 85 35 cpi r24, 0x55 ; 85 - 7e7a: 81 f4 brne .+32 ; 0x7e9c + 78: 85 35 cpi r24, 0x55 ; 85 + 7a: 81 f4 brne .+32 ; 0x9c <__SREG__+0x5d> // LOAD ADDRESS uint16_t newAddress; newAddress = getch(); - 7e7c: 99 d0 rcall .+306 ; 0x7fb0 + 7c: 99 d0 rcall .+306 ; 0x1b0 newAddress = (newAddress & 0xff) | (getch() << 8); - 7e7e: 08 2f mov r16, r24 - 7e80: 10 e0 ldi r17, 0x00 ; 0 - 7e82: 96 d0 rcall .+300 ; 0x7fb0 - 7e84: 90 e0 ldi r25, 0x00 ; 0 - 7e86: 98 2f mov r25, r24 - 7e88: 88 27 eor r24, r24 - 7e8a: 80 2b or r24, r16 - 7e8c: 91 2b or r25, r17 + 7e: 08 2f mov r16, r24 + 80: 10 e0 ldi r17, 0x00 ; 0 + 82: 96 d0 rcall .+300 ; 0x1b0 + 84: 90 e0 ldi r25, 0x00 ; 0 + 86: 98 2f mov r25, r24 + 88: 88 27 eor r24, r24 + 8a: 80 2b or r24, r16 + 8c: 91 2b or r25, r17 #ifdef RAMPZ // Transfer top bit to RAMPZ RAMPZ = (newAddress & 0x8000) ? 1 : 0; #endif newAddress += newAddress; // Convert from word address to byte address - 7e8e: 88 0f add r24, r24 - 7e90: 99 1f adc r25, r25 + 8e: 88 0f add r24, r24 + 90: 99 1f adc r25, r25 address = newAddress; - 7e92: 90 93 01 02 sts 0x0201, r25 - 7e96: 80 93 00 02 sts 0x0200, r24 - 7e9a: 7e c0 rjmp .+252 ; 0x7f98 + 92: 90 93 01 02 sts 0x0201, r25 + 96: 80 93 00 02 sts 0x0200, r24 + 9a: 7e c0 rjmp .+252 ; 0x198 <__SREG__+0x159> verifySpace(); } else if(ch == STK_UNIVERSAL) { - 7e9c: 86 35 cpi r24, 0x56 ; 86 - 7e9e: 29 f4 brne .+10 ; 0x7eaa + 9c: 86 35 cpi r24, 0x56 ; 86 + 9e: 29 f4 brne .+10 ; 0xaa <__SREG__+0x6b> // UNIVERSAL command is ignored getNch(4); - 7ea0: 84 e0 ldi r24, 0x04 ; 4 - 7ea2: a4 d0 rcall .+328 ; 0x7fec + a0: 84 e0 ldi r24, 0x04 ; 4 + a2: a4 d0 rcall .+328 ; 0x1ec putch(0x00); - 7ea4: 80 e0 ldi r24, 0x00 ; 0 - 7ea6: 7c d0 rcall .+248 ; 0x7fa0 - 7ea8: 78 c0 rjmp .+240 ; 0x7f9a + a4: 80 e0 ldi r24, 0x00 ; 0 + a6: 7c d0 rcall .+248 ; 0x1a0 + a8: 78 c0 rjmp .+240 ; 0x19a <__SREG__+0x15b> } /* Write memory, length is big endian and is in bytes */ else if(ch == STK_PROG_PAGE) { - 7eaa: 84 36 cpi r24, 0x64 ; 100 - 7eac: 09 f0 breq .+2 ; 0x7eb0 - 7eae: 4e c0 rjmp .+156 ; 0x7f4c + aa: 84 36 cpi r24, 0x64 ; 100 + ac: 09 f0 breq .+2 ; 0xb0 <__SREG__+0x71> + ae: 4e c0 rjmp .+156 ; 0x14c <__SREG__+0x10d> // PROGRAM PAGE - we support flash programming only, not EEPROM uint8_t *bufPtr; uint16_t addrPtr; getLen(); - 7eb0: 87 d0 rcall .+270 ; 0x7fc0 + b0: 87 d0 rcall .+270 ; 0x1c0 // If we are in RWW section, immediately start page erase if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); - 7eb2: e0 91 00 02 lds r30, 0x0200 - 7eb6: f0 91 01 02 lds r31, 0x0201 - 7eba: 80 e7 ldi r24, 0x70 ; 112 - 7ebc: e0 30 cpi r30, 0x00 ; 0 - 7ebe: f8 07 cpc r31, r24 - 7ec0: 18 f4 brcc .+6 ; 0x7ec8 - 7ec2: 83 e0 ldi r24, 0x03 ; 3 - 7ec4: 87 bf out 0x37, r24 ; 55 - 7ec6: e8 95 spm - 7ec8: c0 e0 ldi r28, 0x00 ; 0 - 7eca: d1 e0 ldi r29, 0x01 ; 1 - + b2: e0 91 00 02 lds r30, 0x0200 + b6: f0 91 01 02 lds r31, 0x0201 + ba: 80 e7 ldi r24, 0x70 ; 112 + bc: e0 30 cpi r30, 0x00 ; 0 + be: f8 07 cpc r31, r24 + c0: 18 f4 brcc .+6 ; 0xc8 <__SREG__+0x89> + c2: 83 e0 ldi r24, 0x03 ; 3 + c4: 87 bf out 0x37, r24 ; 55 + c6: e8 95 spm + c8: c0 e0 ldi r28, 0x00 ; 0 + ca: d1 e0 ldi r29, 0x01 ; 1 + // While that is going on, read in page contents bufPtr = buff; do *bufPtr++ = getch(); - 7ecc: 71 d0 rcall .+226 ; 0x7fb0 - 7ece: 89 93 st Y+, r24 + cc: 71 d0 rcall .+226 ; 0x1b0 + ce: 89 93 st Y+, r24 while (--length); - 7ed0: 80 91 02 02 lds r24, 0x0202 - 7ed4: 81 50 subi r24, 0x01 ; 1 - 7ed6: 80 93 02 02 sts 0x0202, r24 - 7eda: 88 23 and r24, r24 - 7edc: b9 f7 brne .-18 ; 0x7ecc + d0: 80 91 02 02 lds r24, 0x0202 + d4: 81 50 subi r24, 0x01 ; 1 + d6: 80 93 02 02 sts 0x0202, r24 + da: 88 23 and r24, r24 + dc: b9 f7 brne .-18 ; 0xcc <__SREG__+0x8d> // If we are in NRWW section, page erase has to be delayed until now. // Todo: Take RAMPZ into account if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); - 7ede: e0 91 00 02 lds r30, 0x0200 - 7ee2: f0 91 01 02 lds r31, 0x0201 - 7ee6: 80 e7 ldi r24, 0x70 ; 112 - 7ee8: e0 30 cpi r30, 0x00 ; 0 - 7eea: f8 07 cpc r31, r24 - 7eec: 18 f0 brcs .+6 ; 0x7ef4 - 7eee: 83 e0 ldi r24, 0x03 ; 3 - 7ef0: 87 bf out 0x37, r24 ; 55 - 7ef2: e8 95 spm + de: e0 91 00 02 lds r30, 0x0200 + e2: f0 91 01 02 lds r31, 0x0201 + e6: 80 e7 ldi r24, 0x70 ; 112 + e8: e0 30 cpi r30, 0x00 ; 0 + ea: f8 07 cpc r31, r24 + ec: 18 f0 brcs .+6 ; 0xf4 <__SREG__+0xb5> + ee: 83 e0 ldi r24, 0x03 ; 3 + f0: 87 bf out 0x37, r24 ; 55 + f2: e8 95 spm // Read command terminator, start reply verifySpace(); - 7ef4: 75 d0 rcall .+234 ; 0x7fe0 - + f4: 75 d0 rcall .+234 ; 0x1e0 + // If only a partial page is to be programmed, the erase might not be complete. // So check that here boot_spm_busy_wait(); - 7ef6: 07 b6 in r0, 0x37 ; 55 - 7ef8: 00 fc sbrc r0, 0 - 7efa: fd cf rjmp .-6 ; 0x7ef6 + f6: 07 b6 in r0, 0x37 ; 55 + f8: 00 fc sbrc r0, 0 + fa: fd cf rjmp .-6 ; 0xf6 <__SREG__+0xb7> } #endif // Copy buffer into programming buffer bufPtr = buff; addrPtr = (uint16_t)(void*)address; - 7efc: 40 91 00 02 lds r20, 0x0200 - 7f00: 50 91 01 02 lds r21, 0x0201 - 7f04: a0 e0 ldi r26, 0x00 ; 0 - 7f06: b1 e0 ldi r27, 0x01 ; 1 + fc: 40 91 00 02 lds r20, 0x0200 + 100: 50 91 01 02 lds r21, 0x0201 + 104: a0 e0 ldi r26, 0x00 ; 0 + 106: b1 e0 ldi r27, 0x01 ; 1 ch = SPM_PAGESIZE / 2; do { uint16_t a; a = *bufPtr++; - 7f08: 2c 91 ld r18, X - 7f0a: 30 e0 ldi r19, 0x00 ; 0 + 108: 2c 91 ld r18, X + 10a: 30 e0 ldi r19, 0x00 ; 0 a |= (*bufPtr++) << 8; - 7f0c: 11 96 adiw r26, 0x01 ; 1 - 7f0e: 8c 91 ld r24, X - 7f10: 11 97 sbiw r26, 0x01 ; 1 - 7f12: 90 e0 ldi r25, 0x00 ; 0 - 7f14: 98 2f mov r25, r24 - 7f16: 88 27 eor r24, r24 - 7f18: 82 2b or r24, r18 - 7f1a: 93 2b or r25, r19 + 10c: 11 96 adiw r26, 0x01 ; 1 + 10e: 8c 91 ld r24, X + 110: 11 97 sbiw r26, 0x01 ; 1 + 112: 90 e0 ldi r25, 0x00 ; 0 + 114: 98 2f mov r25, r24 + 116: 88 27 eor r24, r24 + 118: 82 2b or r24, r18 + 11a: 93 2b or r25, r19 #define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #endif /* main program starts here */ int main(void) { - 7f1c: 12 96 adiw r26, 0x02 ; 2 + 11c: 12 96 adiw r26, 0x02 ; 2 ch = SPM_PAGESIZE / 2; do { uint16_t a; a = *bufPtr++; a |= (*bufPtr++) << 8; __boot_page_fill_short((uint16_t)(void*)addrPtr,a); - 7f1e: fa 01 movw r30, r20 - 7f20: 0c 01 movw r0, r24 - 7f22: d7 be out 0x37, r13 ; 55 - 7f24: e8 95 spm - 7f26: 11 24 eor r1, r1 + 11e: fa 01 movw r30, r20 + 120: 0c 01 movw r0, r24 + 122: d7 be out 0x37, r13 ; 55 + 124: e8 95 spm + 126: 11 24 eor r1, r1 addrPtr += 2; - 7f28: 4e 5f subi r20, 0xFE ; 254 - 7f2a: 5f 4f sbci r21, 0xFF ; 255 + 128: 4e 5f subi r20, 0xFE ; 254 + 12a: 5f 4f sbci r21, 0xFF ; 255 } while (--ch); - 7f2c: f1 e0 ldi r31, 0x01 ; 1 - 7f2e: a0 38 cpi r26, 0x80 ; 128 - 7f30: bf 07 cpc r27, r31 - 7f32: 51 f7 brne .-44 ; 0x7f08 - + 12c: f1 e0 ldi r31, 0x01 ; 1 + 12e: a0 38 cpi r26, 0x80 ; 128 + 130: bf 07 cpc r27, r31 + 132: 51 f7 brne .-44 ; 0x108 <__SREG__+0xc9> + // Write from programming buffer __boot_page_write_short((uint16_t)(void*)address); - 7f34: e0 91 00 02 lds r30, 0x0200 - 7f38: f0 91 01 02 lds r31, 0x0201 - 7f3c: e7 be out 0x37, r14 ; 55 - 7f3e: e8 95 spm + 134: e0 91 00 02 lds r30, 0x0200 + 138: f0 91 01 02 lds r31, 0x0201 + 13c: e7 be out 0x37, r14 ; 55 + 13e: e8 95 spm boot_spm_busy_wait(); - 7f40: 07 b6 in r0, 0x37 ; 55 - 7f42: 00 fc sbrc r0, 0 - 7f44: fd cf rjmp .-6 ; 0x7f40 + 140: 07 b6 in r0, 0x37 ; 55 + 142: 00 fc sbrc r0, 0 + 144: fd cf rjmp .-6 ; 0x140 <__SREG__+0x101> #if defined(RWWSRE) // Reenable read access to flash boot_rww_enable(); - 7f46: f7 be out 0x37, r15 ; 55 - 7f48: e8 95 spm - 7f4a: 27 c0 rjmp .+78 ; 0x7f9a + 146: f7 be out 0x37, r15 ; 55 + 148: e8 95 spm + 14a: 27 c0 rjmp .+78 ; 0x19a <__SREG__+0x15b> #endif } /* Read memory block mode, length is big endian. */ else if(ch == STK_READ_PAGE) { - 7f4c: 84 37 cpi r24, 0x74 ; 116 - 7f4e: b9 f4 brne .+46 ; 0x7f7e + 14c: 84 37 cpi r24, 0x74 ; 116 + 14e: b9 f4 brne .+46 ; 0x17e <__SREG__+0x13f> // READ PAGE - we only read flash getLen(); - 7f50: 37 d0 rcall .+110 ; 0x7fc0 + 150: 37 d0 rcall .+110 ; 0x1c0 verifySpace(); - 7f52: 46 d0 rcall .+140 ; 0x7fe0 + 152: 46 d0 rcall .+140 ; 0x1e0 putch(result); address++; } while (--length); #else do putch(pgm_read_byte_near(address++)); - 7f54: e0 91 00 02 lds r30, 0x0200 - 7f58: f0 91 01 02 lds r31, 0x0201 - 7f5c: 31 96 adiw r30, 0x01 ; 1 - 7f5e: f0 93 01 02 sts 0x0201, r31 - 7f62: e0 93 00 02 sts 0x0200, r30 - 7f66: 31 97 sbiw r30, 0x01 ; 1 - 7f68: e4 91 lpm r30, Z+ - 7f6a: 8e 2f mov r24, r30 - 7f6c: 19 d0 rcall .+50 ; 0x7fa0 + 154: e0 91 00 02 lds r30, 0x0200 + 158: f0 91 01 02 lds r31, 0x0201 + 15c: 31 96 adiw r30, 0x01 ; 1 + 15e: f0 93 01 02 sts 0x0201, r31 + 162: e0 93 00 02 sts 0x0200, r30 + 166: 31 97 sbiw r30, 0x01 ; 1 + 168: e4 91 lpm r30, Z+ + 16a: 8e 2f mov r24, r30 + 16c: 19 d0 rcall .+50 ; 0x1a0 while (--length); - 7f6e: 80 91 02 02 lds r24, 0x0202 - 7f72: 81 50 subi r24, 0x01 ; 1 - 7f74: 80 93 02 02 sts 0x0202, r24 - 7f78: 88 23 and r24, r24 - 7f7a: 61 f7 brne .-40 ; 0x7f54 - 7f7c: 0e c0 rjmp .+28 ; 0x7f9a + 16e: 80 91 02 02 lds r24, 0x0202 + 172: 81 50 subi r24, 0x01 ; 1 + 174: 80 93 02 02 sts 0x0202, r24 + 178: 88 23 and r24, r24 + 17a: 61 f7 brne .-40 ; 0x154 <__SREG__+0x115> + 17c: 0e c0 rjmp .+28 ; 0x19a <__SREG__+0x15b> #endif #endif } /* Get device signature bytes */ else if(ch == STK_READ_SIGN) { - 7f7e: 85 37 cpi r24, 0x75 ; 117 - 7f80: 39 f4 brne .+14 ; 0x7f90 + 17e: 85 37 cpi r24, 0x75 ; 117 + 180: 39 f4 brne .+14 ; 0x190 <__SREG__+0x151> // READ SIGN - return what Avrdude wants to hear verifySpace(); - 7f82: 2e d0 rcall .+92 ; 0x7fe0 + 182: 2e d0 rcall .+92 ; 0x1e0 putch(SIGNATURE_0); - 7f84: 8e e1 ldi r24, 0x1E ; 30 - 7f86: 0c d0 rcall .+24 ; 0x7fa0 + 184: 8e e1 ldi r24, 0x1E ; 30 + 186: 0c d0 rcall .+24 ; 0x1a0 putch(SIGNATURE_1); - 7f88: 85 e9 ldi r24, 0x95 ; 149 - 7f8a: 0a d0 rcall .+20 ; 0x7fa0 + 188: 85 e9 ldi r24, 0x95 ; 149 + 18a: 0a d0 rcall .+20 ; 0x1a0 putch(SIGNATURE_2); - 7f8c: 8f e0 ldi r24, 0x0F ; 15 - 7f8e: 8b cf rjmp .-234 ; 0x7ea6 + 18c: 8f e0 ldi r24, 0x0F ; 15 + 18e: 8b cf rjmp .-234 ; 0xa6 <__SREG__+0x67> } else if (ch == 'Q') { - 7f90: 81 35 cpi r24, 0x51 ; 81 - 7f92: 11 f4 brne .+4 ; 0x7f98 + 190: 81 35 cpi r24, 0x51 ; 81 + 192: 11 f4 brne .+4 ; 0x198 <__SREG__+0x159> // Adaboot no-wait mod watchdogConfig(WATCHDOG_16MS); - 7f94: 88 e0 ldi r24, 0x08 ; 8 - 7f96: 19 d0 rcall .+50 ; 0x7fca + 194: 88 e0 ldi r24, 0x08 ; 8 + 196: 19 d0 rcall .+50 ; 0x1ca verifySpace(); } else { // This covers the response to commands like STK_ENTER_PROGMODE verifySpace(); - 7f98: 23 d0 rcall .+70 ; 0x7fe0 + 198: 23 d0 rcall .+70 ; 0x1e0 } putch(STK_OK); - 7f9a: 80 e1 ldi r24, 0x10 ; 16 - 7f9c: 01 d0 rcall .+2 ; 0x7fa0 - 7f9e: 5c cf rjmp .-328 ; 0x7e58 + 19a: 80 e1 ldi r24, 0x10 ; 16 + 19c: 01 d0 rcall .+2 ; 0x1a0 + 19e: 5c cf rjmp .-328 ; 0x58 <__SREG__+0x19> -00007fa0 : +000001a0 : } } void putch(char ch) { - 7fa0: 98 2f mov r25, r24 + 1a0: 98 2f mov r25, r24 #ifndef SOFT_UART while (!(UCSR0A & _BV(UDRE0))); - 7fa2: 80 91 c0 00 lds r24, 0x00C0 - 7fa6: 85 ff sbrs r24, 5 - 7fa8: fc cf rjmp .-8 ; 0x7fa2 + 1a2: 80 91 c0 00 lds r24, 0x00C0 + 1a6: 85 ff sbrs r24, 5 + 1a8: fc cf rjmp .-8 ; 0x1a2 UDR0 = ch; - 7faa: 90 93 c6 00 sts 0x00C6, r25 + 1aa: 90 93 c6 00 sts 0x00C6, r25 [uartBit] "I" (UART_TX_BIT) : "r25" ); #endif } - 7fae: 08 95 ret + 1ae: 08 95 ret -00007fb0 : +000001b0 : return getch(); } // Watchdog functions. These are only safe with interrupts turned off. void watchdogReset() { __asm__ __volatile__ ( - 7fb0: a8 95 wdr + 1b0: a8 95 wdr [uartBit] "I" (UART_RX_BIT) : "r25" ); #else while(!(UCSR0A & _BV(RXC0))); - 7fb2: 80 91 c0 00 lds r24, 0x00C0 - 7fb6: 87 ff sbrs r24, 7 - 7fb8: fc cf rjmp .-8 ; 0x7fb2 + 1b2: 80 91 c0 00 lds r24, 0x00C0 + 1b6: 87 ff sbrs r24, 7 + 1b8: fc cf rjmp .-8 ; 0x1b2 ch = UDR0; - 7fba: 80 91 c6 00 lds r24, 0x00C6 + 1ba: 80 91 c6 00 lds r24, 0x00C6 LED_PIN |= _BV(LED); #endif #endif return ch; } - 7fbe: 08 95 ret + 1be: 08 95 ret -00007fc0 : +000001c0 : } while (--count); } #endif uint8_t getLen() { getch(); - 7fc0: f7 df rcall .-18 ; 0x7fb0 + 1c0: f7 df rcall .-18 ; 0x1b0 length = getch(); - 7fc2: f6 df rcall .-20 ; 0x7fb0 - 7fc4: 80 93 02 02 sts 0x0202, r24 + 1c2: f6 df rcall .-20 ; 0x1b0 + 1c4: 80 93 02 02 sts 0x0202, r24 return getch(); } - 7fc8: f3 cf rjmp .-26 ; 0x7fb0 + 1c8: f3 cf rjmp .-26 ; 0x1b0 -00007fca : +000001ca : "wdr\n" ); } void watchdogConfig(uint8_t x) { WDTCSR = _BV(WDCE) | _BV(WDE); - 7fca: e0 e6 ldi r30, 0x60 ; 96 - 7fcc: f0 e0 ldi r31, 0x00 ; 0 - 7fce: 98 e1 ldi r25, 0x18 ; 24 - 7fd0: 90 83 st Z, r25 + 1ca: e0 e6 ldi r30, 0x60 ; 96 + 1cc: f0 e0 ldi r31, 0x00 ; 0 + 1ce: 98 e1 ldi r25, 0x18 ; 24 + 1d0: 90 83 st Z, r25 WDTCSR = x; - 7fd2: 80 83 st Z, r24 + 1d2: 80 83 st Z, r24 } - 7fd4: 08 95 ret + 1d4: 08 95 ret -00007fd6 : +000001d6 : void appStart() { watchdogConfig(WATCHDOG_OFF); - 7fd6: 80 e0 ldi r24, 0x00 ; 0 - 7fd8: f8 df rcall .-16 ; 0x7fca + 1d6: 80 e0 ldi r24, 0x00 ; 0 + 1d8: f8 df rcall .-16 ; 0x1ca __asm__ __volatile__ ( - 7fda: ee 27 eor r30, r30 - 7fdc: ff 27 eor r31, r31 - 7fde: 09 94 ijmp + 1da: ee 27 eor r30, r30 + 1dc: ff 27 eor r31, r31 + 1de: 09 94 ijmp -00007fe0 : +000001e0 : do getch(); while (--count); verifySpace(); } void verifySpace() { if (getch() != CRC_EOP) appStart(); - 7fe0: e7 df rcall .-50 ; 0x7fb0 - 7fe2: 80 32 cpi r24, 0x20 ; 32 - 7fe4: 09 f0 breq .+2 ; 0x7fe8 - 7fe6: f7 df rcall .-18 ; 0x7fd6 + 1e0: e7 df rcall .-50 ; 0x1b0 + 1e2: 80 32 cpi r24, 0x20 ; 32 + 1e4: 09 f0 breq .+2 ; 0x1e8 + 1e6: f7 df rcall .-18 ; 0x1d6 putch(STK_INSYNC); - 7fe8: 84 e1 ldi r24, 0x14 ; 20 + 1e8: 84 e1 ldi r24, 0x14 ; 20 } - 7fea: da cf rjmp .-76 ; 0x7fa0 + 1ea: da cf rjmp .-76 ; 0x1a0 -00007fec : +000001ec : ::[count] "M" (UART_B_VALUE) ); } #endif void getNch(uint8_t count) { - 7fec: 1f 93 push r17 - 7fee: 18 2f mov r17, r24 + 1ec: 1f 93 push r17 + 1ee: 18 2f mov r17, r24 do getch(); while (--count); - 7ff0: df df rcall .-66 ; 0x7fb0 - 7ff2: 11 50 subi r17, 0x01 ; 1 - 7ff4: e9 f7 brne .-6 ; 0x7ff0 + 1f0: df df rcall .-66 ; 0x1b0 + 1f2: 11 50 subi r17, 0x01 ; 1 + 1f4: e9 f7 brne .-6 ; 0x1f0 verifySpace(); - 7ff6: f4 df rcall .-24 ; 0x7fe0 + 1f6: f4 df rcall .-24 ; 0x1e0 } - 7ff8: 1f 91 pop r17 - 7ffa: 08 95 ret + 1f8: 1f 91 pop r17 + 1fa: 08 95 ret -- cgit v1.2.3-18-g5258